1 /* 2 * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #pragma once 8 9 #include <stdint.h> 10 #include <stdbool.h> 11 #include "soc/efuse_periph.h" 12 #include "hal/assert.h" 13 #include "esp32c6/rom/efuse.h" 14 15 #ifdef __cplusplus 16 extern "C" { 17 #endif 18 19 typedef enum { 20 EFUSE_CONTROLLER_STATE_RESET = 0, ///< efuse_controllerid is on reset state. 21 EFUSE_CONTROLLER_STATE_IDLE = 1, ///< efuse_controllerid is on idle state. 22 EFUSE_CONTROLLER_STATE_READ_INIT = 2, ///< efuse_controllerid is on read init state. 23 EFUSE_CONTROLLER_STATE_READ_BLK0 = 3, ///< efuse_controllerid is on reading block0 state. 24 EFUSE_CONTROLLER_STATE_BLK0_CRC_CHECK = 4, ///< efuse_controllerid is on checking block0 crc state. 25 EFUSE_CONTROLLER_STATE_READ_RS_BLK = 5, ///< efuse_controllerid is on reading RS block state. 26 } efuse_controller_state_t; 27 28 // Always inline these functions even no gcc optimization is applied. 29 30 /******************* eFuse fields *************************/ 31 efuse_ll_get_flash_crypt_cnt(void)32__attribute__((always_inline)) static inline uint32_t efuse_ll_get_flash_crypt_cnt(void) 33 { 34 return EFUSE.rd_repeat_data1.spi_boot_crypt_cnt; 35 } 36 efuse_ll_get_wdt_delay_sel(void)37__attribute__((always_inline)) static inline uint32_t efuse_ll_get_wdt_delay_sel(void) 38 { 39 return EFUSE.rd_repeat_data1.wdt_delay_sel; 40 } 41 efuse_ll_get_mac0(void)42__attribute__((always_inline)) static inline uint32_t efuse_ll_get_mac0(void) 43 { 44 return EFUSE.rd_mac_spi_sys_0.mac_0; 45 } 46 efuse_ll_get_mac1(void)47__attribute__((always_inline)) static inline uint32_t efuse_ll_get_mac1(void) 48 { 49 return EFUSE.rd_mac_spi_sys_1.mac_1; 50 } 51 efuse_ll_get_secure_boot_v2_en(void)52__attribute__((always_inline)) static inline bool efuse_ll_get_secure_boot_v2_en(void) 53 { 54 return EFUSE.rd_repeat_data2.secure_boot_en; 55 } 56 57 // use efuse_hal_get_major_chip_version() to get major chip version efuse_ll_get_chip_wafer_version_major(void)58__attribute__((always_inline)) static inline uint32_t efuse_ll_get_chip_wafer_version_major(void) 59 { 60 return EFUSE.rd_mac_spi_sys_3.wafer_version_major; 61 } 62 63 // use efuse_hal_get_minor_chip_version() to get minor chip version efuse_ll_get_chip_wafer_version_minor(void)64__attribute__((always_inline)) static inline uint32_t efuse_ll_get_chip_wafer_version_minor(void) 65 { 66 return EFUSE.rd_mac_spi_sys_3.wafer_version_minor; 67 } 68 efuse_ll_get_disable_wafer_version_major(void)69__attribute__((always_inline)) static inline bool efuse_ll_get_disable_wafer_version_major(void) 70 { 71 return EFUSE.rd_repeat_data4.disable_wafer_version_major; 72 } 73 efuse_ll_get_active_hp_dbias(void)74__attribute__((always_inline)) static inline uint32_t efuse_ll_get_active_hp_dbias(void) 75 { 76 return EFUSE.rd_mac_spi_sys_2.active_hp_dbias; 77 } 78 efuse_ll_get_active_lp_dbias(void)79__attribute__((always_inline)) static inline uint32_t efuse_ll_get_active_lp_dbias(void) 80 { 81 return EFUSE.rd_mac_spi_sys_2.active_lp_dbias; 82 } 83 efuse_ll_get_lslp_dbg(void)84__attribute__((always_inline)) static inline uint32_t efuse_ll_get_lslp_dbg(void) 85 { 86 return EFUSE.rd_mac_spi_sys_2.lslp_hp_dbg; 87 } 88 efuse_ll_get_lslp_hp_dbias(void)89__attribute__((always_inline)) static inline uint32_t efuse_ll_get_lslp_hp_dbias(void) 90 { 91 return EFUSE.rd_mac_spi_sys_2.lslp_hp_dbias; 92 } 93 efuse_ll_get_dslp_dbg(void)94__attribute__((always_inline)) static inline uint32_t efuse_ll_get_dslp_dbg(void) 95 { 96 return EFUSE.rd_mac_spi_sys_2.dslp_lp_dbg; 97 } 98 efuse_ll_get_dslp_lp_dbias(void)99__attribute__((always_inline)) static inline uint32_t efuse_ll_get_dslp_lp_dbias(void) 100 { 101 return EFUSE.rd_mac_spi_sys_2.dslp_lp_dbias; 102 } 103 efuse_ll_get_dbias_vol_gap(void)104__attribute__((always_inline)) static inline int32_t efuse_ll_get_dbias_vol_gap(void) 105 { 106 return EFUSE.rd_mac_spi_sys_2.dbias_vol_gap; 107 } 108 efuse_ll_get_blk_version_major(void)109__attribute__((always_inline)) static inline uint32_t efuse_ll_get_blk_version_major(void) 110 { 111 return EFUSE.rd_mac_spi_sys_3.blk_version_major; 112 } 113 efuse_ll_get_blk_version_minor(void)114__attribute__((always_inline)) static inline uint32_t efuse_ll_get_blk_version_minor(void) 115 { 116 return EFUSE.rd_mac_spi_sys_3.blk_version_minor; 117 } 118 efuse_ll_get_disable_blk_version_major(void)119__attribute__((always_inline)) static inline bool efuse_ll_get_disable_blk_version_major(void) 120 { 121 return EFUSE.rd_repeat_data4.disable_blk_version_major; 122 } 123 efuse_ll_get_chip_ver_pkg(void)124__attribute__((always_inline)) static inline uint32_t efuse_ll_get_chip_ver_pkg(void) 125 { 126 return EFUSE.rd_mac_spi_sys_3.pkg_version; 127 } 128 efuse_ll_get_ocode(void)129__attribute__((always_inline)) static inline uint32_t efuse_ll_get_ocode(void) 130 { 131 return EFUSE.rd_sys_part1_data4.ocode; 132 } 133 134 /******************* eFuse control functions *************************/ 135 efuse_ll_get_read_cmd(void)136__attribute__((always_inline)) static inline bool efuse_ll_get_read_cmd(void) 137 { 138 return EFUSE.cmd.read_cmd; 139 } 140 efuse_ll_get_pgm_cmd(void)141__attribute__((always_inline)) static inline bool efuse_ll_get_pgm_cmd(void) 142 { 143 return EFUSE.cmd.pgm_cmd; 144 } 145 efuse_ll_set_read_cmd(void)146__attribute__((always_inline)) static inline void efuse_ll_set_read_cmd(void) 147 { 148 EFUSE.cmd.read_cmd = 1; 149 } 150 efuse_ll_set_pgm_cmd(uint32_t block)151__attribute__((always_inline)) static inline void efuse_ll_set_pgm_cmd(uint32_t block) 152 { 153 HAL_ASSERT(block < ETS_EFUSE_BLOCK_MAX); 154 EFUSE.cmd.val = ((block << EFUSE_BLK_NUM_S) & EFUSE_BLK_NUM_M) | EFUSE_PGM_CMD; 155 } 156 efuse_ll_set_conf_read_op_code(void)157__attribute__((always_inline)) static inline void efuse_ll_set_conf_read_op_code(void) 158 { 159 EFUSE.conf.op_code = EFUSE_READ_OP_CODE; 160 } 161 efuse_ll_set_conf_write_op_code(void)162__attribute__((always_inline)) static inline void efuse_ll_set_conf_write_op_code(void) 163 { 164 EFUSE.conf.op_code = EFUSE_WRITE_OP_CODE; 165 } 166 efuse_ll_set_dac_num(uint8_t val)167__attribute__((always_inline)) static inline void efuse_ll_set_dac_num(uint8_t val) 168 { 169 EFUSE.dac_conf.dac_num = val; 170 } 171 efuse_ll_set_dac_clk_div(uint8_t val)172__attribute__((always_inline)) static inline void efuse_ll_set_dac_clk_div(uint8_t val) 173 { 174 EFUSE.dac_conf.dac_clk_div = val; 175 } 176 efuse_ll_set_pwr_on_num(uint16_t val)177__attribute__((always_inline)) static inline void efuse_ll_set_pwr_on_num(uint16_t val) 178 { 179 EFUSE.wr_tim_conf1.pwr_on_num = val; 180 } 181 efuse_ll_set_pwr_off_num(uint16_t value)182__attribute__((always_inline)) static inline void efuse_ll_set_pwr_off_num(uint16_t value) 183 { 184 EFUSE.wr_tim_conf2.pwr_off_num = value; 185 } 186 efuse_ll_get_controller_state(void)187__attribute__((always_inline)) static inline uint32_t efuse_ll_get_controller_state(void) 188 { 189 return EFUSE.status.state; 190 } 191 192 /******************* eFuse control functions *************************/ 193 194 #ifdef __cplusplus 195 } 196 #endif 197