1 /* 2 * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #pragma once 8 9 #include <stdint.h> 10 #include <stdbool.h> 11 #include "soc/efuse_periph.h" 12 #include "hal/assert.h" 13 14 #ifdef __cplusplus 15 extern "C" { 16 #endif 17 18 #define ESP_EFUSE_BLOCK_ERROR_BITS(error_reg, block) ((error_reg) & (0x0F << (4 * (block)))) 19 20 // Always inline these functions even no gcc optimization is applied. 21 22 /******************* eFuse fields *************************/ 23 efuse_ll_get_flash_crypt_cnt(void)24__attribute__((always_inline)) static inline uint32_t efuse_ll_get_flash_crypt_cnt(void) 25 { 26 return EFUSE.blk0_rdata0.rd_flash_crypt_cnt; 27 } 28 efuse_ll_get_mac0(void)29__attribute__((always_inline)) static inline uint32_t efuse_ll_get_mac0(void) 30 { 31 return EFUSE.blk0_rdata1.rd_mac; 32 } 33 efuse_ll_get_mac1(void)34__attribute__((always_inline)) static inline uint32_t efuse_ll_get_mac1(void) 35 { 36 return EFUSE.blk0_rdata2.rd_mac_1; 37 } 38 efuse_ll_get_secure_boot_v1_en(void)39__attribute__((always_inline)) static inline bool efuse_ll_get_secure_boot_v1_en(void) 40 { 41 return EFUSE.blk0_rdata6.rd_abs_done_0; 42 } 43 efuse_ll_get_secure_boot_v2_en(void)44__attribute__((always_inline)) static inline bool efuse_ll_get_secure_boot_v2_en(void) 45 { 46 return EFUSE.blk0_rdata6.rd_abs_done_1; 47 } 48 efuse_ll_get_sdio_force(void)49__attribute__((always_inline)) static inline bool efuse_ll_get_sdio_force(void) 50 { 51 return EFUSE.blk0_rdata4.rd_xpd_sdio_force; 52 } 53 efuse_ll_get_xpd_sdio(void)54__attribute__((always_inline)) static inline bool efuse_ll_get_xpd_sdio(void) 55 { 56 return EFUSE.blk0_rdata4.rd_xpd_sdio_reg; 57 } 58 efuse_ll_get_sdio_tieh(void)59__attribute__((always_inline)) static inline bool efuse_ll_get_sdio_tieh(void) 60 { 61 return EFUSE.blk0_rdata4.rd_xpd_sdio_tieh; 62 } 63 efuse_ll_get_sdio_drefh(void)64__attribute__((always_inline)) static inline uint32_t efuse_ll_get_sdio_drefh(void) 65 { 66 return (EFUSE.blk0_rdata4.val >> 8) & 0x3; 67 } 68 efuse_ll_get_sdio_drefm(void)69__attribute__((always_inline)) static inline uint32_t efuse_ll_get_sdio_drefm(void) 70 { 71 return (EFUSE.blk0_rdata4.val >> 10) & 0x3; 72 } 73 efuse_ll_get_sdio_drefl(void)74__attribute__((always_inline)) static inline uint32_t efuse_ll_get_sdio_drefl(void) 75 { 76 return (EFUSE.blk0_rdata4.val >> 12) & 0x3; 77 } 78 efuse_ll_get_blk3_part_reserve(void)79__attribute__((always_inline)) static inline bool efuse_ll_get_blk3_part_reserve(void) 80 { 81 return EFUSE.blk0_rdata3.rd_blk3_part_reserve; 82 } 83 efuse_ll_get_chip_cpu_freq_rated(void)84__attribute__((always_inline)) static inline bool efuse_ll_get_chip_cpu_freq_rated(void) 85 { 86 return EFUSE.blk0_rdata3.rd_chip_cpu_freq_rated; 87 } 88 efuse_ll_get_chip_cpu_freq_low(void)89__attribute__((always_inline)) static inline bool efuse_ll_get_chip_cpu_freq_low(void) 90 { 91 return EFUSE.blk0_rdata3.rd_chip_cpu_freq_low; 92 } 93 efuse_ll_get_chip_ver_pkg(void)94__attribute__((always_inline)) static inline uint32_t efuse_ll_get_chip_ver_pkg(void) 95 { 96 return (EFUSE.blk0_rdata3.rd_chip_package_4bit << 3) | EFUSE.blk0_rdata3.rd_chip_package; 97 } 98 99 // use efuse_hal_get_major_chip_version() to get full major chip version efuse_ll_get_chip_ver_rev1(void)100__attribute__((always_inline)) static inline bool efuse_ll_get_chip_ver_rev1(void) 101 { 102 return EFUSE.blk0_rdata3.rd_chip_ver_rev1; 103 } 104 105 // use efuse_hal_get_major_chip_version() to get full major chip version efuse_ll_get_chip_ver_rev2(void)106__attribute__((always_inline)) static inline bool efuse_ll_get_chip_ver_rev2(void) 107 { 108 return EFUSE.blk0_rdata5.rd_chip_ver_rev2; 109 } 110 111 // use efuse_hal_get_minor_chip_version() to get minor chip version efuse_ll_get_chip_wafer_version_minor(void)112__attribute__((always_inline)) static inline uint32_t efuse_ll_get_chip_wafer_version_minor(void) 113 { 114 return EFUSE.blk0_rdata5.rd_wafer_version_minor; 115 } 116 efuse_ll_get_disable_wafer_version_major(void)117__attribute__((always_inline)) static inline bool efuse_ll_get_disable_wafer_version_major(void) 118 { 119 return false; 120 } 121 efuse_ll_get_blk_version_major(void)122__attribute__((always_inline)) static inline bool efuse_ll_get_blk_version_major(void) 123 { 124 return 0; 125 } 126 efuse_ll_get_blk_version_minor(void)127__attribute__((always_inline)) static inline uint32_t efuse_ll_get_blk_version_minor(void) 128 { 129 return 0; 130 } 131 efuse_ll_get_coding_scheme(void)132__attribute__((always_inline)) static inline uint32_t efuse_ll_get_coding_scheme(void) 133 { 134 return EFUSE.blk0_rdata6.rd_coding_scheme; 135 } 136 efuse_ll_get_disable_app_cpu(void)137__attribute__((always_inline)) static inline bool efuse_ll_get_disable_app_cpu(void) 138 { 139 return EFUSE.blk0_rdata3.rd_disable_app_cpu; 140 } 141 efuse_ll_get_disable_bt(void)142__attribute__((always_inline)) static inline bool efuse_ll_get_disable_bt(void) 143 { 144 return EFUSE.blk0_rdata3.rd_disable_bt; 145 } 146 efuse_ll_get_vol_level_hp_inv(void)147__attribute__((always_inline)) static inline uint32_t efuse_ll_get_vol_level_hp_inv(void) 148 { 149 return EFUSE.blk0_rdata5.rd_vol_level_hp_inv; 150 } 151 efuse_ll_get_adc_vref(void)152__attribute__((always_inline)) static inline uint32_t efuse_ll_get_adc_vref(void) 153 { 154 return EFUSE.blk0_rdata4.rd_adc_vref; 155 } 156 efuse_ll_get_adc1_tp_low(void)157__attribute__((always_inline)) static inline uint32_t efuse_ll_get_adc1_tp_low(void) 158 { 159 return EFUSE.blk3_rdata3.rd_adc1_tp_low; 160 } 161 efuse_ll_get_adc2_tp_low(void)162__attribute__((always_inline)) static inline uint32_t efuse_ll_get_adc2_tp_low(void) 163 { 164 return EFUSE.blk3_rdata3.rd_adc2_tp_low; 165 } 166 efuse_ll_get_adc1_tp_high(void)167__attribute__((always_inline)) static inline uint32_t efuse_ll_get_adc1_tp_high(void) 168 { 169 return EFUSE.blk3_rdata3.rd_adc1_tp_high; 170 } 171 efuse_ll_get_adc2_tp_high(void)172__attribute__((always_inline)) static inline uint32_t efuse_ll_get_adc2_tp_high(void) 173 { 174 return EFUSE.blk3_rdata3.rd_adc2_tp_high; 175 } 176 efuse_ll_get_dec_warnings(unsigned block)177__attribute__((always_inline)) static inline bool efuse_ll_get_dec_warnings(unsigned block) 178 { 179 if (block == 0 || block > 4) { 180 return false; 181 } 182 uint32_t error_reg = EFUSE.dec_status.dec_warnings; 183 return ESP_EFUSE_BLOCK_ERROR_BITS(error_reg, block - 1) != 0; 184 } 185 186 /******************* eFuse control functions *************************/ 187 efuse_ll_get_cmd(void)188__attribute__((always_inline)) static inline bool efuse_ll_get_cmd(void) 189 { 190 return EFUSE.cmd.val; 191 } 192 efuse_ll_set_read_cmd(void)193__attribute__((always_inline)) static inline void efuse_ll_set_read_cmd(void) 194 { 195 EFUSE.cmd.read_cmd = 1; 196 } 197 efuse_ll_set_pgm_cmd(void)198__attribute__((always_inline)) static inline void efuse_ll_set_pgm_cmd(void) 199 { 200 EFUSE.cmd.pgm_cmd = 1; 201 } 202 efuse_ll_set_conf_read_op_code(void)203__attribute__((always_inline)) static inline void efuse_ll_set_conf_read_op_code(void) 204 { 205 EFUSE.conf.op_code = EFUSE_READ_OP_CODE; 206 } 207 efuse_ll_set_conf_write_op_code(void)208__attribute__((always_inline)) static inline void efuse_ll_set_conf_write_op_code(void) 209 { 210 EFUSE.conf.op_code = EFUSE_WRITE_OP_CODE; 211 } 212 efuse_ll_set_dac_clk_div(uint32_t value)213__attribute__((always_inline)) static inline void efuse_ll_set_dac_clk_div(uint32_t value) 214 { 215 EFUSE.dac_conf.dac_clk_div = value; 216 } 217 efuse_ll_set_dac_clk_sel0(uint32_t value)218__attribute__((always_inline)) static inline void efuse_ll_set_dac_clk_sel0(uint32_t value) 219 { 220 EFUSE.clk.clk_sel0 = value; 221 } 222 efuse_ll_set_dac_clk_sel1(uint32_t value)223__attribute__((always_inline)) static inline void efuse_ll_set_dac_clk_sel1(uint32_t value) 224 { 225 EFUSE.clk.clk_sel1 = value; 226 } 227 228 /******************* eFuse control functions *************************/ 229 230 #ifdef __cplusplus 231 } 232 #endif 233