1 /*
2 * Copyright (c) 2016, Freescale Semiconductor, Inc.
3 * Copyright 2016-2023 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8 #ifndef FSL_ECSPI_H_
9 #define FSL_ECSPI_H_
10
11 #include "fsl_common.h"
12
13 /*!
14 * @addtogroup ecspi_driver
15 * @{
16 */
17
18 /*******************************************************************************
19 * Definitions
20 ******************************************************************************/
21
22 /*! @name Driver version */
23 /*! @{ */
24 /*! @brief ECSPI driver version. */
25 #define FSL_ECSPI_DRIVER_VERSION (MAKE_VERSION(2, 3, 3))
26 /*! @} */
27
28 #ifndef ECSPI_DUMMYDATA
29 /*! @brief ECSPI dummy transfer data, the data is sent while txBuff is NULL. */
30 #define ECSPI_DUMMYDATA (0x00U)
31 #endif
32
33 /*! @brief Retry times for waiting flag. */
34 #ifndef SPI_RETRY_TIMES
35 #define SPI_RETRY_TIMES 0U /* Define to zero means keep waiting until the flag is assert/deassert. */
36 #endif
37
38 /*! @brief Return status for the ECSPI driver. */
39 enum
40 {
41 kStatus_ECSPI_Busy = MAKE_STATUS(kStatusGroup_ECSPI, 0), /*!< ECSPI bus is busy */
42 kStatus_ECSPI_Idle = MAKE_STATUS(kStatusGroup_ECSPI, 1), /*!< ECSPI is idle */
43 kStatus_ECSPI_Error = MAKE_STATUS(kStatusGroup_ECSPI, 2), /*!< ECSPI error */
44 kStatus_ECSPI_HardwareOverFlow = MAKE_STATUS(kStatusGroup_ECSPI, 3), /*!< ECSPI hardware overflow */
45 kStatus_ECSPI_Timeout = MAKE_STATUS(kStatusGroup_ECSPI, 4), /*!< ECSPI timeout polling status flags. */
46 };
47
48 /*! @brief ECSPI clock polarity configuration. */
49 typedef enum _ecspi_clock_polarity
50 {
51 kECSPI_PolarityActiveHigh = 0x0U, /*!< Active-high ECSPI polarity high (idles low). */
52 kECSPI_PolarityActiveLow, /*!< Active-low ECSPI polarity low (idles high). */
53 } ecspi_clock_polarity_t;
54
55 /*! @brief ECSPI clock phase configuration. */
56 typedef enum _ecspi_clock_phase
57 {
58 kECSPI_ClockPhaseFirstEdge =
59 0x0U, /*!< First edge on SPSCK occurs at the middle of the first cycle of a data transfer. */
60 kECSPI_ClockPhaseSecondEdge, /*!< First edge on SPSCK occurs at the start of the first cycle of a data transfer. */
61 } ecspi_clock_phase_t;
62
63 /*! @brief ECSPI interrupt sources. */
64 enum
65 {
66 kECSPI_TxfifoEmptyInterruptEnable = ECSPI_INTREG_TEEN_MASK, /*!< Transmit FIFO buffer empty interrupt */
67 kECSPI_TxFifoDataRequstInterruptEnable = ECSPI_INTREG_TDREN_MASK, /*!< Transmit FIFO data requst interrupt */
68 kECSPI_TxFifoFullInterruptEnable = ECSPI_INTREG_TFEN_MASK, /*!< Transmit FIFO full interrupt */
69 kECSPI_RxFifoReadyInterruptEnable = ECSPI_INTREG_RREN_MASK, /*!< Receiver FIFO ready interrupt */
70 kECSPI_RxFifoDataRequstInterruptEnable = ECSPI_INTREG_RDREN_MASK, /*!< Receiver FIFO data requst interrupt */
71 kECSPI_RxFifoFullInterruptEnable = ECSPI_INTREG_RFEN_MASK, /*!< Receiver FIFO full interrupt */
72 kECSPI_RxFifoOverFlowInterruptEnable = ECSPI_INTREG_ROEN_MASK, /*!< Receiver FIFO buffer overflow interrupt */
73 kECSPI_TransferCompleteInterruptEnable = ECSPI_INTREG_TCEN_MASK, /*!< Transfer complete interrupt */
74 kECSPI_AllInterruptEnable = (ECSPI_INTREG_TEEN_MASK | ECSPI_INTREG_TDREN_MASK | ECSPI_INTREG_TFEN_MASK |
75 ECSPI_INTREG_RREN_MASK | ECSPI_INTREG_RDREN_MASK | ECSPI_INTREG_RFEN_MASK |
76 ECSPI_INTREG_ROEN_MASK | ECSPI_INTREG_TCEN_MASK), /*!< All interrupt */
77 };
78
79 /*! @brief ECSPI status flags. */
80 enum
81 {
82 kECSPI_TxfifoEmptyFlag = ECSPI_STATREG_TE_MASK, /*!< Transmit FIFO buffer empty flag */
83 kECSPI_TxFifoDataRequstFlag = ECSPI_STATREG_TDR_MASK, /*!< Transmit FIFO data requst flag */
84 kECSPI_TxFifoFullFlag = ECSPI_STATREG_TF_MASK, /*!< Transmit FIFO full flag */
85 kECSPI_RxFifoReadyFlag = ECSPI_STATREG_RR_MASK, /*!< Receiver FIFO ready flag */
86 kECSPI_RxFifoDataRequstFlag = ECSPI_STATREG_RDR_MASK, /*!< Receiver FIFO data requst flag */
87 kECSPI_RxFifoFullFlag = ECSPI_STATREG_RF_MASK, /*!< Receiver FIFO full flag */
88 kECSPI_RxFifoOverFlowFlag = ECSPI_STATREG_RO_MASK, /*!< Receiver FIFO buffer overflow flag */
89 kECSPI_TransferCompleteFlag = ECSPI_STATREG_TC_MASK, /*!< Transfer complete flag */
90 };
91 /*! @brief ECSPI DMA enable.*/
92 enum
93 {
94 kECSPI_TxDmaEnable = ECSPI_DMAREG_TEDEN_MASK, /*!< Tx DMA request source */
95 kECSPI_RxDmaEnable = ECSPI_DMAREG_RXDEN_MASK, /*!< Rx DMA request source */
96 kECSPI_DmaAllEnable = (ECSPI_DMAREG_TEDEN_MASK | ECSPI_DMAREG_RXDEN_MASK) /*!< All DMA request source*/
97 };
98
99 /*! @brief ECSPI SPI_RDY signal configuration. */
100 typedef enum _ecspi_data_ready
101 {
102 kECSPI_DataReadyIgnore = 0x0U, /*!< SPI_RDY signal is ignored */
103 kECSPI_DataReadyFallingEdge, /*!< SPI_RDY signal will be triggerd by the falling edge */
104 kECSPI_DataReadyLowLevel, /*!< SPI_RDY signal will be triggerd by a low level */
105 } ecspi_Data_ready_t;
106
107 /*! @brief ECSPI channel select source. */
108 typedef enum _ecspi_channel_source
109 {
110 kECSPI_Channel0 = 0x0U, /*!< Channel 0 is selectd */
111 kECSPI_Channel1, /*!< Channel 1 is selectd */
112 kECSPI_Channel2, /*!< Channel 2 is selectd */
113 kECSPI_Channel3, /*!< Channel 3 is selectd */
114 } ecspi_channel_source_t;
115
116 /*! @brief ECSPI master or slave mode configuration. */
117 typedef enum _ecspi_master_slave_mode
118 {
119 kECSPI_Slave = 0U, /*!< ECSPI peripheral operates in slave mode.*/
120 kECSPI_Master, /*!< ECSPI peripheral operates in master mode.*/
121 } ecspi_master_slave_mode_t;
122
123 /*! @brief ECSPI data line inactive state configuration. */
124 typedef enum _ecspi_data_line_inactive_state_t
125 {
126 kECSPI_DataLineInactiveStateHigh = 0x0U, /*!< The data line inactive state stays high. */
127 kECSPI_DataLineInactiveStateLow, /*!< The data line inactive state stays low. */
128 } ecspi_data_line_inactive_state_t;
129
130 /*! @brief ECSPI clock inactive state configuration. */
131 typedef enum _ecspi_clock_inactive_state_t
132 {
133 kECSPI_ClockInactiveStateLow = 0x0U, /*!< The SCLK inactive state stays low. */
134 kECSPI_ClockInactiveStateHigh, /*!< The SCLK inactive state stays high. */
135 } ecspi_clock_inactive_state_t;
136
137 /*! @brief ECSPI active state configuration.*/
138 typedef enum _ecspi_chip_select_active_state_t
139 {
140 kECSPI_ChipSelectActiveStateLow = 0x0U, /*!< The SS signal line active stays low. */
141 kECSPI_ChipSelectActiveStateHigh, /*!< The SS signal line active stays high. */
142 } ecspi_chip_select_active_state_t;
143
144 /*! @brief ECSPI sample period clock configuration.*/
145 typedef enum _ecspi_sample_period_clock_source
146 {
147 kECSPI_spiClock = 0x0U, /*!< The sample period clock source is SCLK. */
148 kECSPI_lowFreqClock, /*!< The sample seriod clock source is low_frequency reference clock(32.768 kHz). */
149 } ecspi_sample_period_clock_source_t;
150
151 /*! @brief ECSPI user channel configure structure.*/
152 typedef struct _ecspi_channel_config
153 {
154 ecspi_master_slave_mode_t channelMode; /*!< Channel mode */
155 ecspi_clock_inactive_state_t clockInactiveState; /*!< Clock line (SCLK) inactive state */
156 ecspi_data_line_inactive_state_t dataLineInactiveState; /*!< Data line (MOSI&MISO) inactive state */
157 ecspi_chip_select_active_state_t chipSlectActiveState; /*!< Chip select(SS) line active state */
158 ecspi_clock_polarity_t polarity; /*!< Clock polarity */
159 ecspi_clock_phase_t phase; /*!< Clock phase */
160 } ecspi_channel_config_t;
161
162 /*! @brief ECSPI master configure structure.*/
163 typedef struct _ecspi_master_config
164 {
165 ecspi_channel_source_t channel; /*!< Channel number */
166 ecspi_channel_config_t channelConfig; /*!< Channel configuration */
167 ecspi_sample_period_clock_source_t samplePeriodClock; /*!< Sample period clock source */
168
169 uint16_t burstLength; /*!< Burst length. The length shall be less than 4096 bits */
170 uint8_t chipSelectDelay; /*!< SS delay time */
171 uint16_t samplePeriod; /*!< Sample period */
172 uint8_t txFifoThreshold; /*!< TX Threshold */
173 uint8_t rxFifoThreshold; /*!< RX Threshold */
174 uint32_t baudRate_Bps; /*!< ECSPI baud rate for master mode */
175 bool enableLoopback; /*!< Enable the ECSPI loopback test. */
176 } ecspi_master_config_t;
177
178 /*! @brief ECSPI slave configure structure.*/
179 typedef struct _ecspi_slave_config
180 {
181 ecspi_channel_source_t channel; /*Channel number */
182 uint16_t burstLength; /*!< Burst length. The length shall be less than 4096 bits */
183 uint8_t txFifoThreshold; /*!< TX Threshold */
184 uint8_t rxFifoThreshold; /*!< RX Threshold */
185 ecspi_channel_config_t channelConfig; /*!< Channel configuration */
186 } ecspi_slave_config_t;
187
188 /*! @brief ECSPI transfer structure */
189 typedef struct _ecspi_transfer
190 {
191 const uint32_t *txData; /*!< Send buffer */
192 uint32_t *rxData; /*!< Receive buffer */
193 size_t dataSize; /*!< Transfer bytes */
194 ecspi_channel_source_t channel; /*!< ECSPI channel select */
195 } ecspi_transfer_t;
196
197 typedef struct _ecspi_master_handle ecspi_master_handle_t;
198 /*! @brief Slave handle is the same with master handle */
199 typedef ecspi_master_handle_t ecspi_slave_handle_t;
200
201 /*! @brief ECSPI master callback for finished transmit */
202 typedef void (*ecspi_master_callback_t)(ECSPI_Type *base,
203 ecspi_master_handle_t *handle,
204 status_t status,
205 void *userData);
206
207 /*! @brief ECSPI slave callback for finished transmit */
208 typedef void (*ecspi_slave_callback_t)(ECSPI_Type *base, ecspi_slave_handle_t *handle, status_t status, void *userData);
209
210 /*! @brief ECSPI master handle structure */
211 struct _ecspi_master_handle
212 {
213 ecspi_channel_source_t channel; /*!< Channel number */
214 const uint32_t *volatile txData; /*!< Transfer buffer */
215 uint32_t *volatile rxData; /*!< Receive buffer */
216 volatile size_t txRemainingBytes; /*!< Send data remaining in bytes */
217 volatile size_t rxRemainingBytes; /*!< Receive data remaining in bytes */
218 volatile uint32_t state; /*!< ECSPI internal state */
219 size_t transferSize; /*!< Bytes to be transferred */
220 ecspi_master_callback_t callback; /*!< ECSPI callback */
221 void *userData; /*!< Callback parameter */
222 };
223
224 #if defined(__cplusplus)
225 extern "C" {
226 #endif
227 /*******************************************************************************
228 * APIs
229 ******************************************************************************/
230 /*!
231 * @brief Get the instance for ECSPI module.
232 *
233 * @param base ECSPI base address
234 */
235 uint32_t ECSPI_GetInstance(ECSPI_Type *base);
236
237 /*!
238 * @name Initialization and deinitialization
239 * @{
240 */
241
242 /*!
243 * @brief Sets the ECSPI configuration structure to default values.
244 *
245 * The purpose of this API is to get the configuration structure initialized for use in ECSPI_MasterInit().
246 * User may use the initialized structure unchanged in ECSPI_MasterInit, or modify
247 * some fields of the structure before calling ECSPI_MasterInit. After calling this API,
248 * the master is ready to transfer.
249 * Example:
250 @code
251 ecspi_master_config_t config;
252 ECSPI_MasterGetDefaultConfig(&config);
253 @endcode
254 *
255 * @param config pointer to config structure
256 */
257 void ECSPI_MasterGetDefaultConfig(ecspi_master_config_t *config);
258
259 /*!
260 * @brief Initializes the ECSPI with configuration.
261 *
262 * The configuration structure can be filled by user from scratch, or be set with default
263 * values by ECSPI_MasterGetDefaultConfig(). After calling this API, the slave is ready to transfer.
264 * Example
265 @code
266 ecspi_master_config_t config = {
267 .baudRate_Bps = 400000,
268 ...
269 };
270 ECSPI_MasterInit(ECSPI0, &config);
271 @endcode
272 *
273 * @param base ECSPI base pointer
274 * @param config pointer to master configuration structure
275 * @param srcClock_Hz Source clock frequency.
276 */
277 void ECSPI_MasterInit(ECSPI_Type *base, const ecspi_master_config_t *config, uint32_t srcClock_Hz);
278
279 /*!
280 * @brief Sets the ECSPI configuration structure to default values.
281 *
282 * The purpose of this API is to get the configuration structure initialized for use in ECSPI_SlaveInit().
283 * User may use the initialized structure unchanged in ECSPI_SlaveInit(), or modify
284 * some fields of the structure before calling ECSPI_SlaveInit(). After calling this API,
285 * the master is ready to transfer.
286 * Example:
287 @code
288 ecspi_Slaveconfig_t config;
289 ECSPI_SlaveGetDefaultConfig(&config);
290 @endcode
291 *
292 * @param config pointer to config structure
293 */
294 void ECSPI_SlaveGetDefaultConfig(ecspi_slave_config_t *config);
295
296 /*!
297 * @brief Initializes the ECSPI with configuration.
298 *
299 * The configuration structure can be filled by user from scratch, or be set with default
300 * values by ECSPI_SlaveGetDefaultConfig(). After calling this API, the slave is ready to transfer.
301 * Example
302 @code
303 ecspi_Salveconfig_t config = {
304 .baudRate_Bps = 400000,
305 ...
306 };
307 ECSPI_SlaveInit(ECSPI1, &config);
308 @endcode
309 *
310 * @param base ECSPI base pointer
311 * @param config pointer to master configuration structure
312 */
313 void ECSPI_SlaveInit(ECSPI_Type *base, const ecspi_slave_config_t *config);
314
315 /*!
316 * @brief De-initializes the ECSPI.
317 *
318 * Calling this API resets the ECSPI module, gates the ECSPI clock.
319 * The ECSPI module can't work unless calling the ECSPI_MasterInit/ECSPI_SlaveInit to initialize module.
320 *
321 * @param base ECSPI base pointer
322 */
323 void ECSPI_Deinit(ECSPI_Type *base);
324
325 /*!
326 * @brief Enables or disables the ECSPI.
327 *
328 * @param base ECSPI base pointer
329 * @param enable pass true to enable module, false to disable module
330 */
ECSPI_Enable(ECSPI_Type * base,bool enable)331 static inline void ECSPI_Enable(ECSPI_Type *base, bool enable)
332 {
333 if (enable)
334 {
335 base->CONREG |= ECSPI_CONREG_EN_MASK;
336 }
337 else
338 {
339 base->CONREG &= ~ECSPI_CONREG_EN_MASK;
340 }
341 }
342 /*! @} */
343
344 /*!
345 * @name Status
346 * @{
347 */
348
349 /*!
350 * @brief Gets the status flag.
351 *
352 * @param base ECSPI base pointer
353 * @return ECSPI Status, use status flag to AND _ecspi_flags could get the related status.
354 */
ECSPI_GetStatusFlags(ECSPI_Type * base)355 static inline uint32_t ECSPI_GetStatusFlags(ECSPI_Type *base)
356 {
357 return (base->STATREG);
358 }
359
360 /*!
361 * @brief Clear the status flag.
362 *
363 * @param base ECSPI base pointer
364 * @param mask ECSPI Status, use status flag to AND _ecspi_flags could get the related status.
365 */
ECSPI_ClearStatusFlags(ECSPI_Type * base,uint32_t mask)366 static inline void ECSPI_ClearStatusFlags(ECSPI_Type *base, uint32_t mask)
367 {
368 base->STATREG |= mask;
369 }
370 /*! @} */
371
372 /*!
373 * @name Interrupts
374 * @{
375 */
376
377 /*!
378 * @brief Enables the interrupt for the ECSPI.
379 *
380 * @param base ECSPI base pointer
381 * @param mask ECSPI interrupt source. The parameter can be any combination of the following values:
382 * @arg kECSPI_TxfifoEmptyInterruptEnable
383 * @arg kECSPI_TxFifoDataRequstInterruptEnable
384 * @arg kECSPI_TxFifoFullInterruptEnable
385 * @arg kECSPI_RxFifoReadyInterruptEnable
386 * @arg kECSPI_RxFifoDataRequstInterruptEnable
387 * @arg kECSPI_RxFifoFullInterruptEnable
388 * @arg kECSPI_RxFifoOverFlowInterruptEnable
389 * @arg kECSPI_TransferCompleteInterruptEnable
390 * @arg kECSPI_AllInterruptEnable
391 */
ECSPI_EnableInterrupts(ECSPI_Type * base,uint32_t mask)392 static inline void ECSPI_EnableInterrupts(ECSPI_Type *base, uint32_t mask)
393 {
394 base->INTREG |= mask;
395 }
396
397 /*!
398 * @brief Disables the interrupt for the ECSPI.
399 *
400 * @param base ECSPI base pointer
401 * @param mask ECSPI interrupt source. The parameter can be any combination of the following values:
402 * @arg kECSPI_TxfifoEmptyInterruptEnable
403 * @arg kECSPI_TxFifoDataRequstInterruptEnable
404 * @arg kECSPI_TxFifoFullInterruptEnable
405 * @arg kECSPI_RxFifoReadyInterruptEnable
406 * @arg kECSPI_RxFifoDataRequstInterruptEnable
407 * @arg kECSPI_RxFifoFullInterruptEnable
408 * @arg kECSPI_RxFifoOverFlowInterruptEnable
409 * @arg kECSPI_TransferCompleteInterruptEnable
410 * @arg kECSPI_AllInterruptEnable
411 */
ECSPI_DisableInterrupts(ECSPI_Type * base,uint32_t mask)412 static inline void ECSPI_DisableInterrupts(ECSPI_Type *base, uint32_t mask)
413 {
414 base->INTREG &= ~(mask);
415 }
416 /*! @} */
417
418 /*!
419 * @name Software Reset
420 * @{
421 */
422
423 /*!
424 * @brief Software reset.
425 *
426 * @param base ECSPI base pointer
427 */
ECSPI_SoftwareReset(ECSPI_Type * base)428 static inline void ECSPI_SoftwareReset(ECSPI_Type *base)
429 {
430 /* Disables the block and resets the internal logic with the exception of the ECSPI control register */
431 base->CONREG &= ~ECSPI_CONREG_EN_MASK;
432 /* Software reset can not reset the control register, so clear the control register manually */
433 base->CONREG = 0x0U;
434 }
435 /*! @} */
436
437 /*!
438 * @name Channel mode check
439 * @{
440 */
441
442 /*!
443 * @brief Mode check
444 *
445 * @param base ECSPI base pointer
446 * @param channel ECSPI channel source
447 * @return mode of channel
448 */
ECSPI_IsMaster(ECSPI_Type * base,ecspi_channel_source_t channel)449 static inline bool ECSPI_IsMaster(ECSPI_Type *base, ecspi_channel_source_t channel)
450 {
451 return (bool)(((base->CONREG & ECSPI_CONREG_CHANNEL_MODE_MASK) >>
452 (ECSPI_CONREG_CHANNEL_MODE_SHIFT + (uint32_t)channel)) &
453 0x1U);
454 }
455 /*! @} */
456
457 /*!
458 * @name DMA Control
459 * @{
460 */
461
462 /*!
463 * @brief Enables the DMA source for ECSPI.
464 *
465 * @param base ECSPI base pointer
466 * @param mask ECSPI DMA source. The parameter can be any of the following values:
467 * @arg kECSPI_TxDmaEnable
468 * @arg kECSPI_RxDmaEnable
469 * @arg kECSPI_DmaAllEnable
470 * @param enable True means enable DMA, false means disable DMA
471 */
ECSPI_EnableDMA(ECSPI_Type * base,uint32_t mask,bool enable)472 static inline void ECSPI_EnableDMA(ECSPI_Type *base, uint32_t mask, bool enable)
473 {
474 if (enable)
475 {
476 base->DMAREG |= mask;
477 }
478 else
479 {
480 base->DMAREG &= ~mask;
481 }
482 }
483 /*! @} */
484
485 /*!
486 * @name FIFO Operation
487 * @{
488 */
489
490 /*!
491 * @brief Get the Tx FIFO data count.
492 *
493 * @param base ECSPI base pointer.
494 * @return the number of words in Tx FIFO buffer.
495 */
ECSPI_GetTxFifoCount(ECSPI_Type * base)496 static inline uint8_t ECSPI_GetTxFifoCount(ECSPI_Type *base)
497 {
498 return (uint8_t)((base->TESTREG & ECSPI_TESTREG_TXCNT_MASK) >> ECSPI_TESTREG_TXCNT_SHIFT);
499 }
500
501 /*!
502 * @brief Get the Rx FIFO data count.
503 *
504 * @param base ECSPI base pointer.
505 * @return the number of words in Rx FIFO buffer.
506 */
ECSPI_GetRxFifoCount(ECSPI_Type * base)507 static inline uint8_t ECSPI_GetRxFifoCount(ECSPI_Type *base)
508 {
509 return (uint8_t)((base->TESTREG & ECSPI_TESTREG_RXCNT_MASK) >> ECSPI_TESTREG_RXCNT_SHIFT);
510 }
511 /*! @} */
512
513 /*!
514 * @name Bus Operations
515 * @{
516 */
517
518 /*!
519 * @brief Set channel select for transfer.
520 *
521 * @param base ECSPI base pointer
522 * @param channel Channel source.
523 */
ECSPI_SetChannelSelect(ECSPI_Type * base,ecspi_channel_source_t channel)524 static inline void ECSPI_SetChannelSelect(ECSPI_Type *base, ecspi_channel_source_t channel)
525 {
526 /* Clear Channel select bits in CONREG register */
527 uint32_t temp = base->CONREG & (~(ECSPI_CONREG_CHANNEL_SELECT_MASK));
528 /* Set channel select bits */
529 base->CONREG = (temp | ECSPI_CONREG_CHANNEL_SELECT(channel));
530 }
531 /*!
532 * @brief Set channel select configuration for transfer.
533 *
534 * The purpose of this API is to set the channel will be use to transfer.
535 * User may use this API after instance has been initialized or before transfer start.
536 * The configuration structure _ecspi_channel_config_ can be filled by user from scratch.
537 * After calling this API, user can select this channel as transfer channel.
538 *
539 * @param base ECSPI base pointer
540 * @param channel Channel source.
541 * @param config Configuration struct of channel
542 */
543 void ECSPI_SetChannelConfig(ECSPI_Type *base, ecspi_channel_source_t channel, const ecspi_channel_config_t *config);
544
545 /*!
546 * @brief Sets the baud rate for ECSPI transfer. This is only used in master.
547 *
548 * @param base ECSPI base pointer
549 * @param baudRate_Bps baud rate needed in Hz.
550 * @param srcClock_Hz ECSPI source clock frequency in Hz.
551 */
552 void ECSPI_SetBaudRate(ECSPI_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz);
553
554 /*!
555 * @brief Sends a buffer of data bytes using a blocking method.
556 *
557 * @note This function blocks via polling until all bytes have been sent.
558 *
559 * @param base ECSPI base pointer
560 * @param buffer The data bytes to send
561 * @param size The number of data bytes to send
562 * @retval kStatus_Success Successfully start a transfer.
563 * @retval kStatus_ECSPI_Timeout The transfer timed out and was aborted.
564 */
565 status_t ECSPI_WriteBlocking(ECSPI_Type *base, const uint32_t *buffer, size_t size);
566
567 /*!
568 * @brief Writes a data into the ECSPI data register.
569 *
570 * @param base ECSPI base pointer
571 * @param data Data needs to be write.
572 */
ECSPI_WriteData(ECSPI_Type * base,uint32_t data)573 static inline void ECSPI_WriteData(ECSPI_Type *base, uint32_t data)
574 {
575 base->TXDATA = data;
576 }
577
578 /*!
579 * @brief Gets a data from the ECSPI data register.
580 *
581 * @param base ECSPI base pointer
582 * @return Data in the register.
583 */
ECSPI_ReadData(ECSPI_Type * base)584 static inline uint32_t ECSPI_ReadData(ECSPI_Type *base)
585 {
586 return (uint32_t)(base->RXDATA);
587 }
588 /*! @} */
589
590 /*!
591 * @name Transactional
592 * @{
593 */
594 /*!
595 * @brief Initializes the ECSPI master handle.
596 *
597 * This function initializes the ECSPI master handle which can be used for other ECSPI master transactional APIs.
598 * Usually,
599 * for a specified ECSPI instance, call this API once to get the initialized handle.
600 *
601 * @param base ECSPI peripheral base address.
602 * @param handle ECSPI handle pointer.
603 * @param callback Callback function.
604 * @param userData User data.
605 */
606 void ECSPI_MasterTransferCreateHandle(ECSPI_Type *base,
607 ecspi_master_handle_t *handle,
608 ecspi_master_callback_t callback,
609 void *userData);
610
611 /*!
612 * @brief Transfers a block of data using a polling method.
613 *
614 * @param base SPI base pointer
615 * @param xfer pointer to spi_xfer_config_t structure
616 * @retval kStatus_Success Successfully start a transfer.
617 * @retval kStatus_InvalidArgument Input argument is invalid.
618 * @retval kStatus_ECSPI_Timeout The transfer timed out and was aborted.
619 */
620 status_t ECSPI_MasterTransferBlocking(ECSPI_Type *base, ecspi_transfer_t *xfer);
621
622 /*!
623 * @brief Performs a non-blocking ECSPI interrupt transfer.
624 *
625 * @note The API immediately returns after transfer initialization is finished.
626 * @note If ECSPI transfer data frame size is 16 bits, the transfer size cannot be an odd number.
627 *
628 * @param base ECSPI peripheral base address.
629 * @param handle pointer to ecspi_master_handle_t structure which stores the transfer state
630 * @param xfer pointer to ecspi_transfer_t structure
631 * @retval kStatus_Success Successfully start a transfer.
632 * @retval kStatus_InvalidArgument Input argument is invalid.
633 * @retval kStatus_ECSPI_Busy ECSPI is not idle, is running another transfer.
634 */
635 status_t ECSPI_MasterTransferNonBlocking(ECSPI_Type *base, ecspi_master_handle_t *handle, ecspi_transfer_t *xfer);
636
637 /*!
638 * @brief Gets the bytes of the ECSPI interrupt transferred.
639 *
640 * @param base ECSPI peripheral base address.
641 * @param handle Pointer to ECSPI transfer handle, this should be a static variable.
642 * @param count Transferred bytes of ECSPI master.
643 * @retval kStatus_ECSPI_Success Succeed get the transfer count.
644 * @retval kStatus_NoTransferInProgress There is not a non-blocking transaction currently in progress.
645 */
646 status_t ECSPI_MasterTransferGetCount(ECSPI_Type *base, ecspi_master_handle_t *handle, size_t *count);
647
648 /*!
649 * @brief Aborts an ECSPI transfer using interrupt.
650 *
651 * @param base ECSPI peripheral base address.
652 * @param handle Pointer to ECSPI transfer handle, this should be a static variable.
653 */
654 void ECSPI_MasterTransferAbort(ECSPI_Type *base, ecspi_master_handle_t *handle);
655
656 /*!
657 * @brief Interrupts the handler for the ECSPI.
658 *
659 * @param base ECSPI peripheral base address.
660 * @param handle pointer to ecspi_master_handle_t structure which stores the transfer state.
661 */
662 void ECSPI_MasterTransferHandleIRQ(ECSPI_Type *base, ecspi_master_handle_t *handle);
663
664 /*!
665 * @brief Initializes the ECSPI slave handle.
666 *
667 * This function initializes the ECSPI slave handle which can be used for other ECSPI slave transactional APIs. Usually,
668 * for a specified ECSPI instance, call this API once to get the initialized handle.
669 *
670 * @param base ECSPI peripheral base address.
671 * @param handle ECSPI handle pointer.
672 * @param callback Callback function.
673 * @param userData User data.
674 */
675 void ECSPI_SlaveTransferCreateHandle(ECSPI_Type *base,
676 ecspi_slave_handle_t *handle,
677 ecspi_slave_callback_t callback,
678 void *userData);
679
680 /*!
681 * @brief Performs a non-blocking ECSPI slave interrupt transfer.
682 *
683 * @note The API returns immediately after the transfer initialization is finished.
684 *
685 * @param base ECSPI peripheral base address.
686 * @param handle pointer to ecspi_master_handle_t structure which stores the transfer state
687 * @param xfer pointer to ecspi_transfer_t structure
688 * @retval kStatus_Success Successfully start a transfer.
689 * @retval kStatus_InvalidArgument Input argument is invalid.
690 * @retval kStatus_ECSPI_Busy ECSPI is not idle, is running another transfer.
691 */
ECSPI_SlaveTransferNonBlocking(ECSPI_Type * base,ecspi_slave_handle_t * handle,ecspi_transfer_t * xfer)692 static inline status_t ECSPI_SlaveTransferNonBlocking(ECSPI_Type *base,
693 ecspi_slave_handle_t *handle,
694 ecspi_transfer_t *xfer)
695 {
696 return ECSPI_MasterTransferNonBlocking(base, handle, xfer);
697 }
698
699 /*!
700 * @brief Gets the bytes of the ECSPI interrupt transferred.
701 *
702 * @param base ECSPI peripheral base address.
703 * @param handle Pointer to ECSPI transfer handle, this should be a static variable.
704 * @param count Transferred bytes of ECSPI slave.
705 * @retval kStatus_ECSPI_Success Succeed get the transfer count.
706 * @retval kStatus_NoTransferInProgress There is not a non-blocking transaction currently in progress.
707 */
ECSPI_SlaveTransferGetCount(ECSPI_Type * base,ecspi_slave_handle_t * handle,size_t * count)708 static inline status_t ECSPI_SlaveTransferGetCount(ECSPI_Type *base, ecspi_slave_handle_t *handle, size_t *count)
709 {
710 return ECSPI_MasterTransferGetCount(base, handle, count);
711 }
712
713 /*!
714 * @brief Aborts an ECSPI slave transfer using interrupt.
715 *
716 * @param base ECSPI peripheral base address.
717 * @param handle Pointer to ECSPI transfer handle, this should be a static variable.
718 */
ECSPI_SlaveTransferAbort(ECSPI_Type * base,ecspi_slave_handle_t * handle)719 static inline void ECSPI_SlaveTransferAbort(ECSPI_Type *base, ecspi_slave_handle_t *handle)
720 {
721 ECSPI_MasterTransferAbort(base, handle);
722 }
723
724 /*!
725 * @brief Interrupts a handler for the ECSPI slave.
726 *
727 * @param base ECSPI peripheral base address.
728 * @param handle pointer to ecspi_slave_handle_t structure which stores the transfer state
729 */
730 void ECSPI_SlaveTransferHandleIRQ(ECSPI_Type *base, ecspi_slave_handle_t *handle);
731
732 /*! @} */
733
734 #if defined(__cplusplus)
735 }
736 #endif
737
738 /*! @} */
739
740 #endif /* FSL_ECSPI_H_*/
741
