Searched defs:domain (Results 1 – 11 of 11) sorted by relevance
21 #define EMI_MPU_CTRL_D(domain) (EMI_MPU_CTRL_D0 + (domain * 4)) argument23 #define EMI_RG_MASK_D(domain) (EMI_RG_MASK_D0 + (domain * 4)) argument34 #define SUB_EMI_MPU_CTRL_D(domain) (SUB_EMI_MPU_CTRL_D0 + (domain * 4)) argument36 #define SUB_EMI_RG_MASK_D(domain) (SUB_EMI_RG_MASK_D0 + (domain * 4)) argument
110 #define SLAVE_FORBID_EXCEPT_D0_SEC_RW(domain) \ argument117 #define SLAVE_FORBID_EXCEPT_D0_SEC_RW_D5_NO_PROTECT(domain) \ argument124 #define SLAVE_FORBID_EXCEPT_D5_NO_PROTECT(domain) \ argument131 #define SLAVE_FORBID_EXCEPT_D0_SEC_RW_NS_R_D5_NO_PROTECT(domain) \ argument138 #define SLAVE_FORBID_EXCEPT_D7_NO_PROTECT(domain) \ argument145 #define SLAVE_FORBID_EXCEPT_D5_D7_NO_PROTECT(domain) \ argument152 #define SLAVE_FORBID_EXCEPT_D0_D5_NO_PROTECT(domain) \ argument
115 int32_t apupwr_smc_acc_set_parent(uint32_t freq, uint32_t domain) in apupwr_smc_acc_set_parent()200 int32_t apupwr_smc_pll_set_rate(uint32_t freq, bool div2, uint32_t domain) in apupwr_smc_pll_set_rate()
90 static int32_t vd2pllidx(enum dvfs_voltage_domain domain) in vd2pllidx()507 int32_t anpu_pll_set_rate(enum dvfs_voltage_domain domain, in anpu_pll_set_rate()
23 #define EMI_MPU_CTRL_D(domain) (EMI_MPU_CTRL_D0 + (domain * 4)) argument25 #define EMI_RG_MASK_D(domain) (EMI_RG_MASK_D0 + (domain * 4)) argument38 #define SUB_EMI_MPU_CTRL_D(domain) (SUB_EMI_MPU_CTRL_D0 + (domain * 4)) argument40 #define SUB_EMI_RG_MASK_D(domain) (SUB_EMI_RG_MASK_D0 + (domain * 4)) argument
51 #define EMI_MPU_CTRL_D(domain) (EMI_MPU_CTRL_D0 + domain * 4) argument53 #define EMI_RG_MASK_D(domain) (EMI_RG_MASK_D0 + domain * 4) argument
32 static void set_master_domain(uint32_t master_index, enum MASK_DOM domain) in set_master_domain()
337 static unsigned int cpupm_get_pstate(enum mt_cpupm_pwr_domain domain, in cpupm_get_pstate()
80 static unsigned int get_mediatek_pstate(unsigned int domain, unsigned int psci_state, in get_mediatek_pstate()
124 uint8_t domain; member
