1 /***************************************************************************//** 2 * \file cyhal_hw_types.h 3 * 4 * \brief 5 * Provides a struct definitions for configuration resources in the PDL. 6 * 7 ******************************************************************************** 8 * \copyright 9 * Copyright 2018-2021 Cypress Semiconductor Corporation (an Infineon company) or 10 * an affiliate of Cypress Semiconductor Corporation 11 * 12 * SPDX-License-Identifier: Apache-2.0 13 * 14 * Licensed under the Apache License, Version 2.0 (the "License"); 15 * you may not use this file except in compliance with the License. 16 * You may obtain a copy of the License at 17 * 18 * http://www.apache.org/licenses/LICENSE-2.0 19 * 20 * Unless required by applicable law or agreed to in writing, software 21 * distributed under the License is distributed on an "AS IS" BASIS, 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 * See the License for the specific language governing permissions and 24 * limitations under the License. 25 *******************************************************************************/ 26 27 /** 28 * \addtogroup group_hal_impl CAT1 (PSoC™ 6) Implementation Specific 29 * \{ 30 * This section provides details about the CAT1 (PSoC™ 6) implementation of the Cypress HAL. 31 * All information within this section is platform specific and is provided for reference. 32 * Portable application code should depend only on the APIs and types which are documented 33 * in the @ref group_hal section. 34 * 35 * \section group_hal_impl_mapping HAL Resource Hardware Mapping 36 * The following table shows a mapping of each HAL driver to the lower level firmware driver 37 * and the corresponding hardware resource. This is intended to help understand how the HAL 38 * is implemented for CAT1 and what features the underlying hardware supports. 39 * 40 * | HAL Resource | PDL Driver(s) | CAT1 Hardware | 41 * | ------------------ | ------------------- | -------------------------------- | 42 * | ADC | cy_adc | SAR ADC | 43 * | Clock | cy_sysclk | All clocks (system & peripheral) | 44 * | Comparator | cy_ctb or cy_lpcomp | CTBm or LPComp | 45 * | CRC | cy_crypto_core_crc | Crypto | 46 * | DAC | cy_ctdac | DAC | 47 * | DMA | cy_dma, cy_dmac | DMA Controller | 48 * | EZ-I2C | cy_scb_ezi2c | SCB | 49 * | Flash | cy_flash | Flash | 50 * | GPIO | cy_gpio | GPIO | 51 * | Hardware Manager | NA | NA | 52 * | I2C | cy_scb_i2c | SCB | 53 * | I2S | cy_i2s | I2S | 54 * | LPTimer | cy_mcwdt | MCWDT | 55 * | Opamp | cy_ctb | CTBm | 56 * | PDM/PCM | cy_pdm_pcm | PDM-PCM | 57 * | PWM | cy_pwm | TCPWM | 58 * | QSPI | cy_smif | QSPI (SMIF) | 59 * | Quadrature Decoder | cy_tcpwm_quaddec | TCPWM | 60 * | RTC | cy_rtc | RTC | 61 * | SDHC | cy_sd_host | SD Host | 62 * | SDIO | cy_sd_host, or NA | SD Host, or UDB | 63 * | SPI | cy_scb_spi | SCB | 64 * | SysPM | cy_syspm | System Power Resources | 65 * | System | cy_syslib | System Resources | 66 * | TDM | cy_i2s | I2S | 67 * | Timer | cy_tcpwm_counter | TCPWM | 68 * | TRNG | cy_crypto_core_trng | Crypto | 69 * | UART | cy_scb_uart | SCB | 70 * | USB Device | cy_usbfs_dev_drv | USB-FS | 71 * | WDT | cy_wdt | WDT | 72 * 73 * \section group_hal_impl_errors Device Specific Errors 74 * Error codes generated by the low level level PDL driver all use module IDs starting 75 * with \ref CY_RSLT_MODULE_DRIVERS_PDL_BASE. The exact errors are documented for each 76 * driver in the 77 * <a href="https://infineon.github.io/mtb-pdl-cat1/pdl_api_reference_manual/html/index.html"> 78 * mtb-pdl-cat1 documentation</a>. 79 */ 80 81 /** 82 * \addtogroup group_hal_impl_hw_types CAT1 Specific Hardware Types 83 * \{ 84 * Aliases for types which are part of the public HAL interface but whose representations 85 * need to vary per HAL implementation 86 */ 87 88 #pragma once 89 90 #include "cy_pdl.h" 91 #include "cyhal_general_types.h" 92 #include "cyhal_hw_resources.h" 93 #include "cyhal_pin_package.h" 94 #include "cyhal_triggers.h" 95 #include <stdbool.h> 96 97 #if defined(CYHAL_UDB_SDIO) 98 #include "SDIO_HOST.h" 99 #endif 100 101 #ifdef __cplusplus 102 extern "C" { 103 #endif 104 105 106 #ifndef CYHAL_ISR_PRIORITY_DEFAULT 107 /** Priority that is applied by default to all drivers when initialized. Priorities can be 108 * overridden on each driver as part of enabling events. 109 */ 110 #define CYHAL_ISR_PRIORITY_DEFAULT (7) 111 #endif 112 113 /** 114 * \cond INTERNAL 115 */ 116 117 #define CYHAL_ADC_IMPL_HEADER "cyhal_adc_impl.h" //!< Implementation specific header for ADC 118 #define CYHAL_DMA_IMPL_HEADER "cyhal_dma_impl.h" //!< Implementation specific header for DMA 119 #define CYHAL_CLOCK_IMPL_HEADER "cyhal_clock_impl.h" //!< Implementation specific header for Clocks 120 #define CYHAL_GPIO_IMPL_HEADER "cyhal_gpio_impl.h" //!< Implementation specific header for GPIO 121 #define CYHAL_PDMPCM_IMPL_HEADER "cyhal_pdmpcm_impl.h" //!< Implementation specific header for PDMPCM 122 #define CYHAL_I2S_IMPL_HEADER "cyhal_i2s_impl.h" //!< Implementation specific header for I2S 123 #define CYHAL_PWM_IMPL_HEADER "cyhal_pwm_impl.h" //!< Implementation specific header for PWM 124 #define CYHAL_QUADDEC_IMPL_HEADER "cyhal_quaddec_impl.h" //!< Implementation specific header for QUADDEC 125 #define CYHAL_SYSTEM_IMPL_HEADER "cyhal_system_impl.h" //!< Implementation specific header for System 126 #define CYHAL_SYSPM_IMPL_HEADER "cyhal_syspm_impl.h" //!< Implementation specific header for System Power Management 127 #define CYHAL_TDM_IMPL_HEADER "cyhal_tdm_impl.h" //!< Implementation specific header for TDM 128 #define CYHAL_TIMER_IMPL_HEADER "cyhal_timer_impl.h" //!< Implementation specific header for Timer 129 #define CYHAL_INTERCONNECT_IMPL_HEADER "cyhal_interconnect_impl.h" //!< Implementation specific header for Interconnect 130 131 #if defined(_CYHAL_DRIVER_AVAILABLE_CRYPTO) 132 #define CYHAL_CRC_IMPL_HEADER "cyhal_crc_impl.h" //!< Implementation specific header for CRC 133 #define CYHAL_TRNG_IMPL_HEADER "cyhal_trng_impl.h" //!< Implementation specific header for TRNG 134 #endif 135 136 //TODO REMOVE this once PDL provides the missing items 137 #if defined(COMPONENT_CAT1B) 138 #include "cyhal_missing_pdl.h" 139 #endif 140 141 /** \endcond */ 142 143 /** Callbacks for Sleep and Deepsleep APIs */ 144 #define cyhal_system_callback_t cy_stc_syspm_callback_t 145 146 /** @brief Event callback data object */ 147 typedef struct { 148 cy_israddress callback; 149 void* callback_arg; 150 } cyhal_event_callback_data_t; 151 152 /** 153 * @brief Shared data between timer/counter and PWM 154 * 155 * Application code should not rely on the specific content of this struct. 156 * They are considered an implementation detail which is subject to change 157 * between platforms and/or HAL releases. 158 */ 159 typedef struct { 160 #ifdef CY_IP_MXTCPWM 161 bool owned_by_configurator; 162 TCPWM_Type* base; 163 cyhal_resource_inst_t resource; 164 cyhal_clock_t clock; 165 bool dedicated_clock; 166 uint32_t clock_hz; 167 cyhal_event_callback_data_t callback_data; 168 #if defined(CY_IP_MXPERI_TR) || defined(CY_IP_MXSPERI) 169 cyhal_source_t inputs[5]; 170 #endif 171 #else 172 void *empty; 173 #endif 174 } cyhal_tcpwm_t; 175 176 /* This is presented out of order because many other structs depend on it */ 177 /** 178 * @brief DMA object 179 * 180 * Application code should not rely on the specific contents of this struct. 181 * They are considered an implementation detail which is subject to change 182 * between platforms and/or HAL releases. 183 */ 184 typedef struct { 185 #if defined(CY_IP_M4CPUSS_DMAC) || defined(CY_IP_M4CPUSS_DMA) || defined(CY_IP_MXAHBDMAC) || defined(CY_IP_MXDW) 186 cyhal_resource_inst_t resource; 187 union 188 { 189 #if defined(CY_IP_M4CPUSS_DMA) || defined(CY_IP_MXDW) 190 cy_stc_dma_channel_config_t dw; 191 #endif 192 #if defined(CY_IP_M4CPUSS_DMAC) || defined(CY_IP_MXAHBDMAC) 193 cy_stc_dmac_channel_config_t dmac; 194 #endif 195 } channel_config; 196 union 197 { 198 #if defined(CY_IP_M4CPUSS_DMA) || defined(CY_IP_MXDW) 199 cy_stc_dma_descriptor_config_t dw; 200 #endif 201 #if defined(CY_IP_M4CPUSS_DMAC) || defined(CY_IP_MXAHBDMAC) 202 cy_stc_dmac_descriptor_config_t dmac; 203 #endif 204 } descriptor_config; 205 union 206 { 207 #if defined(CY_IP_M4CPUSS_DMA) || defined(CY_IP_MXDW) 208 cy_stc_dma_descriptor_t dw; 209 #endif 210 #if defined(CY_IP_M4CPUSS_DMAC) || defined(CY_IP_MXAHBDMAC) 211 cy_stc_dmac_descriptor_t dmac; 212 #endif 213 } descriptor; 214 uint16_t expected_bursts; 215 uint32_t/* cyhal_dma_direction_t */ direction; 216 uint32_t irq_cause; 217 cyhal_event_callback_data_t callback_data; 218 cyhal_source_t source; 219 bool owned_by_configurator; 220 #else 221 void *empty; 222 #endif 223 } cyhal_dma_t; 224 225 /** 226 * @brief DMA configurator struct 227 * 228 * This struct allows a configurator to provide block configuration information 229 * to the HAL. Because configurator-generated configurations are platform 230 * specific, the contents of this struct is subject to change between platforms 231 * and/or HAL releases. 232 */ 233 typedef struct 234 { 235 #if CYHAL_DRIVER_AVAILABLE_DMA 236 const cyhal_resource_inst_t* resource; 237 struct 238 { 239 union 240 { 241 #if defined(CY_IP_M4CPUSS_DMA) || defined(CY_IP_MXDW) 242 cy_stc_dma_channel_config_t const* dw_channel_config; 243 #endif 244 #if defined(CY_IP_M4CPUSS_DMAC) || defined(CY_IP_MXAHBDMAC) 245 cy_stc_dmac_channel_config_t const* dmac_channel_config; 246 #endif 247 }; 248 union 249 { 250 #if defined(CY_IP_M4CPUSS_DMA) || defined(CY_IP_MXDW) 251 cy_stc_dma_descriptor_config_t const* dw_descriptor_config; 252 #endif 253 #if defined(CY_IP_M4CPUSS_DMAC) || defined(CY_IP_MXAHBDMAC) 254 cy_stc_dmac_descriptor_config_t const* dmac_descriptor_config; 255 #endif 256 }; 257 }; 258 #else 259 void *empty; 260 #endif /* CYHAL_DRIVER_AVAILABLE_DMA */ 261 } cyhal_dma_configurator_t; 262 263 struct _cyhal_audioss_s; 264 265 /** 266 * @brief Interface to abstract away the driver-specific differences between TDM and I2S 267 * 268 * Application code should not rely on the specific contents of this struct. 269 * They are considered an implementation detail which is subject to change 270 * between platforms and/or HAL releases. 271 */ 272 typedef struct 273 { 274 #if defined(CY_IP_MXAUDIOSS) 275 /** Convert a PDL-level interrupt cause to a HAL-level event */ 276 uint32_t (*convert_interrupt_cause)(uint32_t pdl_event); 277 /** Convert a HAL-level event to a PDL-level interrupt cause */ 278 uint32_t (*convert_to_pdl)(uint32_t hal_event); 279 #elif defined(CY_IP_MXTDM) 280 /** Convert a PDL-level interrupt cause to a HAL-level event */ 281 uint32_t (*convert_interrupt_cause)(uint32_t pdl_event, bool is_tx); 282 /** Convert a HAL-level event to a PDL-level interrupt cause */ 283 uint32_t (*convert_to_pdl)(uint32_t hal_event, bool is_tx); 284 #endif 285 /** Invoke the user callback with the specified HAL event. 286 * Only called after the user callback has been verified to not be null. */ 287 void (*invoke_user_callback)(struct _cyhal_audioss_s* obj, uint32_t hal_event); 288 /** HAL event mask that represents the empty state */ 289 uint32_t event_mask_empty; 290 /** HAL event mask that represents the half empty state */ 291 uint32_t event_mask_half_empty; 292 /** HAL event mask that represents the full state */ 293 uint32_t event_mask_full; 294 /** HAL event mask that represents the half full state */ 295 uint32_t event_mask_half_full; 296 /** HAL event mask that represents async rx complete */ 297 uint32_t event_rx_complete; 298 /** HAL event mask that represents async tx complete */ 299 uint32_t event_tx_complete; 300 /** Error code for invalid pin */ 301 cy_rslt_t err_invalid_pin; 302 /** Error code for invalid argument */ 303 cy_rslt_t err_invalid_arg; 304 /** Error code for invalid clock frequency */ 305 cy_rslt_t err_clock; 306 /** Error code for configuration not supported */ 307 cy_rslt_t err_not_supported; 308 } _cyhal_audioss_interface_t; 309 310 /** 311 * @brief Shared data between i2s and tdm 312 * 313 * Application code should not rely on the specific contents of this struct. 314 * They are considered an implementation detail which is subject to change 315 * between platforms and/or HAL releases. 316 */ 317 typedef struct _cyhal_audioss_s { /* Explicit name to enable forward declaration */ 318 #if defined(CY_IP_MXAUDIOSS) || defined(CY_IP_MXTDM) 319 bool owned_by_configurator; 320 #if defined(CY_IP_MXAUDIOSS) 321 I2S_Type *base; 322 #elif defined(CY_IP_MXTDM) 323 /* None of the PDL APIs actually want a bare TDM_Type */ 324 TDM_STRUCT_Type *base; 325 #endif 326 cyhal_resource_inst_t resource; 327 cyhal_gpio_t pin_tx_sck; 328 cyhal_gpio_t pin_tx_ws; 329 cyhal_gpio_t pin_tx_sdo; 330 cyhal_gpio_t pin_rx_sck; 331 cyhal_gpio_t pin_rx_mclk; 332 cyhal_gpio_t pin_rx_ws; 333 cyhal_gpio_t pin_rx_sdi; 334 cyhal_gpio_t pin_tx_mclk; 335 uint8_t user_fifo_level_rx; 336 uint32_t mclk_hz_rx; 337 uint8_t channel_length_rx; 338 uint8_t word_length_rx; 339 uint32_t mclk_hz_tx; 340 uint8_t channel_length_tx; 341 uint8_t word_length_tx; 342 cyhal_clock_t clock; 343 bool is_clock_owned; 344 uint16_t user_enabled_events; 345 cyhal_event_callback_data_t callback_data; 346 cyhal_async_mode_t async_mode; 347 uint8_t async_dma_priority; 348 cyhal_dma_t tx_dma; 349 cyhal_dma_t rx_dma; 350 // Note: When the async DMA mode is in use, these variables will always reflect the state 351 // that the transfer will be in after the in-progress DMA transfer, if any, is complete 352 volatile const void *async_tx_buff; 353 volatile size_t async_tx_length; 354 volatile void *async_rx_buff; 355 volatile size_t async_rx_length; 356 volatile bool pm_transition_ready; 357 cyhal_syspm_callback_data_t pm_callback; 358 const _cyhal_audioss_interface_t *interface; 359 #else 360 void *empty; 361 #endif 362 } _cyhal_audioss_t; 363 364 /** 365 * @brief Shared I2S/TDM configurator struct 366 * 367 * This struct allows a configurator to provide block configuration information 368 * to the HAL. Because configurator-generated configurations are platform 369 * specific, the contents of this struct is subject to change between platforms 370 * and/or HAL releases. 371 */ 372 typedef struct 373 { 374 #if CYHAL_DRIVER_AVAILABLE_TDM || CYHAL_DRIVER_AVAILABLE_I2S 375 const cyhal_resource_inst_t* resource; 376 #if defined(CY_IP_MXAUDIOSS) 377 const cy_stc_i2s_config_t* config; 378 #elif defined(CY_IP_MXTDM) 379 const cy_stc_tdm_config_t* config; 380 #endif 381 const cyhal_clock_t * clock; 382 uint32_t mclk_hz_rx; /* Must be 0 is mclk is not in use for this direction */ 383 uint32_t mclk_hz_tx; /* Must be 0 is mclk is not in use for this direction */ 384 #else 385 void *empty; 386 #endif /* CYHAL_DRIVER_AVAILABLE_TDM || CYHAL_DRIVER_AVAILABLE_I2S */ 387 } _cyhal_audioss_configurator_t; 388 389 struct _cyhal_adc_channel_s; 390 391 /** 392 * @brief ADC object 393 * 394 * Application code should not rely on the specific contents of this struct. 395 * They are considered an implementation detail which is subject to change 396 * between platforms and/or HAL releases. 397 */ 398 typedef struct { 399 #if defined(CY_IP_MXS40PASS_SAR) || defined(CY_IP_MXS40ADCMIC_INSTANCES) 400 bool owned_by_configurator; 401 #if defined(CY_IP_MXS40PASS_SAR) 402 SAR_Type* base; 403 struct _cyhal_adc_channel_s* channel_config[CY_SAR_MAX_NUM_CHANNELS]; 404 #elif defined(CY_IP_MXS40ADCMIC_INSTANCES) 405 MXS40ADCMIC_Type* base; 406 /* When doing a full scan, which channel are we on */ 407 uint8_t current_channel_index; 408 /* We implement multi-channel sequencing in firmware; there's no fixed channel count specified 409 * in hardware. So size the array based on the number of input pins that are connected */ 410 struct _cyhal_adc_channel_s* channel_config[sizeof(cyhal_pin_map_adcmic_gpio_adc_in) / sizeof(cyhal_pin_map_adcmic_gpio_adc_in[0])]; 411 #endif 412 cyhal_resource_inst_t resource; 413 cyhal_clock_t clock; 414 bool dedicated_clock; 415 /* Has at least one conversion completed since the last configuration change */ 416 volatile bool conversion_complete; 417 bool stop_after_scan; 418 uint8_t user_enabled_events; 419 cyhal_event_callback_data_t callback_data; 420 /* Always updated to contain the location where the next result should be stored */ 421 int32_t *async_buff_next; 422 bool async_transfer_in_uv; /* Default is counts */ 423 /* Only decremented after all elements from a scan have been copied into async_buff */ 424 size_t async_scans_remaining; 425 #if defined(CY_IP_MXS40PASS_SAR) 426 /* ADCMIC is always continuously scanning and only supports SW-based async transfers */ 427 bool continuous_scanning; 428 cyhal_async_mode_t async_mode; 429 cyhal_dma_t dma; 430 cyhal_source_t source; /* SAR-only; ADCMIC has no useful triggers in DC mode */ 431 int32_t *async_buff_orig; 432 #endif 433 #else 434 void *empty; 435 #endif /* defined(CY_IP_MXS40PASS_SAR) || defined(CY_IP_MXS40ADCMIC_INSTANCES) */ 436 } cyhal_adc_t; 437 438 /** 439 * @brief ADC configurator struct 440 * 441 * This struct allows a configurator to provide block configuration information 442 * to the HAL. Because configurator-generated configurations are platform 443 * specific, the contents of this struct is subject to change between platforms 444 * and/or HAL releases. 445 */ 446 typedef struct 447 { 448 #if CYHAL_DRIVER_AVAILABLE_ADC 449 const cyhal_resource_inst_t* resource; 450 #if defined(CY_IP_MXS40PASS_SAR) 451 cy_stc_sar_config_t const* config; 452 #elif defined(CY_IP_MXS40ADCMIC_INSTANCES) 453 cy_stc_adcmic_config_t const* config; 454 #endif 455 const cyhal_clock_t * clock; 456 uint8_t num_channels; 457 const uint32_t* achieved_acquisition_time; /* length num_channels */ 458 /* Pins are deliberately omitted from this struct. The configurator supports routing 459 * from arbitrary sources that aren't necessarily pins. The HAL only needs to know what 460 * the pins are for the purposes of reservation, freeing, and routing - all of which the 461 * configurators take care of in this flow */ 462 #else 463 void *empty; 464 #endif 465 } cyhal_adc_configurator_t; 466 467 /** 468 * @brief ADC channel object 469 * 470 * Application code should not rely on the specific contents of this struct. 471 * They are considered an implementation detail which is subject to change 472 * between platforms and/or HAL releases. 473 */ 474 typedef struct _cyhal_adc_channel_s { /* Struct given an explicit name to make the forward declaration above work */ 475 #if defined(CY_IP_MXS40PASS_SAR) || defined(CY_IP_MXS40ADCMIC_INSTANCES) 476 cyhal_adc_t* adc; 477 cyhal_gpio_t vplus; 478 uint8_t channel_idx; 479 #if defined(CY_IP_MXS40ADCMIC_INSTANCES) 480 cy_en_adcmic_dc_channel_t channel_sel; 481 bool enabled; 482 #elif defined(CY_IP_MXS40PASS_SAR) 483 /* ADCMIC only supports single-ended channels at a fixed sample rate */ 484 cyhal_gpio_t vminus; 485 uint32_t minimum_acquisition_ns; 486 #endif 487 #else 488 void *empty; 489 #endif 490 } cyhal_adc_channel_t; 491 492 /** @brief Comparator object */ 493 typedef struct { 494 #if defined(CY_IP_MXLPCOMP_INSTANCES) || defined(CY_IP_MXS40PASS_CTB_INSTANCES) 495 bool owned_by_configurator; 496 cyhal_resource_inst_t resource; 497 union 498 { 499 #if defined(CY_IP_MXS40PASS_CTB_INSTANCES) 500 CTBM_Type *base_ctb; 501 #endif 502 #if defined(CY_IP_MXLPCOMP_INSTANCES) 503 LPCOMP_Type *base_lpcomp; 504 #endif 505 }; 506 cyhal_gpio_t pin_vin_p; 507 cyhal_gpio_t pin_vin_m; 508 cyhal_gpio_t pin_out; 509 cyhal_event_callback_data_t callback_data; 510 uint32_t irq_cause; 511 #else 512 void *empty; 513 #endif 514 } cyhal_comp_t; 515 516 /** 517 * @brief Comp configurator struct 518 * 519 * This struct allows a configurator to provide block configuration information 520 * to the HAL. Because configurator-generated configurations are platform 521 * specific, the contents of this struct is subject to change between platforms 522 * and/or HAL releases. 523 */ 524 typedef struct 525 { 526 #if CYHAL_DRIVER_AVAILABLE_COMP 527 const cyhal_resource_inst_t* resource; 528 union 529 { 530 #if _CYHAL_DRIVER_AVAILABLE_COMP_LP 531 const cy_stc_lpcomp_config_t *lpcomp; 532 #endif 533 #if _CYHAL_DRIVER_AVAILABLE_COMP_CTB 534 const cy_stc_ctb_opamp_config_t *opamp; 535 #endif 536 }; 537 /* No GPIOs specified. The configurator could have routed from a non-preferred 538 * GPIO, or from another non-GPIO on-chip source. */ 539 #else 540 void *empty; 541 #endif 542 } cyhal_comp_configurator_t; 543 544 /** 545 * @brief CRC object 546 * 547 * Application code should not rely on the specific contents of this struct. 548 * They are considered an implementation detail which is subject to change 549 * between platforms and/or HAL releases. 550 */ 551 typedef struct { 552 #if defined(CY_IP_MXCRYPTO_INSTANCES) || defined(CPUSS_CRYPTO_PRESENT) 553 CRYPTO_Type* base; 554 cyhal_resource_inst_t resource; 555 uint32_t crc_width; 556 #else 557 void *empty; 558 #endif 559 } cyhal_crc_t; 560 561 /** 562 * @brief DAC object 563 * 564 * Application code should not rely on the specific contents of this struct. 565 * They are considered an implementation detail which is subject to change 566 * between platforms and/or HAL releases. 567 */ 568 typedef struct { 569 #ifdef CY_IP_MXS40PASS_CTDAC 570 bool owned_by_configurator; 571 CTDAC_Type* base_dac; 572 CTBM_Type* base_opamp; 573 cyhal_resource_inst_t resource_dac; 574 cyhal_resource_inst_t resource_opamp; 575 cyhal_resource_inst_t resource_aref_opamp; 576 cyhal_gpio_t pin; 577 #else 578 void *empty; 579 #endif 580 } cyhal_dac_t; 581 582 /** 583 * @brief DAC configurator struct 584 * 585 * This struct allows a configurator to provide block configuration information 586 * to the HAL. Because configurator-generated configurations are platform 587 * specific, the contents of this struct is subject to change between platforms 588 * and/or HAL releases. 589 */ 590 typedef struct 591 { 592 #if CYHAL_DRIVER_AVAILABLE_DAC 593 const cyhal_resource_inst_t* resource; 594 const cy_stc_ctdac_config_t* config; 595 #else 596 void *empty; 597 #endif /* CYHAL_DRIVER_AVAILABLE_DAC */ 598 } cyhal_dac_configurator_t; 599 600 /** 601 * @brief OPAMP object 602 * 603 * Application code should not rely on the specific contents of this struct. 604 * They are considered an implementation detail which is subject to change 605 * between platforms and/or HAL releases. 606 */ 607 typedef struct { 608 #if defined(CY_IP_MXS40PASS_CTB_INSTANCES) 609 bool owned_by_configurator; 610 CTBM_Type* base; 611 cyhal_resource_inst_t resource; 612 cyhal_gpio_t pin_vin_p; 613 cyhal_gpio_t pin_vin_m; 614 cyhal_gpio_t pin_vout; 615 bool is_init_success; 616 #else 617 void *empty; 618 #endif 619 } cyhal_opamp_t; 620 621 /** 622 * @brief Opamp configurator struct 623 * 624 * This struct allows a configurator to provide block configuration information 625 * to the HAL. Because configurator-generated configurations are platform 626 * specific, the contents of this struct is subject to change between platforms 627 * and/or HAL releases. 628 */ 629 typedef struct 630 { 631 #if CYHAL_DRIVER_AVAILABLE_OPAMP 632 const cyhal_resource_inst_t* resource; 633 const cy_stc_ctb_opamp_config_t* config; 634 /* No GPIOs specified. The configurator could have routed from a non-preferred 635 * GPIO, or from another non-GPIO on-chip source. */ 636 #else 637 void *empty; 638 #endif 639 } cyhal_opamp_configurator_t; 640 641 /** 642 * @brief Flash object 643 * 644 * Application code should not rely on the specific contents of this struct. 645 * They are considered an implementation detail which is subject to change 646 * between platforms and/or HAL releases. 647 */ 648 typedef struct { 649 void *empty; 650 } cyhal_flash_t; 651 652 /** 653 * @brief I2C object 654 * 655 * Application code should not rely on the specific contents of this struct. 656 * They are considered an implementation detail which is subject to change 657 * between platforms and/or HAL releases. 658 */ 659 typedef struct { 660 #ifdef CY_IP_MXSCB 661 CySCB_Type* base; 662 cyhal_resource_inst_t resource; 663 cyhal_gpio_t pin_sda; 664 cyhal_gpio_t pin_scl; 665 cyhal_clock_t clock; 666 bool is_clock_owned; 667 cy_stc_scb_i2c_context_t context; 668 cy_stc_scb_i2c_master_xfer_config_t rx_config; 669 cy_stc_scb_i2c_master_xfer_config_t tx_config; 670 uint32_t irq_cause; 671 uint16_t pending; 672 cyhal_event_callback_data_t callback_data; 673 bool dc_configured; 674 #else 675 void *empty; 676 #endif 677 } cyhal_i2c_t; 678 679 /** 680 * @brief I2C configurator struct 681 * 682 * This struct allows a configurator to provide block configuration information 683 * to the HAL. Because configurator-generated configurations are platform 684 * specific, the contents of this struct is subject to change between platforms 685 * and/or HAL releases. 686 */ 687 typedef struct { 688 #if defined(CY_IP_MXSCB) 689 const cyhal_resource_inst_t* resource; 690 const cy_stc_scb_i2c_config_t* config; 691 const cyhal_clock_t* clock; 692 #else 693 void *empty; 694 #endif /* defined(CY_IP_MXSCB) */ 695 } cyhal_i2c_configurator_t; 696 697 /** 698 * @brief EZI2C object 699 * 700 * Application code should not rely on the specific contents of this struct. 701 * They are considered an implementation detail which is subject to change 702 * between platforms and/or HAL releases. 703 */ 704 typedef struct { 705 #ifdef CY_IP_MXSCB 706 CySCB_Type* base; 707 cyhal_resource_inst_t resource; 708 cyhal_gpio_t pin_sda; 709 cyhal_gpio_t pin_scl; 710 cyhal_clock_t clock; 711 bool is_clock_owned; 712 cy_stc_scb_ezi2c_context_t context; 713 uint32_t irq_cause; 714 cyhal_event_callback_data_t callback_data; 715 bool two_addresses; 716 bool dc_configured; 717 #else 718 void *empty; 719 #endif 720 } cyhal_ezi2c_t; 721 722 /** 723 * @brief EZI2C configurator struct 724 * 725 * This struct allows a configurator to provide block configuration information 726 * to the HAL. Because configurator-generated configurations are platform 727 * specific, the contents of this struct is subject to change between platforms 728 * and/or HAL releases. 729 */ 730 typedef struct { 731 #if defined(CY_IP_MXSCB) 732 const cyhal_resource_inst_t* resource; 733 const cy_stc_scb_ezi2c_config_t* config; 734 const cyhal_clock_t* clock; 735 #else 736 void *empty; 737 #endif /* defined(CY_IP_MXSCB) */ 738 } cyhal_ezi2c_configurator_t; 739 740 /** 741 * @brief I2S object 742 * 743 * Application code should not rely on the specific contents of this struct. 744 * They are considered an implementation detail which is subject to change 745 * between platforms and/or HAL releases. 746 */ 747 typedef _cyhal_audioss_t cyhal_i2s_t; 748 749 /** 750 * @brief I2S configurator struct 751 * 752 * This struct allows a configurator to provide block configuration information 753 * to the HAL. Because configurator-generated configurations are platform 754 * specific, the contents of this struct is subject to change between platforms 755 * and/or HAL releases. 756 */ 757 typedef _cyhal_audioss_configurator_t cyhal_i2s_configurator_t; 758 759 /** 760 * @brief KeyScan object 761 * 762 * Application code should not rely on the specific contents of this struct. 763 * They are considered an implementation detail which is subject to change 764 * between platforms and/or HAL releases. 765 */ 766 typedef struct { 767 #if defined (CY_IP_MXKEYSCAN) 768 MXKEYSCAN_Type* base; 769 cyhal_resource_inst_t resource; 770 cyhal_gpio_t rows[MXKEYSCAN_NUM_ROWS_IN]; 771 cyhal_gpio_t columns[MXKEYSCAN_NUM_COLS_OUT]; 772 cyhal_clock_t clock; 773 bool is_clock_owned; 774 cy_stc_keyscan_context_t context; 775 uint32_t irq_cause; 776 cyhal_event_callback_data_t callback_data; 777 bool dc_configured; 778 #else 779 void *empty; 780 #endif 781 } cyhal_keyscan_t; 782 783 /** 784 * @brief KeyScan configurator struct 785 * 786 * This struct allows a configurator to provide block configuration information 787 * to the HAL. Because configurator-generated configurations are platform 788 * specific, the contents of this struct is subject to change between platforms 789 * and/or HAL releases. 790 */ 791 typedef struct { 792 #if defined (CY_IP_MXKEYSCAN) 793 const cyhal_resource_inst_t* resource; 794 /* keyscan PDL config is not const here because the config argument to Cy_Keyscan_Init is not const */ 795 cy_stc_ks_config_t* config; 796 const cyhal_clock_t* clock; 797 #else 798 void *empty; 799 #endif /* defined (CY_IP_MXKEYSCAN) */ 800 } cyhal_keyscan_configurator_t; 801 802 /** 803 * @brief LPTIMER object 804 * 805 * Application code should not rely on the specific contents of this struct. 806 * They are considered an implementation detail which is subject to change 807 * between platforms and/or HAL releases. 808 */ 809 typedef struct { 810 MCWDT_STRUCT_Type *base; 811 cyhal_resource_inst_t resource; 812 cyhal_event_callback_data_t callback_data; 813 bool clear_int_mask; 814 bool isr_call_user_cb; 815 } cyhal_lptimer_t; 816 817 /** 818 * @brief PDM-PCM object 819 * 820 * Application code should not rely on the specific contents of this struct. 821 * They are considered an implementation detail which is subject to change 822 * between platforms and/or HAL releases. 823 */ 824 typedef struct { 825 #if defined(CY_IP_MXAUDIOSS_INSTANCES) || defined(CY_IP_MXTDM_INSTANCES) 826 bool owned_by_configurator; 827 PDM_Type *base; 828 cyhal_resource_inst_t resource; 829 cyhal_gpio_t pin_data; 830 cyhal_gpio_t pin_clk; 831 cyhal_clock_t clock; 832 bool is_clock_owned; 833 /* Number of entries in the fifo when the trigger fires - i.e. one greater than the value in the register */ 834 uint8_t user_trigger_level; 835 /** User requested irq, see cyhal_pdm_pcm_event_t */ 836 uint32_t irq_cause; 837 cyhal_event_callback_data_t callback_data; 838 uint8_t word_size; 839 cyhal_dma_t dma; 840 #if defined(CY_IP_MXPDM) 841 cyhal_dma_t dma_paired; 842 #endif 843 volatile bool stabilized; 844 volatile bool pm_transition_ready; 845 cyhal_syspm_callback_data_t pm_callback; 846 void *async_buffer; 847 size_t async_read_remaining; 848 #else 849 void *empty; 850 #endif 851 } cyhal_pdm_pcm_t; 852 853 /** 854 * @brief PDM-PCM configurator struct 855 * 856 * This struct allows a configurator to provide block configuration information 857 * to the HAL. Because configurator-generated configurations are platform 858 * specific, the contents of this struct is subject to change between platforms 859 * and/or HAL releases. 860 */ 861 typedef struct { 862 #if defined(CY_IP_MXAUDIOSS_INSTANCES) || defined(CY_IP_MXTDM_INSTANCES) 863 const cyhal_resource_inst_t* resource; 864 #if defined(CY_IP_MXAUDIOSS_INSTANCES) 865 const cy_stc_pdm_pcm_config_t* config; 866 #elif defined(CY_IP_MXTDM_INSTANCES) 867 const cy_stc_pdm_pcm_config_v2_t* config; 868 const cy_stc_pdm_pcm_channel_config_t* chan_config; 869 #endif 870 const cyhal_clock_t* clock; 871 #else 872 void *empty; 873 #endif /* defined(CY_IP_MXSCB) */ 874 } cyhal_pdm_pcm_configurator_t; 875 876 /** 877 * @brief PWM object 878 * 879 * Application code should not rely on the specific contents of this struct. 880 * They are considered an implementation detail which is subject to change 881 * between platforms and/or HAL releases. 882 */ 883 typedef struct { 884 #ifdef CY_IP_MXTCPWM 885 cyhal_tcpwm_t tcpwm; 886 cyhal_gpio_t pin; 887 cyhal_gpio_t pin_compl; 888 #else 889 void *empty; 890 #endif 891 } cyhal_pwm_t; 892 893 /** 894 * @brief PWM configurator struct 895 * 896 * This struct allows a configurator to provide block configuration information 897 * to the HAL. Because configurator-generated configurations are platform 898 * specific, the contents of this struct is subject to change between platforms 899 * and/or HAL releases. 900 */ 901 typedef struct 902 { 903 #if CYHAL_DRIVER_AVAILABLE_PWM 904 const cyhal_resource_inst_t* resource; 905 cy_stc_tcpwm_pwm_config_t const* config; 906 const cyhal_clock_t * clock; 907 #else 908 void *empty; 909 #endif /* CYHAL_DRIVER_AVAILABLE_PWM */ 910 } cyhal_pwm_configurator_t; 911 912 /** 913 * @brief QSPI object 914 * 915 * Application code should not rely on the specific contents of this struct. 916 * They are considered an implementation detail which is subject to change 917 * between platforms and/or HAL releases. 918 */ 919 typedef struct { 920 #ifdef CY_IP_MXSMIF 921 SMIF_Type* base; 922 cyhal_resource_inst_t resource; 923 cyhal_gpio_t pin_sclk; 924 en_hsiom_sel_t saved_sclk_hsiom; 925 cyhal_gpio_t pin_io[8]; 926 en_hsiom_sel_t saved_io_hsiom[8]; 927 cyhal_gpio_t pin_ssel[SMIF_CHIP_TOP_SPI_SEL_NR]; 928 en_hsiom_sel_t saved_ssel_hsiom[SMIF_CHIP_TOP_SPI_SEL_NR]; 929 /* Active slave select */ 930 cy_en_smif_slave_select_t slave_select; 931 cyhal_clock_t clock; 932 bool is_clock_owned; 933 uint8_t mode; 934 cy_stc_smif_context_t context; 935 uint32_t irq_cause; 936 cyhal_event_callback_data_t callback_data; 937 cyhal_syspm_callback_data_t pm_callback; 938 bool pm_transition_pending; 939 bool dc_configured; 940 #else 941 void *empty; 942 #endif /* ifdef CY_IP_MXSMIF */ 943 } cyhal_qspi_t; 944 945 /** 946 * @brief QSPI configurator struct 947 * 948 * This struct allows a configurator to provide block configuration information 949 * to the HAL. Because configurator-generated configurations are platform 950 * specific, the contents of this struct is subject to change between platforms 951 * and/or HAL releases. 952 */ 953 typedef struct { 954 #ifdef CY_IP_MXSMIF 955 const cyhal_resource_inst_t* resource; 956 const cy_stc_smif_config_t* config; 957 cyhal_clock_t* clock; 958 struct 959 { 960 cyhal_gpio_t sclk; 961 cyhal_gpio_t ssel[4]; 962 cyhal_gpio_t io[8]; 963 } gpios; 964 /* Bit representation of currently not supported interrupts: 965 Bit 5 : Memory Mode Alignment Error 966 Bit 4 : RX Data FIFO Underflow 967 Bit 3 : TX Command FIFO Overflow 968 Bit 2 : TX Data FIFO Overflow 969 Bit 1 : RX FIFO Level Trigger 970 Bit 0 : TX FIFO Level Trigger 971 */ 972 uint8_t irqs; 973 /* Bit representation of DMA triggers activation indicators: 974 Bit 1 : RX Trigger Output activated in configurator 975 Bit 0 : TX Trigger Output activated in configurator 976 */ 977 uint8_t dmas; 978 #else 979 void *empty; 980 #endif /* defined(CY_IP_MXSMIF) */ 981 } cyhal_qspi_configurator_t; 982 983 /** 984 * @brief Quadrature Decoder object 985 * 986 * Application code should not rely on the specific contents of this struct. 987 * They are considered an implementation detail which is subject to change 988 * between platforms and/or HAL releases. 989 */ 990 typedef struct { 991 #ifdef CY_IP_MXTCPWM 992 cyhal_tcpwm_t tcpwm; 993 cyhal_gpio_t phi_a; 994 cyhal_gpio_t phi_b; 995 cyhal_gpio_t index; 996 uint32_t last_counter_value; 997 #else 998 void *empty; 999 #endif 1000 } cyhal_quaddec_t; 1001 1002 /** 1003 * @brief Quadrature Decoder configurator struct 1004 * 1005 * This struct allows a configurator to provide block configuration information 1006 * to the HAL. Because configurator-generated configurations are platform 1007 * specific, the contents of this struct is subject to change between platforms 1008 * and/or HAL releases. 1009 */ 1010 typedef struct 1011 { 1012 #if CYHAL_DRIVER_AVAILABLE_QUADDEC 1013 const cyhal_resource_inst_t* resource; 1014 const cy_stc_tcpwm_quaddec_config_t* config; 1015 const cyhal_clock_t * clock; 1016 #else 1017 void *empty; 1018 #endif /* CYHAL_DRIVER_AVAILABLE_QUADDEC */ 1019 } cyhal_quaddec_configurator_t; 1020 1021 /** 1022 * @brief RNG object 1023 * 1024 * Application code should not rely on the specific contents of this struct. 1025 * They are considered an implementation detail which is subject to change 1026 * between platforms and/or HAL releases. 1027 */ 1028 typedef struct { 1029 #if defined(CY_IP_MXCRYPTO_INSTANCES) || defined(CPUSS_CRYPTO_PRESENT) 1030 CRYPTO_Type* base; 1031 cyhal_resource_inst_t resource; 1032 #else 1033 void *empty; 1034 #endif 1035 } cyhal_trng_t; 1036 1037 /** 1038 * @brief RTC object 1039 * 1040 * Application code should not rely on the specific contents of this struct. 1041 * They are considered an implementation detail which is subject to change 1042 * between platforms and/or HAL releases. 1043 */ 1044 typedef struct { 1045 #if defined(CY_IP_MXS40SRSS) || defined(CY_IP_MXS40SSRSS) 1046 cy_stc_rtc_dst_t dst; 1047 #else 1048 void *empty; 1049 #endif 1050 } cyhal_rtc_t; 1051 1052 /** 1053 * @brief RTC configurator struct 1054 * 1055 * This struct allows a configurator to provide block configuration information 1056 * to the HAL. Because configurator-generated configurations are platform 1057 * specific, the contents of this struct is subject to change between platforms 1058 * and/or HAL releases. 1059 */ 1060 typedef struct 1061 { 1062 #if CYHAL_DRIVER_AVAILABLE_RTC 1063 const cyhal_resource_inst_t* resource; 1064 cy_stc_rtc_config_t const* config; 1065 cy_stc_rtc_dst_t const* dst_config; 1066 #else 1067 void *empty; 1068 #endif /* CYHAL_DRIVER_AVAILABLE_RTC */ 1069 } cyhal_rtc_configurator_t; 1070 1071 #if defined(CY_IP_MXSDHC) 1072 1073 /** 1074 * Data transfer status on SDHC/SDIO 1075 */ 1076 typedef enum 1077 { 1078 /** No data transfer in progress */ 1079 _CYHAL_SDXX_NOT_RUNNING = 0x0, 1080 /** Waiting for a command to complete */ 1081 _CYHAL_SDXX_WAIT_CMD_COMPLETE = 0x1, 1082 /** Waiting for a transfer to complete */ 1083 _CYHAL_SDXX_WAIT_XFER_COMPLETE = 0x2, 1084 /** Waiting for completion of both a command and a transfer */ 1085 _CYHAL_SDXX_WAIT_BOTH = _CYHAL_SDXX_WAIT_CMD_COMPLETE | _CYHAL_SDXX_WAIT_XFER_COMPLETE 1086 } _cyhal_sdxx_data_transfer_status_t; 1087 1088 /** 1089 * Contains common members between SDHC and SDIO 1090 */ 1091 typedef struct { 1092 bool is_sdio; 1093 void* obj; 1094 1095 SDHC_Type* base; 1096 cyhal_resource_inst_t resource; 1097 cy_stc_sd_host_context_t context; 1098 cyhal_clock_t clock; 1099 1100 bool emmc; 1101 cy_en_sd_host_dma_type_t dma_type; 1102 uint32_t adma_descriptor_tbl[2]; 1103 _cyhal_sdxx_data_transfer_status_t data_transfer_status; 1104 1105 cyhal_gpio_t pin_clk; 1106 cyhal_gpio_t pin_cmd; 1107 cyhal_gpio_t pin_io_vol_sel; 1108 bool low_voltage_io_set; 1109 1110 uint32_t irq_cause; 1111 cyhal_event_callback_data_t callback_data; 1112 1113 bool pm_transition_pending; 1114 cyhal_syspm_callback_data_t pm_callback_data; 1115 /* whether the block is configured by device-configurator (true) 1116 * or by user via HAL API (false) */ 1117 bool dc_configured; 1118 bool clock_owned; 1119 } _cyhal_sdxx_t; 1120 1121 #endif /* defined(CY_IP_MXSDHC) */ 1122 1123 /** 1124 * @brief SDHC object 1125 * 1126 * Application code should not rely on the specific contents of this struct. 1127 * They are considered an implementation detail which is subject to change 1128 * between platforms and/or HAL releases. 1129 */ 1130 typedef struct { 1131 #if defined(CY_IP_MXSDHC) 1132 _cyhal_sdxx_t sdxx; 1133 1134 uint8_t bus_width; 1135 bool enable_led_control; 1136 /* TOUT setting of SDHC block */ 1137 uint8_t data_timeout_tout; 1138 bool data_timeout_auto_reconfig; 1139 /* Desired by user data timeout in card clocks */ 1140 uint32_t data_timeout_card_clocks_user; 1141 cyhal_gpio_t pin_data[8]; 1142 cyhal_gpio_t pin_card_detect; 1143 cyhal_gpio_t pin_card_pwr_en; 1144 cyhal_gpio_t pin_card_mech_write_prot; 1145 cyhal_gpio_t pin_led_ctrl; 1146 cyhal_gpio_t pin_emmc_reset; 1147 bool low_voltage_io_desired; 1148 uint32_t bus_frequency_hz; 1149 /* Frequency of HF clock, that provided to SDHC block */ 1150 uint32_t block_source_freq_hz; 1151 /** This needs to mirror cyhal_gpio_callback_data_t, which can't be referenced directly. */ 1152 struct cyhal_sdhc_t_gpio_cb 1153 { 1154 void* callback; 1155 void* callback_arg; 1156 void* next; 1157 cyhal_gpio_t pin; 1158 } card_detect_cb; 1159 /* card detect GPIO callback enabled */ 1160 bool cd_gpio_cb_enabled; 1161 uint16_t emmc_generic_cmd6_time_ms; 1162 #else 1163 void *empty; 1164 #endif /* defined(CY_IP_MXSDHC) */ 1165 } cyhal_sdhc_t; 1166 1167 /** 1168 * @brief SDHC configurator struct 1169 * 1170 * This struct allows a configurator to provide block configuration information 1171 * to the HAL. Because configurator-generated configurations are platform 1172 * specific, the contents of this struct is subject to change between platforms 1173 * and/or HAL releases. 1174 */ 1175 typedef struct { 1176 #if defined(CY_IP_MXSDHC) 1177 const cyhal_resource_inst_t* resource; 1178 const cy_stc_sd_host_init_config_t* host_config; 1179 cy_stc_sd_host_sd_card_config_t* card_config; 1180 cyhal_clock_t* clock; 1181 struct 1182 { 1183 cyhal_gpio_t clk; 1184 cyhal_gpio_t cmd; 1185 cyhal_gpio_t data[8]; 1186 cyhal_gpio_t card_detect; 1187 cyhal_gpio_t io_volt_sel; 1188 cyhal_gpio_t card_pwr_en; 1189 cyhal_gpio_t card_mech_write_prot; 1190 cyhal_gpio_t led_ctrl; 1191 cyhal_gpio_t emmc_reset; 1192 } gpios; 1193 #else 1194 void *empty; 1195 #endif /* defined(CY_IP_MXSDHC) */ 1196 } cyhal_sdhc_configurator_t; 1197 1198 /** 1199 * @brief SDIO object 1200 * 1201 * Application code should not rely on the specific contents of this struct. 1202 * They are considered an implementation detail which is subject to change 1203 * between platforms and/or HAL releases. 1204 */ 1205 typedef struct { 1206 #if defined(CY_IP_MXSDHC) 1207 _cyhal_sdxx_t sdxx; 1208 /* whether the block is configured by device-configurator (true) 1209 * or by user via HAL API (false) */ 1210 bool dc_configured; 1211 bool clock_owned; 1212 #elif defined(CYHAL_UDB_SDIO) 1213 cyhal_dma_t dma0Ch0; 1214 cyhal_dma_t dma0Ch1; 1215 cyhal_dma_t dma1Ch1; 1216 cyhal_dma_t dma1Ch3; 1217 stc_sdio_irq_cb_t* pfuCb; 1218 1219 cyhal_clock_t clock; 1220 cyhal_resource_inst_t resource; 1221 cyhal_gpio_t pin_clk; 1222 cyhal_gpio_t pin_cmd; 1223 1224 uint32_t irq_cause; 1225 1226 bool pm_transition_pending; 1227 cyhal_syspm_callback_data_t pm_callback_data; 1228 #endif /* defined(CYHAL_IP_MXSDHC) */ 1229 1230 #if defined(CY_IP_MXSDHC) || defined(CYHAL_UDB_SDIO) 1231 cyhal_gpio_t pin_data0; 1232 cyhal_gpio_t pin_data1; 1233 cyhal_gpio_t pin_data2; 1234 cyhal_gpio_t pin_data3; 1235 1236 uint32_t frequencyhal_hz; 1237 uint16_t block_size; 1238 1239 uint32_t events; 1240 #else 1241 void *empty; 1242 #endif /* defined(CY_IP_MXSDHC) || defined(CYHAL_UDB_SDIO) */ 1243 } cyhal_sdio_t; 1244 1245 /** 1246 * @brief SDIO configurator struct 1247 * 1248 * This struct allows a configurator to provide block configuration information 1249 * to the HAL. Because configurator-generated configurations are platform 1250 * specific, the contents of this struct is subject to change between platforms 1251 * and/or HAL releases. 1252 */ 1253 typedef struct { 1254 #if defined(CY_IP_MXSDHC) 1255 const cyhal_resource_inst_t* resource; 1256 const cy_stc_sd_host_init_config_t* host_config; 1257 cy_stc_sd_host_sd_card_config_t* card_config; 1258 cyhal_clock_t* clock; 1259 struct 1260 { 1261 cyhal_gpio_t clk; 1262 cyhal_gpio_t cmd; 1263 cyhal_gpio_t data[4]; 1264 } gpios; 1265 #else 1266 void *empty; 1267 #endif /* defined(CY_IP_MXSDHC) */ 1268 } cyhal_sdio_configurator_t; 1269 1270 /** 1271 * @brief SPI object 1272 * 1273 * Application code should not rely on the specific contents of this struct. 1274 * They are considered an implementation detail which is subject to change 1275 * between platforms and/or HAL releases. 1276 */ 1277 typedef struct { 1278 #if defined(CY_IP_MXSCB) 1279 CySCB_Type* base; 1280 cyhal_resource_inst_t resource; 1281 cyhal_gpio_t pin_miso; 1282 cyhal_gpio_t pin_mosi; 1283 cyhal_gpio_t pin_sclk; 1284 cyhal_gpio_t pin_ssel[4]; 1285 cy_en_scb_spi_polarity_t ssel_pol[4]; 1286 uint8_t active_ssel; 1287 cyhal_clock_t clock; 1288 cy_en_scb_spi_sclk_mode_t clk_mode; 1289 uint8_t mode; 1290 uint8_t data_bits; 1291 bool is_slave; 1292 bool alloc_clock; 1293 uint8_t oversample_value; 1294 bool msb_first; 1295 cy_stc_scb_spi_context_t context; 1296 uint32_t irq_cause; 1297 uint16_t volatile pending; 1298 uint8_t write_fill; 1299 void *rx_buffer; 1300 uint32_t rx_buffer_size; 1301 const void *tx_buffer; 1302 uint32_t tx_buffer_size; 1303 bool is_async; 1304 cyhal_event_callback_data_t callback_data; 1305 bool dc_configured; 1306 #else 1307 void *empty; 1308 #endif 1309 } cyhal_spi_t; 1310 1311 /** 1312 * @brief SPI configurator struct 1313 * 1314 * This struct allows a configurator to provide block configuration information 1315 * to the HAL. Because configurator-generated configurations are platform 1316 * specific, the contents of this struct is subject to change between platforms 1317 * and/or HAL releases. 1318 */ 1319 typedef struct { 1320 #if defined(CY_IP_MXSCB) 1321 const cyhal_resource_inst_t* resource; 1322 const cy_stc_scb_spi_config_t* config; 1323 const cyhal_clock_t* clock; 1324 struct 1325 { 1326 cyhal_gpio_t sclk; 1327 cyhal_gpio_t ssel[4]; 1328 cyhal_gpio_t mosi; 1329 cyhal_gpio_t miso; 1330 } gpios; 1331 #else 1332 void *empty; 1333 #endif /* defined(CY_IP_MXSCB) */ 1334 } cyhal_spi_configurator_t; 1335 1336 /** 1337 * @brief TDM object 1338 * 1339 * Application code should not rely on the specific contents of this struct. 1340 * They are considered an implementation detail which is subject to change 1341 * between platforms and/or HAL releases. 1342 */ 1343 typedef _cyhal_audioss_t cyhal_tdm_t; 1344 1345 /** 1346 * @brief TDM configurator struct 1347 * 1348 * This struct allows a configurator to provide block configuration information 1349 * to the HAL. Because configurator-generated configurations are platform 1350 * specific, the contents of this struct is subject to change between platforms 1351 * and/or HAL releases. 1352 */ 1353 typedef _cyhal_audioss_configurator_t cyhal_tdm_configurator_t; 1354 1355 /** 1356 * @brief Timer object 1357 * 1358 * Application code should not rely on the specific contents of this struct. 1359 * They are considered an implementation detail which is subject to change 1360 * between platforms and/or HAL releases. 1361 */ 1362 typedef struct { 1363 #ifdef CY_IP_MXTCPWM 1364 cyhal_tcpwm_t tcpwm; 1365 uint32_t default_value; 1366 #else 1367 void *empty; 1368 #endif 1369 } cyhal_timer_t; 1370 1371 /** 1372 * @brief Timer configurator struct 1373 * 1374 * This struct allows a configurator to provide block configuration information 1375 * to the HAL. Because configurator-generated configurations are platform 1376 * specific, the contents of this struct is subject to change between platforms 1377 * and/or HAL releases. 1378 */ 1379 typedef struct 1380 { 1381 #if CYHAL_DRIVER_AVAILABLE_TIMER 1382 const cyhal_resource_inst_t* resource; 1383 const cy_stc_tcpwm_counter_config_t* config; 1384 const cyhal_clock_t * clock; 1385 #else 1386 void *empty; 1387 #endif /* CYHAL_DRIVER_AVAILABLE_TIMER */ 1388 } cyhal_timer_configurator_t; 1389 1390 /** 1391 * @brief UART object 1392 * 1393 * Application code should not rely on the specific contents of this struct. 1394 * They are considered an implementation detail which is subject to change 1395 * between platforms and/or HAL releases. 1396 */ 1397 typedef struct { 1398 #ifdef CY_IP_MXSCB 1399 CySCB_Type* base; 1400 cyhal_resource_inst_t resource; 1401 cyhal_gpio_t pin_rx; 1402 cyhal_gpio_t pin_tx; 1403 cyhal_gpio_t pin_cts; 1404 cyhal_gpio_t pin_rts; 1405 bool cts_enabled; 1406 bool rts_enabled; 1407 bool is_clock_owned; 1408 cyhal_clock_t clock; 1409 cy_stc_scb_uart_context_t context; 1410 cy_stc_scb_uart_config_t config; 1411 uint32_t irq_cause; 1412 en_hsiom_sel_t saved_tx_hsiom; 1413 en_hsiom_sel_t saved_rts_hsiom; 1414 cyhal_event_callback_data_t callback_data; 1415 bool dc_configured; 1416 #else 1417 void *empty; 1418 #endif 1419 } cyhal_uart_t; 1420 1421 /** 1422 * @brief UART configurator struct 1423 * 1424 * This struct allows a configurator to provide block configuration information 1425 * to the HAL. Because configurator-generated configurations are platform 1426 * specific, the contents of this struct is subject to change between platforms 1427 * and/or HAL releases. 1428 */ 1429 typedef struct { 1430 #ifdef CY_IP_MXSCB 1431 const cyhal_resource_inst_t* resource; 1432 const cy_stc_scb_uart_config_t* config; 1433 const cyhal_clock_t* clock; 1434 struct 1435 { 1436 cyhal_gpio_t pin_tx; 1437 cyhal_gpio_t pin_rts; 1438 cyhal_gpio_t pin_cts; 1439 } gpios; 1440 #else 1441 void *empty; 1442 #endif /* CY_IP_MXSCB */ 1443 } cyhal_uart_configurator_t; 1444 1445 /** 1446 * @brief USB Device object 1447 * 1448 * Application code should not rely on the specific contents of this struct. 1449 * They are considered an implementation detail which is subject to change 1450 * between platforms and/or HAL releases. 1451 */ 1452 typedef struct { 1453 #ifdef CY_IP_MXUSBFS 1454 USBFS_Type* base; 1455 cy_stc_usbfs_dev_drv_context_t context; 1456 cyhal_resource_inst_t resource; 1457 cyhal_resource_inst_t pll_resource; 1458 cyhal_clock_t clock; 1459 bool shared_clock; 1460 cyhal_gpio_t pin_dp; 1461 cyhal_gpio_t pin_dm; 1462 cyhal_syspm_callback_data_t pm_callback; 1463 uint8_t *rd_data[CY_USBFS_DEV_DRV_NUM_EPS_MAX]; 1464 uint32_t rd_size[CY_USBFS_DEV_DRV_NUM_EPS_MAX]; 1465 #else 1466 void *empty; 1467 #endif 1468 } cyhal_usb_dev_t; 1469 1470 /** 1471 * @brief WDT object 1472 * 1473 * Application code should not rely on the specific contents of this struct. 1474 * They are considered an implementation detail which is subject to change 1475 * between platforms and/or HAL releases. 1476 */ 1477 typedef struct { 1478 uint8_t placeholder; 1479 } cyhal_wdt_t; 1480 1481 #if defined(__cplusplus) 1482 } 1483 #endif /* __cplusplus */ 1484 1485 /** \} group_hal_impl_hw_types */ 1486 /** \} group_hal_impl */ 1487
