1 /* 2 * Copyright (c) 2019 Song Qiang <songqiang1304521@gmail.com> 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #ifndef DMA_STM32_H_ 8 #define DMA_STM32_H_ 9 10 #include <soc.h> 11 #include <stm32_ll_dma.h> 12 #include <drivers/dma.h> 13 #include <drivers/clock_control/stm32_clock_control.h> 14 15 /* Maximum data sent in single transfer (Bytes) */ 16 #define DMA_STM32_MAX_DATA_ITEMS 0xffff 17 18 struct dma_stm32_stream { 19 uint32_t direction; 20 #ifdef CONFIG_DMAMUX_STM32 21 int mux_channel; /* stores the dmamux channel */ 22 #endif /* CONFIG_DMAMUX_STM32 */ 23 bool source_periph; 24 bool hal_override; 25 volatile bool busy; 26 uint32_t src_size; 27 uint32_t dst_size; 28 void *user_data; /* holds the client data */ 29 dma_callback_t dma_callback; 30 }; 31 32 struct dma_stm32_data { 33 struct dma_context dma_ctx; 34 }; 35 36 struct dma_stm32_config { 37 struct stm32_pclken pclken; 38 void (*config_irq)(const struct device *dev); 39 bool support_m2m; 40 uint32_t base; 41 uint32_t max_streams; 42 #ifdef CONFIG_DMAMUX_STM32 43 uint8_t offset; /* position in the list of dmamux channel list */ 44 #endif 45 struct dma_stm32_stream *streams; 46 }; 47 48 #if !defined(CONFIG_DMA_STM32_V1) 49 /* from DTS the dma stream id is in range 1..<dma-requests> */ 50 /* so decrease to set range from 0 from now on */ 51 #define STREAM_OFFSET 1 52 #elif defined(CONFIG_DMA_STM32_V1) && defined(CONFIG_DMAMUX_STM32) 53 /* typically on the stm32H7 serie, DMA V1 with mux */ 54 #define STREAM_OFFSET 1 55 #else 56 /* from DTS the dma stream id is in range 0..<dma-requests>-1 */ 57 #define STREAM_OFFSET 0 58 #endif /* ! CONFIG_DMA_STM32_V1 */ 59 60 uint32_t dma_stm32_id_to_stream(uint32_t id); 61 #if !defined(CONFIG_DMAMUX_STM32) 62 uint32_t dma_stm32_slot_to_channel(uint32_t id); 63 #endif 64 65 typedef void (*dma_stm32_clear_flag_func)(DMA_TypeDef *DMAx); 66 typedef uint32_t (*dma_stm32_check_flag_func)(DMA_TypeDef *DMAx); 67 68 bool dma_stm32_is_tc_active(DMA_TypeDef *DMAx, uint32_t id); 69 void dma_stm32_clear_tc(DMA_TypeDef *DMAx, uint32_t id); 70 bool dma_stm32_is_ht_active(DMA_TypeDef *DMAx, uint32_t id); 71 void dma_stm32_clear_ht(DMA_TypeDef *DMAx, uint32_t id); 72 bool dma_stm32_is_te_active(DMA_TypeDef *DMAx, uint32_t id); 73 void dma_stm32_clear_te(DMA_TypeDef *DMAx, uint32_t id); 74 75 #ifdef CONFIG_DMA_STM32_V1 76 bool dma_stm32_is_dme_active(DMA_TypeDef *DMAx, uint32_t id); 77 void dma_stm32_clear_dme(DMA_TypeDef *DMAx, uint32_t id); 78 bool dma_stm32_is_fe_active(DMA_TypeDef *DMAx, uint32_t id); 79 void dma_stm32_clear_fe(DMA_TypeDef *DMAx, uint32_t id); 80 #endif 81 82 #ifdef CONFIG_DMA_STM32_V2 83 bool dma_stm32_is_gi_active(DMA_TypeDef *DMAx, uint32_t id); 84 void dma_stm32_clear_gi(DMA_TypeDef *DMAx, uint32_t id); 85 #endif 86 87 bool stm32_dma_is_irq_active(DMA_TypeDef *dma, uint32_t id); 88 bool stm32_dma_is_ht_irq_active(DMA_TypeDef *dma, uint32_t id); 89 bool stm32_dma_is_tc_irq_active(DMA_TypeDef *dma, uint32_t id); 90 91 void stm32_dma_dump_stream_irq(DMA_TypeDef *dma, uint32_t id); 92 void stm32_dma_clear_stream_irq(DMA_TypeDef *dma, uint32_t id); 93 bool stm32_dma_is_irq_happened(DMA_TypeDef *dma, uint32_t id); 94 bool stm32_dma_is_unexpected_irq_happened(DMA_TypeDef *dma, uint32_t id); 95 void stm32_dma_enable_stream(DMA_TypeDef *dma, uint32_t id); 96 int stm32_dma_disable_stream(DMA_TypeDef *dma, uint32_t id); 97 98 #if !defined(CONFIG_DMAMUX_STM32) 99 void stm32_dma_config_channel_function(DMA_TypeDef *dma, uint32_t id, 100 uint32_t slot); 101 #endif 102 103 #ifdef CONFIG_DMA_STM32_V1 104 void stm32_dma_disable_fifo_irq(DMA_TypeDef *dma, uint32_t id); 105 bool stm32_dma_check_fifo_mburst(LL_DMA_InitTypeDef *DMAx); 106 uint32_t stm32_dma_get_fifo_threshold(uint16_t fifo_mode_control); 107 uint32_t stm32_dma_get_mburst(struct dma_config *config, bool source_periph); 108 uint32_t stm32_dma_get_pburst(struct dma_config *config, bool source_periph); 109 #endif 110 111 #ifdef CONFIG_DMAMUX_STM32 112 /* dma_stm32_ api functions are exported to the dmamux_stm32 */ 113 #define DMA_STM32_EXPORT_API 114 int dma_stm32_configure(const struct device *dev, uint32_t id, 115 struct dma_config *config); 116 int dma_stm32_reload(const struct device *dev, uint32_t id, 117 uint32_t src, uint32_t dst, size_t size); 118 int dma_stm32_start(const struct device *dev, uint32_t id); 119 int dma_stm32_stop(const struct device *dev, uint32_t id); 120 int dma_stm32_get_status(const struct device *dev, uint32_t id, 121 struct dma_status *stat); 122 #else 123 #define DMA_STM32_EXPORT_API static 124 #endif /* CONFIG_DMAMUX_STM32 */ 125 126 #endif /* DMA_STM32_H_*/ 127