1 /* 2 * Copyright (c) 2016 Open-RnD Sp. z o.o. 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 /** 8 * @brief Driver for UART port on STM32 family processor. 9 * 10 */ 11 12 #ifndef ZEPHYR_DRIVERS_SERIAL_UART_STM32_H_ 13 #define ZEPHYR_DRIVERS_SERIAL_UART_STM32_H_ 14 15 #include <zephyr/drivers/pinctrl.h> 16 #include <zephyr/drivers/reset.h> 17 #include <zephyr/drivers/uart.h> 18 19 #include <stm32_ll_usart.h> 20 21 /* device config */ 22 struct uart_stm32_config { 23 /* USART instance */ 24 USART_TypeDef *usart; 25 /* Reset controller device configuration */ 26 const struct reset_dt_spec reset; 27 /* clock subsystem driving this peripheral */ 28 const struct stm32_pclken *pclken; 29 /* number of clock subsystems */ 30 size_t pclk_len; 31 /* switch to enable single wire / half duplex feature */ 32 bool single_wire; 33 /* enable tx/rx pin swap */ 34 bool tx_rx_swap; 35 /* enable rx pin inversion */ 36 bool rx_invert; 37 /* enable tx pin inversion */ 38 bool tx_invert; 39 /* enable de signal */ 40 bool de_enable; 41 /* de signal assertion time in 1/16 of a bit */ 42 uint8_t de_assert_time; 43 /* de signal deassertion time in 1/16 of a bit */ 44 uint8_t de_deassert_time; 45 /* enable de pin inversion */ 46 bool de_invert; 47 /* enable fifo */ 48 bool fifo_enable; 49 /* pin muxing */ 50 const struct pinctrl_dev_config *pcfg; 51 #if defined(CONFIG_UART_INTERRUPT_DRIVEN) || defined(CONFIG_UART_ASYNC_API) || \ 52 defined(CONFIG_PM) 53 uart_irq_config_func_t irq_config_func; 54 #endif 55 #if defined(CONFIG_PM) 56 /* Device defined as wake-up source */ 57 bool wakeup_source; 58 uint32_t wakeup_line; 59 #endif /* CONFIG_PM */ 60 }; 61 62 #ifdef CONFIG_UART_ASYNC_API 63 struct uart_dma_stream { 64 const struct device *dma_dev; 65 uint32_t dma_channel; 66 struct dma_config dma_cfg; 67 uint8_t priority; 68 bool src_addr_increment; 69 bool dst_addr_increment; 70 int fifo_threshold; 71 struct dma_block_config blk_cfg; 72 uint8_t *buffer; 73 size_t buffer_length; 74 size_t offset; 75 volatile size_t counter; 76 int32_t timeout; 77 struct k_work_delayable timeout_work; 78 bool enabled; 79 }; 80 #endif 81 82 /* driver data */ 83 struct uart_stm32_data { 84 /* clock device */ 85 const struct device *clock; 86 /* uart config */ 87 struct uart_config *uart_cfg; 88 #ifdef CONFIG_UART_INTERRUPT_DRIVEN 89 uart_irq_callback_user_data_t user_cb; 90 void *user_data; 91 #endif 92 93 #ifdef CONFIG_UART_ASYNC_API 94 const struct device *uart_dev; 95 uart_callback_t async_cb; 96 void *async_user_data; 97 struct uart_dma_stream dma_rx; 98 struct uart_dma_stream dma_tx; 99 uint8_t *rx_next_buffer; 100 size_t rx_next_buffer_len; 101 #endif 102 #ifdef CONFIG_PM 103 bool tx_poll_stream_on; 104 bool tx_int_stream_on; 105 bool pm_policy_state_on; 106 #endif 107 }; 108 109 #endif /* ZEPHYR_DRIVERS_SERIAL_UART_STM32_H_ */ 110
