1 /***************************************************************************//**
2 * \file cy_wdg.c
3 *
4 * \brief
5 * Provides a high level interface for interacting with the Cypress Watchdog Timer.
6 * This interface abstracts out the chip specific details. If any chip specific
7 * functionality is necessary, or performance is critical the low level functions
8 * can be used directly.
9 *
10 *
11 ********************************************************************************
12 * \copyright
13 * Copyright 2019-2020 Cypress Semiconductor Corporation
14 * SPDX-License-Identifier: Apache-2.0
15 *
16 * Licensed under the Apache License, Version 2.0 (the "License");
17 * you may not use this file except in compliance with the License.
18 * You may obtain a copy of the License at
19 *
20 *     http://www.apache.org/licenses/LICENSE-2.0
21 *
22 * Unless required by applicable law or agreed to in writing, software
23 * distributed under the License is distributed on an "AS IS" BASIS,
24 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25 * See the License for the specific language governing permissions and
26 * limitations under the License.
27 *******************************************************************************/
28 
29 #include <stdbool.h>
30 #include "watchdog.h"
31 #include "cy_wdt.h"
32 #include "cy_utils.h"
33 
34 #if defined(__cplusplus)
35 extern "C" {
36 #endif
37 
38 #if defined(COMPONENT_PSOC6)
39 #define _cy_wdg_lock()   Cy_WDT_Lock()
40 #define _cy_wdg_unlock() Cy_WDT_Unlock()
41 #else
42 #define _cy_wdg_lock()
43 #define _cy_wdg_unlock()
44 #endif
45 
46 // ((2^16 * 2) + (2^16 - 1)) * .030518 ms
47 /** Maximum WDT timeout in milliseconds */
48 #define _cy_wdg_MAX_TIMEOUT_MS 6000
49 
50 /** Maximum number of ignore bits */
51 #define _cy_wdg_MAX_IGNORE_BITS 12
52 
53 typedef struct {
54     uint16_t min_period_ms; // Minimum period in milliseconds that can be represented with this many ignored bits
55     uint16_t round_threshold_ms; // Timeout threshold in milliseconds from which to round up to the minimum period
56 } _cy_wdg_ignore_bits_data_t;
57 
58 // ILO Frequency = 32768 Hz
59 // ILO Period = 1 / 32768 Hz = .030518 ms
60 // WDT Reset Period (timeout_ms) = .030518 ms * (2 * 2^(16 - ignore_bits) + match)
61 // ignore_bits range: 0 - 12
62 // match range: 0 - (2^(16 - ignore_bits) - 1)
63 static const _cy_wdg_ignore_bits_data_t _cy_wdg_ignore_data[] = {
64     {4001, 3001}, // 0 bits:  min period: 4001ms, max period: 6000ms, round up from 3001+ms
65     {2001, 1500}, // 1 bit:   min period: 2001ms, max period: 3000ms, round up from 1500+ms
66     {1001, 750},  // 2 bits:  min period: 1001ms, max period: 1499ms, round up from 750+ms
67     {501,  375},  // 3 bits:  min period: 501ms,  max period: 749ms,  round up from 375+ms
68     {251,  188},  // 4 bits:  min period: 251ms,  max period: 374ms,  round up from 188+ms
69     {126,  94},   // 5 bits:  min period: 126ms,  max period: 187ms,  round up from 94+ms
70     {63,   47},   // 6 bits:  min period: 63ms,   max period: 93ms,   round up from 47+ms
71     {32,   24},   // 7 bits:  min period: 32ms,   max period: 46ms,   round up from 24+ms
72     {16,   12},   // 8 bits:  min period: 16ms,   max period: 23ms,   round up from 12+ms
73     {8,    6},    // 9 bits:  min period: 8ms,    max period: 11ms,   round up from 6+ms
74     {4,    3},    // 10 bits: min period: 4ms,    max period: 5ms,    round up from 3+ms
75     {2,    2},    // 11 bits: min period: 2ms,    max period: 2ms
76     {1,    1}     // 12 bits: min period: 1ms,    max period: 1ms
77 };
78 
79 static bool _cy_wdg_initialized = false;
80 static bool _cy_wdg_pdl_initialized = false;
81 static uint16_t _cy_wdg_initial_timeout_ms = 0;
82 static uint8_t _cy_wdg_initial_ignore_bits = 0;
83 
_cy_wdg_timeout_to_ignore_bits(uint32_t * timeout_ms)84 static __INLINE uint32_t _cy_wdg_timeout_to_ignore_bits(uint32_t *timeout_ms) {
85     for (uint32_t i = 0; i <= _cy_wdg_MAX_IGNORE_BITS; i++)
86     {
87         if (*timeout_ms >= _cy_wdg_ignore_data[i].round_threshold_ms)
88         {
89             if (*timeout_ms < _cy_wdg_ignore_data[i].min_period_ms)
90                 *timeout_ms = _cy_wdg_ignore_data[i].min_period_ms;
91             return i;
92         }
93     }
94     return _cy_wdg_MAX_IGNORE_BITS; // Should never reach this
95 }
96 
_cy_wdg_timeout_to_match(uint16_t timeout_ms,uint16_t ignore_bits)97 static __INLINE uint16_t _cy_wdg_timeout_to_match(uint16_t timeout_ms, uint16_t ignore_bits)
98 {
99     // match = (timeout_ms / .030518 ms) - (2 * 2^(16 - ignore_bits))
100     return (uint16_t)(timeout_ms / .030518) - (1UL << (17 - ignore_bits)) + Cy_WDT_GetCount();
101 }
102 
103 /* Start API implementing */
104 
cy_wdg_init(uint32_t timeout_ms)105 cy_rslt_t cy_wdg_init(uint32_t timeout_ms)
106 {
107     if (timeout_ms == 0 || timeout_ms > _cy_wdg_MAX_TIMEOUT_MS)
108     {
109         return -1;
110     }
111 
112     if (_cy_wdg_initialized)
113     {
114         return -1;
115     }
116 
117     _cy_wdg_initialized = true;
118 
119     if (!_cy_wdg_pdl_initialized)
120     {
121         Cy_WDT_Enable();
122         Cy_WDT_MaskInterrupt();
123         _cy_wdg_pdl_initialized = true;
124     }
125 
126     cy_wdg_stop();
127 
128     _cy_wdg_initial_timeout_ms = timeout_ms;
129     uint8_t ignore_bits = _cy_wdg_timeout_to_ignore_bits(&timeout_ms);
130     _cy_wdg_initial_ignore_bits = ignore_bits;
131 
132     Cy_WDT_SetIgnoreBits(ignore_bits);
133 
134     Cy_WDT_SetMatch(_cy_wdg_timeout_to_match(timeout_ms, ignore_bits));
135 
136     cy_wdg_start();
137 
138     return CY_RSLT_SUCCESS;
139 }
140 
cy_wdg_free()141 void cy_wdg_free()
142 {
143     cy_wdg_stop();
144 
145     _cy_wdg_initialized = false;
146 }
147 
cy_wdg_kick()148 void cy_wdg_kick()
149 {
150     /* Clear to prevent reset from WDT */
151     Cy_WDT_ClearWatchdog();
152 
153     _cy_wdg_unlock();
154     Cy_WDT_SetMatch(_cy_wdg_timeout_to_match(_cy_wdg_initial_timeout_ms, _cy_wdg_initial_ignore_bits));
155     _cy_wdg_lock();
156 }
157 
cy_wdg_start()158 void cy_wdg_start()
159 {
160     _cy_wdg_unlock();
161     Cy_WDT_Enable();
162     _cy_wdg_lock();
163 }
164 
cy_wdg_stop()165 void cy_wdg_stop()
166 {
167     _cy_wdg_unlock();
168     Cy_WDT_Disable();
169 }
170 
cy_wdg_get_timeout_ms()171 uint32_t cy_wdg_get_timeout_ms()
172 {
173     return _cy_wdg_initial_timeout_ms;
174 }
175 
cy_wdg_get_max_timeout_ms(void)176 uint32_t cy_wdg_get_max_timeout_ms(void)
177 {
178     return _cy_wdg_MAX_TIMEOUT_MS;
179 }
180 
181 #if defined(__cplusplus)
182 }
183 #endif
184