1 /***************************************************************************//** 2 * \file cy_crypto_common.h 3 * \version 2.40 4 * 5 * \brief 6 * This file provides common constants and parameters 7 * for the Crypto driver. 8 * 9 ******************************************************************************** 10 * Copyright 2016-2020 Cypress Semiconductor Corporation 11 * SPDX-License-Identifier: Apache-2.0 12 * 13 * Licensed under the Apache License, Version 2.0 (the "License"); 14 * you may not use this file except in compliance with the License. 15 * You may obtain a copy of the License at 16 * 17 * http://www.apache.org/licenses/LICENSE-2.0 18 * 19 * Unless required by applicable law or agreed to in writing, software 20 * distributed under the License is distributed on an "AS IS" BASIS, 21 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 * See the License for the specific language governing permissions and 23 * limitations under the License. 24 *******************************************************************************/ 25 26 27 #if !defined (CY_CRYPTO_COMMON_H) 28 #define CY_CRYPTO_COMMON_H 29 30 #include "cy_device.h" 31 #include "cy_device_headers.h" 32 33 #if defined (CY_IP_MXCRYPTO) 34 35 #include "cy_syslib.h" 36 37 #if defined(__cplusplus) 38 extern "C" { 39 #endif 40 41 #include <stddef.h> 42 #include <stdbool.h> 43 #include "cy_sysint.h" 44 45 /* Enable SHA functionality */ 46 #if !defined(CPUSS_CRYPTO_SHA) && (defined(CPUSS_CRYPTO_SHA1) || defined(CPUSS_CRYPTO_SHA2)) 47 #define CPUSS_CRYPTO_SHA (1) 48 49 #if defined(CPUSS_CRYPTO_SHA2) && !defined(CPUSS_CRYPTO_SHA256) 50 #define CPUSS_CRYPTO_SHA256 (1) 51 #endif 52 53 #if defined(CPUSS_CRYPTO_SHA2) && !defined(CPUSS_CRYPTO_SHA512) 54 #define CPUSS_CRYPTO_SHA512 (1) 55 #endif 56 #endif 57 58 #if !defined(CPUSS_CRYPTO_STR) 59 #define CPUSS_CRYPTO_STR (1) 60 #endif 61 62 /** Driver major version */ 63 #define CY_CRYPTO_DRV_VERSION_MAJOR 2 64 65 /** Driver minor version */ 66 #define CY_CRYPTO_DRV_VERSION_MINOR 40 67 68 /** 69 * \addtogroup group_crypto_cli_srv_macros 70 * \{ 71 */ 72 73 /** Defines Crypto_Sync blocking execution type parameter */ 74 #define CY_CRYPTO_SYNC_BLOCKING (true) 75 76 /** Defines Crypto_Sync non-blocking execution type parameter */ 77 #define CY_CRYPTO_SYNC_NON_BLOCKING (false) 78 79 /** Defines the Crypto DES block size (in bytes). */ 80 #define CY_CRYPTO_DES_BLOCK_SIZE (8u) 81 82 /** Defines the Crypto DES key size (in bytes) */ 83 #define CY_CRYPTO_DES_KEY_SIZE (CY_CRYPTO_DES_BLOCK_SIZE) 84 85 /** Defines the Crypto TDES key size (in bytes) */ 86 #define CY_CRYPTO_TDES_KEY_SIZE (24u) 87 88 /** Defines the Crypto AES block size (in bytes) */ 89 #define CY_CRYPTO_AES_BLOCK_SIZE (16u) 90 91 /** Defines the Crypto AES_128 key maximum size (in bytes) */ 92 #define CY_CRYPTO_AES_128_KEY_SIZE (16u) 93 94 /** Defines the Crypto AES_192 key maximum size (in bytes) */ 95 #define CY_CRYPTO_AES_192_KEY_SIZE (24u) 96 97 /** Defines the Crypto AES_256 key maximum size (in bytes) */ 98 #define CY_CRYPTO_AES_256_KEY_SIZE (32u) 99 100 /** Defines the Crypto AES key maximum size (in bytes) */ 101 #define CY_CRYPTO_AES_MAX_KEY_SIZE (CY_CRYPTO_AES_256_KEY_SIZE) 102 103 /** Defines the Crypto AES_256 key maximum size (in four-byte words) */ 104 #define CY_CRYPTO_AES_MAX_KEY_SIZE_U32 (uint32_t)(CY_CRYPTO_AES_MAX_KEY_SIZE / 4UL) 105 106 /** Defines size of the AES block, in four-byte words */ 107 #define CY_CRYPTO_AES_BLOCK_SIZE_U32 (uint32_t)(CY_CRYPTO_AES_BLOCK_SIZE / 4UL) 108 109 #if (CPUSS_CRYPTO_SHA == 1) 110 111 /* Defines for the SHA algorithm */ 112 /** Hash size for the SHA1 mode (in bytes) */ 113 #define CY_CRYPTO_SHA1_DIGEST_SIZE (20u) 114 /** Hash size for the SHA224 mode (in bytes) */ 115 #define CY_CRYPTO_SHA224_DIGEST_SIZE (28u) 116 /** Hash size for the SHA256 mode (in bytes) */ 117 #define CY_CRYPTO_SHA256_DIGEST_SIZE (32u) 118 /** Hash size for the SHA384 mode (in bytes) */ 119 #define CY_CRYPTO_SHA384_DIGEST_SIZE (48u) 120 /** Hash size for the SHA512 mode (in bytes) */ 121 #define CY_CRYPTO_SHA512_DIGEST_SIZE (64u) 122 /** Hash size for the SHA512_224 mode (in bytes) */ 123 #define CY_CRYPTO_SHA512_224_DIGEST_SIZE (28u) 124 /** Hash size for the SHA512_256 mode (in bytes) */ 125 #define CY_CRYPTO_SHA512_256_DIGEST_SIZE (32u) 126 /** The maximal Hash size for the SHA modes (in bytes). */ 127 #define CY_CRYPTO_SHA_MAX_DIGEST_SIZE (CY_CRYPTO_SHA512_DIGEST_SIZE) 128 129 /** Block size for the SHA1 mode (in bytes) */ 130 #define CY_CRYPTO_SHA1_BLOCK_SIZE (64u) 131 /** Block size for the SHA256 mode (in bytes) */ 132 #define CY_CRYPTO_SHA256_BLOCK_SIZE (64u) 133 /** Block size for the SHA512 mode (in bytes) */ 134 #define CY_CRYPTO_SHA512_BLOCK_SIZE (128u) 135 /** Maximal block size for the SHA modes (in bytes) */ 136 #define CY_CRYPTO_SHA_MAX_BLOCK_SIZE (CY_CRYPTO_SHA512_BLOCK_SIZE) 137 138 /** \cond INTERNAL */ 139 140 #define CY_CRYPTO_SHA256_PAD_SIZE (56uL) 141 #define CY_CRYPTO_SHA512_PAD_SIZE (112uL) 142 143 #define CY_CRYPTO_SHA1_HASH_SIZE (20u) 144 #define CY_CRYPTO_SHA256_HASH_SIZE (32u) 145 #define CY_CRYPTO_SHA512_HASH_SIZE (64u) 146 #define CY_CRYPTO_SHA_MAX_HASH_SIZE (CY_CRYPTO_SHA512_HASH_SIZE) 147 148 #define CY_CRYPTO_SHA1_ROUND_MEM_SIZE (320uL) 149 #define CY_CRYPTO_SHA256_ROUND_MEM_SIZE (256uL) 150 #define CY_CRYPTO_SHA512_ROUND_MEM_SIZE (640uL) 151 #define CY_CRYPTO_SHA_MAX_ROUND_MEM_SIZE (CY_CRYPTO_SHA512_ROUND_MEM_SIZE) 152 153 /* The width of the Crypto hardware registers values in bits. */ 154 #define CY_CRYPTO_HW_REGS_WIDTH (32UL) 155 156 /* Calculates the actual size in bytes of the bits value */ 157 #define CY_CRYPTO_BYTE_SIZE_OF_BITS(x) (uint32_t)(((uint32_t)(x) + 7u) >> 3u) 158 159 /* Calculates the actual size in 32-bit words of the bits value */ 160 #define CY_CRYPTO_WORD_SIZE_OF_BITS(x) (uint32_t)(((uint32_t)(x) + 31u) >> 5u) 161 162 /** \endcond */ 163 164 #endif /* #if (CPUSS_CRYPTO_SHA == 1) */ 165 166 167 #if (CPUSS_CRYPTO_VU == 1) 168 169 /** Processed message size for the RSA 1024Bit mode (in bytes) */ 170 #define CY_CRYPTO_RSA1024_MESSAGE_SIZE CY_CRYPTO_BYTE_SIZE_OF_BITS(1024u) 171 /** Processed message size for the RSA 1536Bit mode (in bytes) */ 172 #define CY_CRYPTO_RSA1536_MESSAGE_SIZE CY_CRYPTO_BYTE_SIZE_OF_BITS(1536u) 173 /** Processed message size for the RSA 2048Bit mode (in bytes) */ 174 #define CY_CRYPTO_RSA2048_MESSAGE_SIZE CY_CRYPTO_BYTE_SIZE_OF_BITS(2048u) 175 /** Processed message size for the RSA 3072Bit mode (in bytes) */ 176 #define CY_CRYPTO_RSA3072_MESSAGE_SIZE CY_CRYPTO_BYTE_SIZE_OF_BITS(3072u) 177 /** Processed message size for the RSA 4096Bit mode (in bytes) */ 178 #define CY_CRYPTO_RSA4096_MESSAGE_SIZE CY_CRYPTO_BYTE_SIZE_OF_BITS(4096u) 179 180 #endif /* #if (CPUSS_CRYPTO_VU == 1) */ 181 182 183 /** Crypto Driver PDL ID */ 184 #define CY_CRYPTO_ID CY_PDL_DRV_ID(0x0Cu) 185 186 /** \} group_crypto_cli_srv_macros */ 187 188 /** 189 * \addtogroup group_crypto_config_structure 190 * \{ 191 The Crypto initialization configuration. 192 * \note Should be the same for the Crypto Server and Crypto Client initialization. 193 */ 194 195 /** The Crypto user callback function type. 196 Callback is called at the end of Crypto calculation. */ 197 typedef void (*cy_crypto_callback_ptr_t)(void); 198 199 /** The Crypto configuration structure. */ 200 typedef struct 201 { 202 /** Defines the IPC channel used for client-server data exchange */ 203 uint32_t ipcChannel; 204 205 /** Specifies the IPC notifier channel (IPC interrupt structure number) 206 to notify server that data for the operation is prepared */ 207 uint32_t acquireNotifierChannel; 208 209 /** Specifies the IPC notifier channel (IPC interrupt structure number) 210 to notify client that operation is complete and data is valid */ 211 uint32_t releaseNotifierChannel; 212 213 /** Specifies the release notifier interrupt configuration. It used for 214 internal purposes and user doesn't fill it. */ 215 cy_stc_sysint_t releaseNotifierConfig; 216 217 /** User callback function. 218 If this field is NOT NULL, it called when Crypto operation 219 is complete. */ 220 cy_crypto_callback_ptr_t userCompleteCallback; 221 222 /** Server-side user IRQ handler function, called when data for the 223 operation is prepared to process. 224 - If this field is NULL, server will use own interrupt handler 225 to get data. 226 - If this field is not NULL, server will call this interrupt handler. 227 This interrupt handler must call the 228 \ref Cy_Crypto_Server_GetDataHandler to get data to process. 229 230 Note: In the second case user should process data separately and 231 clear interrupt by calling \ref Cy_Crypto_Server_Process. 232 This model is used in the 233 multitasking environment. */ 234 cy_israddress userGetDataHandler; 235 236 /** Server-side user IRQ handler function, called when a Crypto hardware 237 error occurs (interrupt was raised). 238 - If this field is NULL - server will use own interrupt handler 239 for error processing. 240 - If this field is not NULL - server will call this interrupt handler. 241 This interrupt handler must call the 242 \ref Cy_Crypto_Server_ErrorHandler to clear the interrupt. */ 243 cy_israddress userErrorHandler; 244 245 /** Specifies the prepared data notifier interrupt configuration. It used 246 for internal purposes and user doesn't fill it. */ 247 cy_stc_sysint_t acquireNotifierConfig; 248 249 /** Specifies the hardware error processing interrupt configuration. It used 250 for internal purposes and user doesn't fill it. */ 251 cy_stc_sysint_t cryptoErrorIntrConfig; 252 253 } cy_stc_crypto_config_t; 254 255 /** \} group_crypto_config_structure */ 256 257 /** 258 * \addtogroup group_crypto_data_structures 259 * \{ 260 */ 261 262 #if (CPUSS_CRYPTO_VU == 1) 263 264 /** 265 * All fields for the context structure are internal. Firmware never reads or 266 * writes these values. Firmware allocates the structure and provides the 267 * address of the structure to the driver in the function calls. Firmware must 268 * ensure that the defined instance of this structure remains in scope 269 * while the drive is in use. 270 * 271 * The driver uses this structure to store and manipulate the RSA public key and 272 * additional coefficients to accelerate RSA calculation. 273 * 274 * RSA key contained from two fields: 275 * - n - modulus part of the key 276 * - e - exponent part of the key. 277 * 278 * Other fields are accelerating coefficients and can be calculated by 279 * \ref Cy_Crypto_Rsa_CalcCoefs. 280 * 281 * \note The <b>modulus</b> and <b>exponent</b> values in the 282 * \ref cy_stc_crypto_rsa_pub_key_t must also be in little-endian order.<br> 283 * Use \ref Cy_Crypto_InvertEndianness function to convert to or from 284 * little-endian order. 285 */ 286 typedef struct 287 { 288 /** \cond INTERNAL */ 289 /** The pointer to the modulus part of public key. */ 290 uint8_t *moduloPtr; 291 /** The modulus length, in bits, maximum supported size is 2048Bit */ 292 uint32_t moduloLength; 293 294 /** The pointer to the exponent part of public key */ 295 uint8_t *pubExpPtr; 296 /** The exponent length, in bits, maximum supported size is 256Bit */ 297 uint32_t pubExpLength; 298 299 /** The pointer to the Barrett coefficient. Memory for it should be 300 allocated by user with size moduloLength + 1. */ 301 uint8_t *barretCoefPtr; 302 303 /** The pointer to the binary inverse of the modulo. Memory for it 304 should be allocated by user with size moduloLength. */ 305 uint8_t *inverseModuloPtr; 306 307 /** The pointer to the (2^moduloLength mod modulo). Memory for it should 308 be allocated by user with size moduloLength */ 309 uint8_t *rBarPtr; 310 /** \endcond */ 311 } cy_stc_crypto_rsa_pub_key_t; 312 313 #endif /* #if (CPUSS_CRYPTO_VU == 1) */ 314 315 /** \} group_crypto_data_structures */ 316 317 /** 318 * \addtogroup group_crypto_cli_data_structures 319 * \{ 320 */ 321 322 /** Structure for storing a description of a Crypto hardware error */ 323 typedef struct 324 { 325 /** 326 Captures error description information for one of obtained hardware error: 327 - for <b>INSTR_OPC_ERROR</b>: - violating the instruction. 328 - for <b>INSTR_CC_ERROR</b> : - violating the instruction condition code. 329 - for <b>BUS_ERROR</b> : - violating the transfer address. */ 330 uint32_t errorStatus0; 331 332 /** 333 [31] - "1" - Indicates that hardware error has occured and 334 ERROR_STATUS0 and ERROR_STATUS1 captured valid error-information. 335 [26..24] - The error source: 336 - "0": <b>INSTR_OPC_ERROR</b> - an instruction decoder error. 337 - "1": <b>INSTR_CC_ERROR</b> - an instruction condition code-error. 338 - "2": <b>BUS_ERROR</b> - a bus master interface AHB-Lite bus-error. 339 - [5..4] - violating the transfer, the size attribute 340 - "0": an 8-bit transfer; 341 - "1": 16 bits transfer; 342 - "2": 32-bit transfer. 343 - [0] - violating the transfer, read the attribute 344 - "3": <b>TR_AP_DETECT_ERROR</b> - True Random Generator error. 345 */ 346 uint32_t errorStatus1; 347 } cy_stc_crypto_hw_error_t; 348 349 /** \} group_crypto_cli_data_structures */ 350 351 352 /** The Crypto library functionality level. */ 353 typedef enum 354 { 355 CY_CRYPTO_NO_LIBRARY = 0x00u, 356 CY_CRYPTO_BASE_LIBRARY = 0x01u, 357 CY_CRYPTO_EXTRA_LIBRARY = 0x02u, 358 CY_CRYPTO_FULL_LIBRARY = 0x03u, 359 } cy_en_crypto_lib_info_t; 360 361 362 /** 363 * \addtogroup group_crypto_enums 364 * \{ 365 */ 366 367 #if (CPUSS_CRYPTO_AES == 1) 368 /** The key length options for the AES method. */ 369 typedef enum 370 { 371 CY_CRYPTO_KEY_AES_128 = 0x00u, /**< The AES key size is 128 bits */ 372 CY_CRYPTO_KEY_AES_192 = 0x01u, /**< The AES key size is 192 bits */ 373 CY_CRYPTO_KEY_AES_256 = 0x02u /**< The AES key size is 256 bits */ 374 } cy_en_crypto_aes_key_length_t; 375 #endif /* #if (CPUSS_CRYPTO_AES == 1) */ 376 377 /** Defines the direction of the Crypto methods */ 378 typedef enum 379 { 380 /** The forward mode, plain text will be encrypted into cipher text */ 381 CY_CRYPTO_ENCRYPT = 0x00u, 382 /** The reverse mode, cipher text will be decrypted into plain text */ 383 CY_CRYPTO_DECRYPT = 0x01u 384 } cy_en_crypto_dir_mode_t; 385 386 #if (CPUSS_CRYPTO_SHA == 1) 387 /** Defines modes of SHA method */ 388 typedef enum 389 { 390 #if (CPUSS_CRYPTO_SHA1 == 1) 391 CY_CRYPTO_MODE_SHA1 = 0x00u, /**< Sets the SHA1 mode */ 392 #endif /* #if (CPUSS_CRYPTO_SHA1 == 1) */ 393 394 #if (CPUSS_CRYPTO_SHA256 == 1) 395 CY_CRYPTO_MODE_SHA224 = 0x01u, /**< Sets the SHA224 mode */ 396 CY_CRYPTO_MODE_SHA256 = 0x02u, /**< Sets the SHA256 mode */ 397 #endif /* #if (CPUSS_CRYPTO_SHA256 == 1) */ 398 399 #if (CPUSS_CRYPTO_SHA512 == 1) 400 CY_CRYPTO_MODE_SHA384 = 0x03u, /**< Sets the SHA384 mode */ 401 CY_CRYPTO_MODE_SHA512 = 0x04u, /**< Sets the SHA512 mode */ 402 CY_CRYPTO_MODE_SHA512_256 = 0x05u, /**< Sets the SHA512/256 mode */ 403 CY_CRYPTO_MODE_SHA512_224 = 0x06u, /**< Sets the SHA512/224 mode */ 404 #endif /* #if (CPUSS_CRYPTO_SHA512 == 1) */ 405 406 } cy_en_crypto_sha_mode_t; 407 #endif /* #if (CPUSS_CRYPTO_SHA == 1) */ 408 409 /** Signature verification status */ 410 typedef enum 411 { 412 CY_CRYPTO_RSA_VERIFY_SUCCESS = 0x00u, /**< PKCS1-v1.5 verify SUCCESS */ 413 CY_CRYPTO_RSA_VERIFY_FAIL = 0x01u /**< PKCS1-v1.5 verify FAILED */ 414 } cy_en_crypto_rsa_ver_result_t; 415 416 /** Errors of the Crypto block */ 417 typedef enum 418 { 419 /** Operation completed successfully. */ 420 CY_CRYPTO_SUCCESS = 0x00u, 421 422 /** A hardware error occurred, detailed information is in stc_crypto_hw_error_t. */ 423 CY_CRYPTO_HW_ERROR = CY_CRYPTO_ID | CY_PDL_STATUS_ERROR | 0x01u, 424 425 /** The size of input data is not multiple of 16. */ 426 CY_CRYPTO_SIZE_NOT_X16 = CY_CRYPTO_ID | CY_PDL_STATUS_ERROR | 0x02u, 427 428 /** The key for the DES method is weak. */ 429 CY_CRYPTO_DES_WEAK_KEY = CY_CRYPTO_ID | CY_PDL_STATUS_WARNING | 0x03u, 430 431 /** Communication between the client and server via IPC is broken. */ 432 CY_CRYPTO_COMM_FAIL = CY_CRYPTO_ID | CY_PDL_STATUS_ERROR | 0x04u, 433 434 /** The Crypto server is not started. */ 435 CY_CRYPTO_SERVER_NOT_STARTED = CY_CRYPTO_ID | CY_PDL_STATUS_ERROR | 0x06u, 436 437 /** The Crypto server in process state. */ 438 CY_CRYPTO_SERVER_BUSY = CY_CRYPTO_ID | CY_PDL_STATUS_INFO | 0x07u, 439 440 /** The Crypto driver is not initialized. */ 441 CY_CRYPTO_NOT_INITIALIZED = CY_CRYPTO_ID | CY_PDL_STATUS_ERROR | 0x08u, 442 443 /** The Crypto hardware is not enabled. */ 444 CY_CRYPTO_HW_NOT_ENABLED = CY_CRYPTO_ID | CY_PDL_STATUS_ERROR | 0x09u, 445 446 /** The Crypto operation is not supported. */ 447 CY_CRYPTO_NOT_SUPPORTED = CY_CRYPTO_ID | CY_PDL_STATUS_ERROR | 0x0Au, 448 449 /** The Crypto operation parameters are incorrect. */ 450 CY_CRYPTO_BAD_PARAMS = CY_CRYPTO_ID | CY_PDL_STATUS_ERROR | 0x0Bu 451 452 } cy_en_crypto_status_t; 453 454 /** \} group_crypto_enums */ 455 456 /** 457 * \addtogroup group_crypto_lld_asymmetric_enums 458 * \{ 459 */ 460 461 /** List of supported elliptic curve IDs */ 462 typedef enum { 463 CY_CRYPTO_ECC_ECP_NONE = 0, 464 CY_CRYPTO_ECC_ECP_SECP192R1, 465 CY_CRYPTO_ECC_ECP_SECP224R1, 466 CY_CRYPTO_ECC_ECP_SECP256R1, 467 CY_CRYPTO_ECC_ECP_SECP384R1, 468 CY_CRYPTO_ECC_ECP_SECP521R1, 469 /* Count of supported curves */ 470 CY_CRYPTO_ECC_ECP_CURVES_CNT 471 } cy_en_crypto_ecc_curve_id_t; 472 473 /** \} group_crypto_lld_asymmetric_enums */ 474 475 /** \cond INTERNAL */ 476 477 /** Instruction to communicate between Client and Server */ 478 typedef enum 479 { 480 CY_CRYPTO_INSTR_UNKNOWN = 0x00u, 481 CY_CRYPTO_INSTR_ENABLE = 0x01u, 482 CY_CRYPTO_INSTR_DISABLE = 0x02u, 483 484 #if (CPUSS_CRYPTO_PR == 1) 485 CY_CRYPTO_INSTR_PRNG_INIT = 0x03u, 486 CY_CRYPTO_INSTR_PRNG = 0x04u, 487 #endif /* #if (CPUSS_CRYPTO_PR == 1) */ 488 489 #if (CPUSS_CRYPTO_TR == 1) 490 CY_CRYPTO_INSTR_TRNG_INIT = 0x05u, 491 CY_CRYPTO_INSTR_TRNG = 0x06u, 492 #endif /* #if (CPUSS_CRYPTO_PR == 1) */ 493 494 #if (CPUSS_CRYPTO_AES == 1) 495 CY_CRYPTO_INSTR_AES_INIT = 0x07u, 496 CY_CRYPTO_INSTR_AES_ECB = 0x08u, 497 CY_CRYPTO_INSTR_AES_CBC = 0x09u, 498 CY_CRYPTO_INSTR_AES_CFB = 0x0Au, 499 CY_CRYPTO_INSTR_AES_CTR = 0x0Bu, 500 CY_CRYPTO_INSTR_CMAC = 0x0Cu, 501 #endif /* #if (CPUSS_CRYPTO_AES == 1) */ 502 503 #if (CPUSS_CRYPTO_SHA == 1) 504 CY_CRYPTO_INSTR_SHA = 0x0Du, 505 #endif /* #if (CPUSS_CRYPTO_SHA == 1) */ 506 507 #if (CPUSS_CRYPTO_SHA == 1) 508 CY_CRYPTO_INSTR_HMAC = 0x0Eu, 509 #endif /* #if (CPUSS_CRYPTO_SHA == 1) */ 510 511 #if (CPUSS_CRYPTO_STR == 1) 512 CY_CRYPTO_INSTR_MEM_CPY = 0x0Fu, 513 CY_CRYPTO_INSTR_MEM_SET = 0x10u, 514 CY_CRYPTO_INSTR_MEM_CMP = 0x11u, 515 CY_CRYPTO_INSTR_MEM_XOR = 0x12u, 516 #endif /* #if (CPUSS_CRYPTO_STR == 1) */ 517 518 #if (CPUSS_CRYPTO_CRC == 1) 519 CY_CRYPTO_INSTR_CRC_INIT = 0x13u, 520 CY_CRYPTO_INSTR_CRC = 0x14u, 521 #endif /* #if (CPUSS_CRYPTO_CRC == 1) */ 522 523 #if (CPUSS_CRYPTO_DES == 1) 524 CY_CRYPTO_INSTR_DES = 0x15u, 525 CY_CRYPTO_INSTR_3DES = 0x16u, 526 #endif /* #if (CPUSS_CRYPTO_DES == 1) */ 527 528 #if (CPUSS_CRYPTO_VU == 1) 529 CY_CRYPTO_INSTR_RSA_PROC = 0x17u, 530 CY_CRYPTO_INSTR_RSA_COEF = 0x18u, 531 #endif /* #if (CPUSS_CRYPTO_VU == 1) */ 532 533 #if (CPUSS_CRYPTO_SHA == 1) 534 CY_CRYPTO_INSTR_RSA_VER = 0x19u, 535 #endif /* #if (CPUSS_CRYPTO_SHA == 1) */ 536 537 CY_CRYPTO_INSTR_SRV_INFO = 0x55u, 538 539 #if (CPUSS_CRYPTO_VU == 1) 540 CY_CRYPTO_INSTR_MEMBUF_SET = 0x56u, 541 CY_CRYPTO_INSTR_MEMBUF_ADDR = 0x57u, 542 CY_CRYPTO_INSTR_MEMBUF_SIZE = 0x58u, 543 544 CY_CRYPTO_INSTR_ECC_GET_DP = 0x59u, 545 CY_CRYPTO_INSTR_ECC_ECP_MUL = 0x5Au, 546 CY_CRYPTO_INSTR_ECP_GEN_PRIK = 0x5Bu, 547 CY_CRYPTO_INSTR_ECP_GEN_PUBK = 0x5Cu, 548 549 CY_CRYPTO_INSTR_ECDSA_SIGN = 0x5Du, 550 CY_CRYPTO_INSTR_ECDSA_VER = 0x5Eu 551 #endif /* #if (CPUSS_CRYPTO_VU == 1) */ 552 553 } cy_en_crypto_comm_instr_t; 554 555 /** \endcond */ 556 557 /** 558 * \addtogroup group_crypto_data_structures 559 * \{ 560 */ 561 562 #if (CPUSS_CRYPTO_AES == 1) 563 564 /** The structure for storing the AES state. 565 * All fields for this structure are internal. Firmware never reads or 566 * writes these values. Firmware allocates the structure and provides the 567 * address of the structure to the driver in the function calls. Firmware must 568 * ensure that the defined instance of this structure remains in scope 569 * while the drive is in use. 570 */ 571 572 /* The structure to define used memory buffers */ 573 typedef struct 574 { 575 /** \cond INTERNAL */ 576 uint32_t key[CY_CRYPTO_AES_MAX_KEY_SIZE_U32]; 577 uint32_t keyInv[CY_CRYPTO_AES_MAX_KEY_SIZE_U32]; 578 uint32_t block0[CY_CRYPTO_AES_BLOCK_SIZE_U32]; 579 uint32_t block1[CY_CRYPTO_AES_BLOCK_SIZE_U32]; 580 uint32_t block2[CY_CRYPTO_AES_BLOCK_SIZE_U32]; 581 /** \endcond */ 582 } cy_stc_crypto_aes_buffers_t; 583 584 typedef struct 585 { 586 /** \cond INTERNAL */ 587 /** AES key length */ 588 cy_en_crypto_aes_key_length_t keyLength; 589 /** Pointer to AES work buffers */ 590 cy_stc_crypto_aes_buffers_t *buffers; 591 /** AES processed block index (for CMAC, SHA operations) */ 592 uint32_t blockIdx; 593 /** \endcond */ 594 } cy_stc_crypto_aes_state_t; 595 #endif /* #if (CPUSS_CRYPTO_AES == 1) */ 596 597 #if (CPUSS_CRYPTO_SHA == 1) 598 599 /** The structure for storing the SHA state. 600 * All fields for the context structure are internal. Firmware never reads or 601 * writes these values. Firmware allocates the structure and provides the 602 * address of the structure to the driver in the function calls. Firmware must 603 * ensure that the defined instance of this structure remains in scope 604 * while the drive is in use. 605 */ 606 typedef struct 607 { 608 /** \cond INTERNAL */ 609 uint32_t mode; 610 uint32_t modeHw; 611 uint8_t *block; 612 uint32_t blockSize; 613 uint8_t *hash; 614 uint32_t hashSize; 615 uint8_t *roundMem; 616 uint32_t roundMemSize; 617 uint32_t messageSize; 618 uint32_t digestSize; 619 uint32_t blockIdx; 620 uint8_t const *initialHash; 621 /** \endcond */ 622 } cy_stc_crypto_sha_state_t; 623 624 #endif /* (CPUSS_CRYPTO_SHA == 1) */ 625 626 /** A point on a ECC curve */ 627 typedef struct { 628 /** The x co-ordinate */ 629 void *x; 630 /** The y co-ordinate */ 631 void *y; 632 } cy_stc_crypto_ecc_point; 633 634 /** An ECC key type */ 635 typedef enum cy_en_crypto_ecc_key_type { 636 PK_PUBLIC = 0u, 637 PK_PRIVATE = 1u 638 } cy_en_crypto_ecc_key_type_t; 639 640 /** An ECC key */ 641 typedef struct { 642 /** Type of key, PK_PRIVATE or PK_PUBLIC */ 643 cy_en_crypto_ecc_key_type_t type; 644 /** See \ref cy_en_crypto_ecc_curve_id_t */ 645 cy_en_crypto_ecc_curve_id_t curveID; 646 /** The public key */ 647 cy_stc_crypto_ecc_point pubkey; 648 /** The private key */ 649 void *k; 650 } cy_stc_crypto_ecc_key; 651 652 /** \} group_crypto_data_structures */ 653 654 /************************************************************* 655 * Structures used for communication between Client and Server 656 ***************************************************************/ 657 658 /** 659 * \addtogroup group_crypto_srv_data_structures 660 * \{ 661 */ 662 663 /** The structure for storing the crypto server context. 664 * All fields for the context structure are internal. Firmware never reads or 665 * writes these values. Firmware allocates the structure and provides the 666 * address of the structure to the driver in the function calls. Firmware must 667 * ensure that the defined instance of this structure remains in scope 668 * while the drive is in use. 669 */ 670 typedef struct 671 { 672 /** \cond INTERNAL */ 673 /** IPC communication channel number */ 674 uint32_t ipcChannel; 675 /** IPC acquire interrupt channel number */ 676 uint32_t acquireNotifierChannel; 677 /** IPC release interrupt channel number */ 678 cy_israddress getDataHandlerPtr; 679 /** Crypto hardware errors interrupt handler */ 680 cy_israddress errorHandlerPtr; 681 /** Acquire notifier interrupt configuration */ 682 cy_stc_sysint_t acquireNotifierConfig; 683 /** Crypto hardware errors interrupt configuration */ 684 cy_stc_sysint_t cryptoErrorIntrConfig; 685 /** Hardware error occurrence flag */ 686 bool isHwErrorOccured; 687 /** Hardware processing errors */ 688 cy_stc_crypto_hw_error_t hwErrorStatus; 689 /** \endcond */ 690 } cy_stc_crypto_server_context_t; 691 692 /** \} group_crypto_srv_data_structures */ 693 694 /** 695 * \addtogroup group_crypto_cli_data_structures 696 * \{ 697 */ 698 699 /** The structure for storing the crypto client context. 700 * All fields for the context structure are internal. Firmware never reads or 701 * writes these values. Firmware allocates the structure and provides the 702 * address of the structure to the driver in the function calls. Firmware must 703 * ensure that the defined instance of this structure remains in scope 704 * while the drive is in use. 705 */ 706 typedef struct 707 { 708 /** \cond INTERNAL */ 709 /** Operation instruction code */ 710 cy_en_crypto_comm_instr_t instr; 711 /** Response from executed crypto function */ 712 cy_en_crypto_status_t resp; 713 /** Hardware processing errors */ 714 cy_stc_crypto_hw_error_t hwErrorStatus; 715 /** IPC communication channel number */ 716 uint32_t ipcChannel; 717 /** IPC acquire interrupt channel number */ 718 uint32_t acquireNotifierChannel; 719 /** IPC release interrupt channel number */ 720 uint32_t releaseNotifierChannel; 721 /** User callback for Crypto HW calculation complete event */ 722 cy_crypto_callback_ptr_t userCompleteCallback; 723 /** Release notifier interrupt configuration */ 724 cy_stc_sysint_t releaseNotifierConfig; 725 /** Pointer to the crypto function specific context data */ 726 void *xdata; 727 /** \endcond */ 728 } cy_stc_crypto_context_t; 729 730 731 #if (CPUSS_CRYPTO_DES == 1) 732 /** The structure for storing the DES context. 733 * All fields for the context structure are internal. Firmware never reads or 734 * writes these values. Firmware allocates the structure and provides the 735 * address of the structure to the driver in the function calls. Firmware must 736 * ensure that the defined instance of this structure remains in scope 737 * while the drive is in use. 738 */ 739 typedef struct 740 { 741 /** \cond INTERNAL */ 742 /** Operation direction (Encrypt / Decrypt) */ 743 cy_en_crypto_dir_mode_t dirMode; 744 /** Pointer to key data */ 745 uint32_t *key; 746 /** Pointer to data destination block */ 747 uint32_t *dst; 748 /** Pointer to data source block */ 749 uint32_t *src; 750 /** \endcond */ 751 } cy_stc_crypto_context_des_t; 752 #endif /* #if (CPUSS_CRYPTO_DES == 1) */ 753 754 #if (CPUSS_CRYPTO_AES == 1) 755 /** The structure for storing the AES context. 756 * All fields for the context structure are internal. Firmware never reads or 757 * writes these values. Firmware allocates the structure and provides the 758 * address of the structure to the driver in the function calls. Firmware must 759 * ensure that the defined instance of this structure remains in scope 760 * while the drive is in use. 761 */ 762 typedef struct 763 { 764 /** \cond INTERNAL */ 765 /** AES state data */ 766 cy_stc_crypto_aes_state_t aesState; 767 /** Operation direction (Encrypt / Decrypt) */ 768 cy_en_crypto_dir_mode_t dirMode; 769 /** AES key length */ 770 cy_en_crypto_aes_key_length_t keyLength; 771 /** Pointer to AES key */ 772 uint32_t *key; 773 /** Operation data size */ 774 uint32_t srcSize; 775 /** Size of the last non-complete block (for CTR mode only) */ 776 uint32_t *srcOffset; 777 /** Initialization vector, in the CTR mode is used as nonceCounter */ 778 uint32_t *ivPtr; 779 /** AES processed block pointer (for CTR mode only) */ 780 uint32_t *streamBlock; 781 /** Pointer to data destination block */ 782 uint32_t *dst; 783 /** Pointer to data source block */ 784 uint32_t *src; 785 /** \endcond */ 786 } cy_stc_crypto_context_aes_t; 787 #endif /* #if (CPUSS_CRYPTO_AES == 1) */ 788 789 #if (CPUSS_CRYPTO_SHA == 1) 790 791 /** The structure for storing the SHA context. 792 * All fields for the context structure are internal. Firmware never reads or 793 * writes these values. Firmware allocates the structure and provides the 794 * address of the structure to the driver in the function calls. Firmware must 795 * ensure that the defined instance of this structure remains in scope 796 * while the drive is in use. 797 */ 798 typedef struct 799 { 800 /** \cond INTERNAL */ 801 /** Pointer to data source block */ 802 uint32_t *message; 803 /** Operation data size */ 804 uint32_t messageSize; 805 /** Pointer to data destination block */ 806 uint32_t *dst; 807 /** SHA mode */ 808 cy_en_crypto_sha_mode_t mode; 809 /** Pointer to key data (for HMAC only) */ 810 uint32_t *key; 811 /** Key data length (for HMAC only) */ 812 uint32_t keyLength; 813 /** \endcond */ 814 } cy_stc_crypto_context_sha_t; 815 #endif /* #if (CPUSS_CRYPTO_SHA == 1) */ 816 817 #if (CPUSS_CRYPTO_PR == 1) 818 /** The structure for storing the PRNG context. 819 * All fields for the context structure are internal. Firmware never reads or 820 * writes these values. Firmware allocates the structure and provides the 821 * address of the structure to the driver in the function calls. Firmware must 822 * ensure that the defined instance of this structure remains in scope 823 * while the drive is in use. 824 */ 825 typedef struct 826 { 827 /** \cond INTERNAL */ 828 uint32_t lfsr32InitState; /**< lfsr32 initialization data */ 829 uint32_t lfsr31InitState; /**< lfsr31 initialization data */ 830 uint32_t lfsr29InitState; /**< lfsr29 initialization data */ 831 uint32_t max; /**< Maximum of the generated value */ 832 uint32_t *prngNum; /**< Pointer to generated value */ 833 /** \endcond */ 834 } cy_stc_crypto_context_prng_t; 835 #endif /* #if (CPUSS_CRYPTO_PR == 1) */ 836 837 #if (CPUSS_CRYPTO_TR == 1) 838 /** The structure for storing the TRNG context. 839 * All fields for the context structure are internal. Firmware never reads or 840 * writes these values. Firmware allocates the structure and provides the 841 * address of the structure to the driver in the function calls. Firmware must 842 * ensure that the defined instance of this structure remains in scope 843 * while the drive is in use. 844 */ 845 typedef struct 846 { 847 /** \cond INTERNAL */ 848 /** 849 The polynomial for the programmable Galois ring oscillator (TR_GARO_CTL). 850 The polynomial is represented WITHOUT the high order bit (this bit is 851 always assumed '1'). 852 The polynomial should be aligned so that more significant bits 853 (bit 30 and down) contain the polynomial and less significant bits 854 (bit 0 and up) contain padding '0's. */ 855 uint32_t GAROPol; 856 857 /** 858 The polynomial for the programmable Fibonacci ring oscillator(TR_FIRO_CTL). 859 The polynomial is represented WITHOUT the high order bit (this bit is 860 always assumed '1'). 861 The polynomial should be aligned so that more significant bits 862 (bit 30 and down) contain the polynomial and less significant bits 863 (bit 0 and up) contain padding '0's. */ 864 uint32_t FIROPol; 865 /** Maximum of the generated value */ 866 uint32_t max; 867 /** Pointer to generated value */ 868 uint32_t *trngNum; 869 /** \endcond */ 870 } cy_stc_crypto_context_trng_t; 871 #endif /* #if (CPUSS_CRYPTO_TR == 1) */ 872 873 #if (CPUSS_CRYPTO_STR == 1) 874 /** The structure for storing the string context. 875 * All fields for the context structure are internal. Firmware never reads or 876 * writes these values. Firmware allocates the structure and provides the 877 * address of the structure to the driver in the function calls. Firmware must 878 * ensure that the defined instance of this structure remains in scope 879 * while the drive is in use. 880 */ 881 typedef struct 882 { 883 /** \cond INTERNAL */ 884 void const *src0; /**< Pointer to 1-st string source */ 885 void const *src1; /**< Pointer to 2-nd string source */ 886 void *dst; /**< Pointer to string destination */ 887 uint32_t dataSize; /**< Operation data size */ 888 uint32_t data; /**< Operation data value (for memory setting) */ 889 /** \endcond */ 890 } cy_stc_crypto_context_str_t; 891 #endif /* #if (CPUSS_CRYPTO_STR == 1) */ 892 893 #if (CPUSS_CRYPTO_CRC == 1) 894 /** The structure for storing the CRC context. 895 * All fields for the context structure are internal. Firmware never reads or 896 * writes these values. Firmware allocates the structure and provides the 897 * address of the structure to the driver in the function calls. Firmware must 898 * ensure that the defined instance of this structure remains in scope 899 * while the drive is in use. 900 */ 901 typedef struct 902 { 903 /** \cond INTERNAL */ 904 void* data; /**< Pointer to data source block */ 905 uint32_t dataSize; /**< Operation data size */ 906 uint32_t *crc; /**< Pointer to CRC destination variable */ 907 uint32_t polynomial; /**< Polynomial for CRC calculate */ 908 uint32_t lfsrInitState; /**< CRC calculation initial value */ 909 uint32_t dataReverse; /**< Input data reverse flag */ 910 uint32_t dataXor; /**< Input data XOR flag */ 911 uint32_t remReverse; /**< Output data reverse flag */ 912 uint32_t remXor; /**< Output data XOR flag */ 913 /** \endcond */ 914 } cy_stc_crypto_context_crc_t; 915 #endif /* #if (CPUSS_CRYPTO_CRC == 1) */ 916 917 #if (CPUSS_CRYPTO_VU == 1) 918 919 #if (CPUSS_CRYPTO_SHA == 1) 920 /** The structure for storing the RSA verification context. 921 * All fields for the context structure are internal. Firmware never reads or 922 * writes these values. Firmware allocates the structure and provides the 923 * address of the structure to the driver in the function calls. Firmware must 924 * ensure that the defined instance of this structure remains in scope 925 * while the drive is in use. 926 */ 927 typedef struct 928 { 929 /** \cond INTERNAL */ 930 /** Pointer to verification result /ref cy_en_crypto_rsa_ver_result_t */ 931 cy_en_crypto_rsa_ver_result_t *verResult; 932 /** SHA digest type, used with SHA calculation of the message */ 933 cy_en_crypto_sha_mode_t digestType; 934 /** SHA digest of the message, calculated with digestType */ 935 uint32_t const *hash; 936 /** Previously decrypted RSA signature */ 937 uint32_t const *decryptedSignature; 938 /** Length of the decrypted RSA signature */ 939 uint32_t decryptedSignatureLength; 940 /** \endcond */ 941 } cy_stc_crypto_context_rsa_ver_t; 942 #endif /* #if (CPUSS_CRYPTO_SHA == 1) */ 943 944 /** The structure for storing the RSA context. 945 * All fields for the context structure are internal. Firmware never reads or 946 * writes these values. Firmware allocates the structure and provides the 947 * address of the structure to the driver in function calls. Firmware must 948 * ensure that the defined instance of this structure remains in scope 949 * while the drive is in use. 950 */ 951 typedef struct 952 { 953 /** \cond INTERNAL */ 954 /** Pointer to key data */ 955 cy_stc_crypto_rsa_pub_key_t const *key; 956 /** Pointer to data source block */ 957 uint32_t const *message; 958 /** Operation data size */ 959 uint32_t messageSize; 960 /** Pointer to data destination block */ 961 uint32_t *result; 962 /** \endcond */ 963 } cy_stc_crypto_context_rsa_t; 964 965 /** The structure for storing the ECC operations context. 966 * All fields for the context structure are internal. Firmware never reads or 967 * writes these values. Firmware allocates the structure and provides the 968 * address of the structure to the driver in function calls. Firmware must 969 * ensure that the defined instance of this structure remains in scope 970 * while the drive is in use. 971 */ 972 typedef struct 973 { 974 /** \cond INTERNAL */ 975 /** Elliptic curve ID */ 976 cy_en_crypto_ecc_curve_id_t curveID; 977 /** Pointer to key data */ 978 const cy_stc_crypto_ecc_key *key; 979 /** Operation data length */ 980 uint32_t datalen; 981 /** Pointer to the first source data block */ 982 const uint8_t *src0; 983 /** Pointer to the second source data block */ 984 const uint8_t *src1; 985 /** Pointer to the third source data block */ 986 const uint8_t *src2; 987 /** Pointer to the first destination data block */ 988 uint8_t *dst0; 989 /** Pointer to the second destination data block */ 990 uint8_t *dst1; 991 /** \endcond */ 992 } cy_stc_crypto_context_ecc_t; 993 #endif /* #if (CPUSS_CRYPTO_VU == 1) */ 994 995 /** \} group_crypto_cli_data_structures */ 996 997 #if defined(__cplusplus) 998 } 999 #endif 1000 1001 #endif /* CY_IP_MXCRYPTO */ 1002 1003 #endif /* #if !defined (CY_CRYPTO_COMMON_H) */ 1004 1005 1006 /* [] END OF FILE */ 1007
