1 /***************************************************************************//** 2 * \file cy_syspm.h 3 * \version 5.150 4 * 5 * Provides the function definitions for the power management API. 6 * 7 ******************************************************************************** 8 * \copyright 9 * Copyright (c) (2016-2023), Cypress Semiconductor Corporation (an Infineon company) or 10 * an affiliate of Cypress Semiconductor Corporation. 11 * SPDX-License-Identifier: Apache-2.0 12 * 13 * Licensed under the Apache License, Version 2.0 (the "License"); 14 * you may not use this file except in compliance with the License. 15 * You may obtain a copy of the License at 16 * 17 * http://www.apache.org/licenses/LICENSE-2.0 18 * 19 * Unless required by applicable law or agreed to in writing, software 20 * distributed under the License is distributed on an "AS IS" BASIS, 21 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 * See the License for the specific language governing permissions and 23 * limitations under the License. 24 * 25 *******************************************************************************/ 26 27 /** 28 * \addtogroup group_syspm 29 * \{ 30 * \defgroup group_syspm_pdcm PDCM (Power Dependency Control Matrix) 31 * \defgroup group_syspm_ppu PPU (Power Policy Unit) 32 * \defgroup group_syspm_btss BTSS Host API(Bluetooth Sub System Host API) 33 * \} */ 34 35 /** 36 * \addtogroup group_syspm 37 * \{ 38 * 39 * Use the System Power Management (SysPm) driver to change power modes and 40 * reduce system power consumption in power sensitive designs. 41 * 42 * The functions and other declarations used in this driver are in cy_syspm.h. 43 * You can include cy_pdl.h to get access to all functions 44 * and declarations in the PDL. 45 * 46 * For multi-CPU devices, this library allows you to individually enter low power 47 * modes for each CPU. 48 * 49 * This document contains the following topics: 50 * 51 * * \ref group_syspm_power_modes 52 * * \ref group_syspm_system_power_modes 53 * - \ref group_syspm_switching_into_ulp 54 * - \ref group_syspm_ulp_limitations 55 * - \ref group_syspm_switching_into_lp 56 * - \ref group_syspm_lp_limitations 57 * - \ref group_syspm_switching_into_sleep 58 * - \ref group_syspm_switching_into_lpactivelpsleep 59 * - \ref group_syspm_switching_into_deepsleep 60 * - \ref group_syspm_switching_into_deepsleep-ram 61 * - \ref group_syspm_switching_into_deepsleep-off 62 * - \ref group_syspm_wakingup_from_sleep_deepsleep 63 * - \ref group_syspm_switching_into_hibernate 64 * - \ref group_syspm_wakingup_from_hibernate 65 * * \ref group_syspm_system_reg_curr_mode 66 * - \ref group_syspm_system_set_min_reg_curr_mode 67 * - \ref group_syspm_system_set_normal_reg_curr_mode 68 * * \ref group_syspm_migration_guide_for_syspm_4_0 69 * * \ref group_syspm_managing_pmic 70 * * \ref group_syspm_managing_backup_domain 71 * * \ref group_syspm_cb 72 * - \ref group_syspm_cb_example 73 * - \ref group_syspm_cb_config_consideration 74 * - \ref group_syspm_cb_parameters 75 * - \ref group_syspm_cb_structures 76 * - \ref group_syspm_cb_function_implementation 77 * - \ref group_syspm_cb_flow 78 * - \ref group_syspm_cb_registering 79 * - \ref group_syspm_cb_unregistering 80 * * \ref group_syspm_definitions 81 * 82 * \section group_syspm_section_configuration Configuration Considerations 83 * \subsection group_syspm_power_modes Power Modes 84 * 85 * <b>A) CAT1A Architecture</b>: 86 * 87 * 1) PSoC 6 MCUs support four system and three CPU power modes. 88 * These power modes are intended to minimize average power consumption 89 * in an application. 90 * 91 * System power modes: 92 * * <b>Low Power</b> - All peripheral and CPU power modes 93 * are available to be used at maximum device frequency and current 94 * consumption. 95 * * <b>Ultra Low Power</b> - All peripheral and 96 * CPU power modes are available, but the frequency and current consumption 97 * are limited to a device specific number. 98 * * <b>Deep Sleep</b> - Device and I/O states is retained. Low-frequency 99 * peripherals are available. Both CPUs are in CPU Deep Sleep power mode. 100 * * <b>Hibernate</b> - The device and I/O states are frozen and the device 101 * resets on wakeup. 102 * 103 * CPU power modes(standard ARM defined power modes, supported by 104 * the ARM CPUs and ISA): 105 * 106 * * <b>Active</b> 107 * * <b>Sleep</b> 108 * * <b>Deep Sleep</b> 109 * 110 * <b>B) CAT1B Architecture</b>: 111 * 112 * 1) CAT1B devices supports below Power Modes: 113 * 114 * * <b>ACTIVE, SLEEP </b> - standard ARM defined power modes, supported by 115 * the ARM CPUs and ISA. 116 * * <b>LPACTIVE/LPSLEEP</b> - are low power profiles implemented as register 117 * configurations within ACTIVE/SLEEP modes. 118 * * <b>DEEPSLEEP </b> - a lower power mode where high-frequency clocks are 119 * disabled. Most register state is retained and the platform supports saving 120 * a configurable amount of SRAM state. 121 * * <b>DEEPSLEEP-RAM </b> - a lower mode than DEEPSLEEP that keeps DeepSleep 122 * peripherals running, but on wakeup the CPU (and most peripherals) go 123 * through a reset. A configurable amount of system RAM is retained. 124 * * <b>DEEPSLEEP-OFF </b> - similar to DEEPSLEEP-RAM but does not retain 125 * system RAM. 126 * * <b>HIBERNATE </b> - is an even lower power mode than DEEPSLEEP-OFF, but 127 * on wakeup the CPU (and almost all peripherals) go through a full reset. 128 * DeepSleep peripherals do not operate in HIBERNATE. 129 * * <b>XRES </b> - occurs when an external reset is applied, either XRES or 130 * alternate XRES (AXRES). It is also considered a power mode with a current 131 * target spec. 132 * * <b>OFF </b> - state simply represents the state of the part with no power 133 * applied to it. 134 * 135 * CAT1B adopts the <b>ARM Power Control Architecture</b>.Below are 136 * key changes in the power system: 137 * 138 * * CAT1B supports three flavors of DEEPSLEEP: the original one, and two new 139 * ones called DEEPSLEEP-RAM and DEEPSLEEP-OFF. 140 * * SRSS implements an ARM Power Policy Unit (PPU) that provides the software 141 * interface to power mode control for VCCACT_PD.The PPU interacts with a 142 * Power Control State Machine (PSCM) that interfaces with the core SRSS 143 * to enter/exit DEEPSLEEP*. 144 * * SRSS implements a Power Dependency Control Matrix (PDCM) that allows hardware 145 * and software to specify dependencies between power domains. 146 * 147 * <b>C) CAT1C Architecture</b>: 148 * 149 * 1) CAT1C MCU's can operate in different power modes that are intended to minimize 150 * the average power consumption in an application. The power modes supported by 151 * CATC devices in the order of decreasing power consumption are: 152 * * <b>ACTIVE </b> - all peripherals are available 153 * * <b>Low-Power Active (LPACTIVE) profile </b>- Low-power profile of Active mode where 154 * all peripherals including the CPU are available, but with limited capability 155 * * <b>SLEEP </b> - all peripherals except the CPU are available 156 * * <b>Low-Power Sleep (LPSLEEP) profile </b>- Low-power profile of Sleep mode where 157 * all peripherals except the CPU are available, but with limited capability 158 * * <b>DEEPSLEEP </b>- only low-frequency peripherals are available 159 * * <b>HIBERNATE </b>- the device and I/O states are frozen and the device resets on wakeup 160 * * <b>XRES </b>- the device enters this state when the XRES_L pin is asserted 161 * 162 * Active, Sleep, and DeepSleep are standard Arm-defined power modes supported by 163 * the Arm CPUs and Instruction Set Architecture (ISA). 164 * LPACTIVE and LPSLEEP are similar to Active and Sleep modes, respectively; however, 165 * the high-current components are either frequency or current limited or turned off. 166 * Hibernate mode and XRES state are the lowest power mode/state that the CATC devices 167 * can be in. 168 * 169 * \subsection group_syspm_system_power_modes System Power Modes 170 * * <b>LP</b> - In this mode, code is executed and all logic and 171 * memories are powered. Firmware may disable/reduce clocks for specific 172 * peripherals and power down specific analog power domains. 173 * 174 * * <b>ULP</b> - This power mode is like LP mode, but 175 * with clock restrictions and limited/slower peripherals to achieve lower 176 * current consumption. Refer to \ref group_syspm_switching_into_ulp in 177 * Configuration considerations. 178 * 179 * * <b>LPACTIVE/LPSLEEP</b> - low power profiles implemented as register 180 * configurations within ACTIVE/SLEEP modes.Refer to 181 * \ref group_syspm_switching_into_lpactivelpsleep in Configuration considerations. 182 * 183 * * <b>DEEPSLEEP</b> - Is a lower power mode where high-frequency clocks are 184 * disabled. Refer to \ref group_syspm_switching_into_deepsleep in 185 * Configuration considerations. Deep-sleep-capable peripherals are available. 186 * A normal wakeup from Deep Sleep returns to either system LP or ULP mode, 187 * depending on the previous state and programmed behavior for the configured 188 * wakeup interrupt. Likewise, a debug wakes up from system Deep Sleep and 189 * woken CPU returns to CPU Sleep. Refer 190 * to \ref group_syspm_wakingup_from_sleep_deepsleep in Configuration 191 * considerations. 192 * 193 * * <b>DEEPSLEEP-RAM</b> - a lower mode than DEEPSLEEP that keeps DeepSleep 194 * peripherals running, but on wakeup the CPU (and most peripherals) go through 195 * a reset. A configurable amount of system RAM is retained.Refer to 196 * \ref group_syspm_switching_into_deepsleep-ram in Configuration considerations. 197 * Refer to \ref group_syspm_wakingup_from_sleep_deepsleep in Configuration 198 * considerations. 199 * 200 * * <b>DEEPSLEEP-OFF</b> - similar to DEEPSLEEP-RAM but does not retain system RAM. 201 * Refer to \ref group_syspm_switching_into_deepsleep-off in Configuration considerations. 202 * Refer to \ref group_syspm_wakingup_from_sleep_deepsleep in Configuration 203 * considerations. 204 * 205 * * <b>Hibernate</b> - Is the lowest power mode that is entered from 206 * firmware. Refer to \ref group_syspm_switching_into_hibernate in 207 * Configuration considerations. On wakeup the CPU(s) and all peripherals 208 * go through a full reset. The I/O's state is frozen so that the 209 * output driver state is held in system Hibernate. Note that in this mode, 210 * the CPU(s) and all peripherals lose their states, so the system and firmware 211 * reboot on a wakeup event. Backup memory (if present) can be used to store 212 * limited system state for use on the next reboot. Refer to 213 * \ref group_syspm_wakingup_from_hibernate in Configuration considerations. 214 * 215 * \warning * Above is list of all the System Power modes in general, a device 216 * support subset of the above System Power modes.Please refer to TRM for more information. 217 * 218 * \subsubsection group_syspm_switching_into_lp Switching the System into Low Power 219 * To set system LP mode you need to set LP voltage for the active core 220 * regulator: 221 * * If active core regulator is the LDO, call: 222 * \code{.c} 223 * Cy_SysPm_LdoSetVoltage(CY_SYSPM_LDO_VOLTAGE_LP); 224 * \endcode 225 * * If active core regulator is the Buck, call: 226 * \code{.c} 227 * Cy_SysPm_BuckSetVoltage1(CY_SYSPM_BUCK_OUT1_VOLTAGE_LP) 228 * \endcode 229 * 230 * After switching into system LP mode, the operating frequency and current 231 * consumption may now be increased up to \ref group_syspm_lp_limitations. 232 * The wait states for flash may be changed to increase device performance by 233 * calling SysLib function Cy_SysLib_SetWaitStates(true, hfClkFreqMz), where 234 * hfClkFreqMz is the frequency of HfClk0 in MHz. 235 * 236 * \subsubsection group_syspm_lp_limitations LP Limitations 237 * When the system is in LP mode, the core regulator voltage is set to 238 * <b>1.1 V (nominal)</b> and the following limitations must be met: 239 * 240 * - The maximum operating frequency for all Clk_HF paths must not exceed 241 * <b>150 MHz*</b>, and peripheral and slow clock must 242 * not exceed <b>100 MHz *</b> 243 * 244 * - The total current consumption must be less than or equal to 245 * <b>250 mA *</b> 246 * 247 * \warning * - Numbers shown are approximate and real limit values may be 248 * different because they are device specific. You should refer to the device 249 * datasheet for exact values of maximum frequency and current in system LP mode. 250 * 251 * \subsubsection group_syspm_switching_into_ulp Switching the System into Ultra Low Power 252 * Before switching into system ULP mode, ensure that the device meets 253 * \ref group_syspm_ulp_limitations. Decrease the clock frequencies, 254 * and slow or disable peripherals. Also ensure that appropriate wait state 255 * values are set for the flash. Flash wait states can be set by calling 256 * SysLib function Cy_SysLib_SetWaitStates(true, hfClkFreqMz), where hfClkFreqMz 257 * is the frequency of HfClk0 in MHz. 258 * 259 * After the \ref group_syspm_ulp_limitations are met and appropriate wait 260 * states are set, you must set ULP voltage for the active core regulator: 261 * * If active core regulator is the LDO Core Voltage Regulator, call 262 * Cy_SysPm_LdoSetVoltage(CY_SYSPM_LDO_VOLTAGE_ULP) 263 * * If active core regulator is the Buck Core Voltage Regulator, then call 264 * Cy_SysPm_BuckSetVoltage1(CY_SYSPM_BUCK_OUT1_VOLTAGE_ULP) 265 * 266 * \subsubsection group_syspm_ulp_limitations ULP Limitations 267 * When the system is in ULP mode the core regulator voltage is set to <b>0.9 V 268 * (nominal)</b> and the following limitations must be meet: 269 * 270 * - The maximum operating frequency for all Clk_HF paths must not exceed 271 * <b>50 MHz *</b>, whereas the peripheral and slow clock must not exceed 272 * <b>25 MHz *</b>. 273 * 274 * - The total current consumption must be less than or equal 275 * to <b>20 mA*</b> 276 * 277 * - the flash write operations are prohibited. The flash works in the 278 * Read-only operation. If Write operations are required, you must switch to 279 * the system LP mode. 280 * 281 * \warning * - Numbers shown are approximate and real limit values may be 282 * different because they are device specific. You should refer to the device 283 * datasheet for exact values of maximum frequency and current in system 284 * ULP mode. 285 * 286 * \subsubsection group_syspm_switching_into_lpactivelpsleep Switching the System into LPACTIVE/LPSLEEP 287 * Call Cy_SysPm_SystemLpActiveEnter() to enter LPACTIVE/LPSLEEP mode and 288 * Cy_SysPm_SystemLpActiveExit() to exit. 289 * 290 * \subsubsection group_syspm_switching_into_sleep Switching CPU into Sleep 291 * For multi-CPU devices, the Cy_SysPm_CpuEnterSleep() switches only the CPU 292 * that calls the function into the CPU Sleep power mode. 293 * 294 * All pending interrupts must be cleared before the CPU is put into a 295 * Sleep mode, even if they are masked. 296 * 297 * The CPU event register can be set in the past, for example, as a result of 298 * internal system calls. So an old event can cause the CPU to not enter 299 * Sleep mode upon WFE(). Therefore usually the WFE() is used in an idle loop or 300 * polling loop as it might or might not cause entering of CPU Sleep mode. If 301 * the idle loop or polling loop is not used, then it is recommended to use 302 * WFI() instruction. 303 * 304 * \subsubsection group_syspm_switching_into_deepsleep Switching the System or CPU into Deep Sleep 305 * For multi-CPU devices, the Cy_SysPm_CpuEnterDeepSleep() function switches 306 * only the CPU that calls the function into the CPU Deep Sleep power mode. 307 * To set the whole system into Deep Sleep power mode, ensure that all CPUs call 308 * the Cy_SysPm_CpuEnterDeepSleep() function. 309 * 310 * \warning * For CAT1B devices we need to call Cy_SysPm_SetDeepSleepMode() function with 311 * appropriate type of deepsleep as parameter before calling Cy_SysPm_CpuEnterDeepSleep() 312 * function. 313 * 314 * \subsubsection group_syspm_switching_into_deepsleep-ram Switching the System or CPU into Deep Sleep-RAM 315 * For multi-CPU devices, the Cy_SysPm_CpuEnterDeepSleep() function switches 316 * only the CPU that calls the function into the CPU DEEPSLEEP-RAM power mode. 317 * To set the whole system into Deep Sleep power mode, ensure that all CPUs call 318 * the Cy_SysPm_CpuEnterDeepSleep() function. 319 * 320 * \warning * For CAT1B devices we need to call Cy_SysPm_SetDeepSleepMode() function with 321 * appropriate type of deepsleep as parameter before calling Cy_SysPm_CpuEnterDeepSleep() 322 * function. 323 * 324 * \subsubsection group_syspm_switching_into_deepsleep-off Switching the System or CPU into Deep Sleep-OFF 325 * For multi-CPU devices, the Cy_SysPm_CpuEnterDeepSleep() function switches 326 * only the CPU that calls the function into the CPU DEEPSLEEP-OFF power mode. 327 * To set the whole system into Deep Sleep power mode, ensure that all CPUs call 328 * the Cy_SysPm_CpuEnterDeepSleep() function. 329 * 330 * Note:- For CAT1B devices we need to call Cy_SysPm_SetDeepSleepMode() function with 331 * appropriate type of deepsleep as parameter before calling Cy_SysPm_CpuEnterDeepSleep() 332 * function. 333 * 334 * There are situations when the system does not switch into the Deep Sleep 335 * power mode immediately after the last CPU calls Cy_SysPm_CpuEnterDeepSleep(). 336 * The system will switch into Deep Sleep mode automatically a short time later, 337 * after the low power circuits are ready to switch into Deep Sleep. Refer to 338 * the Cy_SysPm_CpuEnterDeepSleep() description for more detail. 339 * 340 * All pending interrupts must be cleared before the system is put into a 341 * Deep Sleep mode, even if they are masked. 342 * 343 * The CPU event register can be set in the past, for example, as a result of 344 * internal system calls. So an old event can cause the CPU to not enter Deep 345 * Sleep mode upon WFE(). Therefore usually the WFE() is used in an idle loop or 346 * polling loop as it might or might not cause entering of CPU Deep Sleep mode. 347 * If the idle loop or polling loop is not used, then it is recommended to use 348 * WFI() instruction. 349 * 350 * For single-CPU devices, SysPm functions that return the status of the 351 * unsupported CPU always return CY_SYSPM_STATUS_<CPU>_DEEPSLEEP. 352 * 353 * \subsubsection group_syspm_wakingup_from_sleep_deepsleep Waking Up from Sleep or Deep Sleep 354 * For Arm-based devices, an interrupt is required for the CPU to wake up. 355 * For multi-CPU devices, one CPU can wake up the other CPU by sending the 356 * event instruction. Use the Cy_SysPm_CpuSendWakeupEvent() function. 357 * 358 * \subsubsection group_syspm_switching_into_hibernate Switching System to Hibernate 359 * If you call Cy_SysPm_SystemEnterHibernate() from either CPU, the system will 360 * be switched into the Hibernate power mode directly, because there is no 361 * handshake between CPUs. 362 * 363 * \subsubsection group_syspm_wakingup_from_hibernate Waking Up from Hibernate 364 * 365 * The system can wake up from Hibernate mode by configuring the following wakeup 366 * sources: 367 * - Wakeup pin 368 * - LP Comparator 369 * - RTC alarm 370 * - WDT interrupt 371 * 372 * Wakeup is supported from device specific pin(s) with programmable polarity. 373 * Additionally, unregulated peripherals can wake the system under some 374 * conditions. For example, a low power comparator can wake the system by 375 * comparing two external voltages, but does not support comparison to an 376 * internally-generated voltage. The backup power domain remains functional, and 377 * if present it can schedule an alarm to wake the system from Hibernate using 378 * the RTC. Alternatively, the Watchdog Timer (WDT) can be configured to wake-up 379 * the system by WDT interrupt. Refer to \ref Cy_SysPm_SetHibernateWakeupSource() 380 * for more detail. 381 * 382 * \subsection group_syspm_system_reg_curr_mode System Regulator Current Mode 383 * In addition to system ULP and LP modes, the five different resource 384 * power settings can be configured to reduce current consumption: 385 * -# <b>Linear regulator low power mode</b>. Can be used only if core current 386 * is below the LDO regulator LP threshold. 387 * -# <b>POR/BOD circuit low power mode</b>. Requires compatible power supply 388 * stability due to stability increase response time. 389 * -# <b>Bandgap reference circuits low power mode</b> (turns on Deep Sleep 390 * Bandgap). Requires design to accept reduced Vref accuracy. Active ref can 391 * be turned off after this feature is enabled. 392 * -# <b>Reference buffer circuit low power mode</b>. Requires design to accept 393 * reduced Vref accuracy. 394 * -# <b>Current reference circuit low power mode</b>. Require design to accept 395 * reduced Iref accuracy. 396 * 397 * These five sub features can modify both system LP or ULP modes as they are 398 * independent from LP/ULP settings. 399 * When all five sub features are set to their low power modes, the system 400 * operates in regulator minimum current mode. In regulator minimum current mode, 401 * the system current consumption is limited to a device-specific value. Refer to 402 * the device datasheet for the exact current consumption value in regulator 403 * minimum current mode. 404 * 405 * When all five sub features are set to their normal mode, the system operates 406 * in regulator normal current mode. When regulator normal current mode is set, 407 * the system may operate at device maximum current. 408 * 409 * \subsection group_syspm_system_set_min_reg_curr_mode Setting Minimum System Regulator Current Mode 410 * 411 * Before setting the regulator minimum current mode ensure that current limits 412 * are be met. After current limits are met, call the 413 * Cy_SysPm_SystemSetMinRegulatorCurrent() function. 414 * 415 * \subsection group_syspm_system_set_normal_reg_curr_mode Setting Normal System Regulator Current Mode 416 * 417 * To set regulator normal current mode, call the 418 * Cy_SysPm_SystemSetNormalRegulatorCurrent() function. After the function call, 419 * the current limits can be increased to a maximum current, depending on what 420 * system power mode is set: LP or ULP. 421 * 422 * \subsection group_syspm_managing_pmic Managing PMIC 423 * 424 * The SysPm driver also provides an API to configure the internal power 425 * management integrated circuit (PMIC) controller for an external PMIC that 426 * supplies Vddd. Use the API to enable the internal PMIC controller output that 427 * is routed to pmic_wakeup_out pin, and configure the polarity of the PMIC 428 * controller input (pmic_wakeup_in) that is used to wake up the PMIC. 429 * 430 * The PMIC controller is automatically enabled when: 431 * * The PMIC is locked by a call to Cy_SysPm_PmicLock() 432 * * The configured polarity of the PMIC input and the polarity driven to 433 * pmic_wakeup_in pin matches. 434 * 435 * Because a call to Cy_SysPm_PmicLock() automatically enables the PMIC 436 * controller, the PMIC can remain disabled only when it is unlocked. See Cy_SysPm_PmicUnlock() 437 * for more detail. 438 * 439 * Use Cy_SysPm_PmicIsLocked() to read the current PMIC lock status. 440 * 441 * To enable the PMIC, use these functions in this order: 442 * \code{.c} 443 * Cy_SysPm_PmicUnlock(); 444 * Cy_SysPm_PmicEnable(); 445 * Cy_SysPm_PmicLock(); 446 * \endcode 447 * 448 * To disable the PMIC controller, unlock the PMIC. Then call 449 * Cy_SysPm_PmicDisable() with the inverted value of the current active state of 450 * the pmic_wakeup_in pin. 451 * For example, assume the current state of the pmic_wakeup_in pin is active low. 452 * To disable the PMIC controller, call these functions in this order: 453 * \code{.c} 454 * Cy_SysPm_PmicUnlock(); 455 * Cy_SysPm_PmicDisable(CY_SYSPM_PMIC_POLARITY_HIGH); 456 * \endcode 457 * Note that you do not call Cy_SysPm_PmicLock(), because that automatically 458 * enables the PMIC. 459 * 460 * While disabled, the PMIC controller is automatically enabled when the 461 * pmic_wakeup_in pin state is changed into a high state. 462 * 463 * To disable the PMIC controller output, call these functions in this order: 464 * Cy_SysPm_PmicUnlock(); 465 * Cy_SysPm_PmicDisableOutput(); 466 * 467 * Do not call Cy_SysPm_PmicLock() (which automatically enables the PMIC 468 * controller output). 469 * 470 * When disabled, the PMIC controller output is enabled when the PMIC is locked, 471 * or by calling Cy_SysPm_PmicEnableOutput(). 472 * 473 * \subsection group_syspm_managing_backup_domain Managing the Backup Domain 474 * The SysPm driver provide functions to: 475 * 476 * * Configure Supercapacitor charging 477 * * Select power supply source (Vbackup or Vddd) for Vddbackup 478 * * Measure Vddbackup using the ADC 479 * 480 * Refer to the \ref group_syspm_functions_backup functions for more detail. 481 * 482 * \subsection group_syspm_cb SysPm Callbacks 483 * The SysPm driver handles low power callbacks declared in the application. 484 * 485 * If there are no callbacks registered, the device executes the power mode 486 * transition. However, frequently your application firmware must make 487 * modifications for low power mode. For example, you may need to disable a 488 * peripheral, or ensure that a message is not being transmitted or received. 489 * 490 * To enable this, the SysPm driver implements a callback mechanism. When a lower 491 * power mode transition is about to take place (either entering or exiting 492 * \ref group_syspm_system_power_modes), the registered callbacks for that 493 * transition are called. 494 * 495 * The SysPm driver organizes all the callbacks into a linked list. While 496 * entering a low power mode, SysPm goes through that linked list from first to 497 * last, executing the callbacks one after another. While exiting low power mode, 498 * SysPm goes through that linked list again, but in the opposite direction from 499 * last to first. This ordering supports prioritization of callbacks relative to 500 * the transition event. 501 * 502 * For example, the picture below shows three callback structures organized into 503 * a linked list: myDeepSleep1, myDeepSleep2, myDeepSleep3 (represented with the 504 * \ref cy_stc_syspm_callback_t configuration structure). Each structure 505 * contains, among other fields, the address of the callback function. The code 506 * snippets below set this up so that myDeepSleep1 is called first when entering 507 * the low power mode. This also means that myDeepSleep1 will be the last one to 508 * execute when exiting the low power mode. 509 * 510 * The callback structures after registration: 511 * \image html syspm_register_eq.png 512 * 513 * Your application must register each callback, so that SysPm can execute it. 514 * Upon registration, the linked list is built by the SysPm driver. Notice 515 * the &myDeepSleep1 address in the myDeepSleep1 516 * \ref cy_stc_syspm_callback_t structure. This is filled in by the SysPm driver, 517 * when you register myDeepSleep1. The cy_stc_syspm_callback_t.order element 518 * defines the order of their execution by the SysPm driver. 519 * Call \ref Cy_SysPm_RegisterCallback() to register each callback function. 520 * 521 * A callback function is typically associated with a particular driver that 522 * handles the peripheral. So the callback mechanism enables a peripheral to 523 * prepare for a low power mode (for instance, shutting down the analog part); 524 * or to perform tasks while exiting a low power mode (like enabling the analog 525 * part again). 526 * 527 * With the callback mechanism you can prevent switching into a low power mode if 528 * a peripheral is not ready. For example, driver X is in the process of 529 * receiving a message. In the callback function implementation simply return 530 * CY_SYSPM_FAIL in a response to CY_SYSPM_CHECK_READY. 531 * 532 * If success is returned while executing a callback, the SysPm driver calls the 533 * next callback and so on to the end of the list. If at some point a callback 534 * returns CY_SYSPM_FAIL in response to the CY_SYSPM_CHECK_READY step, all the 535 * callbacks that have already executed are executed in reverse order, with the 536 * CY_SYSPM_CHECK_FAIL mode parameter. This allows each callback to know that 537 * entering the low power mode has failed. The callback can then undo whatever it 538 * did to prepare for low power mode, if required. For example, if the driver X 539 * callback shut down the analog part, it can re-enable the analog part. 540 * 541 * Let's switch to an example explaining the implementation, setup, and 542 * registration of three callbacks (myDeepSleep1, myDeepSleep2, myDeepSleep2) in 543 * the application. The \ref group_syspm_cb_config_consideration are provided 544 * after the \ref group_syspm_cb_example. 545 * 546 * \subsection group_syspm_cb_example SysPm Callbacks Example 547 * 548 * The following code snippets demonstrate how use the SysPm callbacks mechanism. 549 * We will build the prototype for an application that registers 550 * three callback functions: 551 * -# myDeepSleep1 - Handles CPU Deep Sleep. 552 * -# myDeepSleep2 - Handles CPU Deep Sleep and is associated with peripheral 553 * HW1_address (see <a href="..\..\pdl_user_guide.pdf">PDL Design</a> 554 * section to learn about the base hardware address). 555 * -# myDeepSleep3 - Handles entering and exiting system Deep Sleep and is 556 * associated with peripheral HW2_address. 557 * 558 * We set things up so that the myDeepSleep1 and myDeepSleep2 callbacks do 559 * nothing while entering the low power mode (skip on 560 * CY_SYSPM_SKIP_BEFORE_TRANSITION - 561 * see \ref group_syspm_cb_function_implementation in 562 * \ref group_syspm_cb_config_consideration). 563 * Skipping the actions while entering low power might be useful if you need 564 * to save time while switching low power modes. This is because the callback 565 * function with a skipped mode is not even called avoiding the call and return 566 * overhead. 567 * 568 * Let's first declare the callback functions. Each gets the pointer to the 569 * \ref cy_stc_syspm_callback_params_t structure as the argument. 570 * 571 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_Callback_Func_Declaration 572 * 573 * Now we setup the \ref cy_stc_syspm_callback_params_t structures that we will 574 * pass to the callback functions. Note that for the myDeepSleep2 and 575 * myDeepSleep3 callbacks we also pass pointers to the peripherals related to 576 * that callback (see <a href="..\..\pdl_user_guide.pdf">PDL Design</a> section 577 * to learn about base hardware addresses). 578 * The configuration considerations related to this structure are described 579 * in \ref group_syspm_cb_parameters in \ref group_syspm_cb_config_consideration. 580 * 581 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_Callback_Params_Declaration 582 * 583 * Now we setup the actual callback configuration structures. Each of these 584 * contains, among the other fields, the address of the 585 * \ref cy_stc_syspm_callback_params_t we just set up. We will use the callback 586 * configuration structures later in the code to register the callbacks in the 587 * SysPm driver. Again, we set things up so that the myDeepSleep1 and 588 * myDeepSleep2 callbacks do nothing while entering the low power mode 589 * (skip on CY_SYSPM_SKIP_BEFORE_TRANSITION) - see 590 * \ref group_syspm_cb_function_implementation in 591 * \ref group_syspm_cb_config_consideration. 592 * 593 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_Callback_Structure_Declaration 594 * 595 * Note that in each case the last two fields are NULL. These are fields used by 596 * the SysPm driver to set up the linked list of callback functions. 597 * 598 * The callback structures are now defined and allocated in the user's 599 * memory space: 600 * \image html syspm_before_registration.png 601 * 602 * Now we implement the callback functions. See 603 * \ref group_syspm_cb_function_implementation in 604 * \ref group_syspm_cb_config_consideration for the instructions on how the 605 * callback functions should be implemented. 606 * 607 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_Callback_Func_Implementation 608 * 609 * Finally, we register the callbacks so that the SysPm driver knows about them. 610 * The order in which the callbacks will be called depends upon the order in 611 * which the callbacks are registered. If there are no callbacks registered, 612 * the device just executes the power mode transition. 613 * 614 * Callbacks that reconfigure global resources, such as clock frequencies, should 615 * be registered last. They then modify global resources as the final step before 616 * entering the low power mode, and restore those resources first, as the system 617 * returns from low power mode. 618 * 619 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_RegisterCallback 620 * 621 * We are done configuring three callbacks. Now the SysPm driver will execute the 622 * callbacks appropriately whenever there is a call to a power mode transition 623 * function: \ref Cy_SysPm_CpuEnterSleep(), \ref Cy_SysPm_CpuEnterDeepSleep(), 624 * \ref Cy_SysPm_SystemEnterUlp(), \ref Cy_SysPm_SystemEnterLp(), and 625 * \ref Cy_SysPm_SystemEnterHibernate(). 626 * \note On a wakeup from hibernate the device goes through a reset, so the 627 * callbacks with CY_SYSPM_AFTER_TRANSITION are not executed. Refer to 628 * \ref Cy_SysPm_SystemEnterHibernate() for more detail. 629 * 630 * Refer to \ref group_syspm_cb_unregistering in 631 * \ref group_syspm_cb_config_consideration to learn what to do if you need to 632 * remove the callback from the linked list. You might want to unregister the 633 * callback for debug purposes. 634 * 635 * Refer to \ref group_syspm_cb_flow in \ref group_syspm_cb_config_consideration 636 * to learn about how the SysPm processes the callbacks. 637 * 638 * \subsection group_syspm_cb_config_consideration Callback Configuration Considerations 639 * 640 * \subsubsection group_syspm_cb_parameters Callback Function Parameters 641 * 642 * The <b>callbackParams</b> parameter of the callback function is a 643 * \ref cy_stc_syspm_callback_params_t structure. The second parameter 644 * (<b>mode</b>) is for internal use. In the example code we used a 645 * dummy value CY_SYSPM_CHECK_READY to eliminate compilation errors associated 646 * with the enumeration. The driver sets the <b>mode</b> field to the correct 647 * value when calling the callback functions (the mode is referred to as step in 648 * the \ref group_syspm_cb_function_implementation). The callback function reads 649 * the value and executes code based on the mode set by the SysPm driver. 650 * The <b>base</b> and <b>context</b> fields are optional and can be NULL. 651 * Some drivers require a base hardware address and context to store information 652 * about the mode transition. If your callback routine requires access to the 653 * driver registers or context, provide those values 654 * (see <a href="..\..\pdl_user_guide.pdf">PDL Design</a> section 655 * to learn about Base Hardware Address). Be aware of MISRA warnings if these 656 * parameters are NULL. 657 * 658 * \subsubsection group_syspm_cb_structures Callback Function Structure 659 * For each callback, provide a \ref cy_stc_syspm_callback_t structure. Some 660 * fields in this structure are maintained by the driver. Use NULL for 661 * cy_stc_syspm_callback_t.prevItm and cy_stc_syspm_callback_t.nextItm. 662 * Driver uses these fields to build a linked list of callback functions. 663 * The value of cy_stc_syspm_callback_t.order element is used to define the order 664 * how the callbacks are put into linked list, and sequentially, how the 665 * callbacks are executed. See \ref group_syspm_cb_registering section. 666 * 667 * \warning The Cy_SysPm_RegisterCallback() function stores a pointer to the 668 * cy_stc_syspm_callback_t structure. Do not modify elements of the 669 * cy_stc_syspm_callback_t structure after the callback is registered. 670 * You are responsible for ensuring that the structure remains in scope. 671 * Typically the structure is declared as a global or static variable, or as a 672 * local variable in the main() function. 673 * 674 * \subsubsection group_syspm_cb_function_implementation Callback Function Implementation 675 * 676 * Every callback function should handle four possible steps (referred to as 677 * "mode") defined in \ref cy_en_syspm_callback_mode_t : 678 * * CY_SYSPM_CHECK_READY - Check if ready to enter a power mode. 679 * * CY_SYSPM_BEFORE_TRANSITION - The actions to be done before entering 680 * the low power mode. 681 * * CY_SYSPM_AFTER_TRANSITION - The actions to be done after exiting the 682 * low power mode. 683 * * CY_SYSPM_CHECK_FAIL - Roll back any actions performed in the callback 684 * executed previously with CY_SYSPM_CHECK_READY. 685 * 686 * A callback function can skip steps (see \ref group_syspm_skip_callback_modes). 687 * In our example myDeepSleep1 and myDeepSleep2 callbacks do nothing while 688 * entering the low power mode (skip on CY_SYSPM_BEFORE_TRANSITION). If there is 689 * anything preventing low power mode entry - return CY_SYSPM_FAIL in response to 690 * CY_SYSPM_CHECK_READY in your callback implementation. Note that the callback 691 * should return CY_SYSPM_FAIL only in response to CY_SYSPM_CHECK_READY. The 692 * callback function should always return CY_SYSPM_PASS for other modes: 693 * CY_SYSPM_CHECK_FAIL, CY_SYSPM_BEFORE_TRANSITION, and CY_SYSPM_AFTER_TRANSITION 694 * (see \ref group_syspm_cb_flow). 695 * 696 * \subsubsection group_syspm_cb_flow Callbacks Execution Flow 697 * 698 * This section explains what happens during a power transition, when callbacks 699 * are implemented and set up correctly. The following discussion assumes: 700 * * All required callback functions are defined and implemented 701 * * All cy_stc_syspm_callback_t structures are filled with required values 702 * * All callbacks are successfully registered 703 * 704 * User calls one of the power mode transition functions: \ref Cy_SysPm_CpuEnterSleep(), 705 * \ref Cy_SysPm_CpuEnterDeepSleep(), \ref Cy_SysPm_SystemEnterUlp(), 706 * \ref Cy_SysPm_SystemEnterLp(), or \ref Cy_SysPm_SystemEnterHibernate(). 707 * It calls each callback with the mode set to CY_SYSPM_CHECK_READY. This 708 * triggers execution of the code for that mode inside of each user callback. 709 * 710 * The intent of CY_SYSPM_CHECK_READY is to only signal if the resources is ready 711 * to transition. Ideally, no transition changes should be made at this time. 712 * In some cases a small change may be required. For example a communication 713 * resource callback may set a flag telling firmware not to start any new 714 * transition. 715 716 * If that process is successful for all callbacks, then 717 * \ref Cy_SysPm_ExecuteCallback() calls each callback with the mode set to 718 * CY_SYSPM_BEFORE_TRANSITION. This triggers execution of the code for that mode 719 * inside each user callback. We then enter the low power mode after all callback 720 * are executed. 721 * 722 * When exiting the low power mode, the SysPm driver executes 723 * \ref Cy_SysPm_ExecuteCallback() again. This time it calls each callback in 724 * reverse order, with the mode set to CY_SYSPM_AFTER_TRANSITION. This triggers 725 * execution of the code for that mode inside each user callback. The final 726 * execution of callbacks depends on the low power mode in which callbacks were 727 * called: 728 * * For CPU Sleep or Deep Sleep power modes, the CY_SYSPM_AFTER_TRANSITION mode 729 * is called after the CPU wakes from Sleep or Deep Sleep. 730 * * For system Hibernate, the CY_SYSPM_AFTER_TRANSITION mode is not executed 731 * because the device reboots after the wakeup from the Hibernate. 732 * * For system LP and ULP modes, after the CY_SYSPM_AFTER_TRANSITION mode was 733 * called the system remains in the new power mode: LP or ULP. 734 * 735 * A callback can return CY_SYSPM_FAIL only while executing the 736 * CY_SYSPM_CHECK_READY mode. If that happens, then the remaining callbacks are 737 * not executed. Any callbacks that have already executed are called again, in 738 * reverse order, with CY_SYSPM_CHECK_FAIL. This allows the system to return to 739 * the previous state. If a callback returns a fail then any of the functions 740 * (\ref Cy_SysPm_CpuEnterSleep(), \ref Cy_SysPm_CpuEnterDeepSleep(), 741 * \ref Cy_SysPm_SystemEnterUlp(), \ref Cy_SysPm_SystemEnterLp(), or 742 * \ref Cy_SysPm_SystemEnterHibernate()) that attempt to switch the device into 743 * a low power mode will also return CY_SYSPM_FAIL. 744 * 745 * Callbacks that reconfigure global resources, such as clock frequencies, 746 * should be registered last. They then modify global resources as the final 747 * step before entering the low power mode, and restore those resources first, 748 * as the system returns from low power mode. 749 * 750 * \subsubsection group_syspm_cb_registering Callback Registering 751 * While registration the callback is put into the linked list. The 752 * place where the callback structure is put into the linked list is based on 753 * cy_stc_syspm_callback_t.order. The callback with the lowest 754 * cy_stc_syspm_callback_t.order value will be placed at the beginning of linked 755 * list. The callback with the highest cy_stc_syspm_callback_t.order value will 756 * be placed at the end of the linked list. 757 * If there is already a callback structure in the linked list with the same 758 * cy_stc_syspm_callback_t.order value as you attend to register, then your 759 * callback will be placed right after such a callback. 760 * 761 * Such a registration order defines how the callbacks are executed: 762 * * Callbacks with the lower cy_stc_syspm_callback_t.order are executed first 763 * when entering into low power and last when exiting from low power. 764 * * Callbacks with the higher cy_stc_syspm_callback_t.order are executed last 765 * when entering into low power and first when exiting from low power. 766 * 767 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_RegisterCallback 768 * 769 * Callbacks with equal cy_stc_syspm_callback_t.order values are 770 * registered in the same order as they are registered: 771 * \image html syspm_register_eq.png 772 773 * Callbacks with a different cy_stc_syspm_callback_t.order value will be 774 * stored based on the cy_stc_syspm_callback_t.order value, with no matter when 775 * they when registered: 776 * 777 * \image html syspm_register_dif.png 778 * 779 * This can be useful to ensure that system resources (clock dividers, etc) are 780 * changed right before entering low power mode and immediately after exiting 781 * from low power. 782 * 783 * \subsubsection group_syspm_cb_unregistering Callback Unregistering 784 * 785 * Unregistering the callback might be useful when you need to dynamically manage 786 * the callbacks. 787 * 788 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_UnregisterCallback 789 * The callback structures after myDeepSleep2 callback is unregistered: 790 * \image html syspm_unregistration.png 791 * 792 * \section group_syspm_definitions Definitions 793 * 794 * <table class="doxtable"> 795 * <tr> 796 * <th>Term</th> 797 * <th>Definition</th> 798 * </tr> 799 * 800 * <tr> 801 * <td>LDO</td> 802 * <td>Low dropout linear regulator. The functions that manage this 803 * block are grouped as \ref group_syspm_functions_ldo under 804 * \ref group_syspm_functions_core_regulators</td> 805 * </tr> 806 * 807 * <tr> 808 * <td>SIMO Buck</td> 809 * <td>Single inductor multiple Output Buck regulator, referred as 810 * "Buck regulator" throughout the documentation. The functions that 811 * manage this block are grouped as \ref group_syspm_functions_buck under 812 * \ref group_syspm_functions_core_regulators</td> 813 * </tr> 814 * 815 * <tr> 816 * <td>SISO Buck</td> 817 * <td>Single inductor single output Buck regulator, referred as 818 * "Buck regulator" throughout the documentation. The functions that 819 * manage this block are grouped as \ref group_syspm_functions_buck under 820 * \ref group_syspm_functions_core_regulators</td> 821 * </tr> 822 823 * <tr> 824 * <td>PMIC</td> 825 * <td>Power management integrated circuit. The functions that manage this 826 * block are grouped as \ref group_syspm_functions_pmic</td> 827 * </tr> 828 * 829 * <tr> 830 * <td>LP</td> 831 * <td>System low power mode. See the \ref group_syspm_switching_into_lp 832 * section for details.</td> 833 * </tr> 834 * 835 * <tr> 836 * <td>ULP</td> 837 * <td>System ultra low power mode. See the 838 * \ref group_syspm_switching_into_ulp section for details.</td> 839 * </tr> 840 * </table> 841 * 842 * \section group_syspm_section_more_information More Information 843 * For more information on the SysPm driver, 844 * refer to the technical reference manual (TRM). 845 * 846 * \section group_syspm_changelog Changelog 847 * <table class="doxtable"> 848 * <tr><th>Version</th><th>Changes</th><th>Reason for Change</th></tr> 849 * <tr> 850 * <td>5.150</td> 851 * <td>Updated Cy_SysPm_SaveRegisters and Cy_SysPm_RestoreRegisters to support parts which do not implement UDB.</td> 852 * <td>Added support for FX3G2 (CAT1A).</td> 853 * </tr> 854 * <tr> 855 * <td>5.140</td> 856 * <td>Update to cy_en_syspm_hibernate_wakeup_source_t.</td> 857 * <td>Minor defect fixing.</td> 858 * </tr> 859 * <tr> 860 * <td>5.130</td> 861 * <td>Added support for new device.</td> 862 * <td>Added support for TRAVEO™ II Cluster (CAT1C).</td> 863 * </tr> 864 * <tr> 865 * <td>5.120</td> 866 * <td>Added support for new device.</td> 867 * <td>Added support for PSoC C3 (CAT1B).</td> 868 * </tr> 869 * <tr> 870 * <td>5.110</td> 871 * <td>Newly Added API Cy_BTSS_PowerDepResetCount and updated \ref Cy_BTSS_PowerDep.</td> 872 * <td>Fixed race condition in PDCM locking/release.</td> 873 * </tr> 874 * <tr> 875 * <td>5.100</td> 876 * <td>Added support for TRAVEO™ II Body Entry devices.<br> 877 * Pre-processor check for MXS40SRSS version now groups ver. 2 with ver. 3. Previously ver. 2 was grouped with ver. 1.</td> 878 * API Cy_SysPm_IsDeepSleepRegEnabled is now only available for ULP variant devices.<br> 879 * API Cy_SysPm_ReghcSelectMode is now only available for devices with REGHC or HTRREGHC. Previously all MXS40SRSSv3 devices.<br> 880 * API Cy_SysPm_PmicEnable is now only available for MXS40SRSSv1 devices, or if BACKUP_VBCK IP is present.</td> 881 * <td>Code enhancement and support for new devices.</td> 882 * </tr> 883 * <tr> 884 * <td>5.95</td> 885 * <td>Added new APIs Cy_SysPm_StoreDSContext_Wfi, \ref Cy_SysPm_TriggerXRes and few macros.</td> 886 * <td>Code enhancements .</td> 887 * </tr> 888 * <tr> 889 * <td rowspan="5">5.94</td> 890 * <td> Newly added APIs \ref Cy_SysPm_SetSOCMemPartActivePwrMode, \ref Cy_SysPm_SetSOCMemPartDsPwrMode, \ref Cy_SysPm_GetSOCMemSramPartActivePwrMode, \ref Cy_SysPm_GetSOCMemSramPartDsPwrMode </td> 891 * <td>Support of SOCMEM control for CAT1D devices added .</td> 892 * </tr> 893 * <tr> 894 * <td>Newly added APIs \ref Cy_SysPm_ReghcConfigure, \ref Cy_SysPm_ReghcDeConfigure.</td> 895 * <td>Added REGHC configuration support for CAT1C devices .</td> 896 * </tr> 897 * <tr> 898 * <td>Newly added APIs \ref Cy_SysPm_SetSysDeepSleepMode, \ref Cy_SysPm_SetAppDeepSleepMode, \ref cy_pd_ppu_set_static_power_mode.</td> 899 * <td>DEEPSLEEP support for CAT1D devices added.</td> 900 * </tr> 901 * <tr> 902 * <td>Newly added APIs \ref Cy_SysPm_Cm33IsActive, \ref Cy_SysPm_Cm33IsSleep, \ref Cy_SysPm_Cm33IsDeepSleep, \ref Cy_SysPm_Cm55IsActive, \ref Cy_SysPm_Cm55IsSleep.</td> 903 * <td>Support for Core status check added for CAT1D devices .</td> 904 * </tr> 905 * <tr> 906 * <td>Newly added APIs \ref Cy_SysPm_SramLdoEnable, \ref Cy_SysPm_SramLdoSetVoltage, \ref Cy_SysPm_SramLdoGetVoltage.</td> 907 * <td>Support for SRAMLDO Regulator added for CAT1D devices .</td> 908 * </tr> 909 * <tr> 910 * <td>5.93</td> 911 * <td>Bug fix in definition of LPCOMP1 as wake-up source.</td> 912 * <td>The low power comparator #1 was unable to wake-up the system from hibernate state.</td> 913 * </tr> 914 * <tr> 915 * <td>5.92</td> 916 * <td>Support for CAT1D devices is added</td> 917 * <td>New devices support added</td> 918 * </tr> 919 * <tr> 920 * <td>5.91</td> 921 * <td>Updated \ref Cy_SysPm_Init() function.</td> 922 * <td>To remove the clearing of reset reason.</td> 923 * </tr> 924 * <tr> 925 * <td>5.90</td> 926 * <td> 927 * Added new function \ref Cy_SysPm_SetupDeepSleepRAM(). 928 * </td> 929 * <td>Added support for DSRAM Setup for CAT1B devices.</td> 930 * </tr> 931 * <tr> 932 * <td rowspan="4">5.80</td> 933 * <td> 934 * Support for CAT1C devices. 935 * </td> 936 * <td>Power Management support for CAT1C devices.</td> 937 * <tr> 938 * <td>New API's Added/Modified 939 * * Cy_SysPm_IsBgRefCtrl() 940 * * Cy_SysPm_BgRefCtrl() 941 * * Cy_SysPm_LdoSetMode() 942 * * Cy_SysPm_LdoGetMode() 943 * * Cy_SysPm_LdoIsEnabled() 944 * * Cy_SysPm_Cm7IsActive() 945 * * Cy_SysPm_Cm7IsSleep() 946 * * Cy_SysPm_Cm7IsDeepSleep() 947 * * Cy_SysPm_Cm7IsLowPower() 948 * * Cy_SysPm_Cm0IsActive() 949 * * Cy_SysPm_Cm0IsSleep() 950 * * Cy_SysPm_Cm0IsLowPower() 951 * * Cy_SysPm_Cm0IsDeepSleep() 952 * * Cy_SysPm_IsSystemLp() 953 * * Cy_SysPm_PmicEnable() 954 * * Cy_SysPm_PmicDisable() 955 * * Cy_SysPm_PmicAlwaysEnable() 956 * * Cy_SysPm_PmicEnableOutput() 957 * * Cy_SysPm_PmicDisableOutput() 958 * * Cy_SysPm_PmicLock() 959 * * Cy_SysPm_PmicUnlock() 960 * * Cy_SysPm_PmicIsEnabled() 961 * * Cy_SysPm_PmicIsOutputEnabled() 962 * * Cy_SysPm_PmicIsLocked() 963 * * Cy_SysPm_OvdEnable() 964 * * Cy_SysPm_OvdDisable() 965 * * Cy_SysPm_OvdVdddSelect() 966 * * Cy_SysPm_OvdVddaSelect() 967 * * Cy_SysPm_OvdActionSelect() 968 * * Cy_SysPm_BodEnable() 969 * * Cy_SysPm_BodDisable() 970 * * Cy_SysPm_BodVdddSelect() 971 * * Cy_SysPm_BodVddaSelect() 972 * * Cy_SysPm_BodActionSelect() 973 * * Cy_SysPm_SupplySupervisionStatus() 974 * * Cy_SysPm_SystemIsMinRegulatorCurrentSet() 975 * * Cy_SysPm_LinearRegDisable() 976 * * Cy_SysPm_LinearRegEnable() 977 * * Cy_SysPm_LinearRegGetStatus() 978 * * Cy_SysPm_DeepSleepRegDisable() 979 * * Cy_SysPm_DeepSleepRegEnable() 980 * * Cy_SySPm_IsDeepSleepRegEnabled() 981 * * Cy_SysPm_ReghcSelectMode() 982 * * Cy_SysPm_ReghcGetMode() 983 * * Cy_SysPm_ReghcSelectDriveOut() 984 * * Cy_SysPm_ReghcGetDriveOut() 985 * * Cy_SysPm_ReghcAdjustOutputVoltage() 986 * * Cy_SysPm_ReghcDisableIntSupplyWhileExtActive() 987 * * Cy_SysPm_ReghcEnableIntSupplyWhileExtActive() 988 * * Cy_SysPm_ReghcDisablePmicEnableOutput() 989 * * Cy_SysPm_ReghcEnablePmicEnableOutput() 990 * * Cy_SysPm_ReghcEnablePmicStatusInput() 991 * * Cy_SysPm_ReghcDisablePmicStatusInput() 992 * * Cy_SysPm_ReghcSetPmicStatusWaitTime() 993 * * Cy_SysPm_ReghcIsConfigured() 994 * * Cy_SysPm_ReghcSetConfigured() 995 * * Cy_SysPm_ReghcDisable() 996 * * Cy_SysPm_ReghcEnable() 997 * * Cy_SysPm_ReghcDisablePmicStatusTimeout() 998 * * Cy_SysPm_ReghcEnablePmicStatusTimeout() 999 * * Cy_SysPm_ReghcIsEnabled() 1000 * * Cy_SysPm_ReghcIsStatusOk() 1001 * * Cy_SysPm_ReghcIsSequencerBusy() 1002 * * Cy_SysPm_ReghcDisableVAdj() 1003 * * Cy_SysPm_ReghcEnableVAdj() 1004 * * Cy_SysPm_ReghcDisablePmicInDeepSleep() 1005 * * Cy_SysPm_ReghcEnablePmicInDeepSleep() 1006 * * Cy_SysPm_ReghcIsOcdWithinLimits() 1007 * * Cy_SysPm_ReghcIsCircuitEnabledAndOperating() 1008 * 1009 * </td> 1010 * <td>New API's to handle CAT1C devices.</td> 1011 * <tr> 1012 * <td>Added \ref group_syspm_functions_ovd, \ref group_syspm_functions_bod, \ref group_syspm_functions_linearreg and \ref group_syspm_functions_reghc API's.</td> 1013 * <td>New API's to handle Power Management in CAT1C Devices.</td> 1014 * </tr> 1015 * <tr> 1016 * <td> 1017 * Added following functions for BTSS IP Reset: 1018 * \ref Cy_BTSS_AssertReset(), \ref Cy_BTSS_IsResetAsserted(), 1019 * </td> 1020 * <td>Added API's to support for BTSS IP Reset.</td> 1021 * </tr> 1022 * <tr> 1023 * <td rowspan="3">5.70</td> 1024 * <td> 1025 * Support for CAT1B devices. 1026 * </td> 1027 * <td>Power Management support for CAT1B devices.</td> 1028 * <tr> 1029 * <td>New API's Added 1030 * * Cy_SysPm_Init() 1031 * * Cy_SysPm_SystemLpActiveEnter() 1032 * * Cy_SysPm_SystemLpActiveExit() 1033 * * Cy_SysPm_IsSystemLpActiveEnabled() 1034 * * Cy_SysPm_SetDeepSleepMode() 1035 * * Cy_SysPm_GetDeepSleepMode() 1036 * * Cy_SysPm_GetBootMode() 1037 * * Cy_SysPm_TriggerSoftReset() 1038 * * Cy_SysPm_GetHibernateWakeupCause() 1039 * * Cy_SysPm_ClearHibernateWakeupCause() 1040 * * Cy_SysPm_CoreBuckSetVoltage() 1041 * * Cy_SysPm_CoreBuckGetVoltage() 1042 * * Cy_SysPm_CoreBuckSetMode() 1043 * * Cy_SysPm_CoreBuckGetMode() 1044 * * Cy_SysPm_CoreBuckConfig() 1045 * * Cy_SysPm_CoreBuckStatus() 1046 * * Cy_SysPm_LdoExtraRequesterConfig() 1047 * * Cy_SysPm_SdrConfigure() 1048 * * Cy_SysPm_SdrSetVoltage() 1049 * * Cy_SysPm_SdrGetVoltage() 1050 * * Cy_SysPm_SdrEnable() 1051 * * Cy_SysPm_IsSdrEnabled() 1052 * * Cy_SysPm_HvLdoConfigure() 1053 * * Cy_SysPm_HvLdoSetVoltage() 1054 * * Cy_SysPm_HvLdoGetVoltage() 1055 * * Cy_SysPm_HvLdoEnable() 1056 * * Cy_SysPm_IsHvLdoEnabled() 1057 * * Cy_SysPm_IoUnfreeze() 1058 * * Cy_SysPm_DeepSleepIoIsFrozen() 1059 * * Cy_SysPm_DeepSleepIoUnfreeze() 1060 * * Cy_SysPm_BackupWordStore() 1061 * * Cy_SysPm_BackupWordReStore() 1062 * * Cy_SysPm_CpuEnterRAMOffDeepSleep() 1063 * 1064 * </td> 1065 * <td>New API's to handle CAT1B devices.</td> 1066 * <tr> 1067 * <td>Added \ref group_syspm_ppu, \ref group_syspm_pdcm and \ref group_syspm_btss API's.</td> 1068 * <td>New API's to handle Power Management in CAT1B Devices.</td> 1069 * </tr> 1070 * </tr> 1071 * <tr> 1072 * <td rowspan="2">5.60</td> 1073 * <td> 1074 * For PSoC64 device, allow CM0+ to call CY_PRA_FUNCTION_CALL_X_X API in functions 1075 * accessing FUNCTION_POLICY registers. So that System Configuration structure is 1076 * updated with new parameters. 1077 * </td> 1078 * <td>For PSoC64 device, System configuration can be done from CM0+ application.</td> 1079 * </tr> 1080 * <tr> 1081 * <td>Fixed MISRA 2012 violations.</td> 1082 * <td>MISRA 2012 compliance.</td> 1083 * </tr> 1084 * <tr> 1085 * <td>5.50</td> 1086 * <td> 1087 * Added following functions for SRAM power mode configuration: 1088 * \ref Cy_SysPm_SetSRAMMacroPwrMode(), \ref Cy_SysPm_SetSRAMPwrMode(), 1089 * \ref Cy_SysPm_GetSRAMMacroPwrMode(). For PSoC 64 devices these 1090 * functions can return PRA driver status value. 1091 * </td> 1092 * <td>Added support for SRAM power mode configuration.</td> 1093 * </tr> 1094 * <tr> 1095 * <td>5.40</td> 1096 * <td>Support for CM33.</td> 1097 * <td>New devices support.</td> 1098 * </tr> 1099 * <tr> 1100 * <td rowspan="3">5.30</td> 1101 * <td> 1102 * Updated \ref Cy_SysPm_LdoSetVoltage() and Cy_SysPm_SystemSetMinRegulatorCurrent() 1103 * to extend the wakeup delay from Deep Sleep for 1.1 V LDO for the case when system 1104 * regulator is configured to the minimum current mode. Please refer to 1105 * \ref group_syspm_system_reg_curr_mode for the more details on system regulator modes. 1106 * </td> 1107 * <td>Ensure valid VCCD upon wakeup for the system regulator's minimum current mode.</td> 1108 * </tr> 1109 * <tr> 1110 * <td>Fixed MISRA 2012 violations.</td> 1111 * <td>MISRA 2012 compliance.</td> 1112 * </tr> 1113 * <tr> 1114 * <td>Updated the \ref Cy_SysPm_CpuEnterDeepSleep() function to ensure the Low-power mode 1115 * entry abort when a system call initiated by Cortex-M4 or Cortex-M0+ is pending.</td> 1116 * <td>Fixed the issue when the non-blocking flash write initiated by the Cortex-M4 application 1117 * fails to complete because the Cortex-M0+ CPU is in Deep Sleep mode.</td> 1118 * </tr> 1119 * <tr> 1120 * <td>5.20</td> 1121 * <td> 1122 * Updated \ref Cy_SysPm_CpuEnterDeepSleep() function for 1123 * the CYB06xx7 devices. 1124 * </td> 1125 * <td>Added CYB06xx7 device support.</td> 1126 * </tr> 1127 * <tr> 1128 * <td rowspan="3">5.10</td> 1129 * <td> 1130 * Updated the following functions for the PSoC 64 devices: 1131 * \ref Cy_SysPm_CpuEnterDeepSleep(), \ref Cy_SysPm_SystemEnterLp(), 1132 * \ref Cy_SysPm_SystemEnterUlp, \ref Cy_SysPm_SystemEnterHibernate, 1133 * \ref Cy_SysPm_SetHibernateWakeupSource, 1134 * \ref Cy_SysPm_ClearHibernateWakeupSource, 1135 * \ref Cy_SysPm_SystemSetMinRegulatorCurrent, 1136 * \ref Cy_SysPm_SystemSetNormalRegulatorCurrent, 1137 * \ref Cy_SysPm_LdoSetVoltage, \ref Cy_SysPm_LdoSetMode, 1138 * \ref Cy_SysPm_BuckEnable, \ref Cy_SysPm_BuckSetVoltage1, 1139 * Following functions are updated as unavailable for PSoC 64 devices: 1140 * \ref Cy_SysPm_WriteVoltageBitForFlash, \ref Cy_SysPm_SaveRegisters, 1141 * \ref Cy_SysPm_RestoreRegisters, 1142 * \ref Cy_SysPm_BuckSetVoltage2, \ref Cy_SysPm_BuckEnableVoltage2, 1143 * \ref Cy_SysPm_BuckDisableVoltage2, 1144 * \ref Cy_SysPm_BuckSetVoltage2HwControl, SetReadMarginTrimUlp, 1145 * SetReadMarginTrimLp, SetWriteAssistTrimUlp, IsVoltageChangePossible. 1146 * </td> 1147 * <td> 1148 * Added PSoC 64 device support. 1149 * </td> 1150 * </tr> 1151 * <tr> 1152 * <td> 1153 * For PSoC 64 devices the following functions can return PRA driver 1154 * status value: 1155 * \ref Cy_SysPm_CpuEnterDeepSleep(), 1156 * \ref Cy_SysPm_SystemEnterHibernate(), 1157 * \ref Cy_SysPm_SystemEnterLp(), 1158 * \ref Cy_SysPm_SystemEnterUlp(), 1159 * \ref Cy_SysPm_SystemSetMinRegulatorCurrent(), 1160 * \ref Cy_SysPm_SystemSetNormalRegulatorCurrent(), 1161 * \ref Cy_SysPm_LdoSetVoltage(), \ref Cy_SysPm_LdoSetMode(), 1162 * \ref Cy_SysPm_BuckEnable(), \ref Cy_SysPm_BuckSetVoltage1(), 1163 * </td> 1164 * <td> 1165 * For PSoC 64 devices the SysPm driver uses the PRA driver to change 1166 * the protected registers. A SysPm driver function that calls a PRA 1167 * driver function will return the PRA error status code if the called 1168 * PRA function returns an error. In these cases, refer to PRA return 1169 * statuses \ref cy_en_pra_status_t. 1170 * </td> 1171 * </tr> 1172 * <tr> 1173 * <td>Minor documentation updates.</td> 1174 * <td>Documentation enhancement.</td> 1175 * </tr> 1176 * <tr> 1177 * <td>5.0</td> 1178 * <td> 1179 * Updated the internal IsVoltageChangePossible() function 1180 * (\ref Cy_SysPm_LdoSetVoltage(), \ref Cy_SysPm_BuckEnable(), 1181 * \ref Cy_SysPm_BuckSetVoltage1(), \ref Cy_SysPm_SystemEnterUlp() 1182 * and \ref Cy_SysPm_SystemEnterLp() functions are affected). 1183 * For all the devices except CY8C6xx6 and CY8C6xx7 added the check if 1184 * modifying the RAM trim register is allowed. 1185 * </td> 1186 * <td> 1187 * Protecting the system from a possible CPU hard-fault cause. If you 1188 * are using PC > 0 in your project and you want to switch the power 1189 * modes (LP<->ULP), you need to unprotect the CPUSS_TRIM_RAM_CTL and 1190 * CPUSS_TRIM_ROM_CTL registers and can use a programmable PPU for that. 1191 * </td> 1192 * </tr> 1193 * <tr> 1194 * <td rowspan="2">4.50</td> 1195 * <td>Updated the \ref Cy_SysPm_CpuEnterDeepSleep() function.</td> 1196 * <td> 1197 * Updated the mechanism for saving/restoring not retained UDB and clock 1198 * registers in the Cy_SysPm_CpuEnterDeepSleep() function. 1199 * </td> 1200 * </tr> 1201 * <tr> 1202 * <td> 1203 * Updated the \ref Cy_SysPm_CpuEnterDeepSleep() function to use values 1204 * stored into the variable instead of reading them directly from 1205 * SFLASH memory. 1206 * </td> 1207 * <td> 1208 * SFLASH memory can be unavailable to read the correct value after 1209 * a Deep sleep state on the CY8C6xx6 and CY8C6xx7 devices. 1210 * </td> 1211 * </tr> 1212 * <tr> 1213 * <td>4.40</td> 1214 * <td> 1215 * Fixed \ref Cy_SysPm_LdoSetVoltage(), \ref Cy_SysPm_BuckEnable(), and 1216 * \ref Cy_SysPm_BuckSetVoltage1() functions. Corrected the sequence for 1217 * setting the RAM trim value. This behavior is applicable for all 1218 * devices, except CY8C6xx6 and CY8C6xx7. 1219 * </td> 1220 * <td> 1221 * For all devices, except CY8C6xx6 and CY8C6xx7, the trim 1222 * sequence was setting incorrect trim values for RAM. 1223 * This could cause a CPU hard fault. 1224 * </td> 1225 * </tr> 1226 * <tr> 1227 * <td>4.30</td> 1228 * <td> 1229 * Corrected the \ref Cy_SysPm_CpuEnterDeepSleep() function. 1230 * Removed early access to flash values after system Deep Sleep, when 1231 * flash is not ready to be used. Now the \ref Cy_SysPm_CpuEnterDeepSleep() 1232 * function does not access flash until the flash is ready. 1233 * This behavior is applicable only on multi-CPU devices CY8C6xx6 and 1234 * CY8C6xx7. 1235 * </td> 1236 * <td> 1237 * For CY8C6xx6 and CY8C6xx7 early access to flash values after 1238 * system Deep Sleep could potentially cause hard fault. 1239 * Now after system Deep Sleep only ram values are used before 1240 * flash is ready. 1241 * </td> 1242 * </tr> 1243 * <tr> 1244 * <td rowspan="3">4.20</td> 1245 * <td>Updated the \ref Cy_SysPm_RegisterCallback() function. 1246 * Added a new element to callback structure - 1247 * cy_stc_syspm_callback_t.order</td> 1248 * <td>Enhanced the mechanism of callbacks registration and execution. Now 1249 * callbacks can be ordered during registration. This means the 1250 * execution flow now is based on cy_stc_syspm_callback_t.order. 1251 * For more details, see the \ref group_syspm_cb_registering section. </td> 1252 * </tr> 1253 * <tr> 1254 * <td>Updated \ref group_syspm_cb section. 1255 * Added \ref group_syspm_cb_registering section</td> 1256 * <td>Added explanations how to use updated callbacks registration 1257 * mechanism. </td> 1258 * </tr> 1259 * <tr> 1260 * <td>Added new function \ref Cy_SysPm_GetFailedCallback()</td> 1261 * <td>Added new functionality to support callback debugging</td> 1262 * </tr> 1263 * <tr> 1264 * <td>4.10.1</td> 1265 * <td> 1266 * Updated the Cy_SysPm_BackupEnableVoltageMeasurement() description 1267 * </td> 1268 * <td> 1269 * Changed the scale number from 40% to 10% to correctly reflect a real value. 1270 * </td> 1271 * </tr> 1272 * <tr> 1273 * <td rowspan="3">4.10</td> 1274 * <td>Updated the \ref Cy_SysPm_CpuEnterDeepSleep() function.</td> 1275 * <td> 1276 * Corrected the mechanism for saving/restoring not retained UDB 1277 * registers in the Cy_SysPm_CpuEnterDeepSleep() function. 1278 * 1279 * Now, the \ref Cy_SysPm_CpuEnterDeepSleep() function does not put CM0+ CPU 1280 * into Deep Sleep and returns \ref CY_SYSPM_SYSCALL_PENDING status, if a 1281 * syscall operation is pending. This behavior is applicable on multi-CPU 1282 * devices except CY8C6xx6 and CY8C6xx7. 1283 * </td> 1284 * </tr> 1285 * <tr> 1286 * <td>Updated the \ref Cy_SysPm_CpuEnterSleep() function.</td> 1287 * <td>Removed the redundant second call of the WFE() instruction on CM4 CPU. 1288 * This change is applicable for all devices except CY8C6xx6, 1289 * CY8C6xx7. 1290 * </td> 1291 * </tr> 1292 * <tr> 1293 * <td>Added a new \ref CY_SYSPM_SYSCALL_PENDING return status. </td> 1294 * <td>Expanded driver return statuses for indicating new possible events in 1295 * the driver. 1296 * </td> 1297 * </tr> 1298 * </tr> 1299 * <tr> 1300 * <td rowspan="6">4.0</td> 1301 * <td> 1302 * Flattened the organization of the driver source code into the single 1303 * source directory and the single include directory. 1304 * </td> 1305 * <td>Driver library directory-structure simplification.</td> 1306 * </tr> 1307 * <tr> 1308 * <td> 1309 * Changed power modes names. See \ref group_syspm_system_power_modes. 1310 * 1311 * Renamed the following functions: 1312 * - Cy_SysPm_Sleep to Cy_SysPm_CpuEnterSleep 1313 * - Cy_SysPm_DeepSleep to Cy_SysPm_CpuEnterDeepSleep 1314 * - Cy_SysPm_Hibernate to Cy_SysPm_SystemEnterHibernate 1315 * - Cy_SysPm_SleepOnExit to Cy_SysPm_CpuSleepOnExit 1316 * - Cy_SysPm_EnterLowPowerMode to Cy_SysPm_SystemSetMinRegulatorCurrent 1317 * - Cy_SysPm_ExitLowPowerMode to Cy_SysPm_SystemSetNormalRegulatorCurrent 1318 * - Cy_SysPm_IsLowPower to Cy_SysPm_IsSystemUlp 1319 * 1320 * For all renamed functions, added BWC macros to simplify migration. 1321 * </td> 1322 * <td>Device power modes simplification</td> 1323 * </tr> 1324 * <tr> 1325 * <td> 1326 * Added the following functions: 1327 * - Cy_SysPm_LdoSetMode 1328 * - Cy_SysPm_LdoGetMode 1329 * - Cy_SysPm_WriteVoltageBitForFlash 1330 * - Cy_SysPm_SaveRegisters 1331 * - Cy_SysPm_RestoreRegisters 1332 * - Cy_SysPm_CpuSendWakeupEvent 1333 * - Cy_SysPm_SystemIsMinRegulatorCurrentSet 1334 * - Cy_SysPm_SystemEnterLp 1335 * - Cy_SysPm_SystemEnterUlp 1336 * - Cy_SysPm_IsSystemLp 1337 * </td> 1338 * <td>Added new functionality to configure device power modes</td> 1339 * </tr> 1340 * <tr> 1341 * <td> 1342 * Callback mechanism changes: 1343 * - Removed the limitation for numbers of registered callbacks. Previously it 1344 * was possible to register up to 32 callbacks. Now the maximum registered 1345 * callbacks is not limited by the SysPm driver. 1346 * - Internal enhancement in callback execution flow. 1347 * - <b>Changes with BWC issues</b>: 1348 * -# Removed the <b>mode</b> element from cy_stc_syspm_callback_params_t 1349 * structure. Now this element is a separate parameter in the 1350 * callback function. 1351 * -# Changed the interface of the callback function, 1352 * added the cy_en_syspm_callback_mode_t mode parameter: 1353 * - was cy_en_syspm_status_t FuncName (cy_stc_syspm_callback_params_t *callbackParams); 1354 * - now cy_en_syspm_status_t FuncName (cy_stc_syspm_callback_params_t *callbackParams, 1355 * cy_en_syspm_callback_mode_t mode); 1356 * </td> 1357 * <td>Callback mechanism enhancements</td> 1358 * </tr> 1359 * <tr> 1360 * <td>Added register access layer. Use register access macros instead 1361 * of direct register access using dereferenced pointers.</td> 1362 * <td>Makes register access device-independent, so that the PDL does 1363 * not need to be recompiled for each supported part number.</td> 1364 * </tr> 1365 * <tr> 1366 * <td>Added \ref group_syspm_migration_guide_for_syspm_4_0.</td> 1367 * <td>Provided a guidance for migrating to the latest SysPm driver version</td> 1368 * </tr> 1369 * <tr> 1370 * <td rowspan="2">3.0</td> 1371 * <td>Removed three functions: 1372 * - Cy_SysPm_Cm4IsLowPower 1373 * - Cy_SysPm_Cm0IsLowPower 1374 * - Cy_SysPm_IoFreeze 1375 * 1376 * Removed the following macros: 1377 * - CY_SYSPM_STATUS_CM0_LOWPOWER 1378 * - CY_SYSPM_STATUS_CM4_LOWPOWER 1379 * </td> 1380 * <td> 1381 * Removed the two functions Cy_SysPm_Cm4IsLowPower, 1382 * Cy_SysPm_Cm0IsLowPower because low power mode is related to the 1383 * device and not to the CPU. 1384 * The function Cy_SysPm_IsSystemUlp must be used instead of these two 1385 * functions. 1386 * 1387 * Removed Cy_SysPm_IoFreeze because the are no known use cases with IOs 1388 * freeze in power modes, except Hibernate. In Hibernate power mode, the 1389 * IOs are frozen automatically. 1390 * </td> 1391 * </tr> 1392 * <tr> 1393 * <td> 1394 * Corrected the syspm callback mechanism behavior. Now callbacks with 1395 * CY_SYSPM_AFTER_TRANSITION mode are executed from the last registered 1396 * to the first registered. Previously callbacks with 1397 * CY_SYSPM_AFTER_TRANSITION mode were executed from last executed to 1398 * the first registered. 1399 * </td> 1400 * <td>Corrected the syspm callbacks execution sequence</td> 1401 * </tr> 1402 * <tr> 1403 * <td>2.21</td> 1404 * <td>Removed saving/restoring the SysClk measurement counters while 1405 * in Deep Sleep routine 1406 * </td> 1407 * <td>Removed possible corruption of SysClk measurement counters if the 1408 * core wakes up from the Deep Sleep. 1409 * </td> 1410 * </tr> 1411 * <tr> 1412 * <td>2.20</td> 1413 * <td> \n 1414 * * Added support for changing core voltage when the protection context 1415 * is other that zero. Such support is available only for devices 1416 * that support modifying registers via syscall. 1417 * 1418 * * For preproduction PSoC 6 devices the changing core voltage 1419 * is prohibited when the protection context is other than zero. 1420 * 1421 * * Updated the following functions. They now have a 1422 * \ref cy_en_syspm_status_t return value and use a syscall: 1423 * - Cy_SysPm_LdoSetVoltage 1424 * - Cy_SysPm_BuckSetVoltage1 1425 * - Cy_SysPm_BuckEnable 1426 * 1427 * No backward compatibility issues. 1428 * 1429 * * Added new CY_SYSPM_CANCELED element in 1430 * the \ref cy_en_syspm_status_t. 1431 * 1432 * * Documentation updates. 1433 * 1434 * * Added warning that 1435 * Cy_SysPm_PmicDisable(CY_SYSPM_PMIC_POLARITY_LOW) is not 1436 * supported by hardware. 1437 * </td> 1438 * <td>Added support for changing the core voltage in protection context 1439 * higher than zero (PC > 0). 1440 * 1441 * Documentation update and clarification 1442 * </td> 1443 * </tr> 1444 * <tr> 1445 * <td>2.10</td> 1446 * <td> \n 1447 * * Changed names for all Backup, Buck-related functions, defines, 1448 * and enums 1449 * * Changed next power mode function names: 1450 * Cy_SysPm_EnterLowPowerMode 1451 * Cy_SysPm_ExitLpMode 1452 * Cy_SysPm_SetHibWakeupSource 1453 * Cy_SysPm_ClearHibWakeupSource 1454 * Cy_SysPm_GetIoFreezeStatus 1455 * * Changed following enumeration names: 1456 * cy_en_syspm_hib_wakeup_source_t 1457 * cy_en_syspm_simo_buck_voltage1_t 1458 * cy_en_syspm_simo_buck_voltage2_t 1459 * * Updated Power Modes documentation section 1460 * * Added Low Power Callback Managements section 1461 * * Documentation edits 1462 * </td> 1463 * <td> \n 1464 * * Improvements made based on usability feedback 1465 * * Documentation update and clarification 1466 * </td> 1467 * </tr> 1468 * <tr> 1469 * <td>2.0</td> 1470 * <td>Enhancement and defect fixes: 1471 * * Added input parameter(s) validation to all public functions 1472 * * Removed "_SysPm_" prefixes from the internal functions names 1473 * * Changed the type of elements with limited set of values, from 1474 * uint32_t to enumeration 1475 * * Enhanced syspm callback mechanism 1476 * * Added functions to control: 1477 * * Power supply for the Vddbackup 1478 * * Supercapacitor charge 1479 * * Vddbackup measurement by ADC 1480 * </td> 1481 * <td></td> 1482 * </tr> 1483 * <tr> 1484 * <td>1.0</td> 1485 * <td>Initial version</td> 1486 * <td></td> 1487 * </tr> 1488 * </table> 1489 * 1490 * \subsection group_syspm_migration_guide_for_syspm_4_0 Migration Guide: Moving to SysPm v4.0 1491 * 1492 * This section provides a guideline to migrate from v2.21 to v4.0 of the SysPm 1493 * driver. 1494 * 1495 * \subsubsection group_syspm_migration_into_4_0_intro Introduction 1496 * 1497 * If your application currently uses SysPm v2.21 APIs, you must 1498 * migrate to SysPm v4.0 so that your application continues to operate. 1499 * 1500 * Take a few minutes to review the following information: 1501 * - The APIs related to PSoC 6 \ref group_syspm_power_modes are changed. Old 1502 * power modes APIs function names are now deprecated and should not be used 1503 * in new applications. 1504 * - The \ref group_syspm_cb mechanism is changed. The mode element is removed 1505 * from cy_stc_syspm_callback_params_t structure. Now this element is a 1506 * separate parameter in the callback function. 1507 * 1508 * \subsubsection group_syspm_migration_into_4_0_names Migrating to new power modes APIs. 1509 * The table below shows the new APIs names that should be used in the 1510 * application instead of old names: 1511 * 1512 * <table class="doxtable"> 1513 * <tr><th>SysPm v2.21 API name</th><th>SysPm v4.0 API name</th><th>Comment</th></tr> 1514 * <tr> 1515 * <td>Cy_SysPm_Sleep</td> 1516 * <td>\ref Cy_SysPm_CpuEnterSleep</td> 1517 * <td>Renamed, no functional changes</td> 1518 * </tr> 1519 * <tr> 1520 * <td>Cy_SysPm_DeepSleep</td> 1521 * <td>\ref Cy_SysPm_CpuEnterDeepSleep</td> 1522 * <td>Renamed, no functional changes</td> 1523 * </tr> 1524 * <tr> 1525 * <td>Cy_SysPm_Hibernate</td> 1526 * <td>\ref Cy_SysPm_SystemEnterHibernate</td> 1527 * <td>Renamed, no functional changes</td> 1528 * </tr> 1529 * <tr> 1530 * <td>Cy_SysPm_SleepOnExit</td> 1531 * <td>\ref Cy_SysPm_CpuSleepOnExit</td> 1532 * <td>Renamed, no functional changes</td> 1533 * </tr> 1534 * <tr> 1535 * <td>Cy_SysPm_IsLowPower</td> 1536 * <td>\ref Cy_SysPm_IsSystemUlp</td> 1537 * <td>Now this function checks whether the device is in ULP mode</td> 1538 * </tr> 1539 * <tr> 1540 * <td>Cy_SysPm_EnterLowPowerMode</td> 1541 * <td>\ref Cy_SysPm_SystemSetMinRegulatorCurrent</td> 1542 * <td>The low power active mode does not exist anymore. 1543 * The \ref group_syspm_system_reg_curr_mode is implemented instead </td> 1544 * </tr> 1545 * <tr> 1546 * <td>Cy_SysPm_ExitLowPowerMode</td> 1547 * <td>\ref Cy_SysPm_SystemSetNormalRegulatorCurrent</td> 1548 * <td>The low power active mode does not exist anymore. 1549 * The \ref group_syspm_system_reg_curr_mode is implemented instead</td> 1550 * </tr> 1551 * <tr> 1552 * <td>Cy_SysPm_Cm4IsLowPower</td> 1553 * <td>Removed</td> 1554 * <td>This function is removed because low power mode is related to the system 1555 * and not to the CPU</td> 1556 * </tr> 1557 * <tr> 1558 * <td>Cy_SysPm_Cm0IsLowPower</td> 1559 * <td>Removed</td> 1560 * <td>This function is removed because low power mode is related to the system 1561 * and not to the CPU</td> 1562 * </tr> 1563 * <tr> 1564 * <td>Cy_SysPm_IoFreeze</td> 1565 * <td>Removed</td> 1566 * <td>This function is removed because there are no known use cases to 1567 * freeze in power modes other than Hibernate</td> 1568 * </tr> 1569 * </table> 1570 * 1571 * In addition to renamed power modes APIs, the following defines and enum 1572 * elements names are changed: 1573 * <table class="doxtable"> 1574 * <tr><th>SysPm v2.21 defines</th><th>SysPm v4.0 defines</th><th>Comment</th></tr> 1575 * <tr> 1576 * <td>CY_SYSPM_ENTER_LP_MODE</td> 1577 * <td>CY_SYSPM_ULP</td> 1578 * <td>The \ref cy_en_syspm_callback_type_t element is renamed to align 1579 * callback types names to new power modes names</td> 1580 * </tr> 1581 * <tr> 1582 * <td>CY_SYSPM_EXIT_LP_MODE</td> 1583 * <td>CY_SYSPM_LP</td> 1584 * <td>The \ref cy_en_syspm_callback_type_t element is renamed to align 1585 * callback types names to new power modes names</td> 1586 * <tr> 1587 * <td>CY_SYSPM_STATUS_SYSTEM_LOWPOWER</td> 1588 * <td>CY_SYSPM_STATUS_SYSTEM_ULP</td> 1589 * <td>Status define, renamed to align new power modes names 1590 * and abbreviations</td> 1591 * </tr> 1592 * </table> 1593 * 1594 * \subsubsection group_syspm_migration_into_4_0_callbacks Migrating to SysPm v4.0 callbacks 1595 * 1596 * Review this section if your application is using the syspm callback mechanism. 1597 * 1598 * To migrate to SysPm v4.0 callbacks you need to perform the following steps: 1599 * -# Remove mode element from all \ref cy_stc_syspm_callback_params_t 1600 * structures defined in your application. In SysPm v2.21 this structure is: 1601 * \code{.c} 1602 * cy_stc_syspm_callback_params_t deepSleepParam1 = 1603 * { 1604 * CY_SYSPM_CHECK_READY, 1605 * &HW1_address, 1606 * &context 1607 * }; 1608 * \endcode 1609 * 1610 * In SysPm v4.0 this structure should be: 1611 * \code{.c} 1612 * cy_stc_syspm_callback_params_t deepSleepParam1 = 1613 * { 1614 * &HW1_address, 1615 * &context 1616 * }; 1617 * \endcode 1618 * -# Update all defined syspm callback function prototypes to have two 1619 * parameters instead of one. The SysPm v2.21 callback function prototype is: 1620 * \code{.c} 1621 * cy_en_syspm_status_t Func1 (cy_stc_syspm_callback_params_t *callbackParams); 1622 * \endcode 1623 * The SysPm v4.0 callback function prototype should be: 1624 * \code{.c} 1625 * cy_en_syspm_status_t Func1 (cy_stc_syspm_callback_params_t *callbackParams, cy_en_syspm_callback_mode_t mode); 1626 * \endcode 1627 * -# Change the syspm callback function implementation to not use a mode 1628 * value as an element of the callbackParams structure, but, as separate 1629 * function parameter: 1630 * SysPm v2.21 callback function implementation: 1631 * \code{.c} 1632 * cy_en_syspm_status_t Func1(cy_stc_syspm_callback_params_t *callbackParams) 1633 * { 1634 * cy_en_syspm_status_t retVal = CY_SYSPM_FAIL; 1635 * 1636 * switch(callbackParams->mode) 1637 * { 1638 * case CY_SYSPM_CHECK_READY: 1639 * ... 1640 * } 1641 * 1642 * return (retVal); 1643 * } 1644 * \endcode 1645 * SysPm v4.0 callback function implementation: 1646 * \code{.c} 1647 * cy_en_syspm_status_t Func1(cy_stc_syspm_callback_params_t *callbackParams, cy_en_syspm_callback_mode_t mode) 1648 * { 1649 * cy_en_syspm_status_t retVal = CY_SYSPM_FAIL; 1650 * 1651 * switch(mode) 1652 * { 1653 * case CY_SYSPM_CHECK_READY: 1654 * ... 1655 * } 1656 * 1657 * return (retVal); 1658 * } 1659 * \endcode 1660 * After the changes above are done, you have successfully migrated to SysPm v4.0. 1661 * 1662 * Do not forget to review newly added functionality for SysPm v4.0 in the 1663 * \ref group_syspm_changelog. 1664 1665 * \defgroup group_syspm_macros Macros 1666 * \defgroup group_syspm_functions Functions 1667 * \{ 1668 \defgroup group_syspm_functions_general General 1669 * \defgroup group_syspm_functions_power Power Modes 1670 * \defgroup group_syspm_functions_power_status Power Status 1671 * \defgroup group_syspm_functions_iofreeze I/Os Freeze 1672 * \defgroup group_syspm_functions_core_regulators Core Voltage Regulation 1673 * \{ 1674 * \defgroup group_syspm_functions_ldo LDO 1675 * \defgroup group_syspm_functions_buck Buck 1676 * \} 1677 * \defgroup group_syspm_functions_pmic PMIC 1678 * \defgroup group_syspm_functions_backup Backup Domain 1679 * \defgroup group_syspm_functions_callback Low Power Callbacks 1680 * \defgroup group_syspm_functions_linearreg Linear Regulator 1681 * \defgroup group_syspm_functions_reghc REGHC (High Current Regulator) 1682 * \defgroup group_syspm_functions_ovd OVD 1683 * \defgroup group_syspm_functions_bod BOD 1684 * \} 1685 * \defgroup group_syspm_data_structures Data Structures 1686 * \defgroup group_syspm_data_enumerates Enumerated Types 1687 */ 1688 1689 #if !defined (CY_SYSPM_H) 1690 #define CY_SYSPM_H 1691 1692 #include "cy_device.h" 1693 1694 #if defined (CY_IP_MXS28SRSS) || defined (CY_IP_MXS40SRSS) || defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS22SRSS) 1695 1696 #include <stdbool.h> 1697 #include <stddef.h> 1698 1699 #include "cy_device.h" 1700 #include "cy_device_headers.h" 1701 #include "cy_syslib.h" 1702 1703 #if ((CY_CPU_CORTEX_M4) && (defined (CY_DEVICE_SECURE))) 1704 #include "cy_pra.h" 1705 #endif /* #if ((CY_CPU_CORTEX_M4) && (defined (CY_DEVICE_SECURE))) */ 1706 1707 #ifdef __cplusplus 1708 extern "C" { 1709 #endif 1710 1711 /******************************************************************************* 1712 * Register Constants 1713 *******************************************************************************/ 1714 1715 /** 1716 * \addtogroup group_syspm_macros 1717 * \{ 1718 */ 1719 1720 /** Driver major version */ 1721 #define CY_SYSPM_DRV_VERSION_MAJOR 5 1722 1723 /** Driver minor version */ 1724 #define CY_SYSPM_DRV_VERSION_MINOR 150 1725 1726 /** SysPm driver identifier */ 1727 #define CY_SYSPM_ID (CY_PDL_DRV_ID(0x10U)) 1728 1729 1730 /******************************************************************************* 1731 * Internal Defines 1732 *******************************************************************************/ 1733 1734 /** \cond INTERNAL */ 1735 1736 1737 /* Macro to validate parameters in Cy_SysPm_SetHibernateWakeupSource() and for Cy_SysPm_ClearHibernateWakeupSource() function */ 1738 #define CY_SYSPM_IS_WAKE_UP_SOURCE_VALID(wakeupSource) (0UL == ((wakeupSource) & \ 1739 ((uint32_t) ~(CY_SYSPM_HIB_WAKEUP_SOURCE_MASK)))) 1740 1741 1742 #if defined (CY_IP_MXS40SRSS) || (defined (CY_IP_MXS40SSRSS) && (SRSS_BACKUP_VBCK_PRESENT == 1UL)) 1743 /** 1744 * \note 1745 * This macro is available for CAT1A and CAT1B(PSoC C3) devices. 1746 **/ 1747 1748 /* Macro to validate parameters in Cy_SysPm_PmicDisable() function */ 1749 #define CY_SYSPM_IS_POLARITY_VALID(polarity) (((polarity) == CY_SYSPM_PMIC_POLARITY_LOW) || \ 1750 ((polarity) == CY_SYSPM_PMIC_POLARITY_HIGH)) 1751 1752 #if (defined (CY_IP_MXS40SSRSS) && (SRSS_BACKUP_VBCK_PRESENT == 1UL)) 1753 /* Macro to validate parameters in Cy_SysPm_LdoSetVoltage() function */ 1754 #define CY_SYSPM_IS_LDO_VOLTAGE_VALID(voltage) (((voltage) == CY_SYSPM_LDO_VOLTAGE_0_9V) || \ 1755 ((voltage) == CY_SYSPM_LDO_VOLTAGE_1_0V) || \ 1756 ((voltage) == CY_SYSPM_LDO_VOLTAGE_1_1V) || \ 1757 ((voltage) == CY_SYSPM_LDO_VOLTAGE_1_2V)) 1758 1759 #else 1760 /* Macro to validate parameters in Cy_SysPm_BuckSetVoltage1() function */ 1761 #define CY_SYSPM_IS_BUCK_VOLTAGE1_VALID(voltage) (((voltage) == CY_SYSPM_BUCK_OUT1_VOLTAGE_0_9V) || \ 1762 ((voltage) == CY_SYSPM_BUCK_OUT1_VOLTAGE_1_1V)) 1763 1764 /* Macro to validate parameters in Cy_SysPm_BuckSetVoltage2() function */ 1765 #define CY_SYSPM_IS_BUCK_VOLTAGE2_VALID(voltage) (((voltage) == CY_SYSPM_BUCK_OUT2_VOLTAGE_1_15V) || \ 1766 ((voltage) == CY_SYSPM_BUCK_OUT2_VOLTAGE_1_2V) || \ 1767 ((voltage) == CY_SYSPM_BUCK_OUT2_VOLTAGE_1_25V) || \ 1768 ((voltage) == CY_SYSPM_BUCK_OUT2_VOLTAGE_1_3V) || \ 1769 ((voltage) == CY_SYSPM_BUCK_OUT2_VOLTAGE_1_35V) || \ 1770 ((voltage) == CY_SYSPM_BUCK_OUT2_VOLTAGE_1_4V) || \ 1771 ((voltage) == CY_SYSPM_BUCK_OUT2_VOLTAGE_1_45V) || \ 1772 ((voltage) == CY_SYSPM_BUCK_OUT2_VOLTAGE_1_5V)) 1773 1774 /* Macro to validate parameters in Cy_SysPm_BuckIsOutputEnabled() function */ 1775 #define CY_SYSPM_IS_BUCK_OUTPUT_VALID(output) (((output) == CY_SYSPM_BUCK_VBUCK_1) || \ 1776 ((output) == CY_SYSPM_BUCK_VRF)) 1777 1778 /* Macro to validate parameters in Cy_SysPm_LdoSetVoltage() function */ 1779 #define CY_SYSPM_IS_LDO_VOLTAGE_VALID(voltage) (((voltage) == CY_SYSPM_LDO_VOLTAGE_0_9V) || \ 1780 ((voltage) == CY_SYSPM_LDO_VOLTAGE_1_1V)) 1781 1782 #endif 1783 1784 #endif 1785 1786 /* Macro to validate parameters in Cy_SysPm_ExecuteCallback() function */ 1787 #if defined (CY_IP_MXS40SRSS) 1788 #if (CY_IP_MXS40SRSS_VERSION < 2) 1789 1790 /** 1791 * \note 1792 * This macro is available for CAT1A devices. 1793 **/ 1794 #define CY_SYSPM_IS_CALLBACK_TYPE_VALID(type) (((type) == CY_SYSPM_SLEEP) || \ 1795 ((type) == CY_SYSPM_DEEPSLEEP) || \ 1796 ((type) == CY_SYSPM_HIBERNATE) || \ 1797 ((type) == CY_SYSPM_ULP) || \ 1798 ((type) == CY_SYSPM_LP)) 1799 #endif /* (CY_IP_MXS40SRSS_VERSION < 2) */ 1800 1801 #if (CY_IP_MXS40SRSS_VERSION >= 2) 1802 1803 /* Macro to validate parameters in Cy_SysPm_ExecuteCallback() function */ 1804 /** 1805 * \note 1806 * This macro is available for CAT1C devices. 1807 **/ 1808 #define CY_SYSPM_IS_CALLBACK_TYPE_VALID(type) (((type) == CY_SYSPM_SLEEP) || \ 1809 ((type) == CY_SYSPM_DEEPSLEEP) || \ 1810 ((type) == CY_SYSPM_HIBERNATE) || \ 1811 ((type) == CY_SYSPM_LPACTIVE_ENTER) || \ 1812 ((type) == CY_SYSPM_LPACTIVE_EXIT)) 1813 1814 /* Macro to validate OVD ACTION */ 1815 /** 1816 * \note 1817 * This macro is available for CAT1C devices. 1818 **/ 1819 1820 #define CY_OVD_CHECK_ACTION_CFG(ovdActionSelect) (((ovdActionSelect) == CY_SYSPM_OVD_ACTION_NOTHING) || \ 1821 ((ovdActionSelect) == CY_SYSPM_OVD_ACTION_FAULT) || \ 1822 ((ovdActionSelect) == CY_SYSPM_OVD_ACTION_RESET)) 1823 1824 /* Macro to validate BOD ACTION */ 1825 /** 1826 * \note 1827 * This macro is available for CAT1C devices. 1828 **/ 1829 1830 #define CY_BOD_CHECK_ACTION_CFG(bodActionSelect) (((bodActionSelect) == CY_SYSPM_BOD_ACTION_NOTHING) || \ 1831 ((bodActionSelect) == CY_SYSPM_BOD_ACTION_FAULT) || \ 1832 ((bodActionSelect) == CY_SYSPM_BOD_ACTION_RESET)) 1833 1834 /* Macro to validate SUPPLY ENTITY */ 1835 /** 1836 * \note 1837 * This macro is available for CAT1C devices. 1838 **/ 1839 #define CY_OVD_CHECK_SUPPLY_ENTITY(supplyEntitySelect) (((supplyEntitySelect) == CY_SYSPM_ENTITY_BOD_VDDD) || \ 1840 ((supplyEntitySelect) == CY_SYSPM_ENTITY_BOD_VDDA) || \ 1841 ((supplyEntitySelect) == CY_SYSPM_ENTITY_BOD_VCCD) || \ 1842 ((supplyEntitySelect) == CY_SYSPM_ENTITY_OVD_VDDD) || \ 1843 ((supplyEntitySelect) == CY_SYSPM_ENTITY_OVD_VDDA) || \ 1844 ((supplyEntitySelect) == CY_SYSPM_ENTITY_OVD_VCCD)) 1845 1846 #endif /* (CY_IP_MXS40SRSS_VERSION >= 2) */ 1847 #endif /* defined (CY_IP_MXS40SRSS) */ 1848 1849 #if defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 1850 1851 /** 1852 * \note 1853 * This macro is available for CAT1D devices. 1854 **/ 1855 #define CY_SYSPM_IS_CALLBACK_TYPE_VALID(type) (((type) == CY_SYSPM_SLEEP) || \ 1856 ((type) == CY_SYSPM_DEEPSLEEP) || \ 1857 ((type) == CY_SYSPM_DEEPSLEEP_RAM) || \ 1858 ((type) == CY_SYSPM_DEEPSLEEP_OFF) || \ 1859 ((type) == CY_SYSPM_LP) || \ 1860 ((type) == CY_SYSPM_ULP) || \ 1861 ((type) == CY_SYSPM_HP) || \ 1862 ((type) == CY_SYSPM_HIBERNATE)) 1863 1864 /* Macro to validate parameters in Cy_SysPm_CoreBuckSetVoltage() & Cy_SysPm_CoreBuckConfig functions */ 1865 #define CY_SYSPM_IS_CORE_BUCK_VOLTAGE_VALID(voltage) (((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_58V) || \ 1866 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_60V) || \ 1867 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_62V) || \ 1868 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_64V) || \ 1869 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_66V) || \ 1870 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_68V) || \ 1871 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_70V) || \ 1872 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_72V) || \ 1873 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_74V) || \ 1874 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_76V) || \ 1875 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_78V) || \ 1876 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_80V) || \ 1877 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_82V) || \ 1878 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_84V) || \ 1879 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_86V) || \ 1880 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_88V) || \ 1881 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_90V) || \ 1882 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_92V) || \ 1883 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_94V) || \ 1884 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_96V) || \ 1885 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_98V) || \ 1886 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_00V) || \ 1887 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_02V) || \ 1888 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_04V) || \ 1889 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_06V) || \ 1890 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_08V) || \ 1891 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_10V) || \ 1892 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_12V) || \ 1893 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_14V) || \ 1894 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_16V) || \ 1895 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_18V) || \ 1896 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_20V)) 1897 1898 /* Macro to validate core buck profile in Cy_SysPm_CoreBuckSetProfile() function */ 1899 #define CY_SYSPM_IS_CORE_BUCK_PROFILE_VALID(mode) (((mode) == CY_SYSPM_CORE_BUCK_PROFILE_HP) || \ 1900 ((mode) == CY_SYSPM_CORE_BUCK_PROFILE_LP) || \ 1901 ((mode) == CY_SYSPM_CORE_BUCK_PROFILE_SKIP) || \ 1902 ((mode) == CY_SYSPM_CORE_BUCK_PROFILE_ULP)) 1903 1904 /* Macro to validate parameters in Cy_SysPm_RetLdoConfigure() */ 1905 #define CY_SYSPM_IS_RETLDO_VOLTAGE_VALID(voltage) (((voltage) <= CY_SYSPM_RETLDO_VOLTAGE_LVL_31)) 1906 1907 /* Macro to validate parameters in Cy_SysPm_RetLdoConfigure() */ 1908 #define CY_SYSPM_IS_RETLDO_GAIN_VALID(voltage) (((voltage) == CY_SYSPM_RETLDO_GAIN_2) || \ 1909 ((voltage) == CY_SYSPM_RETLDO_GAIN_2_47)) 1910 1911 /* Macro to validate parameters in Cy_SysPm_SramLdoConfigure() */ 1912 #define CY_SYSPM_IS_SRAMLDO_VOLTAGE_VALID(voltage) (((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_58V) || \ 1913 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_60V) || \ 1914 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_62V) || \ 1915 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_64V) || \ 1916 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_66V) || \ 1917 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_68V) || \ 1918 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_70V) || \ 1919 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_72V) || \ 1920 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_74V) || \ 1921 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_76V) || \ 1922 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_78V) || \ 1923 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_80V) || \ 1924 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_82V) || \ 1925 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_84V) || \ 1926 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_86V) || \ 1927 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_88V) || \ 1928 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_90V) || \ 1929 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_92V) || \ 1930 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_94V) || \ 1931 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_96V) || \ 1932 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_0_98V) || \ 1933 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_1_00V) || \ 1934 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_1_02V) || \ 1935 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_1_04V) || \ 1936 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_1_06V) || \ 1937 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_1_08V) || \ 1938 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_1_10V) || \ 1939 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_1_12V) || \ 1940 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_1_14V) || \ 1941 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_1_16V) || \ 1942 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_1_18V) || \ 1943 ((voltage) == CY_SYSPM_SRAMLDO_VOLTAGE_1_20V)) 1944 1945 /* Macro to validate parameters in Cy_SysPm_MiscLdoConfigure() */ 1946 #define CY_SYSPM_IS_MISCLDO_VOLTAGE_VALID(voltage) (((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_58V) || \ 1947 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_60V) || \ 1948 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_62V) || \ 1949 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_64V) || \ 1950 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_66V) || \ 1951 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_68V) || \ 1952 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_70V) || \ 1953 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_72V) || \ 1954 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_74V) || \ 1955 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_76V) || \ 1956 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_78V) || \ 1957 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_80V) || \ 1958 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_82V) || \ 1959 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_84V) || \ 1960 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_86V) || \ 1961 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_88V) || \ 1962 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_90V) || \ 1963 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_92V) || \ 1964 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_94V) || \ 1965 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_96V) || \ 1966 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_0_98V) || \ 1967 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_1_00V) || \ 1968 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_1_02V) || \ 1969 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_1_04V) || \ 1970 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_1_06V) || \ 1971 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_1_08V) || \ 1972 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_1_10V) || \ 1973 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_1_12V) || \ 1974 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_1_14V) || \ 1975 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_1_16V) || \ 1976 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_1_18V) || \ 1977 ((voltage) == CY_SYSPM_MISCLDO_VOLTAGE_1_20V)) 1978 1979 /* Macro to validate parameters in Cy_SysPm_MiscLdoConfigure() */ 1980 #define CY_SYSPM_IS_MISCLDO_MODE_VALID(mode) (((mode) == CY_SYSPM_MISCLDO_VCCACT) || \ 1981 ((mode) == CY_SYSPM_MISCLDO_VOUT)) 1982 1983 1984 /* Macro to validate parameters in Cy_SysPm_MiscLdoConfigure() */ 1985 #define CY_SYSPM_IS_MISCLDO_VCCACT_TRIM_VALID(trim) (((trim) == CY_SYSPM_MISCLDO_VCCACT_TRIM_0) || \ 1986 ((trim) == CY_SYSPM_MISCLDO_VCCACT_TRIM_5) || \ 1987 ((trim) == CY_SYSPM_MISCLDO_VCCACT_TRIM_10) || \ 1988 ((trim) == CY_SYSPM_MISCLDO_VCCACT_TRIM_15) || \ 1989 ((trim) == CY_SYSPM_MISCLDO_VCCACT_TRIM_20) || \ 1990 ((trim) == CY_SYSPM_MISCLDO_VCCACT_TRIM_25) || \ 1991 ((trim) == CY_SYSPM_MISCLDO_VCCACT_TRIM_30) || \ 1992 ((trim) == CY_SYSPM_MISCLDO_VCCACT_TRIM_35) || \ 1993 ((trim) == CY_SYSPM_MISCLDO_VCCACT_TRIM_MINUS_40) || \ 1994 ((trim) == CY_SYSPM_MISCLDO_VCCACT_TRIM_MINUS_35) || \ 1995 ((trim) == CY_SYSPM_MISCLDO_VCCACT_TRIM_MINUS_30) || \ 1996 ((trim) == CY_SYSPM_MISCLDO_VCCACT_TRIM_MINUS_25) || \ 1997 ((trim) == CY_SYSPM_MISCLDO_VCCACT_TRIM_MINUS_20) || \ 1998 ((trim) == CY_SYSPM_MISCLDO_VCCACT_TRIM_MINUS_15) || \ 1999 ((trim) == CY_SYSPM_MISCLDO_VCCACT_TRIM_MINUS_10) || \ 2000 ((trim) == CY_SYSPM_MISCLDO_VCCACT_TRIM_MINUS_5)) 2001 2002 #endif /* defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) */ 2003 2004 #if defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 2005 /** 2006 * \note 2007 * This macro is available for CAT1B and CAT1D devices. 2008 **/ 2009 2010 /* Macro to validate deep sleep modes in Cy_SysPm_CpuEnterDeepSleep() function */ 2011 #define CY_SYSPM_IS_DEEPSLEEP_MODE_VALID(mode) (((mode) == CY_SYSPM_DEEPSLEEP) || \ 2012 ((mode) == CY_SYSPM_DEEPSLEEP_RAM) || \ 2013 ((mode) == CY_SYSPM_DEEPSLEEP_OFF)) 2014 /* Macro to validate parameters in Cy_SysPm_SetupDeepSleepRAM() function */ 2015 #define CY_SYSPM_IS_DSRAM_CHECK_VALID(dsramCheck) (((dsramCheck) == CY_SYSPM_PRE_DSRAM) || \ 2016 ((dsramCheck) == CY_SYSPM_POST_DSRAM)) 2017 2018 /* Macro to validate core buck mode in Cy_SysPm_CoreBuckConfig() function */ 2019 #define CY_SYSPM_IS_CORE_BUCK_MODE_VALID(mode) (((mode) == CY_SYSPM_CORE_BUCK_MODE_LP) || \ 2020 ((mode) == CY_SYSPM_CORE_BUCK_MODE_HP)) 2021 2022 /* Macro to validate SOCMEM SRAM Power modes in Cy_SysPm_SetSOCMemPartitionPwrMode() function */ 2023 #define CY_SYSPM_IS_SOCMEM_PWR_MODE_VALID(mode) (((mode) == CY_SYSPM_SOCMEM_SRAM_ACTIVE_MODE_ON) || \ 2024 ((mode) == CY_SYSPM_SOCMEM_SRAM_ACTIVE_MODE_OFF) || \ 2025 ((mode) == CY_SYSPM_SOCMEM_SRAM_DS_MODE_RET_ON) || \ 2026 ((mode) == CY_SYSPM_SOCMEM_SRAM_DS_MODE_RET_OFF)) 2027 2028 #endif 2029 2030 #if defined (CY_IP_MXS40SSRSS) || defined (CY_DOXYGEN) 2031 /** 2032 * \note 2033 * This macro is available for CAT1B devices. 2034 **/ 2035 #define CY_SYSPM_IS_CALLBACK_TYPE_VALID(type) (((type) == CY_SYSPM_SLEEP) || \ 2036 ((type) == CY_SYSPM_LPACTIVE_ENTER)|| \ 2037 ((type) == CY_SYSPM_LPACTIVE_EXIT) || \ 2038 ((type) == CY_SYSPM_DEEPSLEEP) || \ 2039 ((type) == CY_SYSPM_DEEPSLEEP_RAM) || \ 2040 ((type) == CY_SYSPM_DEEPSLEEP_OFF) || \ 2041 ((type) == CY_SYSPM_HIBERNATE)) 2042 2043 2044 /* Macro to validate parameters in Cy_SysPm_CoreBuckSetVoltage() & Cy_SysPm_CoreBuckConfig functions */ 2045 #define CY_SYSPM_IS_CORE_BUCK_VOLTAGE_VALID(voltage) (((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_76V) || \ 2046 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_78V) || \ 2047 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_80V) || \ 2048 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_82V) || \ 2049 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_84V) || \ 2050 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_86V) || \ 2051 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_88V) || \ 2052 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_90V) || \ 2053 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_92V) || \ 2054 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_94V) || \ 2055 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_96V) || \ 2056 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_0_98V) || \ 2057 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_00V) || \ 2058 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_02V) || \ 2059 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_04V) || \ 2060 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_06V) || \ 2061 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_08V) || \ 2062 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_10V) || \ 2063 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_12V) || \ 2064 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_14V) || \ 2065 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_16V) || \ 2066 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_18V) || \ 2067 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_20V) || \ 2068 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_22V) || \ 2069 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_24V) || \ 2070 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_26V) || \ 2071 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_28V) || \ 2072 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_30V) || \ 2073 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_32V) || \ 2074 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_34V) || \ 2075 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_36V) || \ 2076 ((voltage) == CY_SYSPM_CORE_BUCK_VOLTAGE_1_38V)) 2077 2078 /* Macro to Enable/Disable Pause on Core Buck Regulator */ 2079 #define CY_SYSPM_CORE_BUCK_PAUSE_ENABLE(enable) CY_REG32_CLR_SET(SRSS_PWR_CBUCK_CTL2, SRSS_PWR_CBUCK_CTL2_CBUCK_PAUSE, \ 2080 enable) 2081 2082 /* Macro to Enable/Disable Override on Core Buck Regulator */ 2083 #define CY_SYSPM_CORE_BUCK_OVERRRIDE_ENABLE(enable) CY_REG32_CLR_SET(SRSS_PWR_CBUCK_CTL2, SRSS_PWR_CBUCK_CTL2_CBUCK_OVERRIDE, \ 2084 enable) 2085 2086 /* Macro to Enable/Disable Copy Settings of Core Buck Regulator*/ 2087 #define CY_SYSPM_CORE_BUCK_COPY_SETTINGS_ENABLE(enable) CY_REG32_CLR_SET(SRSS_PWR_CBUCK_CTL2, SRSS_PWR_CBUCK_CTL2_CBUCK_COPY_SETTINGS, \ 2088 enable) 2089 2090 2091 /* Macro to validate core buck Inrush Limit in Cy_SysPm_CoreBuckConfig() function */ 2092 #define CY_SYSPM_IS_CORE_BUCK_INRUSH_LIMIT_VALID(limit) (((limit) == CY_SYSPM_CORE_BUCK_INRUSH_LIMIT_10) || \ 2093 ((limit) == CY_SYSPM_CORE_BUCK_INRUSH_LIMIT_100)) 2094 2095 /* Macro to validate parameters in Cy_SysPm_LdoSdrConfigure() function */ 2096 #define CY_SYSPM_IS_SDR_VOLTAGE_VALID(voltage) (((voltage) == CY_SYSPM_SDR_VOLTAGE_0_900V) || \ 2097 ((voltage) == CY_SYSPM_SDR_VOLTAGE_1_000V) || \ 2098 ((voltage) == CY_SYSPM_SDR_VOLTAGE_1_100V)) 2099 2100 /* Macro to validate parameters in Cy_SysPm_HvLdoConfigure() function */ 2101 #define CY_SYSPM_IS_HVLDO_VOLTAGE_VALID(voltage) (((voltage) == CY_SYSPM_HVLDO_VOLTAGE_1_500V) || \ 2102 ((voltage) == CY_SYSPM_HVLDO_VOLTAGE_1_600V) || \ 2103 ((voltage) == CY_SYSPM_HVLDO_VOLTAGE_1_700V) || \ 2104 ((voltage) == CY_SYSPM_HVLDO_VOLTAGE_1_800V) || \ 2105 ((voltage) == CY_SYSPM_HVLDO_VOLTAGE_1_900V) || \ 2106 ((voltage) == CY_SYSPM_HVLDO_VOLTAGE_2_000V) || \ 2107 ((voltage) == CY_SYSPM_HVLDO_VOLTAGE_2_100V) || \ 2108 ((voltage) == CY_SYSPM_HVLDO_VOLTAGE_2_200V) || \ 2109 ((voltage) == CY_SYSPM_HVLDO_VOLTAGE_2_300V) || \ 2110 ((voltage) == CY_SYSPM_HVLDO_VOLTAGE_2_400V) || \ 2111 ((voltage) == CY_SYSPM_HVLDO_VOLTAGE_2_500V) || \ 2112 ((voltage) == CY_SYSPM_HVLDO_VOLTAGE_2_600V) || \ 2113 ((voltage) == CY_SYSPM_HVLDO_VOLTAGE_2_700V) || \ 2114 ((voltage) == CY_SYSPM_HVLDO_VOLTAGE_2_800V) || \ 2115 ((voltage) == CY_SYSPM_HVLDO_VOLTAGE_2_900V) || \ 2116 ((voltage) == CY_SYSPM_HVLDO_VOLTAGE_3_000V)) 2117 2118 /* Macro to validate if the SDR number in Cy_SysPm_LdoSdrConfigure() function */ 2119 #define CY_SYSPM_IS_SDR_NUM_VALID(num) (((num) == CY_SYSPM_SDR_0) || \ 2120 ((num) == CY_SYSPM_SDR_1)) 2121 2122 /* Macro to validate parameters in RAM/ROM TRIM functions */ 2123 #define CY_SYSPM_IS_SDR_TRIM_VOLTAGE_VALID(voltage) (((voltage) == CY_SYSPM_SDR_VOLTAGE_0_900V) || \ 2124 ((voltage) == CY_SYSPM_SDR_VOLTAGE_1_000V) || \ 2125 ((voltage) == CY_SYSPM_SDR_VOLTAGE_1_100V)) 2126 2127 /** 2128 * \note 2129 * This macro is available for CAT1B devices. 2130 **/ 2131 /* Macro to validate number of Macros supported in SRAM0 */ 2132 2133 #define CY_SYSPM_IS_SRAM0_MACRO_NUM_VALID(macroNum) (((macroNum) == CY_SYSPM_SRAM0_MACRO_0) || \ 2134 ((macroNum) == CY_SYSPM_SRAM0_MACRO_1)) 2135 2136 #endif /* defined (CY_IP_MXS40SSRSS) || defined (CY_DOXYGEN) */ 2137 2138 2139 /* Macro to validate parameters in Cy_SysPm_ExecuteCallback() function */ 2140 2141 #if defined (CY_IP_MXS40SSRSS) 2142 #define CY_SYSPM_IS_CALLBACK_MODE_VALID(mode) (((mode) == CY_SYSPM_CHECK_READY) || \ 2143 ((mode) == CY_SYSPM_CHECK_FAIL) || \ 2144 ((mode) == CY_SYSPM_BEFORE_TRANSITION) || \ 2145 ((mode) == CY_SYSPM_AFTER_TRANSITION) || \ 2146 ((mode) == CY_SYSPM_AFTER_DS_WFI_TRANSITION)) 2147 #else 2148 #define CY_SYSPM_IS_CALLBACK_MODE_VALID(mode) (((mode) == CY_SYSPM_CHECK_READY) || \ 2149 ((mode) == CY_SYSPM_CHECK_FAIL) || \ 2150 ((mode) == CY_SYSPM_BEFORE_TRANSITION) || \ 2151 ((mode) == CY_SYSPM_AFTER_TRANSITION)) 2152 #endif 2153 2154 2155 /* Macro to validate parameters in Cy_SysPm_CpuEnterSleep() and for Cy_SysPm_CpuEnterDeepSleep() function */ 2156 #define CY_SYSPM_IS_WAIT_FOR_VALID(waitFor) (((waitFor) == CY_SYSPM_WAIT_FOR_INTERRUPT) || \ 2157 ((waitFor) == CY_SYSPM_WAIT_FOR_EVENT)) 2158 2159 /* Macro to validate parameters in Cy_SysPm_BackupSetSupply() function */ 2160 #define CY_SYSPM_IS_VDDBACKUP_VALID(vddBackControl) (((vddBackControl) == CY_SYSPM_VDDBACKUP_DEFAULT) || \ 2161 ((vddBackControl) == CY_SYSPM_VDDBACKUP_VBACKUP)) 2162 2163 /* Macro to validate parameters in Cy_SysPm_BackupSuperCapCharge() function */ 2164 #define CY_SYSPM_IS_SC_CHARGE_KEY_VALID(key) (((key) == CY_SYSPM_SC_CHARGE_ENABLE) || \ 2165 ((key) == CY_SYSPM_SC_CHARGE_DISABLE)) 2166 2167 /* Macro to validate parameters in Cy_SysPm_LdoSetMode() function */ 2168 #define CY_SYSPM_IS_LDO_MODE_VALID(key) (((mode) == CY_SYSPM_LDO_MODE_DISABLED) || \ 2169 ((mode) == CY_SYSPM_LDO_MODE_NORMAL) || \ 2170 ((mode) == CY_SYSPM_LDO_MODE_MIN)) 2171 2172 /* Macro to validate parameters in Cy_SysPm_WriteVoltageBitForFlash() function */ 2173 #define CY_SYSPM_IS_BIT_FOR_FLASH_VALID(value) (((value) == CY_SYSPM_FLASH_VOLTAGE_BIT_ULP) || \ 2174 ((value) == CY_SYSPM_FLASH_VOLTAGE_BIT_LP)) 2175 2176 /** The internal define of the SRAM PWR MACRO register key for write operation */ 2177 #define CY_SYSPM_PWR_MACRO_CTL_WRITE_KEY (0x05FAU) 2178 2179 /** The internal define of the unlock value for the PMIC functions */ 2180 #define CY_SYSPM_PMIC_UNLOCK_KEY (0x3AU) 2181 2182 /** The internal define of the first wakeup pin bit used in the 2183 * Cy_SysPm_SetHibernateWakeupSource() function 2184 */ 2185 #define CY_SYSPM_HIB_WAKEUP_PIN0_POS (1UL) 2186 2187 /** The internal define of the second wakeup pin bit 2188 * used in the Cy_SysPm_SetHibernateWakeupSource() function 2189 */ 2190 #define CY_SYSPM_HIB_WAKEUP_PIN1_POS (2UL) 2191 2192 /** 2193 * The internal define of the first LPComparator bit 2194 * used in the Cy_SysPm_SetHibernateWakeupSource() function 2195 */ 2196 #define CY_SYSPM_HIB_WAKEUP_LPCOMP0_POS (4UL) 2197 2198 /** 2199 * The internal define for the second LPComparator bit 2200 * used in the Cy_SysPm_SetHibernateWakeupSource() function 2201 */ 2202 #define CY_SYSPM_HIB_WAKEUP_LPCOMP1_POS (8UL) 2203 2204 #if defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 2205 2206 /** 2207 * The internal define of the first LPComparator value 2208 * used in the Cy_SysPm_SetHibernateWakeupSource() function 2209 */ 2210 #define CY_SYSPM_HIB_WAKEUP_LPCOMP0_MASK (_VAL2FLD(SRSS_PWR_HIB_WAKE_CTL_HIB_WAKE_SRC, CY_SYSPM_HIB_WAKEUP_LPCOMP0_POS)) 2211 2212 /** 2213 * The internal define of the second LPComparator value 2214 * used in the Cy_SysPm_SetHibernateWakeupSource() function 2215 */ 2216 #define CY_SYSPM_HIB_WAKEUP_LPCOMP1_MASK (_VAL2FLD(SRSS_PWR_HIB_WAKE_CTL_HIB_WAKE_SRC, CY_SYSPM_HIB_WAKEUP_LPCOMP1_POS)) 2217 2218 /** 2219 * The internal define of the first wake-up pin value 2220 * used in the Cy_SysPm_SetHibernateWakeupSource() function 2221 */ 2222 #define CY_SYSPM_HIB_WAKEUP_PIN0_MASK (_VAL2FLD(SRSS_PWR_HIB_WAKE_CTL_HIB_WAKE_SRC, CY_SYSPM_HIB_WAKEUP_PIN0_POS)) 2223 2224 /** 2225 * The internal define of the second wake-up pin value used 2226 * in the Cy_SysPm_SetHibernateWakeupSource() function 2227 */ 2228 #define CY_SYSPM_HIB_WAKEUP_PIN1_MASK (_VAL2FLD(SRSS_PWR_HIB_WAKE_CTL_HIB_WAKE_SRC, CY_SYSPM_HIB_WAKEUP_PIN1_POS)) 2229 2230 /** The internal define for the first LPComparator polarity configuration */ 2231 #define CY_SYSPM_HIB_WAKEUP_LPCOMP0_POLARITY_HIGH_MASK \ 2232 (_VAL2FLD(SRSS_PWR_HIB_WAKE_CTL2_HIB_WAKE_SRC, CY_SYSPM_HIB_WAKEUP_LPCOMP0_POS)) 2233 2234 /** The internal define for the second LPComparator polarity configuration */ 2235 #define CY_SYSPM_HIB_WAKEUP_LPCOMP1_POLARITY_HIGH_MASK \ 2236 (_VAL2FLD(SRSS_PWR_HIB_WAKE_CTL2_HIB_WAKE_SRC, CY_SYSPM_HIB_WAKEUP_LPCOMP1_POS)) 2237 2238 /** The internal define for the first wake-up pin polarity configuration */ 2239 #define CY_SYSPM_HIB_WAKEUP_PIN0_POLARITY_HIGH_MASK \ 2240 (_VAL2FLD(SRSS_PWR_HIB_WAKE_CTL2_HIB_WAKE_SRC, CY_SYSPM_HIB_WAKEUP_PIN0_POS)) 2241 2242 /** The internal define for the second wake-up pin polarity configuration */ 2243 #define CY_SYSPM_HIB_WAKEUP_PIN1_POLARITY_HIGH_MASK \ 2244 (_VAL2FLD(SRSS_PWR_HIB_WAKE_CTL2_HIB_WAKE_SRC, CY_SYSPM_HIB_WAKEUP_PIN1_POS)) 2245 2246 /** 2247 * The internal define of the WDT wakeup source 2248 * used in the Cy_SysPm_SetHibernateWakeupSource() function 2249 */ 2250 #define CY_SYSPM_HIB_WAKEUP_WDT_MASK SRSS_PWR_HIB_WAKE_CTL_HIB_WAKE_WDT_Msk 2251 2252 /** 2253 * The internal define of the WDT wakeup source 2254 * used in the Cy_SysPm_SetHibernateWakeupSource() function 2255 */ 2256 #define CY_SYSPM_HIB_WAKEUP_RTC_MASK SRSS_PWR_HIB_WAKE_CTL_HIB_WAKE_RTC_Msk 2257 2258 #else 2259 2260 /** 2261 * The internal define of the first LPComparator value 2262 * used in the Cy_SysPm_SetHibernateWakeupSource() function 2263 */ 2264 #define CY_SYSPM_HIB_WAKEUP_LPCOMP0_MASK (_VAL2FLD(SRSS_PWR_HIBERNATE_MASK_HIBPIN, CY_SYSPM_HIB_WAKEUP_LPCOMP0_POS)) 2265 2266 /** 2267 * The internal define of the second LPComparator value 2268 * used in the Cy_SysPm_SetHibernateWakeupSource() function 2269 */ 2270 #define CY_SYSPM_HIB_WAKEUP_LPCOMP1_MASK (_VAL2FLD(SRSS_PWR_HIBERNATE_MASK_HIBPIN, CY_SYSPM_HIB_WAKEUP_LPCOMP1_POS)) 2271 2272 /** 2273 * The internal define of the first wake-up pin value 2274 * used in the Cy_SysPm_SetHibernateWakeupSource() function 2275 */ 2276 #define CY_SYSPM_HIB_WAKEUP_PIN0_MASK (_VAL2FLD(SRSS_PWR_HIBERNATE_MASK_HIBPIN, CY_SYSPM_HIB_WAKEUP_PIN0_POS)) 2277 2278 /** 2279 * The internal define of the second wake-up pin value used 2280 * in the Cy_SysPm_SetHibernateWakeupSource() function 2281 */ 2282 #define CY_SYSPM_HIB_WAKEUP_PIN1_MASK (_VAL2FLD(SRSS_PWR_HIBERNATE_MASK_HIBPIN, CY_SYSPM_HIB_WAKEUP_PIN1_POS)) 2283 2284 /** The internal define for the first LPComparator polarity configuration */ 2285 #define CY_SYSPM_HIB_WAKEUP_LPCOMP0_POLARITY_HIGH_MASK \ 2286 (_VAL2FLD(SRSS_PWR_HIBERNATE_POLARITY_HIBPIN, CY_SYSPM_HIB_WAKEUP_LPCOMP0_POS)) 2287 2288 /** The internal define for the second LPComparator polarity configuration */ 2289 #define CY_SYSPM_HIB_WAKEUP_LPCOMP1_POLARITY_HIGH_MASK \ 2290 (_VAL2FLD(SRSS_PWR_HIBERNATE_POLARITY_HIBPIN, CY_SYSPM_HIB_WAKEUP_LPCOMP1_POS)) 2291 2292 /** The internal define for the first wake-up pin polarity configuration */ 2293 #define CY_SYSPM_HIB_WAKEUP_PIN0_POLARITY_HIGH_MASK \ 2294 (_VAL2FLD(SRSS_PWR_HIBERNATE_POLARITY_HIBPIN, CY_SYSPM_HIB_WAKEUP_PIN0_POS)) 2295 2296 /** The internal define for the second wake-up pin polarity configuration */ 2297 #define CY_SYSPM_HIB_WAKEUP_PIN1_POLARITY_HIGH_MASK \ 2298 (_VAL2FLD(SRSS_PWR_HIBERNATE_POLARITY_HIBPIN, CY_SYSPM_HIB_WAKEUP_PIN1_POS)) 2299 2300 #endif 2301 2302 #if defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION == 3u) && defined (CY_IP_MXS40SRSS_VERSION_MINOR) && (CY_IP_MXS40SRSS_VERSION_MINOR >= 3u) 2303 /* Internal macro of all possible wakeup sources from hibernate power mode */ 2304 #define CY_SYSPM_HIB_WAKEUP_SOURCE_MASK (SRSS_PWR_HIB_WAKE_CTL_HIB_WAKE_SRC_Msk | SRSS_PWR_HIB_WAKE_CTL_HIB_WAKE_CSV_BAK_Msk |\ 2305 SRSS_PWR_HIB_WAKE_CTL_HIB_WAKE_RTC_Msk | SRSS_PWR_HIB_WAKE_CTL_HIB_WAKE_WDT_Msk) 2306 #else 2307 /* Internal macro of all possible wakeup sources from hibernate power mode */ 2308 #define CY_SYSPM_HIB_WAKEUP_SOURCE_MASK (CY_SYSPM_HIBERNATE_LPCOMP0_LOW | CY_SYSPM_HIBERNATE_LPCOMP0_HIGH |\ 2309 CY_SYSPM_HIBERNATE_LPCOMP1_LOW | CY_SYSPM_HIBERNATE_LPCOMP1_HIGH |\ 2310 CY_SYSPM_HIBERNATE_RTC_ALARM | CY_SYSPM_HIBERNATE_WDT |\ 2311 CY_SYSPM_HIBERNATE_PIN0_LOW | CY_SYSPM_HIBERNATE_PIN0_HIGH |\ 2312 CY_SYSPM_HIBERNATE_PIN1_LOW | CY_SYSPM_HIBERNATE_PIN1_HIGH) 2313 #endif 2314 2315 2316 #if defined (CY_IP_MXS40SSRSS) || (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 2)) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 2317 2318 /** 2319 * \note 2320 * This macro is available for CAT1B & CAT1C devices. 2321 **/ 2322 /* The mask for low power modes the power circuits (POR/BOD, Bandgap 2323 * reference, Reference buffer, Current reference) when active core regulator is 2324 * LDO 2325 */ 2326 #define CY_SYSPM_PWR_CIRCUITS_LPMODE_ACTIVE_LDO_MASK (SRSS_PWR_CTL2_LINREG_LPMODE_Msk | CY_SYSPM_PWR_CIRCUITS_LPMODE_ACTIVE_BUCK_MASK) 2327 2328 /** 2329 * \note 2330 * This macro is available for CAT1B & CAT1C devices. 2331 **/ 2332 /* The mask for low power modes the power circuits (POR/BOD, Bandgap 2333 * reference, Reference buffer, Current reference) when active core regulator is 2334 * Buck 2335 */ 2336 #define CY_SYSPM_PWR_CIRCUITS_LPMODE_ACTIVE_BUCK_MASK (SRSS_PWR_CTL2_PORBOD_LPMODE_Msk |\ 2337 SRSS_PWR_CTL2_REFVBUF_DIS_Msk |\ 2338 SRSS_PWR_CTL2_BGREF_LPMODE_Msk) 2339 2340 /** 2341 * \note 2342 * This macro is available for CAT1B & CAT1C devices. 2343 **/ 2344 /* Macro to validate the word index supported in Backup Domain for Store/Restore */ 2345 #define CY_SYSPM_IS_WORD_INDEX_VALID(index) ((index < CY_SRSS_BACKUP_NUM_BREG) && \ 2346 (index > 0U)) 2347 2348 /** 2349 * \note 2350 * This macro is available for CAT1B & CAT1C devices. 2351 **/ 2352 /* Macro to validate number of words supported in Backup Domain for Store/Restore */ 2353 #define CY_SYSPM_IS_WORD_SIZE_VALID(size) ((size) <= CY_SRSS_BACKUP_NUM_BREG) 2354 2355 #else 2356 /* The mask for low power modes the power circuits (POR/BOD, Bandgap 2357 * reference, Reference buffer, Current reference) when active core regulator is 2358 * LDO 2359 */ 2360 #define CY_SYSPM_PWR_CIRCUITS_LPMODE_ACTIVE_LDO_MASK (SRSS_PWR_CTL_LINREG_LPMODE_Msk | CY_SYSPM_PWR_CIRCUITS_LPMODE_ACTIVE_BUCK_MASK) 2361 2362 /* The mask for low power modes the power circuits (POR/BOD, Bandgap 2363 * reference, Reference buffer, Current reference) when active core regulator is 2364 * Buck 2365 */ 2366 #define CY_SYSPM_PWR_CIRCUITS_LPMODE_ACTIVE_BUCK_MASK (SRSS_PWR_CTL_PORBOD_LPMODE_Msk |\ 2367 SRSS_PWR_CTL_ACT_REF_DIS_Msk |\ 2368 SRSS_PWR_CTL_VREFBUF_LPMODE_Msk |\ 2369 SRSS_PWR_CTL_IREF_LPMODE_Msk) 2370 #endif 2371 /** \endcond */ 2372 2373 /** 2374 * \defgroup group_syspm_return_status The Power Mode Status Defines 2375 * \{ 2376 * Defines for the CPU and system power modes status. 2377 */ 2378 2379 #ifdef CY_IP_M4CPUSS 2380 2381 /** The CM4 is in CPU Active mode */ 2382 #define CY_SYSPM_STATUS_CM4_ACTIVE (0x1U) 2383 2384 /** The CM4 is in CPU Sleep mode */ 2385 #define CY_SYSPM_STATUS_CM4_SLEEP (0x2U) 2386 2387 /** The CM4 is in CPU Deep Sleep mode */ 2388 #define CY_SYSPM_STATUS_CM4_DEEPSLEEP (0x4U) 2389 2390 #endif 2391 2392 #if (__CORTEX_M == 0) || (defined (__CM0P_PRESENT) && (__CM0P_PRESENT == 1)) 2393 2394 2395 /** The CM0p is CPU Active mode */ 2396 #define CY_SYSPM_STATUS_CM0_ACTIVE ((uint32_t) 0x1U << 4U) 2397 2398 /** The CM0p is in CPU Sleep mode */ 2399 #define CY_SYSPM_STATUS_CM0_SLEEP ((uint32_t) 0x2U << 4U) 2400 2401 /** The CM0p is in CPU Deep Sleep mode */ 2402 #define CY_SYSPM_STATUS_CM0_DEEPSLEEP ((uint32_t) 0x4U << 4U) 2403 2404 /** The CM0 is in low power mode, This MACRO is deprecated and will be removed in future release. It will give incorrect value for CAT1C devices. */ 2405 #define CY_SYSPM_STATUS_CM0_LOWPOWER ((uint32_t) 0x88U << 8U) 2406 2407 #endif 2408 2409 2410 #ifdef CY_IP_M7CPUSS 2411 2412 /** The CM7_0 is Active */ 2413 #define CY_SYSPM_STATUS_CM7_0_ACTIVE ((uint32_t) ((uint32_t)0x1U << 8U)) 2414 2415 /** The CM7_0 is in Sleep */ 2416 #define CY_SYSPM_STATUS_CM7_0_SLEEP ((uint32_t) ((uint32_t)0x2U << 8U)) 2417 2418 /** The CM7_0 is in DeepSleep */ 2419 #define CY_SYSPM_STATUS_CM7_0_DEEPSLEEP ((uint32_t) ((uint32_t)0x4U << 8U)) 2420 2421 /** The CM7_0 is Low Power mode. This MACRO is deprecated and will be removed in future release. It will give incorrect value for CAT1C devices. */ 2422 #define CY_SYSPM_STATUS_CM7_0_LOWPOWER ((uint32_t) ((uint32_t)0x80U << 16U)) 2423 2424 /** The define of retained power mode of the CM7_0. This MACRO is deprecated and will be removed in future release. It will give incorrect value for CAT1C devices. */ 2425 #define CY_SYSPM_CM7_0_PWR_CTL_PWR_MODE_RETAINED (2U) 2426 2427 /** The CM7_1 is Active */ 2428 #define CY_SYSPM_STATUS_CM7_1_ACTIVE ((uint32_t) ((uint32_t)0x1U << 12U)) 2429 2430 /** The CM7_1 is in Sleep */ 2431 #define CY_SYSPM_STATUS_CM7_1_SLEEP ((uint32_t) ((uint32_t)0x2U << 12U)) 2432 2433 /** The CM7_1 is in DeepSleep */ 2434 #define CY_SYSPM_STATUS_CM7_1_DEEPSLEEP ((uint32_t) ((uint32_t)0x4U << 12U)) 2435 2436 /** The CM7_1 is Low Power mode. This MACRO is deprecated and will be removed in future release. It will give incorrect value for CAT1C devices. */ 2437 #define CY_SYSPM_STATUS_CM7_1_LOWPOWER ((uint32_t) ((uint32_t)0x80U << 24U)) 2438 2439 /** The define of retained power mode of the CM7_1. This MACRO is deprecated and will be removed in future release. It will give incorrect value for CAT1C devices. */ 2440 #define CY_SYSPM_CM7_1_PWR_CTL_PWR_MODE_RETAINED (2U) 2441 2442 #endif /* CY_IP_M7CPUSS */ 2443 2444 2445 #if defined (CY_IP_MXS22SRSS) 2446 2447 /** The CM33 is Active */ 2448 #define CY_SYSPM_STATUS_CM33_ACTIVE ((uint32_t) ((uint32_t)0x1U << 16U)) 2449 2450 /** The CM33 is in Sleep */ 2451 #define CY_SYSPM_STATUS_CM33_SLEEP ((uint32_t) ((uint32_t)0x2U << 16U)) 2452 2453 /** The CM33 is in DeepSleep */ 2454 #define CY_SYSPM_STATUS_CM33_DEEPSLEEP ((uint32_t) ((uint32_t)0x4U << 16U)) 2455 2456 2457 /** The CM55 is Active */ 2458 #define CY_SYSPM_STATUS_CM55_ACTIVE ((uint32_t) ((uint32_t)0x1U << 20U)) 2459 2460 /** The CM55 is in Sleep */ 2461 #define CY_SYSPM_STATUS_CM55_SLEEP ((uint32_t) ((uint32_t)0x2U << 20U)) 2462 2463 /** The CM55 is in DeepSleep */ 2464 #define CY_SYSPM_STATUS_CM55_DEEPSLEEP ((uint32_t) ((uint32_t)0x4U << 20U)) 2465 2466 #endif /* defined (CY_IP_MXS22SRSS) */ 2467 2468 /** The system is Low Power mode */ 2469 #define CY_SYSPM_STATUS_SYSTEM_LP ((uint32_t) ((uint32_t)0x80U)) 2470 2471 /** The system is in Ultra Low Power mode */ 2472 #define CY_SYSPM_STATUS_SYSTEM_ULP ((uint32_t) ((uint32_t)0x08U << 8U)) 2473 2474 /** The system is LPACTIVE Power mode */ 2475 #define CY_SYSPM_STATUS_SYSTEM_LPACTIVE ((uint32_t) ((uint32_t)0x08UL << 16U)) 2476 2477 #if defined (CY_IP_MXS22SRSS) 2478 /** The system is HP Power mode */ 2479 #define CY_SYSPM_STATUS_SYSTEM_HP ((uint32_t) ((uint32_t)0x08UL << 24U)) 2480 #else 2481 /** The system is Medium Frequency Low Power mode */ 2482 #define CY_SYSPM_STATUS_SYSTEM_MF ((uint32_t) ((uint32_t)0x08UL << 24U)) 2483 #endif 2484 2485 /** The system is OD Low Power mode */ 2486 #define CY_SYSPM_STATUS_SYSTEM_OD ((uint32_t) ((uint32_t)0x08UL << 28U)) 2487 2488 /** The wait time for transition of the device from the Active into 2489 * the LPActive (Low Power Active) 2490 */ 2491 #define CY_SYSPM_ACTIVE_TO_LP_WAIT_US (1u) 2492 2493 /** The wait delay time which occurs before the Active reference is settled. 2494 * This delay is used in transition of the device from Active into the 2495 * LPACTIVE (Low Power Active) mode 2496 */ 2497 #define CY_SYSPM_LP_TO_ACTIVE_WAIT_BEFORE_US (8u) 2498 2499 /** The wait delay time which occurs after the Active reference is settled. 2500 * This delay is used in transition the device from Active into the 2501 * LPACTIVE (Low Power Active) mode 2502 */ 2503 #define CY_SYSPM_LP_TO_ACTIVE_WAIT_AFTER_US (1u) 2504 2505 /** The internal define of the tries number in the Cy_SysPm_ExitLpMode() 2506 * function 2507 */ 2508 #define CY_SYSPM_WAIT_DELAY_TRYES (100u) 2509 2510 /** \} group_syspm_return_status */ 2511 2512 /** \} group_syspm_macros */ 2513 2514 /******************************************************************************* 2515 * Configuration Structures 2516 *******************************************************************************/ 2517 2518 /** 2519 * \addtogroup group_syspm_data_enumerates 2520 * \{ 2521 */ 2522 2523 /** The SysPm function return value status definitions. */ 2524 typedef enum 2525 { 2526 CY_SYSPM_SUCCESS = 0x0U, /**< Successful. */ 2527 CY_SYSPM_BAD_PARAM = CY_SYSPM_ID | CY_PDL_STATUS_ERROR | 0x01U, /**< One or more invalid parameters. */ 2528 CY_SYSPM_TIMEOUT = CY_SYSPM_ID | CY_PDL_STATUS_ERROR | 0x02U, /**< A time-out occurred. */ 2529 CY_SYSPM_INVALID_STATE = CY_SYSPM_ID | CY_PDL_STATUS_ERROR | 0x03U, /**< The operation is not setup or is in an 2530 improper state. */ 2531 CY_SYSPM_CANCELED = CY_SYSPM_ID | CY_PDL_STATUS_ERROR | 0x04U, /**< Operation canceled. */ 2532 CY_SYSPM_SYSCALL_PENDING = CY_SYSPM_ID | CY_PDL_STATUS_ERROR | 0x05U, /**< Canceled due syscall operation pending. */ 2533 CY_SYSPM_FAIL = CY_SYSPM_ID | CY_PDL_STATUS_ERROR | 0xFFU /**< Unknown failure. */ 2534 } cy_en_syspm_status_t; 2535 2536 /** 2537 * This enumeration is used to initialize the functions wait action. The wait actions can be - 2538 * an interrupt or an event. Refer to the CMSIS for WFE and WFI instruction explanations. 2539 */ 2540 typedef enum 2541 { 2542 CY_SYSPM_WAIT_FOR_INTERRUPT, /**< Wait for an interrupt. */ 2543 CY_SYSPM_WAIT_FOR_EVENT /**< Wait for an event. */ 2544 } cy_en_syspm_waitfor_t; 2545 2546 #if defined (CY_IP_MXS40SSRSS) || defined (CY_DOXYGEN) 2547 /** 2548 * This enumeration is used to distinguish between the pre and post checks required during DS-RAM. 2549 */ 2550 /** 2551 * \note 2552 * This enum is available for CAT1B devices. 2553 **/ 2554 2555 typedef enum 2556 { 2557 CY_SYSPM_PRE_DSRAM, /**< Pre DSRAM Checks. */ 2558 CY_SYSPM_POST_DSRAM /**< Post DSRAM Checks. */ 2559 } cy_en_syspm_dsram_checks_t; 2560 #endif 2561 2562 /** This enumeration is used to configure wakeup sources for the System Hibernate 2563 * power mode. 2564 */ 2565 #if defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 2566 /** 2567 * \note 2568 * This macro is available for CAT1B & CAT1D devices. 2569 **/ 2570 2571 typedef enum 2572 { 2573 /** Wake on a low logic level for the LPComp0. */ 2574 CY_SYSPM_HIBERNATE_LPCOMP0_LOW = 0x1U, 2575 2576 /** Wake on a high logic level for the LPComp0. */ 2577 CY_SYSPM_HIBERNATE_LPCOMP0_HIGH = (0x1U << 1), 2578 2579 /** Wake on a low logic level for the LPComp1. */ 2580 CY_SYSPM_HIBERNATE_LPCOMP1_LOW = (0x1U << 2), 2581 2582 /** Wake on a high logic level for the LPComp1. */ 2583 CY_SYSPM_HIBERNATE_LPCOMP1_HIGH = (0x1U << 3), 2584 2585 /** Configure the RTC alarm as wakeup source. */ 2586 CY_SYSPM_HIBERNATE_RTC_ALARM = (0x1U << 4), 2587 2588 /** Configure the WDT interrupt as wakeup source. */ 2589 CY_SYSPM_HIBERNATE_WDT = (0x1U << 5), 2590 2591 /** Configure a low logic level for the first wakeup-pin. See device datasheet for specific pin. */ 2592 CY_SYSPM_HIBERNATE_PIN0_LOW = (0x1U << 6), 2593 2594 /** Configure a high logic level for the first wakeup-pin. See device datasheet for specific pin.*/ 2595 CY_SYSPM_HIBERNATE_PIN0_HIGH = (0x1U << 7), 2596 2597 /** Configure a low logic level for the second wakeup-pin. See device datasheet for specific pin.*/ 2598 CY_SYSPM_HIBERNATE_PIN1_LOW = (0x1U << 8), 2599 2600 /** Configure a high logic level for the second wakeup-pin. See device datasheet for specific pin.*/ 2601 CY_SYSPM_HIBERNATE_PIN1_HIGH = (0x1U << 9) 2602 } cy_en_syspm_hibernate_wakeup_source_t; 2603 #elif defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION == 3u) && defined (CY_IP_MXS40SRSS_VERSION_MINOR) && (CY_IP_MXS40SRSS_VERSION_MINOR >= 3u) 2604 2605 /* SRSSver3p3 hibernate wakeup pins and polarity are in different registers with the same bit offsets. 2606 Use a flag to mark the high polarity enum values which does not overlap any fields in the PWR_HIB_WAKE_CTL register */ 2607 #define CY_SYSPM_HIBERNATE_POLARITY_HIGH_FLAG (1UL << 10U) 2608 2609 #if defined(SRSS_NUM_HIB_WAKE) && (SRSS_NUM_HIB_WAKE > 10U) 2610 #error A maximum of 10 hibernate wakeup pins are supported 2611 #endif 2612 2613 /** 2614 * \note 2615 * This macro is available for CAT1C (TVIIC) devices. 2616 **/ 2617 2618 typedef enum 2619 { 2620 CY_SYSPM_HIBERNATE_NO_SRC = 0UL, 2621 2622 /** Configure CSV_BAK as wakeup source. */ 2623 CY_SYSPM_HIBERNATE_CSV_BAK = (0x1UL << 29), 2624 2625 /** Configure the RTC alarm as wakeup source. */ 2626 CY_SYSPM_HIBERNATE_RTC_ALARM = (0x1UL << 30), 2627 2628 /** Configure the WDT interrupt as wakeup source. */ 2629 CY_SYSPM_HIBERNATE_WDT = ((int32_t)(0x1UL << 31)), 2630 2631 /** Configure a low logic level for the first wakeup-pin. See device datasheet for specific pin. */ 2632 CY_SYSPM_HIBERNATE_PIN0_LOW = (0x1UL << 0), 2633 2634 /** Configure a high logic level for the first wakeup-pin. See device datasheet for specific pin.*/ 2635 CY_SYSPM_HIBERNATE_PIN0_HIGH = (0x1UL << 0) | (CY_SYSPM_HIBERNATE_POLARITY_HIGH_FLAG << 0), 2636 2637 /** Configure a low logic level for the second wakeup-pin. See device datasheet for specific pin.*/ 2638 CY_SYSPM_HIBERNATE_PIN1_LOW = (0x1U << 1), 2639 2640 /** Configure a high logic level for the second wakeup-pin. See device datasheet for specific pin.*/ 2641 CY_SYSPM_HIBERNATE_PIN1_HIGH = (0x1U << 1) | (CY_SYSPM_HIBERNATE_POLARITY_HIGH_FLAG << 1), 2642 2643 /** Configure a low logic level for the third wakeup-pin. See device datasheet for specific pin.*/ 2644 CY_SYSPM_HIBERNATE_PIN2_LOW = (0x1U << 2), 2645 2646 /** Configure a high logic level for the third wakeup-pin. See device datasheet for specific pin.*/ 2647 CY_SYSPM_HIBERNATE_PIN2_HIGH = (0x1U << 2) | (CY_SYSPM_HIBERNATE_POLARITY_HIGH_FLAG << 2), 2648 2649 /** Configure a low logic level for the fourth wakeup-pin. See device datasheet for specific pin.*/ 2650 CY_SYSPM_HIBERNATE_PIN3_LOW = (0x1U << 3), 2651 2652 /** Configure a high logic level for the fourth wakeup-pin. See device datasheet for specific pin.*/ 2653 CY_SYSPM_HIBERNATE_PIN3_HIGH = (0x1U << 3) | (CY_SYSPM_HIBERNATE_POLARITY_HIGH_FLAG << 3), 2654 2655 /** Configure a low logic level for the fifth wakeup-pin. See device datasheet for specific pin.*/ 2656 CY_SYSPM_HIBERNATE_PIN4_LOW = (0x1U << 4), 2657 2658 /** Configure a high logic level for the fifth wakeup-pin. See device datasheet for specific pin.*/ 2659 CY_SYSPM_HIBERNATE_PIN4_HIGH = (0x1U << 4) | (CY_SYSPM_HIBERNATE_POLARITY_HIGH_FLAG << 4), 2660 2661 /** Configure a low logic level for the sixth wakeup-pin. See device datasheet for specific pin.*/ 2662 CY_SYSPM_HIBERNATE_PIN5_LOW = (0x1U << 5), 2663 2664 /** Configure a high logic level for the sixth wakeup-pin. See device datasheet for specific pin.*/ 2665 CY_SYSPM_HIBERNATE_PIN5_HIGH = (0x1U << 5) | (CY_SYSPM_HIBERNATE_POLARITY_HIGH_FLAG << 5), 2666 2667 /** Configure a low logic level for the seventh wakeup-pin. See device datasheet for specific pin.*/ 2668 CY_SYSPM_HIBERNATE_PIN6_LOW = (0x1U << 6), 2669 2670 /** Configure a high logic level for the seventh wakeup-pin. See device datasheet for specific pin.*/ 2671 CY_SYSPM_HIBERNATE_PIN6_HIGH = (0x1U << 6) | (CY_SYSPM_HIBERNATE_POLARITY_HIGH_FLAG << 6), 2672 2673 /** Configure a low logic level for the eighth wakeup-pin. See device datasheet for specific pin.*/ 2674 CY_SYSPM_HIBERNATE_PIN7_LOW = (0x1U << 7), 2675 2676 /** Configure a high logic level for the eighth wakeup-pin. See device datasheet for specific pin.*/ 2677 CY_SYSPM_HIBERNATE_PIN7_HIGH = (0x1U << 7) | (CY_SYSPM_HIBERNATE_POLARITY_HIGH_FLAG << 7), 2678 2679 /** Configure a low logic level for the ninth wakeup-pin. See device datasheet for specific pin.*/ 2680 CY_SYSPM_HIBERNATE_PIN8_LOW = (0x1U << 8), 2681 2682 /** Configure a high logic level for the ninth wakeup-pin. See device datasheet for specific pin.*/ 2683 CY_SYSPM_HIBERNATE_PIN8_HIGH = (0x1U << 8) | (CY_SYSPM_HIBERNATE_POLARITY_HIGH_FLAG << 8), 2684 2685 /** Configure a low logic level for the tenth wakeup-pin. See device datasheet for specific pin.*/ 2686 CY_SYSPM_HIBERNATE_PIN9_LOW = (0x1U << 9), 2687 2688 /** Configure a high logic level for the tenth wakeup-pin. See device datasheet for specific pin.*/ 2689 CY_SYSPM_HIBERNATE_PIN9_HIGH = (0x1U << 9) | (CY_SYSPM_HIBERNATE_POLARITY_HIGH_FLAG << 9) 2690 2691 } cy_en_syspm_hibernate_wakeup_source_t; 2692 #else 2693 /** 2694 * \note 2695 * This macro is available for CAT1A and CAT1B devices. 2696 **/ 2697 typedef enum 2698 { 2699 /** Wake on a low logic level for the LPComp0. */ 2700 CY_SYSPM_HIBERNATE_LPCOMP0_LOW = CY_SYSPM_HIB_WAKEUP_LPCOMP0_MASK, 2701 2702 /** Wake on a high logic level for the LPComp0. */ 2703 CY_SYSPM_HIBERNATE_LPCOMP0_HIGH = CY_SYSPM_HIB_WAKEUP_LPCOMP0_MASK | CY_SYSPM_HIB_WAKEUP_LPCOMP0_POLARITY_HIGH_MASK, 2704 2705 /** Wake on a low logic level for the LPComp1. */ 2706 CY_SYSPM_HIBERNATE_LPCOMP1_LOW = CY_SYSPM_HIB_WAKEUP_LPCOMP1_MASK, 2707 2708 /** Wake on a high logic level for the LPComp1. */ 2709 CY_SYSPM_HIBERNATE_LPCOMP1_HIGH = CY_SYSPM_HIB_WAKEUP_LPCOMP1_MASK | CY_SYSPM_HIB_WAKEUP_LPCOMP1_POLARITY_HIGH_MASK, 2710 2711 /** Configure the RTC alarm as wakeup source. */ 2712 CY_SYSPM_HIBERNATE_RTC_ALARM = SRSS_PWR_HIBERNATE_MASK_HIBALARM_Msk, 2713 2714 /** Configure the WDT interrupt as wakeup source. */ 2715 CY_SYSPM_HIBERNATE_WDT = SRSS_PWR_HIBERNATE_MASK_HIBWDT_Msk, 2716 2717 /** Configure a low logic level for the first wakeup-pin. See device datasheet for specific pin. */ 2718 CY_SYSPM_HIBERNATE_PIN0_LOW = CY_SYSPM_HIB_WAKEUP_PIN0_MASK, 2719 2720 /** Configure a high logic level for the first wakeup-pin. See device datasheet for specific pin.*/ 2721 CY_SYSPM_HIBERNATE_PIN0_HIGH = CY_SYSPM_HIB_WAKEUP_PIN0_MASK | CY_SYSPM_HIB_WAKEUP_PIN0_POLARITY_HIGH_MASK, 2722 2723 /** Configure a low logic level for the second wakeup-pin. See device datasheet for specific pin.*/ 2724 CY_SYSPM_HIBERNATE_PIN1_LOW = CY_SYSPM_HIB_WAKEUP_PIN1_MASK, 2725 2726 /** Configure a high logic level for the second wakeup-pin. See device datasheet for specific pin.*/ 2727 CY_SYSPM_HIBERNATE_PIN1_HIGH = CY_SYSPM_HIB_WAKEUP_PIN1_MASK | CY_SYSPM_HIB_WAKEUP_PIN1_POLARITY_HIGH_MASK 2728 } cy_en_syspm_hibernate_wakeup_source_t; 2729 #endif 2730 2731 #if defined (CY_IP_MXS40SSRSS) && (CY_MXS40SSRSS_VER_1_2 > 0UL) 2732 /** This enumeration is used to select LDO regulator output voltage. */ 2733 typedef enum 2734 { 2735 CY_SYSPM_LDO_VOLTAGE_ULP = 0U, /**< System ULP nominal LDO voltage. 2736 See device datasheet for specific voltage. */ 2737 CY_SYSPM_LDO_VOLTAGE_LP = 1U, /**< System LP nominal LDO voltage. 2738 See device datasheet for specific voltage. */ 2739 CY_SYSPM_LDO_VOLTAGE_MF = 2U, /**< System MF nominal LDO voltage. 2740 See device datasheet for specific voltage. */ 2741 CY_SYSPM_LDO_VOLTAGE_OD = 3U, /**< System OD nominal LDO voltage. 2742 See device datasheet for specific voltage. */ 2743 CY_SYSPM_LDO_VOLTAGE_0_9V = 0U, /**< 0.9 V nominal LDO voltage */ 2744 CY_SYSPM_LDO_VOLTAGE_1_1V = 1U, /**< 1.1 V nominal LDO voltage */ 2745 CY_SYSPM_LDO_VOLTAGE_1_0V = 2U, /**< 1.0 V nominal LDO voltage */ 2746 CY_SYSPM_LDO_VOLTAGE_1_2V = 3U /**< 1.2 V nominal LDO voltage */ 2747 } cy_en_syspm_ldo_voltage_t; 2748 #else 2749 /** This enumeration is used to select LDO regulator output voltage. */ 2750 typedef enum 2751 { 2752 CY_SYSPM_LDO_VOLTAGE_ULP = 0U, /**< System ULP nominal LDO voltage. 2753 See device datasheet for specific voltage. */ 2754 CY_SYSPM_LDO_VOLTAGE_LP = 1U, /**< System LP nominal LDO voltage. 2755 See device datasheet for specific voltage. */ 2756 CY_SYSPM_LDO_VOLTAGE_0_9V = 0U, /**< 0.9 V nominal LDO voltage */ 2757 CY_SYSPM_LDO_VOLTAGE_1_1V = 1U /**< 1.1 V nominal LDO voltage */ 2758 } cy_en_syspm_ldo_voltage_t; 2759 #endif 2760 2761 /** This enumeration is used to select the LDO regulator operating mode. */ 2762 typedef enum 2763 { 2764 CY_SYSPM_LDO_MODE_DISABLED = 0U, /**< Disables the LDO. */ 2765 CY_SYSPM_LDO_MODE_NORMAL = 1U, /**< Sets normal current mode. See device datasheet for 2766 specific maximum current limit. */ 2767 CY_SYSPM_LDO_MODE_MIN = 2U /**< Sets minimum current mode. See device datasheet for 2768 specific current limit. */ 2769 } cy_en_syspm_ldo_mode_t; 2770 2771 /** 2772 * This enumeration is used to select the output voltage for the Buck regulator output 1. 2773 */ 2774 typedef enum 2775 { 2776 CY_SYSPM_BUCK_OUT1_VOLTAGE_ULP = 0x02U, /**< System ULP nominal Buck voltage. 2777 See device datasheet for specific voltage. */ 2778 CY_SYSPM_BUCK_OUT1_VOLTAGE_LP = 0x05U, /**< LP nominal Buck voltage. 2779 See device datasheet for specific voltage. */ 2780 CY_SYSPM_BUCK_OUT1_VOLTAGE_0_9V = 0x02U, /**< 0.9 V nominal Buck voltage */ 2781 CY_SYSPM_BUCK_OUT1_VOLTAGE_1_1V = 0x05U /**< 1.1 V nominal Buck voltage */ 2782 } cy_en_syspm_buck_voltage1_t; 2783 2784 /** This enumeration is used to select the Buck regulator outputs. */ 2785 typedef enum 2786 { 2787 CY_SYSPM_BUCK_VBUCK_1 = 0x0U, /**< Buck output 1 Voltage (Vbuck1). Typically used to 2788 supply the PSoC digital core logic. */ 2789 CY_SYSPM_BUCK_VRF /**< Buck out 2 Voltage (Vbuckrf). Typically used to 2790 supply the BLE radio logic. */ 2791 } cy_en_syspm_buck_out_t; 2792 2793 /** 2794 * This enumeration is used to select the output voltage for the Buck regulator 2795 * output 2, which can source the BLE radio. 2796 */ 2797 typedef enum 2798 { 2799 CY_SYSPM_BUCK_OUT2_VOLTAGE_1_15V = 0U, /**< 1.15 V nominal voltage. */ 2800 CY_SYSPM_BUCK_OUT2_VOLTAGE_1_2V = 1U, /**< 1.20 V nominal voltage. */ 2801 CY_SYSPM_BUCK_OUT2_VOLTAGE_1_25V = 2U, /**< 1.25 V nominal voltage. */ 2802 CY_SYSPM_BUCK_OUT2_VOLTAGE_1_3V = 3U, /**< 1.3 V nominal voltage. */ 2803 CY_SYSPM_BUCK_OUT2_VOLTAGE_1_35V = 4U, /**< 1.35 V nominal voltage. */ 2804 CY_SYSPM_BUCK_OUT2_VOLTAGE_1_4V = 5U, /**< 1.4 V nominal voltage. */ 2805 CY_SYSPM_BUCK_OUT2_VOLTAGE_1_45V = 6U, /**< 1.45 V nominal voltage. */ 2806 CY_SYSPM_BUCK_OUT2_VOLTAGE_1_5V = 7U /**< 1.5 V nominal voltage. */ 2807 } cy_en_syspm_buck_voltage2_t; 2808 2809 /** 2810 * This enumeration is used to set the polarity for the PMIC input. The PMIC output is 2811 * automatically enabled when the configured polarity of the PMIC input and the logic level 2812 * driven to the pmic_wakeup_in pin match. 2813 * 2814 * \warning 2815 * Do not use CY_SYSPM_PMIC_POLARITY_LOW as it is not supported by hardware. 2816 */ 2817 typedef enum 2818 { 2819 CY_SYSPM_PMIC_POLARITY_LOW = 0U, /**< Set active low logic level for the PMIC input. */ 2820 CY_SYSPM_PMIC_POLARITY_HIGH = 1U /**< Set active high logic level for the PMIC input. */ 2821 } cy_en_syspm_pmic_wakeup_polarity_t; 2822 2823 /** This enumeration selects Vbackup or Vddd to supply Vddbackup. */ 2824 typedef enum 2825 { 2826 CY_SYSPM_VDDBACKUP_DEFAULT = 0U, /**< Logic automatically selects Vddd if present or 2827 Vbackup if Vddd is not present to supply Vddbackup */ 2828 CY_SYSPM_VDDBACKUP_VBACKUP = 2U /**< Sets only Vbackup to supply Vddbackup */ 2829 } cy_en_syspm_vddbackup_control_t; 2830 2831 /** This enumeration enables supercapacitor charging. */ 2832 typedef enum 2833 { 2834 CY_SYSPM_SC_CHARGE_ENABLE = 0x3CU, /**< Enables supercapacitor charging */ 2835 CY_SYSPM_SC_CHARGE_DISABLE = 0x00U /**< Disables supercapacitor charging */ 2836 } cy_en_syspm_sc_charge_key_t; 2837 2838 /** This enumeration configures the flash voltage bit for different system power modes. */ 2839 typedef enum 2840 { 2841 CY_SYSPM_FLASH_VOLTAGE_BIT_LP = 0U, /**< Set the flash voltage bit for system LP mode */ 2842 CY_SYSPM_FLASH_VOLTAGE_BIT_ULP = 1U, /**< Set the flash voltage bit for system ULP mode */ 2843 } cy_en_syspm_flash_voltage_bit_t; 2844 2845 /** 2846 * This enumeration is used to select the low power mode for which the 2847 * appropriate registered callback handler will be executed. For example, 2848 * the registered callback of the type CY_SYSPM_SLEEP will be executed while 2849 * switching into the Sleep power mode. 2850 */ 2851 typedef enum 2852 { 2853 CY_SYSPM_SLEEP = 0U, /**< The Sleep enum callback type */ 2854 CY_SYSPM_DEEPSLEEP = 1U, /**< The Deep Sleep enum callback type */ 2855 CY_SYSPM_HIBERNATE = 2U, /**< The Hibernate enum callback type */ 2856 #if (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 2)) || defined (CY_IP_MXS22SRSS) || (defined (CY_IP_MXS40SSRSS) && (CY_MXS40SSRSS_VER_1_2 > 0UL)) ||defined (CY_DOXYGEN) 2857 CY_SYSPM_LP = 3U, /**< The Low Power enum callback type, This Macro is available only for CAT1A, CAT1B(PSoC C3) devices */ 2858 CY_SYSPM_ULP = 4U, /**< The Ultra Low Power enum callback type, This Macro is available only for CAT1A, CAT1B(PSoC C3) devices */ 2859 #endif 2860 #if defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS28SRSS) || (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 2)) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 2861 CY_SYSPM_LPACTIVE_ENTER = 3U, /**< The LPACTIVE (Low Power Active)/LPSLEEP (Low Power Sleep) ENTER enum callback type, This Macro is available only for CAT1B and CAT1D devices */ 2862 CY_SYSPM_LPACTIVE_EXIT = 4U, /**< The LPACTIVE (Low Power Active)/LPSLEEP (Low Power Sleep) EXIT enum callback type, This Macro is available only for CAT1B and CAT1D devices */ 2863 #endif 2864 #if defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS28SRSS) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 2865 CY_SYSPM_DEEPSLEEP_RAM = 5U, /**< The Deep Sleep RAM enum callback type, This Macro is available only for CAT1B and CAT1D devices */ 2866 CY_SYSPM_DEEPSLEEP_OFF = 6U, /**< The Deep Sleep OFF enum callback type, This Macro is available only for CAT1B and CAT1D devices */ 2867 #endif 2868 #if defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 2869 CY_SYSPM_HP = 7U, /**< The High Performance mode enum callback type, This Macro is available only for CAT1D devices */ 2870 #endif 2871 #if defined (CY_IP_MXS40SSRSS) && (CY_MXS40SSRSS_VER_1_2 > 0UL) 2872 CY_SYSPM_MF = 7U, /**< The Medium Frequency mode enum callback type, This Macro is available only for CAT1B(PSoC C3) devices */ 2873 #endif 2874 2875 #if defined (CY_IP_MXS40SSRSS) && (CY_MXS40SSRSS_VER_1_2 > 0UL) 2876 CY_SYSPM_OD = 8U, /**< The Over drive Frequency enum callback type, This Macro is available only for CAT1B(PSoC C3) devices */ 2877 #endif 2878 } cy_en_syspm_callback_type_t; 2879 2880 #if defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS28SRSS) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 2881 /** 2882 * \note 2883 * This enum is available for CAT1B and CAT1D devices. 2884 **/ 2885 /** 2886 * This enumeration is used to list the available deep sleep modes. 2887 */ 2888 typedef enum 2889 { 2890 CY_SYSPM_MODE_DEEPSLEEP = CY_SYSPM_DEEPSLEEP, /**< Deep Sleep Mode. */ 2891 CY_SYSPM_MODE_DEEPSLEEP_RAM = CY_SYSPM_DEEPSLEEP_RAM, /**< Deep Sleep RAM Mode. */ 2892 CY_SYSPM_MODE_DEEPSLEEP_OFF = CY_SYSPM_DEEPSLEEP_OFF, /**< Deep Sleep OFF Mode. */ 2893 CY_SYSPM_MODE_DEEPSLEEP_NONE = CY_SYSPM_SLEEP, /**< Not Deep Sleep Mode. */ 2894 } cy_en_syspm_deep_sleep_mode_t; 2895 2896 /** 2897 * \note 2898 * This enum is available for CAT1B and CAT1D devices. 2899 **/ 2900 /** 2901 * This enumeration is used to list the available wakeup modes after deepsleep. 2902 */ 2903 typedef enum 2904 { 2905 CY_SYSPM_WARM_BOOT_MODE = 0, /**< Warm Boot - After DEEPSLEEP-RAM. */ 2906 CY_SYSPM_COLD_BOOT_MODE = 1, /**< Cold Boot - After DEEPSLEEP-OFF. */ 2907 CY_SYSPM_POR_BOOT_MODE = 2, /**< POR Boot - After POR Wakeup. */ 2908 } cy_en_syspm_boot_mode_t; 2909 2910 /** 2911 * \note 2912 * This enum is available for CAT1B and CAT1D devices. 2913 **/ 2914 /** 2915 * This enumeration is used to select the mode for the 2916 * Core Buck regulator. 2917 */ 2918 typedef enum 2919 { 2920 CY_SYSPM_CORE_BUCK_MODE_LP = 0x01U, /**< Low Power Mode. */ 2921 CY_SYSPM_CORE_BUCK_MODE_HP = 0x11U, /**< High Power Mode(Low Ripple Mode) */ 2922 } cy_en_syspm_core_buck_mode_t; 2923 2924 #if defined (CY_IP_MXS40SSRSS) || defined (CY_DOXYGEN) 2925 /** 2926 * \note 2927 * This enum is available for CAT1B devices. 2928 **/ 2929 /** 2930 * This enumeration is used to select the Inrush limit for the 2931 * Core Buck regulator. 2932 */ 2933 typedef enum 2934 { 2935 CY_SYSPM_CORE_BUCK_INRUSH_LIMIT_10 = 0U, /**< Inrush limit : 10mA. */ 2936 CY_SYSPM_CORE_BUCK_INRUSH_LIMIT_100 = 1U, /**< Inrush limit : 100mA. */ 2937 } cy_en_syspm_core_inrush_limit_t; 2938 #endif /* defined (CY_IP_MXS40SSRSS) || defined (CY_DOXYGEN) */ 2939 2940 2941 #if defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 2942 2943 /** 2944 * \note 2945 * This enum is available for CAT1D devices. 2946 **/ 2947 /** 2948 * This enumeration is used to select the output voltage for the 2949 * Core Buck regulator output. 2950 */ 2951 2952 typedef enum 2953 { 2954 CY_SYSPM_CORE_BUCK_VOLTAGE_0_58V = 0U, /**< 0.58 V nominal voltage. */ 2955 CY_SYSPM_CORE_BUCK_VOLTAGE_0_60V = 1U, /**< 0.60 V nominal voltage. */ 2956 CY_SYSPM_CORE_BUCK_VOLTAGE_0_62V = 2U, /**< 0.62 V nominal voltage. */ 2957 CY_SYSPM_CORE_BUCK_VOLTAGE_0_64V = 3U, /**< 0.64 V nominal voltage. */ 2958 CY_SYSPM_CORE_BUCK_VOLTAGE_0_66V = 4U, /**< 0.66 V nominal voltage. */ 2959 CY_SYSPM_CORE_BUCK_VOLTAGE_0_68V = 5U, /**< 0.68 V nominal voltage. */ 2960 CY_SYSPM_CORE_BUCK_VOLTAGE_0_70V = 6U, /**< 0.70 V nominal voltage. */ 2961 CY_SYSPM_CORE_BUCK_VOLTAGE_0_72V = 7U, /**< 0.72 V nominal voltage. */ 2962 CY_SYSPM_CORE_BUCK_VOLTAGE_0_74V = 8U, /**< 0.74 V nominal voltage. */ 2963 CY_SYSPM_CORE_BUCK_VOLTAGE_0_76V = 9U, /**< 0.76 V nominal voltage. */ 2964 CY_SYSPM_CORE_BUCK_VOLTAGE_0_78V = 10U, /**< 0.78 V nominal voltage. */ 2965 CY_SYSPM_CORE_BUCK_VOLTAGE_0_80V = 11U, /**< 0.80 V nominal voltage. */ 2966 CY_SYSPM_CORE_BUCK_VOLTAGE_0_82V = 12U, /**< 0.82 V nominal voltage. */ 2967 CY_SYSPM_CORE_BUCK_VOLTAGE_0_84V = 13U, /**< 0.84 V nominal voltage. */ 2968 CY_SYSPM_CORE_BUCK_VOLTAGE_0_86V = 14U, /**< 0.86 V nominal voltage. */ 2969 CY_SYSPM_CORE_BUCK_VOLTAGE_0_88V = 15U, /**< 0.88 V nominal voltage. */ 2970 CY_SYSPM_CORE_BUCK_VOLTAGE_0_90V = 16U, /**< 0.90 V nominal voltage. */ 2971 CY_SYSPM_CORE_BUCK_VOLTAGE_0_92V = 17U, /**< 0.92 V nominal voltage. */ 2972 CY_SYSPM_CORE_BUCK_VOLTAGE_0_94V = 18U, /**< 0.94 V nominal voltage. */ 2973 CY_SYSPM_CORE_BUCK_VOLTAGE_0_96V = 19U, /**< 0.96 V nominal voltage. */ 2974 CY_SYSPM_CORE_BUCK_VOLTAGE_0_98V = 20U, /**< 0.98 V nominal voltage. */ 2975 CY_SYSPM_CORE_BUCK_VOLTAGE_1_00V = 21U, /**< 1.00 V nominal voltage. */ 2976 CY_SYSPM_CORE_BUCK_VOLTAGE_1_02V = 22U, /**< 1.02 V nominal voltage. */ 2977 CY_SYSPM_CORE_BUCK_VOLTAGE_1_04V = 23U, /**< 1.04 V nominal voltage. */ 2978 CY_SYSPM_CORE_BUCK_VOLTAGE_1_06V = 24U, /**< 1.06 V nominal voltage. */ 2979 CY_SYSPM_CORE_BUCK_VOLTAGE_1_08V = 25U, /**< 1.08 V nominal voltage. */ 2980 CY_SYSPM_CORE_BUCK_VOLTAGE_1_10V = 26U, /**< 1.10 V nominal voltage. */ 2981 CY_SYSPM_CORE_BUCK_VOLTAGE_1_12V = 27U, /**< 1.12 V nominal voltage. */ 2982 CY_SYSPM_CORE_BUCK_VOLTAGE_1_14V = 28U, /**< 1.14 V nominal voltage. */ 2983 CY_SYSPM_CORE_BUCK_VOLTAGE_1_16V = 29U, /**< 1.16 V nominal voltage. */ 2984 CY_SYSPM_CORE_BUCK_VOLTAGE_1_18V = 30U, /**< 1.18 V nominal voltage. */ 2985 CY_SYSPM_CORE_BUCK_VOLTAGE_1_20V = 31U, /**< 1.20 V nominal voltage. */ 2986 } cy_en_syspm_core_buck_voltage_t; 2987 2988 2989 #else 2990 2991 typedef enum 2992 { 2993 CY_SYSPM_CORE_BUCK_VOLTAGE_0_76V = 0U, /**< 0.76 V nominal voltage. */ 2994 CY_SYSPM_CORE_BUCK_VOLTAGE_0_78V = 1U, /**< 0.78 V nominal voltage. */ 2995 CY_SYSPM_CORE_BUCK_VOLTAGE_0_80V = 2U, /**< 0.80 V nominal voltage. */ 2996 CY_SYSPM_CORE_BUCK_VOLTAGE_0_82V = 3U, /**< 0.82 V nominal voltage. */ 2997 CY_SYSPM_CORE_BUCK_VOLTAGE_0_84V = 4U, /**< 0.84 V nominal voltage. */ 2998 CY_SYSPM_CORE_BUCK_VOLTAGE_0_86V = 5U, /**< 0.86 V nominal voltage. */ 2999 CY_SYSPM_CORE_BUCK_VOLTAGE_0_88V = 6U, /**< 0.88 V nominal voltage. */ 3000 CY_SYSPM_CORE_BUCK_VOLTAGE_0_90V = 7U, /**< 0.90 V nominal voltage. */ 3001 CY_SYSPM_CORE_BUCK_VOLTAGE_0_92V = 8U, /**< 0.92 V nominal voltage. */ 3002 CY_SYSPM_CORE_BUCK_VOLTAGE_0_94V = 9U, /**< 0.94 V nominal voltage. */ 3003 CY_SYSPM_CORE_BUCK_VOLTAGE_0_96V = 10U, /**< 0.96 V nominal voltage. */ 3004 CY_SYSPM_CORE_BUCK_VOLTAGE_0_98V = 11U, /**< 0.98 V nominal voltage. */ 3005 CY_SYSPM_CORE_BUCK_VOLTAGE_1_00V = 12U, /**< 1.00 V nominal voltage. */ 3006 CY_SYSPM_CORE_BUCK_VOLTAGE_1_02V = 13U, /**< 1.02 V nominal voltage. */ 3007 CY_SYSPM_CORE_BUCK_VOLTAGE_1_04V = 14U, /**< 1.04 V nominal voltage. */ 3008 CY_SYSPM_CORE_BUCK_VOLTAGE_1_06V = 15U, /**< 1.06 V nominal voltage. */ 3009 CY_SYSPM_CORE_BUCK_VOLTAGE_1_08V = 16U, /**< 1.08 V nominal voltage. */ 3010 CY_SYSPM_CORE_BUCK_VOLTAGE_1_10V = 17U, /**< 1.10 V nominal voltage. */ 3011 CY_SYSPM_CORE_BUCK_VOLTAGE_1_12V = 18U, /**< 1.12 V nominal voltage. */ 3012 CY_SYSPM_CORE_BUCK_VOLTAGE_1_14V = 19U, /**< 1.14 V nominal voltage. */ 3013 CY_SYSPM_CORE_BUCK_VOLTAGE_1_16V = 20U, /**< 1.16 V nominal voltage. */ 3014 CY_SYSPM_CORE_BUCK_VOLTAGE_1_18V = 21U, /**< 1.18 V nominal voltage. */ 3015 CY_SYSPM_CORE_BUCK_VOLTAGE_1_20V = 22U, /**< 1.20 V nominal voltage. */ 3016 CY_SYSPM_CORE_BUCK_VOLTAGE_1_22V = 23U, /**< 1.22 V nominal voltage. */ 3017 CY_SYSPM_CORE_BUCK_VOLTAGE_1_24V = 24U, /**< 1.24 V nominal voltage. */ 3018 CY_SYSPM_CORE_BUCK_VOLTAGE_1_26V = 25U, /**< 1.26 V nominal voltage. */ 3019 CY_SYSPM_CORE_BUCK_VOLTAGE_1_28V = 26U, /**< 1.28 V nominal voltage. */ 3020 CY_SYSPM_CORE_BUCK_VOLTAGE_1_30V = 27U, /**< 1.30 V nominal voltage. */ 3021 CY_SYSPM_CORE_BUCK_VOLTAGE_1_32V = 28U, /**< 1.32 V nominal voltage. */ 3022 CY_SYSPM_CORE_BUCK_VOLTAGE_1_34V = 29U, /**< 1.34 V nominal voltage. */ 3023 CY_SYSPM_CORE_BUCK_VOLTAGE_1_36V = 30U, /**< 1.36 V nominal voltage. */ 3024 CY_SYSPM_CORE_BUCK_VOLTAGE_1_38V = 31U, /**< 1.38 V nominal voltage. */ 3025 } cy_en_syspm_core_buck_voltage_t; 3026 #endif 3027 3028 #if defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 3029 3030 /** 3031 * \note 3032 * This enum is available only for CAT1D devices. 3033 **/ 3034 /** 3035 * This enumeration is used to select the mode for the 3036 * Core Buck regulator. 3037 */ 3038 typedef enum 3039 { 3040 CY_SYSPM_CORE_BUCK_PROFILE_LP = 0x00U, /**< Mode-0, LP Profile */ 3041 CY_SYSPM_CORE_BUCK_PROFILE_ULP = 0x01U, /**< Mode-1, ULP Profile */ 3042 CY_SYSPM_CORE_BUCK_PROFILE_HP = 0x02U, /**< Mode-2, HP Profile */ 3043 CY_SYSPM_CORE_BUCK_PROFILE_SKIP = 0x11U, /**< Skip CBUCK Profile Usage */ 3044 } cy_en_syspm_core_buck_profile_t; 3045 3046 3047 /** 3048 * \note 3049 * This enum is available for CAT1D devices. 3050 **/ 3051 /** 3052 * This enumeration is used to select the output voltage for the 3053 * SRAMLDO. 3054 */ 3055 3056 typedef enum 3057 { 3058 CY_SYSPM_SRAMLDO_VOLTAGE_0_58V = 0U, /**< 0.58 V nominal voltage. */ 3059 CY_SYSPM_SRAMLDO_VOLTAGE_0_60V = 1U, /**< 0.60 V nominal voltage. */ 3060 CY_SYSPM_SRAMLDO_VOLTAGE_0_62V = 2U, /**< 0.62 V nominal voltage. */ 3061 CY_SYSPM_SRAMLDO_VOLTAGE_0_64V = 3U, /**< 0.64 V nominal voltage. */ 3062 CY_SYSPM_SRAMLDO_VOLTAGE_0_66V = 4U, /**< 0.66 V nominal voltage. */ 3063 CY_SYSPM_SRAMLDO_VOLTAGE_0_68V = 5U, /**< 0.68 V nominal voltage. */ 3064 CY_SYSPM_SRAMLDO_VOLTAGE_0_70V = 6U, /**< 0.70 V nominal voltage. */ 3065 CY_SYSPM_SRAMLDO_VOLTAGE_0_72V = 7U, /**< 0.72 V nominal voltage. */ 3066 CY_SYSPM_SRAMLDO_VOLTAGE_0_74V = 8U, /**< 0.74 V nominal voltage. */ 3067 CY_SYSPM_SRAMLDO_VOLTAGE_0_76V = 9U, /**< 0.76 V nominal voltage. */ 3068 CY_SYSPM_SRAMLDO_VOLTAGE_0_78V = 10U, /**< 0.78 V nominal voltage. */ 3069 CY_SYSPM_SRAMLDO_VOLTAGE_0_80V = 11U, /**< 0.80 V nominal voltage. */ 3070 CY_SYSPM_SRAMLDO_VOLTAGE_0_82V = 12U, /**< 0.82 V nominal voltage. */ 3071 CY_SYSPM_SRAMLDO_VOLTAGE_0_84V = 13U, /**< 0.84 V nominal voltage. */ 3072 CY_SYSPM_SRAMLDO_VOLTAGE_0_86V = 14U, /**< 0.86 V nominal voltage. */ 3073 CY_SYSPM_SRAMLDO_VOLTAGE_0_88V = 15U, /**< 0.88 V nominal voltage. */ 3074 CY_SYSPM_SRAMLDO_VOLTAGE_0_90V = 16U, /**< 0.90 V nominal voltage. */ 3075 CY_SYSPM_SRAMLDO_VOLTAGE_0_92V = 17U, /**< 0.92 V nominal voltage. */ 3076 CY_SYSPM_SRAMLDO_VOLTAGE_0_94V = 18U, /**< 0.94 V nominal voltage. */ 3077 CY_SYSPM_SRAMLDO_VOLTAGE_0_96V = 19U, /**< 0.96 V nominal voltage. */ 3078 CY_SYSPM_SRAMLDO_VOLTAGE_0_98V = 20U, /**< 0.98 V nominal voltage. */ 3079 CY_SYSPM_SRAMLDO_VOLTAGE_1_00V = 21U, /**< 1.00 V nominal voltage. */ 3080 CY_SYSPM_SRAMLDO_VOLTAGE_1_02V = 22U, /**< 1.02 V nominal voltage. */ 3081 CY_SYSPM_SRAMLDO_VOLTAGE_1_04V = 23U, /**< 1.04 V nominal voltage. */ 3082 CY_SYSPM_SRAMLDO_VOLTAGE_1_06V = 24U, /**< 1.06 V nominal voltage. */ 3083 CY_SYSPM_SRAMLDO_VOLTAGE_1_08V = 25U, /**< 1.08 V nominal voltage. */ 3084 CY_SYSPM_SRAMLDO_VOLTAGE_1_10V = 26U, /**< 1.10 V nominal voltage. */ 3085 CY_SYSPM_SRAMLDO_VOLTAGE_1_12V = 27U, /**< 1.12 V nominal voltage. */ 3086 CY_SYSPM_SRAMLDO_VOLTAGE_1_14V = 28U, /**< 1.14 V nominal voltage. */ 3087 CY_SYSPM_SRAMLDO_VOLTAGE_1_16V = 29U, /**< 1.16 V nominal voltage. */ 3088 CY_SYSPM_SRAMLDO_VOLTAGE_1_18V = 30U, /**< 1.18 V nominal voltage. */ 3089 CY_SYSPM_SRAMLDO_VOLTAGE_1_20V = 31U, /**< 1.20 V nominal voltage. */ 3090 } cy_en_syspm_sramldo_voltage_t; 3091 3092 3093 3094 /** 3095 * \note 3096 * This enum is available for CAT1D devices. 3097 **/ 3098 /** 3099 * This enumeration is used to select the output voltage for the 3100 * RETLDO. 3101 */ 3102 /* 3103 RETLDO Voltage Level table: 3104 3105 ------------------------------------------------- 3106 | RETLDO gain = 0 | RETLDO gain = 1 | 3107 LVL | Temp | Temp | Temp | Temp | 3108 | -40C | 25C-125C | -40C | 25C-125C | 3109 ------------------------------------------------- 3110 00000 0.6150 0.550 0.7595 0.679 3111 00001 0.6262 0.560 0.7733 0.691 3112 00010 0.6374 0.570 0.7871 0.704 3113 00011 0.6485 0.580 0.8010 0.716 3114 00100 0.6597 0.590 0.8148 0.728 3115 00101 0.6709 0.600 0.8286 0.741 3116 00110 0.6821 0.610 0.8424 0.753 3117 00111 0.6933 0.620 0.8562 0.765 3118 01000 0.7045 0.630 0.8700 0.778 3119 01001 0.7045 0.630 0.8700 0.778 3120 01010 0.7045 0.630 0.8700 0.778 3121 01011 0.7045 0.630 0.8700 0.778 3122 01100 0.7045 0.630 0.8700 0.778 3123 01101 0.7045 0.630 0.8700 0.778 3124 01110 0.7045 0.630 0.8700 0.778 3125 01111 0.7045 0.630 0.8700 0.778 3126 10000 0.4361 0.390 0.5386 0.481 3127 10001 0.4473 0.400 0.5524 0.494 3128 10010 0.4585 0.410 0.5662 0.506 3129 10011 0.4696 0.420 0.5800 0.519 3130 10100 0.4808 0.430 0.5938 0.531 3131 10101 0.4920 0.440 0.6076 0.543 3132 10110 0.5032 0.450 0.6214 0.556 3133 10111 0.5144 0.460 0.6352 0.568 3134 11000 0.5255 0.470 0.6490 0.580 3135 11001 0.5367 0.480 0.6629 0.593 3136 11010 0.5479 0.490 0.6767 0.605 3137 11011 0.5591 0.500 0.6905 0.617 3138 11100 0.5703 0.510 0.7043 0.630 3139 11101 0.5815 0.520 0.7181 0.642 3140 11110 0.5926 0.530 0.7319 0.654 3141 11111 0.6038 0.540 0.7457 0.667 3142 */ 3143 typedef enum 3144 { 3145 CY_SYSPM_RETLDO_VOLTAGE_LVL_0 = 0U, /**< Refer RETLDO Voltage Level table. */ 3146 CY_SYSPM_RETLDO_VOLTAGE_LVL_1 = 1U, /**< Refer RETLDO Voltage Level table. */ 3147 CY_SYSPM_RETLDO_VOLTAGE_LVL_2 = 2U, /**< Refer RETLDO Voltage Level table. */ 3148 CY_SYSPM_RETLDO_VOLTAGE_LVL_3 = 3U, /**< Refer RETLDO Voltage Level table. */ 3149 CY_SYSPM_RETLDO_VOLTAGE_LVL_4 = 4U, /**< Refer RETLDO Voltage Level table. */ 3150 CY_SYSPM_RETLDO_VOLTAGE_LVL_5 = 5U, /**< Refer RETLDO Voltage Level table. */ 3151 CY_SYSPM_RETLDO_VOLTAGE_LVL_6 = 6U, /**< Refer RETLDO Voltage Level table. */ 3152 CY_SYSPM_RETLDO_VOLTAGE_LVL_7 = 7U, /**< Refer RETLDO Voltage Level table. */ 3153 CY_SYSPM_RETLDO_VOLTAGE_LVL_8 = 8U, /**< Refer RETLDO Voltage Level table. */ 3154 CY_SYSPM_RETLDO_VOLTAGE_LVL_9 = 9U, /**< Refer RETLDO Voltage Level table. */ 3155 CY_SYSPM_RETLDO_VOLTAGE_LVL_10 = 10U, /**< Refer RETLDO Voltage Level table. */ 3156 CY_SYSPM_RETLDO_VOLTAGE_LVL_11 = 11U, /**< Refer RETLDO Voltage Level table. */ 3157 CY_SYSPM_RETLDO_VOLTAGE_LVL_12 = 12U, /**< Refer RETLDO Voltage Level table. */ 3158 CY_SYSPM_RETLDO_VOLTAGE_LVL_13 = 13U, /**< Refer RETLDO Voltage Level table. */ 3159 CY_SYSPM_RETLDO_VOLTAGE_LVL_14 = 14U, /**< Refer RETLDO Voltage Level table. */ 3160 CY_SYSPM_RETLDO_VOLTAGE_LVL_15 = 15U, /**< Refer RETLDO Voltage Level table. */ 3161 CY_SYSPM_RETLDO_VOLTAGE_LVL_16 = 16U, /**< Refer RETLDO Voltage Level table. */ 3162 CY_SYSPM_RETLDO_VOLTAGE_LVL_17 = 17U, /**< Refer RETLDO Voltage Level table. */ 3163 CY_SYSPM_RETLDO_VOLTAGE_LVL_18 = 18, /**< Refer RETLDO Voltage Level table. */ 3164 CY_SYSPM_RETLDO_VOLTAGE_LVL_19 = 19U, /**< Refer RETLDO Voltage Level table. */ 3165 CY_SYSPM_RETLDO_VOLTAGE_LVL_20 = 20U, /**< Refer RETLDO Voltage Level table. */ 3166 CY_SYSPM_RETLDO_VOLTAGE_LVL_21 = 21U, /**< Refer RETLDO Voltage Level table. */ 3167 CY_SYSPM_RETLDO_VOLTAGE_LVL_22 = 22U, /**< Refer RETLDO Voltage Level table. */ 3168 CY_SYSPM_RETLDO_VOLTAGE_LVL_23 = 23U, /**< Refer RETLDO Voltage Level table. */ 3169 CY_SYSPM_RETLDO_VOLTAGE_LVL_24 = 24U, /**< Refer RETLDO Voltage Level table. */ 3170 CY_SYSPM_RETLDO_VOLTAGE_LVL_25 = 25U, /**< Refer RETLDO Voltage Level table. */ 3171 CY_SYSPM_RETLDO_VOLTAGE_LVL_26 = 26U, /**< Refer RETLDO Voltage Level table. */ 3172 CY_SYSPM_RETLDO_VOLTAGE_LVL_27 = 27U, /**< Refer RETLDO Voltage Level table. */ 3173 CY_SYSPM_RETLDO_VOLTAGE_LVL_28 = 28U, /**< Refer RETLDO Voltage Level table. */ 3174 CY_SYSPM_RETLDO_VOLTAGE_LVL_29 = 29U, /**< Refer RETLDO Voltage Level table. */ 3175 CY_SYSPM_RETLDO_VOLTAGE_LVL_30 = 30U, /**< Refer RETLDO Voltage Level table. */ 3176 CY_SYSPM_RETLDO_VOLTAGE_LVL_31 = 31U, /**< Refer RETLDO Voltage Level table. */ 3177 } cy_en_syspm_retldo_voltage_t; 3178 3179 /** 3180 * \note 3181 * This enum is available for CAT1D devices. 3182 **/ 3183 /** 3184 * For RETLDO, this enumeration is used to select the Gain value 3185 */ 3186 typedef enum 3187 { 3188 CY_SYSPM_RETLDO_GAIN_2 = 0U, /**< Gain = 2 */ 3189 CY_SYSPM_RETLDO_GAIN_2_47 = 1U, /**< Gain = 2.47 */ 3190 } cy_en_syspm_retldo_gain_t; 3191 3192 3193 /** 3194 * \note 3195 * This enum is available for CAT1D devices. 3196 **/ 3197 /** 3198 * This enumeration is used to select the output voltage(VOUT) for the 3199 * MISCLDO. 3200 */ 3201 3202 typedef enum 3203 { 3204 CY_SYSPM_MISCLDO_VOLTAGE_0_58V = 0U, /**< 0.58 V nominal voltage. */ 3205 CY_SYSPM_MISCLDO_VOLTAGE_0_60V = 1U, /**< 0.60 V nominal voltage. */ 3206 CY_SYSPM_MISCLDO_VOLTAGE_0_62V = 2U, /**< 0.62 V nominal voltage. */ 3207 CY_SYSPM_MISCLDO_VOLTAGE_0_64V = 3U, /**< 0.64 V nominal voltage. */ 3208 CY_SYSPM_MISCLDO_VOLTAGE_0_66V = 4U, /**< 0.66 V nominal voltage. */ 3209 CY_SYSPM_MISCLDO_VOLTAGE_0_68V = 5U, /**< 0.68 V nominal voltage. */ 3210 CY_SYSPM_MISCLDO_VOLTAGE_0_70V = 6U, /**< 0.70 V nominal voltage. */ 3211 CY_SYSPM_MISCLDO_VOLTAGE_0_72V = 7U, /**< 0.72 V nominal voltage. */ 3212 CY_SYSPM_MISCLDO_VOLTAGE_0_74V = 8U, /**< 0.74 V nominal voltage. */ 3213 CY_SYSPM_MISCLDO_VOLTAGE_0_76V = 9U, /**< 0.76 V nominal voltage. */ 3214 CY_SYSPM_MISCLDO_VOLTAGE_0_78V = 10U, /**< 0.78 V nominal voltage. */ 3215 CY_SYSPM_MISCLDO_VOLTAGE_0_80V = 11U, /**< 0.80 V nominal voltage. */ 3216 CY_SYSPM_MISCLDO_VOLTAGE_0_82V = 12U, /**< 0.82 V nominal voltage. */ 3217 CY_SYSPM_MISCLDO_VOLTAGE_0_84V = 13U, /**< 0.84 V nominal voltage. */ 3218 CY_SYSPM_MISCLDO_VOLTAGE_0_86V = 14U, /**< 0.86 V nominal voltage. */ 3219 CY_SYSPM_MISCLDO_VOLTAGE_0_88V = 15U, /**< 0.88 V nominal voltage. */ 3220 CY_SYSPM_MISCLDO_VOLTAGE_0_90V = 16U, /**< 0.90 V nominal voltage. */ 3221 CY_SYSPM_MISCLDO_VOLTAGE_0_92V = 17U, /**< 0.92 V nominal voltage. */ 3222 CY_SYSPM_MISCLDO_VOLTAGE_0_94V = 18U, /**< 0.94 V nominal voltage. */ 3223 CY_SYSPM_MISCLDO_VOLTAGE_0_96V = 19U, /**< 0.96 V nominal voltage. */ 3224 CY_SYSPM_MISCLDO_VOLTAGE_0_98V = 20U, /**< 0.98 V nominal voltage. */ 3225 CY_SYSPM_MISCLDO_VOLTAGE_1_00V = 21U, /**< 1.00 V nominal voltage. */ 3226 CY_SYSPM_MISCLDO_VOLTAGE_1_02V = 22U, /**< 1.02 V nominal voltage. */ 3227 CY_SYSPM_MISCLDO_VOLTAGE_1_04V = 23U, /**< 1.04 V nominal voltage. */ 3228 CY_SYSPM_MISCLDO_VOLTAGE_1_06V = 24U, /**< 1.06 V nominal voltage. */ 3229 CY_SYSPM_MISCLDO_VOLTAGE_1_08V = 25U, /**< 1.08 V nominal voltage. */ 3230 CY_SYSPM_MISCLDO_VOLTAGE_1_10V = 26U, /**< 1.10 V nominal voltage. */ 3231 CY_SYSPM_MISCLDO_VOLTAGE_1_12V = 27U, /**< 1.12 V nominal voltage. */ 3232 CY_SYSPM_MISCLDO_VOLTAGE_1_14V = 28U, /**< 1.14 V nominal voltage. */ 3233 CY_SYSPM_MISCLDO_VOLTAGE_1_16V = 29U, /**< 1.16 V nominal voltage. */ 3234 CY_SYSPM_MISCLDO_VOLTAGE_1_18V = 30U, /**< 1.18 V nominal voltage. */ 3235 CY_SYSPM_MISCLDO_VOLTAGE_1_20V = 31U, /**< 1.20 V nominal voltage. */ 3236 } cy_en_syspm_miscldo_voltage_t; 3237 3238 /** 3239 * \note 3240 * This enum is available for CAT1D devices. 3241 **/ 3242 /** 3243 * This enumeration is used to select the trim settings for the 3244 * VCCACT voltage of MISCLDO. 3245 */ 3246 3247 typedef enum 3248 { 3249 CY_SYSPM_MISCLDO_VCCACT_TRIM_0 = 0U, /**< 0mV Trim Setting. */ 3250 CY_SYSPM_MISCLDO_VCCACT_TRIM_5 = 1U, /**< 5mV Trim Setting. */ 3251 CY_SYSPM_MISCLDO_VCCACT_TRIM_10 = 2U, /**< 10mV nominal voltage. */ 3252 CY_SYSPM_MISCLDO_VCCACT_TRIM_15 = 3U, /**< 15mV Trim Setting. */ 3253 CY_SYSPM_MISCLDO_VCCACT_TRIM_20 = 4U, /**< 20mV Trim Setting. */ 3254 CY_SYSPM_MISCLDO_VCCACT_TRIM_25 = 5U, /**< 25mV Trim Setting. */ 3255 CY_SYSPM_MISCLDO_VCCACT_TRIM_30 = 6U, /**< 30mV Trim Setting. */ 3256 CY_SYSPM_MISCLDO_VCCACT_TRIM_35 = 7U, /**< 35mV Trim Setting. */ 3257 CY_SYSPM_MISCLDO_VCCACT_TRIM_MINUS_40 = 8U, /**< -40mV Trim Setting. */ 3258 CY_SYSPM_MISCLDO_VCCACT_TRIM_MINUS_35 = 9U, /**< -35mV Trim Setting. */ 3259 CY_SYSPM_MISCLDO_VCCACT_TRIM_MINUS_30 = 10U, /**< -30mV Trim Setting. */ 3260 CY_SYSPM_MISCLDO_VCCACT_TRIM_MINUS_25 = 11U, /**< -25mV Trim Setting. */ 3261 CY_SYSPM_MISCLDO_VCCACT_TRIM_MINUS_20 = 12U, /**< -20mV Trim Setting. */ 3262 CY_SYSPM_MISCLDO_VCCACT_TRIM_MINUS_15 = 13U, /**< -15mV Trim Setting. */ 3263 CY_SYSPM_MISCLDO_VCCACT_TRIM_MINUS_10 = 14U, /**< -10mV Trim Setting. */ 3264 CY_SYSPM_MISCLDO_VCCACT_TRIM_MINUS_5 = 15U, /**< -5mV Trim Setting. */ 3265 } cy_en_syspm_miscldo_vccact_trim_t; 3266 3267 /** 3268 * \note 3269 * This enum is available for CAT1D devices. 3270 **/ 3271 /** 3272 * For MISCLDO, this enumeration is used to select the output mode for MISCLDO 3273 */ 3274 typedef enum 3275 { 3276 CY_SYSPM_MISCLDO_VCCACT = 0U, /**< MISCLDO output follows VCCACT_MISC */ 3277 CY_SYSPM_MISCLDO_VOUT = 1U, /**< MISCLDO output follows VOUT */ 3278 } cy_en_syspm_miscldo_mode_t; 3279 3280 #endif /* defined (CY_IP_MXS22SRSS) */ 3281 3282 3283 /** 3284 * \note 3285 * This enum is available for CAT1B devices. 3286 **/ 3287 /** 3288 * For SDR's(Step Down Regulators), this enumeration is used to select the SDR0 or SDR1 3289 */ 3290 typedef enum 3291 { 3292 CY_SYSPM_SDR_0 = 0U, /**< SDR0 */ 3293 CY_SYSPM_SDR_1 = 1U, /**< SDR1 */ 3294 } cy_en_syspm_sdr_t; 3295 3296 /** 3297 * \note 3298 * This enum is available for CAT1B devices. 3299 **/ 3300 /** 3301 * This enumeration is used to select the output voltage for the 3302 * SDR(Step Down Regulator) output. 3303 */ 3304 typedef enum 3305 { 3306 CY_SYSPM_SDR_VOLTAGE_0_850V = 0U, /**< 0.850 V nominal voltage. */ 3307 CY_SYSPM_SDR_VOLTAGE_0_875V = 1U, /**< 0.875 V nominal voltage. */ 3308 CY_SYSPM_SDR_VOLTAGE_0_900V = 2U, /**< 0.900 V nominal voltage. */ 3309 CY_SYSPM_SDR_VOLTAGE_0_925V = 3U, /**< 0.925 V nominal voltage. */ 3310 CY_SYSPM_SDR_VOLTAGE_0_950V = 4U, /**< 0.950 V nominal voltage. */ 3311 CY_SYSPM_SDR_VOLTAGE_0_975V = 5U, /**< 0.975 V nominal voltage. */ 3312 CY_SYSPM_SDR_VOLTAGE_1_000V = 6U, /**< 1.000 V nominal voltage. */ 3313 CY_SYSPM_SDR_VOLTAGE_1_025V = 7U, /**< 1.025 V nominal voltage. */ 3314 CY_SYSPM_SDR_VOLTAGE_1_050V = 8U, /**< 1.050 V nominal voltage. */ 3315 CY_SYSPM_SDR_VOLTAGE_1_075V = 9U, /**< 1.075 V nominal voltage. */ 3316 CY_SYSPM_SDR_VOLTAGE_1_100V = 10U, /**< 1.100 V nominal voltage. */ 3317 CY_SYSPM_SDR_VOLTAGE_1_125V = 11U, /**< 1.125 V nominal voltage. */ 3318 CY_SYSPM_SDR_VOLTAGE_1_150V = 12U, /**< 1.150 V nominal voltage. */ 3319 CY_SYSPM_SDR_VOLTAGE_1_175V = 13U, /**< 1.175 V nominal voltage. */ 3320 CY_SYSPM_SDR_VOLTAGE_1_200V = 14U, /**< 1.200 V nominal voltage. */ 3321 CY_SYSPM_SDR_VOLTAGE_1_225V = 15U, /**< 1.225 V nominal voltage. */ 3322 } cy_en_syspm_sdr_voltage_t; 3323 3324 /** 3325 * \note 3326 * This enum is available for CAT1B devices. 3327 **/ 3328 /** 3329 * This enumeration is used to select the output voltage for the 3330 * HVLDO Regulator. 3331 */ 3332 typedef enum 3333 { 3334 CY_SYSPM_HVLDO_VOLTAGE_1_500V = 0U, /**< 1.500 V nominal voltage. */ 3335 CY_SYSPM_HVLDO_VOLTAGE_1_600V = 1U, /**< 1.600 V nominal voltage. */ 3336 CY_SYSPM_HVLDO_VOLTAGE_1_700V = 2U, /**< 1.700 V nominal voltage. */ 3337 CY_SYSPM_HVLDO_VOLTAGE_1_800V = 3U, /**< 1.800 V nominal voltage. */ 3338 CY_SYSPM_HVLDO_VOLTAGE_1_900V = 4U, /**< 1.900 V nominal voltage. */ 3339 CY_SYSPM_HVLDO_VOLTAGE_2_000V = 5U, /**< 2.000 V nominal voltage. */ 3340 CY_SYSPM_HVLDO_VOLTAGE_2_100V = 6U, /**< 2.100 V nominal voltage. */ 3341 CY_SYSPM_HVLDO_VOLTAGE_2_200V = 7U, /**< 2.200 V nominal voltage. */ 3342 CY_SYSPM_HVLDO_VOLTAGE_2_300V = 8U, /**< 2.300 V nominal voltage. */ 3343 CY_SYSPM_HVLDO_VOLTAGE_2_400V = 9U, /**< 2.400 V nominal voltage. */ 3344 CY_SYSPM_HVLDO_VOLTAGE_2_500V = 10U, /**< 2.500 V nominal voltage. */ 3345 CY_SYSPM_HVLDO_VOLTAGE_2_600V = 11U, /**< 2.600 V nominal voltage. */ 3346 CY_SYSPM_HVLDO_VOLTAGE_2_700V = 12U, /**< 2.700 V nominal voltage. */ 3347 CY_SYSPM_HVLDO_VOLTAGE_2_800V = 13U, /**< 2.800 V nominal voltage. */ 3348 CY_SYSPM_HVLDO_VOLTAGE_2_900V = 14U, /**< 2.900 V nominal voltage. */ 3349 CY_SYSPM_HVLDO_VOLTAGE_3_000V = 15U, /**< 3.000 V nominal voltage. */ 3350 } cy_en_syspm_hvldo_voltage_t; 3351 3352 3353 #endif 3354 3355 3356 #if (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 2)) || defined (CY_DOXYGEN) 3357 /** 3358 * \note 3359 * This enum is available for CAT1C devices. 3360 **/ 3361 /** 3362 * Selects the voltage threshold for OVD on VDDD 3363 */ 3364 typedef enum 3365 { 3366 CY_SYSPM_OVD_VDDD_5_5V = 0x0u, /**< OVD -> VDDD > 5.5 V */ 3367 CY_SYSPM_OVD_VDDD_5_0V = 0x01u /**< OVD -> VDDD > 5.0 V */ 3368 } cy_en_syspm_ovd_vddd_sel_t; 3369 3370 /** 3371 * \note 3372 * This enum is available for CAT1C devices. 3373 **/ 3374 /** 3375 * Selects the voltage threshold for OVD on VDDA 3376 */ 3377 typedef enum 3378 { 3379 CY_SYSPM_OVD_VDDA_5_5V = 0x0u, /**< OVD -> VDDA > 5.5 V */ 3380 CY_SYSPM_OVD_VDDA_5_0V = 0x01u /**< OVD -> VDDA > 5.0 V */ 3381 } cy_en_syspm_ovd_vdda_sel_t; 3382 3383 /** 3384 * \note 3385 * This enum is available for CAT1C devices. 3386 **/ 3387 /** 3388 * Selects OVD over VDDD or VDDA or VCCD 3389 */ 3390 typedef enum 3391 { 3392 CY_SYSPM_OVD_ON_VDDD = 0x0u, /**< OVD -> VDDD */ 3393 CY_SYSPM_OVD_ON_VDDA = 0x01u, /**< OVD -> VDDA */ 3394 CY_SYSPM_OVD_ON_VCCD = 0x02u /**< OVD -> VCCD */ 3395 } cy_en_syspm_ovd_sel_t; 3396 3397 /** 3398 * \note 3399 * This enum is available for CAT1C devices. 3400 **/ 3401 /** 3402 * OVD action select configuration. 3403 */ 3404 typedef enum 3405 { 3406 CY_SYSPM_OVD_ACTION_NOTHING = 0x0u, /**<Select OVD action select: nothing */ 3407 CY_SYSPM_OVD_ACTION_FAULT = 0x1u, /**<Select OVD action select: fault */ 3408 CY_SYSPM_OVD_ACTION_RESET = 0x2u, /**<Select OVD action select: reset */ 3409 } cy_en_syspm_ovd_action_select_t; 3410 3411 /** 3412 * \note 3413 * This enum is available for CAT1C devices. 3414 **/ 3415 /** 3416 * Selects the voltage threshold for BOD on VDDD 3417 */ 3418 typedef enum 3419 { 3420 CY_SYSPM_BOD_VDDD_2_7V = 0x0u, /**< BOD -> VDDD < 2.7 V */ 3421 CY_SYSPM_BOD_VDDD_3_0V = 0x01u /**< BOD -> VDDD < 3.0 V */ 3422 } cy_en_syspm_bod_vddd_sel_t; 3423 3424 /** 3425 * \note 3426 * This enum is available for CAT1C devices. 3427 **/ 3428 /** 3429 * Selects the voltage threshold for BOD on VDDA 3430 */ 3431 typedef enum 3432 { 3433 CY_SYSPM_BOD_VDDA_2_7V = 0x0u, /**< BOD -> VDDA < 2.7 V */ 3434 CY_SYSPM_BOD_VDDA_3_0V = 0x01u /**< BOD -> VDDA < 3.0 V */ 3435 } cy_en_syspm_bod_vdda_sel_t; 3436 3437 /** 3438 * \note 3439 * This enum is available for CAT1C devices. 3440 **/ 3441 /** 3442 * Selects BOD over VDDD or VDDA or VCCD 3443 */ 3444 typedef enum 3445 { 3446 CY_SYSPM_BOD_ON_VDDD = 0x0u, /**< BOD -> VDDD */ 3447 CY_SYSPM_BOD_ON_VDDA = 0x01u, /**< BOD -> VDDA */ 3448 CY_SYSPM_BOD_ON_VCCD = 0x02u /**< BOD -> VCCD */ 3449 } cy_en_syspm_bod_sel_t; 3450 3451 /** 3452 * \note 3453 * This enum is available for CAT1C devices. 3454 **/ 3455 /** 3456 * BOD action select configuration. 3457 */ 3458 typedef enum 3459 { 3460 CY_SYSPM_BOD_ACTION_NOTHING = 0x0u, /**<Select BOD action select: nothing */ 3461 CY_SYSPM_BOD_ACTION_FAULT = 0x1u, /**<Select BOD action select: fault */ 3462 CY_SYSPM_BOD_ACTION_RESET = 0x2u, /**<Select BOD action select: reset */ 3463 } cy_en_syspm_bod_action_select_t; 3464 3465 /** 3466 * \note 3467 * This enum is available for CAT1C devices. 3468 **/ 3469 /** 3470 * Supply Supervision Status 3471 */ 3472 typedef enum 3473 { 3474 CY_SYSPM_ENTITY_BOD_VDDD = 0x0u, /**<BOD indicates VDDD is OK */ 3475 CY_SYSPM_ENTITY_BOD_VDDA = 0x1u, /**<BOD indicates VDDA is OK */ 3476 CY_SYSPM_ENTITY_BOD_VCCD = 0x2u, /**<BOD indicates VCCD is OK */ 3477 CY_SYSPM_ENTITY_OVD_VDDD = 0x3u, /**<OVD indicates VDDD is OK */ 3478 CY_SYSPM_ENTITY_OVD_VDDA = 0x4u, /**<OVD indicates VDDA is OK */ 3479 CY_SYSPM_ENTITY_OVD_VCCD = 0x5u, /**<OVD indicates VCCD is OK */ 3480 } cy_en_syspm_supply_entity_select_t; 3481 3482 3483 /** 3484 * \note 3485 * This enum is available for CAT1C devices. 3486 **/ 3487 /** This enumeration is used to select the REGHC mode */ 3488 typedef enum 3489 { 3490 CY_SYSPM_REGHC_MODE_TRANSISTOR = 0u, /**< External Transistor Mode */ 3491 CY_SYSPM_REGHC_MODE_PMIC = 1u, /**< External PMIC Mode */ 3492 } cy_en_syspm_reghc_mode_t; 3493 3494 /** 3495 * \note 3496 * This enum is available for CAT1C devices. 3497 **/ 3498 /** This enumeration is used to set the voltage trims */ 3499 typedef enum 3500 { 3501 CY_SYSPM_REGHC_VADJ_1_020V = 0u, /**< 1.020 V nominal voltage. */ 3502 CY_SYSPM_REGHC_VADJ_1_025V = 1u, /**< 1.025 V nominal voltage. */ 3503 CY_SYSPM_REGHC_VADJ_1_030V = 2u, /**< 1.030 V nominal voltage. */ 3504 CY_SYSPM_REGHC_VADJ_1_035V = 3u, /**< 1.035 V nominal voltage. */ 3505 CY_SYSPM_REGHC_VADJ_1_040V = 4u, /**< 1.040 V nominal voltage. */ 3506 CY_SYSPM_REGHC_VADJ_1_045V = 5u, /**< 1.045 V nominal voltage. */ 3507 CY_SYSPM_REGHC_VADJ_1_050V = 6u, /**< 1.050 V nominal voltage. */ 3508 CY_SYSPM_REGHC_VADJ_1_055V = 7u, /**< 1.055 V nominal voltage. */ 3509 CY_SYSPM_REGHC_VADJ_1_060V = 8u, /**< 1.060 V nominal voltage. */ 3510 CY_SYSPM_REGHC_VADJ_1_065V = 9u, /**< 1.065 V nominal voltage. */ 3511 CY_SYSPM_REGHC_VADJ_1_070V = 10u, /**< 1.070 V nominal voltage. */ 3512 CY_SYSPM_REGHC_VADJ_1_075V = 11u, /**< 1.075 V nominal voltage. */ 3513 CY_SYSPM_REGHC_VADJ_1_080V = 12u, /**< 1.080 V nominal voltage. */ 3514 CY_SYSPM_REGHC_VADJ_1_085V = 13u, /**< 1.085 V nominal voltage. */ 3515 CY_SYSPM_REGHC_VADJ_1_090V = 14u, /**< 1.090 V nominal voltage. */ 3516 CY_SYSPM_REGHC_VADJ_1_095V = 15u, /**< 1.095V nominal voltage. */ 3517 CY_SYSPM_REGHC_VADJ_1_100V = 16u, /**< Default Value, 1.100 V nominal voltage. */ 3518 CY_SYSPM_REGHC_VADJ_1_105V = 17u, /**< 1.105 V nominal voltage. */ 3519 CY_SYSPM_REGHC_VADJ_1_110V = 18u, /**< 1.110 V nominal voltage. */ 3520 CY_SYSPM_REGHC_VADJ_1_115V = 19u, /**< 1.115 V nominal voltage. */ 3521 CY_SYSPM_REGHC_VADJ_1_120V = 20u, /**< 1.120 V nominal voltage. */ 3522 CY_SYSPM_REGHC_VADJ_1_125V = 21u, /**< 1.125 V nominal voltage. */ 3523 CY_SYSPM_REGHC_VADJ_1_130V = 22u, /**< 1.130 V nominal voltage. */ 3524 CY_SYSPM_REGHC_VADJ_1_135V = 23u, /**< 1.135 V nominal voltage. */ 3525 CY_SYSPM_REGHC_VADJ_1_140V = 24u, /**< 1.140 V nominal voltage. */ 3526 CY_SYSPM_REGHC_VADJ_1_145V = 25u, /**< 1.145 V nominal voltage. */ 3527 CY_SYSPM_REGHC_VADJ_1_150V = 26u, /**< 1.150 V nominal voltage. */ 3528 CY_SYSPM_REGHC_VADJ_1_155V = 27u, /**< 1.155 V nominal voltage. */ 3529 CY_SYSPM_REGHC_VADJ_1_160V = 28u, /**< 1.160 V nominal voltage. */ 3530 CY_SYSPM_REGHC_VADJ_1_165V = 29u, /**< 1.165 V nominal voltage. */ 3531 CY_SYSPM_REGHC_VADJ_1_170V = 30u, /**< 1.170 V nominal voltage. */ 3532 CY_SYSPM_REGHC_VADJ_1_175V = 31u, /**< 1.175 V nominal voltage. */ 3533 } cy_en_syspm_reghc_vadj_t; 3534 3535 /** 3536 * \note 3537 * This enum is available for CAT1C devices. 3538 **/ 3539 /** Drive out configuration */ 3540 typedef enum 3541 { 3542 CY_SYSPM_REGHC_DRIVE_OUT_0P9_VCCD_BY_VADJ = 0u, /**< DRV_VOUT=(0.9 * vccd)/vdj Volts */ 3543 CY_SYSPM_REGHC_DRIVE_OUT_0P8_VCCD_BY_VADJ = 1u, /**< DRV_VOUT=(0.8 * vccd)/vdj Volts */ 3544 CY_SYSPM_REGHC_DRIVE_OUT_0P6_VCCD_BY_VADJ = 2u, /**< DRV_VOUT=(0.6 * vccd)/vdj Volts */ 3545 CY_SYSPM_REGHC_DRIVE_OUT_VCCD = 3u, /**< DRV_VOUT=vccd Volts */ 3546 } cy_en_syspm_reghc_drive_out_t; 3547 3548 #endif /* (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 2)) || defined (CY_DOXYGEN) */ 3549 3550 /** 3551 * For SRAM0, this enumeration represents the Macro Numbers 3552 */ 3553 typedef enum 3554 { 3555 CY_SYSPM_SRAM0_MACRO_0 = 0U, /**< SRAM0:Macro-0 */ 3556 CY_SYSPM_SRAM0_MACRO_1 = 1U, /**< SRAM0:Macro-1 */ 3557 CY_SYSPM_SRAM0_MACRO_2 = 2U, /**< SRAM0:Macro-2 */ 3558 CY_SYSPM_SRAM0_MACRO_3 = 3U, /**< SRAM0:Macro-3 */ 3559 } cy_en_syspm_sram0_macro_t; 3560 3561 3562 3563 /** This enumeration specifies the associated callback mode. This enum defines the callback mode. */ 3564 typedef enum 3565 { 3566 CY_SYSPM_CHECK_READY = 0x01U, /**< Callbacks with this mode are executed before entering into the 3567 low power mode. The purpose of his callback function is to check 3568 if the device is ready to enter the low power mode. */ 3569 CY_SYSPM_CHECK_FAIL = 0x02U, /**< Callbacks with this mode are executed after the CY_SYSPM_CHECK_READY 3570 callbacks execution returns CY_SYSPM_FAIL. 3571 The callback with the CY_SYSPM_CHECK_FAIL mode should roll back the 3572 actions performed in the previously executed callback with 3573 CY_SYSPM_CHECK_READY */ 3574 CY_SYSPM_BEFORE_TRANSITION = 0x04U, /**< Callbacks with this mode are executed after the CY_SYSPM_CHECK_READY 3575 callbacks execution returns CY_SYSPM_SUCCESS. 3576 Performs the actions to be done before entering into the 3577 low power mode. */ 3578 CY_SYSPM_AFTER_TRANSITION = 0x08U, /**< Performs the actions to be done after exiting the low power mode 3579 if entered. */ 3580 #if defined (CY_IP_MXS40SSRSS) 3581 /** 3582 * \note 3583 * Below enum should be used only during exit of Deepsleep and applicable for only CAT1B devices 3584 **/ 3585 CY_SYSPM_AFTER_DS_WFI_TRANSITION = 0x10U, /**< Performs the actions to be done after exiting the Deepsleep low 3586 power mode if entered and before the interrupts are enabled. */ 3587 #endif 3588 } cy_en_syspm_callback_mode_t; 3589 3590 /** 3591 * This enumeration is used to select a particular SRAM. 3592 */ 3593 typedef enum 3594 { 3595 CY_SYSPM_SRAM0_MEMORY = 0U, /**< SRAM0 Memory Area */ 3596 CY_SYSPM_SRAM1_MEMORY = 1U, /**< SRAM1 Memory Area */ 3597 CY_SYSPM_SRAM2_MEMORY = 2U, /**< SRAM2 Memory Area */ 3598 } cy_en_syspm_sram_index_t; 3599 3600 /** 3601 * This enumeration is used to select a particular SRAM Power Mode. 3602 */ 3603 typedef enum 3604 { 3605 CY_SYSPM_SRAM_PWR_MODE_OFF = 0U, /**< SRAM Power Mode OFF */ 3606 CY_SYSPM_SRAM_PWR_MODE_INVALID = 1U, /**< Invalid SRAM Power Mode */ 3607 CY_SYSPM_SRAM_PWR_MODE_RET = 2U, /**< SRAM Power Mode RET */ 3608 CY_SYSPM_SRAM_PWR_MODE_ON = 3U /**< SRAM Power Mode ON */ 3609 } cy_en_syspm_sram_pwr_mode_t; 3610 3611 #if defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 3612 /** 3613 * This enumeration is used to select a particular SOCMEM SRAM Partition Number. 3614 */ 3615 typedef enum 3616 { 3617 CY_SYSPM_SOCMEM_SRAM_PARTITION0 = 0U, /**< SOCMEM SRAM Partition-0 Number*/ 3618 CY_SYSPM_SOCMEM_SRAM_PARTITION1 = 1U, /**< SOCMEM SRAM Partition-1 Number*/ 3619 CY_SYSPM_SOCMEM_SRAM_PARTITION2 = 2U, /**< SOCMEM SRAM Partition-2 Number*/ 3620 CY_SYSPM_SOCMEM_SRAM_PARTITION3 = 3U, /**< SOCMEM SRAM Partition-3 Number*/ 3621 CY_SYSPM_SOCMEM_SRAM_PARTITION4 = 4U, /**< SOCMEM SRAM Partition-4 Number*/ 3622 CY_SYSPM_SOCMEM_SRAM_PARTITION5 = 5U, /**< SOCMEM SRAM Partition-5 Number*/ 3623 CY_SYSPM_SOCMEM_SRAM_PARTITION6 = 6U, /**< SOCMEM SRAM Partition-6 Number*/ 3624 CY_SYSPM_SOCMEM_SRAM_PARTITION7 = 7U, /**< SOCMEM SRAM Partition-7 Number*/ 3625 CY_SYSPM_SOCMEM_SRAM_PARTITION8 = 8U, /**< SOCMEM SRAM Partition-8 Number*/ 3626 CY_SYSPM_SOCMEM_SRAM_PARTITION9 = 9U, /**< SOCMEM SRAM Partition-9 Number*/ 3627 } cy_en_syspm_socmem_sram_partition_index_t; 3628 3629 /** 3630 * This enumeration is used to select a particular SOCMEM SRAM Partition Power Mode. 3631 */ 3632 typedef enum 3633 { 3634 CY_SYSPM_SOCMEM_SRAM_ACTIVE_MODE_ON = 0U, /**< SOCMEM SRAM Partition ON during ACTIVE mode */ 3635 CY_SYSPM_SOCMEM_SRAM_ACTIVE_MODE_OFF = 1U, /**< SOCMEM SRAM Partition OFF during ACTIVE mode */ 3636 CY_SYSPM_SOCMEM_SRAM_DS_MODE_RET_ON = 2U, /**< SOCMEM SRAM Partition Retention ON during DS mode */ 3637 CY_SYSPM_SOCMEM_SRAM_DS_MODE_RET_OFF = 3U, /**< SOCMEM SRAM Partition Retention OFF during DS mode */ 3638 } cy_en_syspm_socmem_sram_pwr_mode_t; 3639 3640 #endif /* defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) */ 3641 3642 /** \} group_syspm_data_enumerates */ 3643 3644 /** 3645 * \addtogroup group_syspm_macros 3646 * \{ 3647 */ 3648 /** 3649 * \defgroup group_syspm_skip_callback_modes Defines to skip the callbacks modes 3650 * \{ 3651 * Defines for the SysPm callbacks modes that can be skipped during execution. 3652 * For more information about callbacks modes, refer 3653 * to \ref cy_en_syspm_callback_mode_t. 3654 */ 3655 #define CY_SYSPM_SKIP_CHECK_READY (0x01U) /**< Define to skip check ready mode in the syspm callback */ 3656 #define CY_SYSPM_SKIP_CHECK_FAIL (0x02U) /**< Define to skip check fail mode in the syspm callback */ 3657 #define CY_SYSPM_SKIP_BEFORE_TRANSITION (0x04U) /**< Define to skip before transition mode in the syspm callback */ 3658 #define CY_SYSPM_SKIP_AFTER_TRANSITION (0x08U) /**< Define to skip after transition mode in the syspm callback */ 3659 /** \} group_syspm_skip_callback_modes */ 3660 /** \} group_syspm_macros */ 3661 3662 /** 3663 * \addtogroup group_syspm_data_structures 3664 * \{ 3665 */ 3666 3667 /** The structure contains syspm callback parameters */ 3668 typedef struct 3669 { 3670 void *base; /**< Base address of a HW instance, matches name of the driver in 3671 the API for the base address. Can be undefined if not required. Base address is not 3672 required for the SysPm driver as the device has only one set of power modes */ 3673 void *context; /**< Context for the handler function. This item can be 3674 skipped if not required. Can be undefined if not required. */ 3675 3676 } cy_stc_syspm_callback_params_t; 3677 3678 /** The type for syspm callbacks */ 3679 typedef cy_en_syspm_status_t (*Cy_SysPmCallback) (cy_stc_syspm_callback_params_t *callbackParams, cy_en_syspm_callback_mode_t mode); 3680 3681 /** Structure with syspm callback configuration elements */ 3682 typedef struct cy_stc_syspm_callback 3683 { 3684 Cy_SysPmCallback callback; /**< The callback handler function. */ 3685 cy_en_syspm_callback_type_t type; /**< The callback type, see \ref cy_en_syspm_callback_type_t. */ 3686 uint32_t skipMode; /**< The mask of modes to be skipped during callback 3687 execution, see \ref group_syspm_skip_callback_modes. The 3688 corresponding callback mode won't execute if the 3689 appropriate define is set. These values can be ORed. 3690 If all modes are required to be executed this element 3691 should be equal to zero. Skipping unneeded callback modes speeds up 3692 power mode transitions by skipping unneeded operations. */ 3693 3694 cy_stc_syspm_callback_params_t *callbackParams; /**< The address of a cy_stc_syspm_callback_params_t, 3695 the callback is executed with these parameters. */ 3696 3697 struct cy_stc_syspm_callback *prevItm; /**< The previous list item. This element should not be 3698 defined, or defined as NULL. It is for internal 3699 usage to link this structure to the next registered 3700 structure. It will be updated during callback 3701 registration. Do not modify this element at run-time. */ 3702 3703 struct cy_stc_syspm_callback *nextItm; /**< The next list item. This element should not be 3704 defined, or defined as NULL. It is for internal usage to 3705 link this structure to the previous registered structure. 3706 It will be updated during callback registration. Do not 3707 modify this element at run-time. */ 3708 uint8_t order; /**< Holds the callback execution order value. Range: 0-255. 3709 While entering low power mode, callbacks with lower order values 3710 are executed first. While exiting low power mode, 3711 the callbacks are executed in the opposite order. 3712 Callbacks with the same order value are executed in the 3713 order they are registered in the application. */ 3714 } cy_stc_syspm_callback_t; 3715 3716 #if defined (CY_IP_MXS40SRSS) 3717 /** 3718 * \note 3719 * This enum is available for CAT1A devices. 3720 **/ 3721 /** This internal structure stores non-retained registers in the system Deep Sleep 3722 * power mode. On wakeup from system Deep Sleep, these registers are restored. 3723 */ 3724 typedef struct 3725 { 3726 3727 uint32_t CY_SYSPM_UDB_UDBIF_BANK_CTL_REG; /**< UDB interface control register */ 3728 3729 uint32_t CY_SYSPM_UDB_BCTL_MDCLK_EN_REG; /**< UDB bank MDCLK_EN register */ 3730 uint32_t CY_SYSPM_UDB_BCTL_MBCLK_EN_REG; /**< UDB bank MBCLK_EN register */ 3731 uint32_t CY_SYSPM_UDB_BCTL_BOTSEL_L_REG; /**< UDB bank BOTSEL_L register */ 3732 uint32_t CY_SYSPM_UDB_BCTL_BOTSEL_U_REG; /**< UDB bank BOTSEL_U register */ 3733 uint32_t CY_SYSPM_UDB_BCTL_QCLK_EN0_REG; /**< UDB bank QCLK_EN0 register */ 3734 uint32_t CY_SYSPM_UDB_BCTL_QCLK_EN1_REG; /**< UDB bank QCLK_EN1 register */ 3735 uint32_t CY_SYSPM_UDB_BCTL_QCLK_EN2_REG; /**< UDB bank QCLK_EN2 register */ 3736 uint32_t CY_SYSPM_CM0_CLOCK_CTL_REG; /**< CPUSS CM0+ clock control register */ 3737 uint32_t CY_SYSPM_CM4_CLOCK_CTL_REG; /**< CPUSS CM4 clock control register */ 3738 } cy_stc_syspm_backup_regs_t; 3739 #endif /* CY_IP_MXS40SRSS */ 3740 3741 #if (defined(CY_DEVICE_SECURE)) 3742 /** PRA structure for Cy_SysPm_BuckSetVoltage2 function parameters */ 3743 typedef struct 3744 { 3745 cy_en_syspm_buck_voltage2_t praVoltage; /**< The voltage of the Buck regulator output 2 */ 3746 bool praWaitToSettle; /**< Enable/disable the delay after setting a higher voltage */ 3747 } cy_stc_pra_voltage2_t; 3748 3749 typedef struct 3750 { 3751 cy_en_syspm_sram_index_t sramNum; /**< SRAM index */ 3752 uint32_t sramMacroNum; /**< SRAM macro number */ 3753 cy_en_syspm_sram_pwr_mode_t sramPwrMode; /**< Power mode */ 3754 } cy_stc_pra_sram_power_mode_config_t; 3755 3756 #endif /* (defined(CY_DEVICE_SECURE)) */ 3757 3758 #if defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 3759 /** 3760 * \note 3761 * This structure is available for CAT1D devices. 3762 **/ 3763 /** The structure contains syspm RETLDO configuration parameters */ 3764 typedef struct 3765 { 3766 cy_en_syspm_retldo_voltage_t activeVoltSel; /**< RETLDO Voltage Select \ref cy_en_syspm_retldo_voltage_t */ 3767 cy_en_syspm_retldo_gain_t activeGain; /**< RETLDO Gain Select Select \ref cy_en_syspm_retldo_voltage_t */ 3768 cy_en_syspm_retldo_voltage_t deepsleepVoltSel; /**< RETLDO Deepsleep Voltage Select \ref cy_en_syspm_retldo_voltage_t */ 3769 cy_en_syspm_retldo_gain_t deepsleepGain; /**< RETLDO Deepsleep Gain Select \ref cy_en_syspm_retldo_voltage_t */ 3770 } cy_stc_syspm_retldo_params_t; 3771 3772 /** 3773 * \note 3774 * This structure is available for CAT1D devices. 3775 **/ 3776 /** The structure contains syspm SRAMLDO configuration parameters */ 3777 typedef struct 3778 { 3779 bool sramLdoEnable; /**< SRAMLDO Enable/Disable */ 3780 bool deepsleepSramLdoEnable; /**< SRAMLDO Enable/Disable during deepsleep */ 3781 cy_en_syspm_sramldo_voltage_t sramLdoVoltSel; /**< SRAMLDO Voltage Select \ref cy_en_syspm_sramldo_voltage_t */ 3782 } cy_stc_syspm_sramldo_params_t; 3783 3784 /** 3785 * \note 3786 * This structure is available for CAT1D devices. 3787 **/ 3788 /** The structure contains syspm MISCLDO configuration parameters */ 3789 typedef struct 3790 { 3791 bool miscLdoEnable; /**< MISCLDO Enable/Disable */ 3792 cy_en_syspm_miscldo_mode_t miscLdoMode; /**< MISCLDO mode select , VCCACT or VOUT */ 3793 cy_en_syspm_miscldo_voltage_t miscLdoVoltSel; /**< MISCLDO Voltage Select \ref cy_en_syspm_miscldo_voltage_t */ 3794 cy_en_syspm_miscldo_vccact_trim_t miscLdoVaccActTrimSel; /**< MISCLDO VCCACT Voltage Trim Select \ref cy_en_syspm_miscldo_vccact_trim_t */ 3795 } cy_stc_syspm_miscldo_params_t; 3796 3797 3798 #endif /* defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) */ 3799 3800 #if defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 3801 /** 3802 * \note 3803 * This structure is available for CAT1B devices. 3804 **/ 3805 /** The structure contains warmboot entry point struct used during DEEPSLEEP-RAM entry*/ 3806 typedef struct 3807 { 3808 uint32_t *stack_pointer; /**< Stack Pointer */ 3809 uint32_t *entry_pointer; /**< Entry Function Address */ 3810 } cy_stc_syspm_warmboot_entrypoint_t; 3811 3812 /** 3813 * \note 3814 * This structure is available for CAT1B devices. 3815 **/ 3816 /** The structure contains syspm core buck configuration parameters */ 3817 typedef struct 3818 { 3819 uint8_t voltageSel; /**< Core Buck Voltage Select \ref cy_en_syspm_core_buck_voltage_t */ 3820 uint8_t mode; /**< Core Buck Mode : 3821 0x01 - Low Power Mode, 3822 0x11 - High Power Mode(Low Ripple Mode) */ 3823 bool override; /**< Core Buck Override : Forces Corebuck to 3824 use the setting in the PWR_CBUCK_CTL register */ 3825 bool copySettings; /**< Core Buck Copy Settings : 3826 Copies the current CBUCK composite state to 3827 PWR_CBUCK_CTL register */ 3828 bool useSettings; /**< Core Buck use Settings : 3829 Causes the settings in PWR_CBUCK_CTL to be 3830 used in CBUCK settings decision */ 3831 uint8_t inRushLimitSel; /**< Core Buck In Rush Limit Selection 3832 0: 10mA limit 3833 1: 100mA limit */ 3834 } cy_stc_syspm_core_buck_params_t; 3835 3836 /** 3837 * \note 3838 * This structure is available for CAT1B devices. 3839 **/ 3840 /** The structure contains syspm SDR0/SDR1(Step Down Regulator) LDO configuration parameters */ 3841 typedef struct 3842 { 3843 uint8_t coreBuckVoltSel; /**< Core Buck Voltage Select \ref cy_en_syspm_core_buck_voltage_t */ 3844 uint8_t coreBuckMode; /**< Core Buck Mode : 3845 0x01 - Low Power Mode, 3846 0x11 - High Power Mode(Low Ripple Mode) */ 3847 3848 /* This field applicable only for SDR0 */ 3849 uint8_t coreBuckDpSlpVoltSel; /**< Deep Sleep Core Buck Voltage Select \ref cy_en_syspm_core_buck_voltage_t */ 3850 3851 /* This field applicable only for SDR0 */ 3852 uint8_t coreBuckDpSlpMode; /**< Deep sleep Core Buck Mode : 3853 0x01 - Low Power Mode, 3854 0x11 - High Power Mode(Low Ripple Mode) */ 3855 3856 uint8_t sdrVoltSel; /**< SDR Regulator Voltage Select \ref cy_en_syspm_sdr_voltage_t */ 3857 3858 /* This field applicable only for SDR0 */ 3859 uint8_t sdr0DpSlpVoltSel; /**< SDR Regulator Voltage Select \ref cy_en_syspm_sdr_voltage_t */ 3860 3861 /* This field applicable only for SDR0 */ 3862 bool sdr0Allowbypass; /**< Allow SDR bypass : 3863 true - Allow SDR to bypass 3864 false - SDR is not bypassed and will regulate */ 3865 /* This field applicable only for SDR1 */ 3866 bool sdr1HwControl; /**< Allow SDR1 HW Control : 3867 true - sdr1Enable(bit: SDR1_ENABLE) is ignored, HW will control 3868 false - sdr1Enable(bit: SDR1_ENABLE) will control, HW control is ignored */ 3869 /* This field applicable only for SDR1 */ 3870 bool sdr1Enable; /**< SDR1 Enable/Disable: 3871 true - SDR1 is enabled 3872 false - SDR1 is disabled */ 3873 } cy_stc_syspm_sdr_params_t; 3874 3875 /** 3876 * \note 3877 * This structure is available for CAT1B devices. 3878 **/ 3879 /** The structure contains syspm HVLDO configuration parameters */ 3880 typedef struct 3881 { 3882 uint8_t voltageSel; /**< HVLDO Voltage Select \ref cy_en_syspm_hvldo_voltage_t */ 3883 bool hwSel; /**< HVLDO HW Select : 3884 0 - HVLDO0_ENABLE controls SDR1,HW controls are ignored 3885 1 - HLDO0_ENABLE is ignored and HW signal is used instead */ 3886 bool hvldoEnable; /**< HVLDO Enable/Disable: 3887 true - HVLDO is enabled 3888 false - HVLDO is disabled */ 3889 } cy_stc_syspm_hvldo_params_t; 3890 3891 3892 /** 3893 * \note 3894 * This structure is available for CAT1B devices. 3895 **/ 3896 /** The structure contains syspm Extra Requestor configuration parameters */ 3897 typedef struct 3898 { 3899 uint8_t coreBuckVoltSel; /**< Core Buck Voltage Select \ref cy_en_syspm_core_buck_voltage_t */ 3900 uint8_t coreBuckMode; /**< Core Buck Mode : 3901 0x00 - Low Power Mode, 3902 0x10 - Low Ripple(high power) */ 3903 cy_stc_syspm_sdr_params_t *sdr0Config; /**< SDR-0 Parameters \ref cy_stc_syspm_sdr_params_t */ 3904 cy_stc_syspm_sdr_params_t *sdr1Config; /**< SDR-1 Parameters \ref cy_stc_syspm_sdr_params_t */ 3905 } cy_stc_syspm_extraReq_params_t; 3906 3907 #endif 3908 3909 /** \} group_syspm_data_structures */ 3910 3911 /** 3912 * \addtogroup group_syspm_functions 3913 * \{ 3914 */ 3915 3916 /** 3917 * \addtogroup group_syspm_functions_general 3918 * \{ 3919 */ 3920 3921 /******************************************************************************* 3922 * Function Name: Cy_SysPm_SetSRAMMacroPwrMode 3923 ****************************************************************************//** 3924 * 3925 * Function to set Power Mode for each of the Macro in a particular SRAM. 3926 * 3927 * \param sramNum 3928 * SRAM's index number has to be passed 3929 * ex: CY_SYSPM_SRAM0_MEMORY or CY_SYSPM_SRAM1_MEMORY or CY_SYSPM_SRAM2_MEMORY 3930 * See \ref cy_en_syspm_sram_index_t. 3931 * 3932 * \param sramMacroNum 3933 * Macro number of a particular SRAM. 3934 * 3935 * \note 3936 * If SRAM1 and SRAM2 consists of single power partition, power mode will be 3937 * applied to whole SRAM region, so 0 must be passed for sramMacroNum parameter. 3938 * 3939 * \param sramPwrMode 3940 * Power Mode that needs to be set. 3941 * 3942 * \return 3943 * - CY_SYSPM_SUCCESS - SRAM MACRO power mode is set. 3944 * - CY_SYSPM_BAD_PARAM - Input parameters are out of range. 3945 * See \ref cy_en_syspm_status_t. 3946 * 3947 * \note 3948 * CAT1B and CAT1D devices do not support CY_SYSPM_SRAM_PWR_MODE_RET, only 3949 * CY_SYSPM_SRAM_PWR_MODE_ON and CY_SYSPM_SRAM_PWR_MODE_OFF power modes are 3950 * supported. 3951 * 3952 * For the PSoC 64 devices there are possible situations when function returns 3953 * the PRA error status code. This is because for PSoC 64 devices the function 3954 * uses the PRA driver to change the protected registers. Refer to 3955 * \ref cy_en_pra_status_t for more details. 3956 * 3957 *******************************************************************************/ 3958 cy_en_syspm_status_t Cy_SysPm_SetSRAMMacroPwrMode(cy_en_syspm_sram_index_t sramNum, uint32_t sramMacroNum, cy_en_syspm_sram_pwr_mode_t sramPwrMode); 3959 3960 /******************************************************************************* 3961 * Function Name: Cy_SysPm_GetSRAMMacroPwrMode 3962 ****************************************************************************//** 3963 * 3964 * Function to get Power Mode for each of the Macro in a particular SRAM. 3965 * 3966 * \param sramNum 3967 * SRAM's index number has to be passed 3968 * ex: CY_SYSPM_SRAM0_MEMORY or CY_SYSPM_SRAM1_MEMORY or CY_SYSPM_SRAM2_MEMORY 3969 * See \ref cy_en_syspm_sram_index_t. 3970 * 3971 * \param sramMacroNum 3972 * Macro number of a particular SRAM. 3973 * 3974 * \note 3975 * If SRAM1 and SRAM2 consists of single power partition, power mode will be 3976 * applied to whole SRAM region, so 0 must be passed for sramMacroNum parameter, 3977 * and the power mode obtained will be for whole SRAM. 3978 * 3979 * \note 3980 * CAT1B and CAT1D devices do not support CY_SYSPM_SRAM_PWR_MODE_RET, only 3981 * CY_SYSPM_SRAM_PWR_MODE_ON and CY_SYSPM_SRAM_PWR_MODE_OFF power modes are 3982 * supported. 3983 * 3984 * \return 3985 * Returns SRAM power mode. See \ref cy_en_syspm_sram_pwr_mode_t. 3986 * 3987 *******************************************************************************/ 3988 cy_en_syspm_sram_pwr_mode_t Cy_SysPm_GetSRAMMacroPwrMode(cy_en_syspm_sram_index_t sramNum, uint32_t sramMacroNum); 3989 3990 /******************************************************************************* 3991 * Function Name: Cy_SysPm_SetSRAMPwrMode 3992 ****************************************************************************//** 3993 * 3994 * Function to set Power Mode for all the Macros for a particular SRAM. 3995 * 3996 * \param sramNum 3997 * SRAM's index number has to be passed 3998 * ex: CY_SYSPM_SRAM0_MEMORY or CY_SYSPM_SRAM1_MEMORY or CY_SYSPM_SRAM2_MEMORY 3999 * See \ref cy_en_syspm_sram_index_t. 4000 * 4001 * \param sramPwrMode 4002 * Power Mode that needs to be set. 4003 * 4004 * \return 4005 * - CY_SYSPM_SUCCESS - SRAM power mode is set. 4006 * - CY_SYSPM_BAD_PARAM - Input parameters are out of range. 4007 * See \ref cy_en_syspm_status_t. 4008 * 4009 * \note 4010 * CAT1B and CAT1D devices do not support CY_SYSPM_SRAM_PWR_MODE_RET, only 4011 * CY_SYSPM_SRAM_PWR_MODE_ON and CY_SYSPM_SRAM_PWR_MODE_OFF power modes are 4012 * supported. 4013 * 4014 * For the PSoC 64 devices there are possible situations when function returns 4015 * the PRA error status code. This is because for PSoC 64 devices the function 4016 * uses the PRA driver to change the protected registers. Refer to 4017 * \ref cy_en_pra_status_t for more details. 4018 * 4019 *******************************************************************************/ 4020 cy_en_syspm_status_t Cy_SysPm_SetSRAMPwrMode(cy_en_syspm_sram_index_t sramNum, cy_en_syspm_sram_pwr_mode_t sramPwrMode); 4021 4022 4023 #if defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 4024 4025 /******************************************************************************* 4026 * Function Name: Cy_SysPm_SetSOCMemPartActivePwrMode 4027 ****************************************************************************//** 4028 * 4029 * Set Active mode Power Mode for a particular partition of SRAM in SOCMEM 4030 * 4031 * \param socmemSramPartNum 4032 * SOCMEM- SRAM's Partition Number 4033 * See \ref cy_en_syspm_socmem_sram_partition_index_t. 4034 * 4035 * \param socmemSramPwrMode 4036 * Power Mode that needs to be set. 4037 * See \ref cy_en_syspm_socmem_sram_pwr_mode_t. 4038 * 4039 * \return 4040 * - CY_SYSPM_SUCCESS - SRAM power mode is set. 4041 * - CY_SYSPM_BAD_PARAM - Input parameters are out of range. 4042 * See \ref cy_en_syspm_status_t. 4043 * 4044 *******************************************************************************/ 4045 cy_en_syspm_status_t Cy_SysPm_SetSOCMemPartActivePwrMode(cy_en_syspm_socmem_sram_partition_index_t socmemSramPartNum, cy_en_syspm_socmem_sram_pwr_mode_t socmemSramPwrMode); 4046 4047 /******************************************************************************* 4048 * Function Name: Cy_SysPm_SetSOCMemPartDsPwrMode 4049 ****************************************************************************//** 4050 * 4051 * Set DS mode Power Mode for a particular partition of SRAM in SOCMEM 4052 * 4053 * \param socmemSramPartNum 4054 * SOCMEM- SRAM's Partition Number 4055 * See \ref cy_en_syspm_socmem_sram_partition_index_t. 4056 * 4057 * \param socmemSramPwrMode 4058 * Power Mode that needs to be set. 4059 * See \ref cy_en_syspm_socmem_sram_pwr_mode_t. 4060 * 4061 * \return 4062 * - CY_SYSPM_SUCCESS - SRAM power mode is set. 4063 * - CY_SYSPM_BAD_PARAM - Input parameters are out of range. 4064 * See \ref cy_en_syspm_status_t. 4065 * 4066 *******************************************************************************/ 4067 cy_en_syspm_status_t Cy_SysPm_SetSOCMemPartDsPwrMode(cy_en_syspm_socmem_sram_partition_index_t socmemSramPartNum, cy_en_syspm_socmem_sram_pwr_mode_t socmemSramPwrMode); 4068 4069 /******************************************************************************* 4070 * Function Name: Cy_SysPm_GetSOCMemSramPartActivePwrMode 4071 ****************************************************************************//** 4072 * 4073 * Function to get Active mode Power Mode for a particular SOCMEM SRAM Partition 4074 * 4075 * \param socmemSramPartNum 4076 * SOCMEM- SRAM's Partition Number 4077 * See \ref cy_en_syspm_socmem_sram_partition_index_t. 4078 * 4079 * \return 4080 * Returns SRAM power mode. See \ref cy_en_syspm_socmem_sram_pwr_mode_t. 4081 * 4082 *******************************************************************************/ 4083 cy_en_syspm_socmem_sram_pwr_mode_t Cy_SysPm_GetSOCMemSramPartActivePwrMode(cy_en_syspm_socmem_sram_partition_index_t socmemSramPartNum); 4084 4085 /******************************************************************************* 4086 * Function Name: Cy_SysPm_GetSOCMemSramPartDsPwrMode 4087 ****************************************************************************//** 4088 * 4089 * Function to get DS mode Power Mode for a particular SOCMEM SRAM Partition 4090 * 4091 * \param socmemSramPartNum 4092 * SOCMEM- SRAM's Partition Number 4093 * See \ref cy_en_syspm_socmem_sram_partition_index_t. 4094 * 4095 * \return 4096 * Returns SRAM power mode. See \ref cy_en_syspm_socmem_sram_pwr_mode_t. 4097 * 4098 *******************************************************************************/ 4099 cy_en_syspm_socmem_sram_pwr_mode_t Cy_SysPm_GetSOCMemSramPartDsPwrMode(cy_en_syspm_socmem_sram_partition_index_t socmemSramPartNum); 4100 4101 4102 #endif /* defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) */ 4103 4104 4105 #if (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 2)) || defined (CY_DOXYGEN) 4106 4107 /******************************************************************************* 4108 * Function Name: Cy_SysPm_WriteVoltageBitForFlash 4109 ****************************************************************************//** 4110 * 4111 * Function that changes the voltage setting for flash. 4112 * 4113 * \note 4114 * Call this function before system enters ULP mode. Call this function after 4115 * the system enters LP mode. 4116 * 4117 * \param value 4118 * Value to be set in the flash voltage control register. 4119 * See \ref cy_en_syspm_flash_voltage_bit_t. 4120 * 4121 * \return 4122 * - CY_SYSPM_SUCCESS - The voltage is set. 4123 * - CY_SYSPM_CANCELED - Operation was canceled. Call the function again until 4124 * the function returns CY_SYSPM_SUCCESS. See \ref cy_en_syspm_status_t. 4125 * \note 4126 * This API is available for CAT1A devices. 4127 * 4128 * \funcusage 4129 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_WriteVoltageBitForFlash 4130 * 4131 *******************************************************************************/ 4132 cy_en_syspm_status_t Cy_SysPm_WriteVoltageBitForFlash(cy_en_syspm_flash_voltage_bit_t value); 4133 4134 #if !((CY_CPU_CORTEX_M4) && (defined (CY_DEVICE_SECURE))) 4135 4136 /******************************************************************************* 4137 * Function Name: Cy_SysPm_SaveRegisters 4138 ****************************************************************************//** 4139 * 4140 * \note Behavior of this API is IP dependent. \n 4141 * On CAT1A devices: \n 4142 * Saves non-retained UDB registers and the slow and fast clock dividers before 4143 * system entering system Deep Sleep. 4144 * Must be called if programmable logic or function are implemented in the UDB 4145 * array. 4146 * Cypress ID #280370, #1451. 4147 * On CAT1B devices: \n 4148 * Saves non-retained UDB registers before system entering system Deep Sleep. 4149 * Must be called if programmable logic or function are implemented in the UDB 4150 * array. 4151 * Cypress ID #280370. 4152 * \warning 4153 * Only one CPU on dual CPU devices should call this function. If both CPUs call 4154 * this function the UDB state restored may be inconsistent with the expected 4155 * state when restored. 4156 * 4157 * \param regs 4158 * The structure where the registers are saved. 4159 * 4160 * \note 4161 * This API is available for CAT1A devices. 4162 * 4163 * \funcusage 4164 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_SaveRestoreRegisters 4165 * 4166 *******************************************************************************/ 4167 void Cy_SysPm_SaveRegisters(cy_stc_syspm_backup_regs_t *regs); 4168 4169 4170 /******************************************************************************* 4171 * Function Name: Cy_SysPm_RestoreRegisters 4172 ****************************************************************************//** 4173 * 4174 * \note Behavior of this API is IP dependent. \n 4175 * On CAT1A devices: \ 4176 * Restores non-retained UDB registers and the slow and fast clock dividers 4177 * before system entering system Deep Sleep. 4178 * Must be called if programmable logic or function are implemented in the UDB 4179 * array. 4180 * Cypress ID #280370, #1451. 4181 * On CAT1B devices: \ 4182 * Restores non-retained UDB registers before system entering system Deep Sleep. 4183 * Must be called if programmable logic or function are implemented in the UDB 4184 * array. 4185 * Cypress ID #280370. 4186 * \warning 4187 * Only one CPU on dual CPU devices should call this function. If both CPUs call 4188 * this function the UDB state restored may be inconsistent with the expected 4189 * state when restored. 4190 * 4191 * \param regs 4192 * The structure with data stored (using Cy_SysPm_SaveRegisters()) into the 4193 * required registers after Deep Sleep. 4194 * 4195 * \note 4196 * This API is available for CAT1A devices. 4197 * 4198 * \funcusage 4199 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_SaveRestoreRegisters 4200 * 4201 *******************************************************************************/ 4202 void Cy_SysPm_RestoreRegisters(cy_stc_syspm_backup_regs_t const *regs); 4203 4204 #endif /* !((CY_CPU_CORTEX_M4) && (defined (CY_DEVICE_SECURE))) */ 4205 #endif /* (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 2)) */ 4206 4207 /** \} group_syspm_functions_general */ 4208 4209 4210 /** 4211 * \addtogroup group_syspm_functions_power_status 4212 * \{ 4213 */ 4214 4215 4216 #if defined (CY_IP_MXS40SRSS) || defined (CY_IP_MXS22SRSS) || (defined (CY_IP_MXS40SSRSS) && (CY_MXS40SSRSS_VER_1_2 > 0UL)) || defined (CY_DOXYGEN) 4217 /******************************************************************************* 4218 * Function Name: Cy_SysPm_ReadStatus 4219 ****************************************************************************//** 4220 * 4221 * Reads the power modes status of the system and CPU(s). 4222 * 4223 * \return 4224 * The current power mode. See \ref group_syspm_return_status. 4225 * 4226 * \funcusage 4227 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_ReadStatus 4228 * 4229 * \note 4230 * This API is available for CAT1A, CAT1B(PSoC C3) and CAT1D devices. 4231 * 4232 *******************************************************************************/ 4233 uint32_t Cy_SysPm_ReadStatus(void); 4234 /** \} group_syspm_functions_power_status */ 4235 #endif 4236 4237 4238 /** 4239 * \addtogroup group_syspm_functions_power 4240 * \{ 4241 */ 4242 4243 4244 /******************************************************************************* 4245 * Function Name: Cy_SysPm_CpuEnterSleep 4246 ****************************************************************************//** 4247 * 4248 * Sets executing CPU to Sleep mode. 4249 * 4250 * Puts the CPU executing this function into CPU Sleep power mode. If callback 4251 * functions were registered they are also executed. 4252 * 4253 * For more detail about switching into CPU Sleep power mode and debug, 4254 * refer to the device technical reference manual (TRM). 4255 * 4256 * If at least one callback function with the CY_SYSPM_SLEEP type was registered, 4257 * the following algorithm is executed: 4258 * Prior to entering CPU Sleep mode, all callback functions of the CY_SYSPM_SLEEP 4259 * type with the CY_SYSPM_CHECK_READY parameter are called. This allows the 4260 * driver to signal whether it is ready to enter the low power mode. If any of 4261 * the callbacks of the CY_SYSPM_SLEEP type with the CY_SYSPM_CHECK_READY 4262 * parameter returns CY_SYSPM_FAIL, the remaining callbacks of the 4263 * CY_SYSPM_SLEEP type with the CY_SYSPM_CHECK_READY parameter are skipped. 4264 * After the first CY_SYSPM_FAIL, all the CY_SYSPM_SLEEP callbacks that were 4265 * previously executed before getting the CY_SYSPM_CHECK_FAIL are executed with 4266 * the CY_SYSPM_CHECK_FAIL parameter. The CPU Sleep mode is not entered and the 4267 * Cy_SysPm_CpuEnterSleep() function returns CY_SYSPM_FAIL. 4268 * 4269 * If all of the callbacks of the CY_SYSPM_SLEEP type with the 4270 * CY_SYSPM_CHECK_READY parameter return CY_SYSPM_SUCCESS, then all 4271 * callbacks of the CY_SYSPM_SLEEP type with the CY_SYSPM_CHECK_FAIL parameters 4272 * calls are skipped. All callbacks of the CY_SYSPM_SLEEP type and then 4273 * CY_SYSPM_BEFORE_TRANSITION parameter calls are executed, allowing the 4274 * peripherals to prepare for CPU Sleep. The CPU then enters Sleep mode. 4275 * This is a CPU-centric power mode. This means that the CPU has entered Sleep 4276 * mode and its main clock is removed. Any enabled interrupt can cause a CPU 4277 * wakeup from Sleep mode. 4278 * 4279 * For multi-core devices, CPU wakeup can also be performed using the Send Event 4280 * (SEV) assembly instruction executed from the other active CPU. Such wakeup is 4281 * expected only if the CPU Sleep power mode is done with WFE assembly 4282 * instruction. 4283 * 4284 * After a wakeup from CPU Sleep, all of the registered callbacks of the 4285 * CY_SYSPM_SLEEP type and with the CY_SYSPM_AFTER_TRANSITION parameter are 4286 * executed to return the peripherals to CPU active operation. 4287 * The Cy_SysPm_CpuEnterSleep() function returns CY_SYSPM_SUCCESS. 4288 * No callbacks of the CY_SYSPM_SLEEP type with the CY_SYSPM_BEFORE_TRANSITION 4289 * parameter or callbacks of the CY_SYSPM_SLEEP type and 4290 * CY_SYSPM_AFTER_TRANSITION parameter callbacks are executed if CPU Sleep mode 4291 * is not entered. 4292 * 4293 * \note The last callback that returns CY_SYSPM_FAIL is not executed with the 4294 * CY_SYSPM_CHECK_FAIL parameter because of the FAIL. The callback generating 4295 * CY_SYSPM_FAIL is expected to not make any changes that require being undone. 4296 * 4297 * To support control of callback execution order the following method is 4298 * implemented. Callback function with the CY_SYSPM_CHECK_READY and 4299 * CY_SYSPM_BEFORE_TRANSITION parameter are executed in the same order they are 4300 * registered. Callback function with the CY_SYSPM_CHECK_FAIL and 4301 * CY_SYSPM_AFTER_TRANSITION parameter are executed in the reverse order they 4302 * are registered. 4303 4304 * The return value from executed callback functions with the 4305 * CY_SYSPM_CHECK_FAIL, CY_SYSPM_BEFORE_TRANSITION, and CY_SYSPM_AFTER_TRANSITION 4306 * modes are ignored. 4307 * 4308 * \ref cy_en_syspm_callback_mode_t, except the CY_SYSPM_CHECK_READY, are ignored 4309 * 4310 * \note The Arm BSD assembly instruction is not required in this function 4311 * because the function implementation ensures the SLEEPDEEP bit of SCS register 4312 * is settled prior executing WFI/WFE instruction. 4313 * 4314 * \param waitFor 4315 * Selects wait for action. See \ref cy_en_syspm_waitfor_t. 4316 * 4317 * \return 4318 * Entered status, see \ref cy_en_syspm_status_t. 4319 * 4320 * \sideeffect 4321 * For CY8C6xx6, CY8C6xx7 devices this function clears the Event Register of the 4322 * CM4 CPU after wakeup from WFE. 4323 * 4324 * \funcusage 4325 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_CpuEnterSleep 4326 * 4327 *******************************************************************************/ 4328 cy_en_syspm_status_t Cy_SysPm_CpuEnterSleep(cy_en_syspm_waitfor_t waitFor); 4329 4330 #if defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 4331 4332 /******************************************************************************* 4333 * Function Name: Cy_SysPm_Init 4334 ****************************************************************************//** 4335 * 4336 * Initializes SysPm Driver 4337 * 4338 * \note 4339 * This API is available for CAT1B devices. 4340 * 4341 *******************************************************************************/ 4342 void Cy_SysPm_Init(void); 4343 #endif 4344 4345 #if defined (CY_IP_MXS40SSRSS) || (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 2)) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 4346 4347 /******************************************************************************* 4348 * Function Name: Cy_SysPm_IsLpmReady 4349 ****************************************************************************//** 4350 * 4351 * Checks if the system is LPM ready. 4352 * 4353 * \return 4354 * - True if the system is LPM Ready. 4355 * - False if the system is not LPM Ready. 4356 * 4357 * \note 4358 * This API is available for CAT1D devices. 4359 * 4360 *******************************************************************************/ 4361 bool Cy_SysPm_IsLpmReady(void); 4362 #endif /* defined (CY_IP_MXS40SSRSS) || (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 2)) || defined (CY_DOXYGEN) */ 4363 4364 #if defined (CY_IP_MXS40SSRSS) || (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 2)) || defined (CY_DOXYGEN) 4365 4366 /******************************************************************************* 4367 * Function Name: Cy_SysPm_SystemLpActiveEnter 4368 ****************************************************************************//** 4369 * 4370 * Change the system from ACTIVE Profile to LPACTIVE (Low Power Active)/LPSLEEP 4371 * (Low Power Sleep) Profile 4372 * 4373 * \return 4374 * - CY_SYSPM_SUCCESS - Entered the system Low Power mode or 4375 * the device is already in Low Power mode. 4376 * - CY_SYSPM_INVALID_STATE - The system Low Power mode was not set. The 4377 * system Low Power mode was not set because the protection context value is 4378 * higher than zero 4379 * (PC > 0) or the device revision does not support modifying registers 4380 * (to enter LP mode) via syscall. 4381 * - CY_SYSPM_CANCELED - Operation was canceled. Call the function again until 4382 * the function returns CY_SYSPM_SUCCESS. 4383 * - CY_SYSPM_FAIL - The system Low Power mode is not entered. 4384 * 4385 * \note 4386 * This API is available for CAT1B and CAT1C devices. 4387 * 4388 * 4389 *******************************************************************************/ 4390 cy_en_syspm_status_t Cy_SysPm_SystemLpActiveEnter(void); 4391 4392 /******************************************************************************* 4393 * Function Name: Cy_SysPm_SystemLpActiveExit 4394 ****************************************************************************//** 4395 * 4396 * Changes the system from LPACTIVE (Low Power Active)/LPSLEEP (Low Power Sleep) 4397 * Profile to ACTIVE Profile 4398 * 4399 * \return 4400 * - CY_SYSPM_SUCCESS - Entered the system Low Power mode or 4401 * the device is already in Low Power mode. 4402 * - CY_SYSPM_INVALID_STATE - The system Low Power mode was not set. The 4403 * system Low Power mode was not set because the protection context value is 4404 * higher than zero 4405 * (PC > 0) or the device revision does not support modifying registers 4406 * (to enter LP mode) via syscall. 4407 * - CY_SYSPM_CANCELED - Operation was canceled. Call the function again until 4408 * the function returns CY_SYSPM_SUCCESS. 4409 * - CY_SYSPM_FAIL - The system Low Power mode is not entered. 4410 * 4411 * \note 4412 * This API is available for CAT1B and CAT1C devices. 4413 * 4414 * 4415 *******************************************************************************/ 4416 cy_en_syspm_status_t Cy_SysPm_SystemLpActiveExit(void); 4417 4418 /******************************************************************************* 4419 * Function Name: Cy_SysPm_IsSystemLpActiveEnabled 4420 ****************************************************************************//** 4421 * 4422 * Checks if the system is in LPACTIVE (Low Power Active)/LPSLEEP (Low Power Sleep) 4423 * Profile 4424 * 4425 * \return 4426 * True if enabled, False if disabled. 4427 * 4428 * \note 4429 * This API is available for CAT1B and CAT1C devices. 4430 * 4431 *******************************************************************************/ 4432 bool Cy_SysPm_IsSystemLpActiveEnabled(void); 4433 #endif /* defined (CY_IP_MXS40SSRSS) || (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 2)) || defined (CY_DOXYGEN) */ 4434 4435 /******************************************************************************* 4436 * Function Name: Cy_SysPm_StoreDSContext_Wfi 4437 ****************************************************************************//** 4438 * 4439 * Allow users to implement any context store required before entering deep sleep 4440 * in RTOS based builds, It is defined weak to allow callers override the default 4441 * PDL implementation. 4442 * 4443 * \note 4444 * This API is available for CAT1B devices. 4445 * 4446 *******************************************************************************/ 4447 4448 #if defined (CY_IP_MXS40SSRSS) || defined (CY_DOXYGEN) 4449 void Cy_SysPm_StoreDSContext_Wfi(void); 4450 #endif 4451 4452 #if defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 4453 4454 /******************************************************************************* 4455 * Function Name: Cy_SysPm_SetDeepSleepMode 4456 ****************************************************************************//** 4457 * 4458 * Set the deepsleep mode - deepsleep or deepsleep-ram or deepsleep-off 4459 * 4460 * \note 4461 * If mode is set to CY_SYSPM_MODE_DEEPSLEEP_RAM && Application in Flash, user 4462 * needs to take care of below 4463 * 4464 * Two types of images need to be generated 4465 * 1. Flash image 4466 * - Contains the actual application. 4467 * 4468 * 2. RAM Image(Resides in RAM) 4469 * - Contains Warmboot Entry Point function. 4470 * - SMIF initialization is performed only during coldboot, and not in 4471 * warmboot, so RAM Image will have the code performing SMIF 4472 * initialization before jumping to Flash Image. 4473 * 4474 * Before entering CY_SYSPM_MODE_DEEPSLEEP_RAM, user need to take care of below 4475 * 1. Entry point 4476 * - Set entry point to a function located in RAM Image using 4477 * - Cy_Syslib_SetWarmBootEntryPoint(Syslib Driver) 4478 * 4479 * After waking up from CY_SYSPM_MODE_DEEPSLEEP_RAM, bootrom jumps to 4480 * entry point function located in RAM image code. Entry point function should 4481 * take care of below 4482 * 4483 * 1. Vector table and Peripheral IP's enabling 4484 * - Set VTOR register with vector table address. 4485 * - Enable all the peripheral IP's using \ref Cy_SysClk_PeriGroupSetSlaveCtl. 4486 * 2. SMIF Initialization 4487 * - Perform SMIF Initialization. 4488 * 3. Jump to API in the Flash. 4489 * 4490 * \param deepSleepMode 4491 * CY_SYSPM_MODE_DEEPSLEEP or CY_SYSPM_MODE_DEEPSLEEP_RAM or CY_SYSPM_MODE_DEEPSLEEP_OFF 4492 * 4493 * \return 4494 * - CY_SYSPM_SUCCESS - Deep sleep mode is set 4495 * - CY_SYSPM_CANCELED - Operation was canceled. Call the function again until 4496 * the function returns CY_SYSPM_SUCCESS. 4497 * 4498 * \note 4499 * This API is available for CAT1B and CAT1D devices. 4500 * 4501 *******************************************************************************/ 4502 cy_en_syspm_status_t Cy_SysPm_SetDeepSleepMode(cy_en_syspm_deep_sleep_mode_t deepSleepMode); 4503 4504 #if defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 4505 4506 /******************************************************************************* 4507 * Function Name: Cy_SysPm_SetSysDeepSleepMode 4508 ****************************************************************************//** 4509 * 4510 * Set the deepsleep mode for SYS PPU Group- deepsleep or deepsleep-ram or deepsleep-off 4511 * 4512 * \note 4513 * If mode is set to CY_SYSPM_MODE_DEEPSLEEP_RAM && Application in Flash, user 4514 * needs to take care of below 4515 * 4516 * Two types of images need to be generated 4517 * 1. Flash image 4518 * - Contains the actual application. 4519 * 4520 * 2. RAM Image(Resides in RAM) 4521 * - Contains Warmboot Entry Point function. 4522 * - SMIF initialization is performed only during coldboot, and not in 4523 * warmboot, so RAM Image will have the code performing SMIF 4524 * initialization before jumping to Flash Image. 4525 * 4526 * Before entering CY_SYSPM_MODE_DEEPSLEEP_RAM, user need to take care of below 4527 * 1. Entry point 4528 * - Set entry point to a function located in RAM Image using 4529 * - Cy_Syslib_SetWarmBootEntryPoint(Syslib Driver) 4530 * 4531 * After waking up from CY_SYSPM_MODE_DEEPSLEEP_RAM, bootrom jumps to 4532 * entry point function located in RAM image code. Entry point function should 4533 * take care of below 4534 * 4535 * 1. Vector table and Peripheral IP's enabling 4536 * - Set VTOR register with vector table address. 4537 * - Enable all the peripheral IP's using \ref Cy_SysClk_PeriGroupSetSlaveCtl. 4538 * 2. SMIF Initialization 4539 * - Perform SMIF Initialization. 4540 * 3. Jump to API in the Flash. 4541 * 4542 * \param deepSleepMode 4543 * CY_SYSPM_MODE_DEEPSLEEP or CY_SYSPM_MODE_DEEPSLEEP_RAM or CY_SYSPM_MODE_DEEPSLEEP_OFF 4544 * 4545 * \return 4546 * - CY_SYSPM_SUCCESS - Deep sleep mode is set 4547 * - CY_SYSPM_CANCELED - Operation was canceled. Call the function again until 4548 * the function returns CY_SYSPM_SUCCESS. 4549 * 4550 * \note 4551 * This API is available for CAT1D devices. 4552 * 4553 *******************************************************************************/ 4554 cy_en_syspm_status_t Cy_SysPm_SetSysDeepSleepMode(cy_en_syspm_deep_sleep_mode_t deepSleepMode); 4555 4556 /******************************************************************************* 4557 * Function Name: Cy_SysPm_SetAppDeepSleepMode 4558 ****************************************************************************//** 4559 * 4560 * Set the deepsleep mode for APP PPU Group- deepsleep or deepsleep-ram or deepsleep-off 4561 * 4562 * \note 4563 * If mode is set to CY_SYSPM_MODE_DEEPSLEEP_RAM && Application in Flash, user 4564 * needs to take care of below 4565 * 4566 * Two types of images need to be generated 4567 * 1. Flash image 4568 * - Contains the actual application. 4569 * 4570 * 2. RAM Image(Resides in RAM) 4571 * - Contains Warmboot Entry Point function. 4572 * - SMIF initialization is performed only during coldboot, and not in 4573 * warmboot, so RAM Image will have the code performing SMIF 4574 * initialization before jumping to Flash Image. 4575 * 4576 * Before entering CY_SYSPM_MODE_DEEPSLEEP_RAM, user need to take care of below 4577 * 1. Entry point 4578 * - Set entry point to a function located in RAM Image using 4579 * - Cy_Syslib_SetWarmBootEntryPoint(Syslib Driver) 4580 * 4581 * After waking up from CY_SYSPM_MODE_DEEPSLEEP_RAM, bootrom jumps to 4582 * entry point function located in RAM image code. Entry point function should 4583 * take care of below 4584 * 4585 * 1. Vector table and Peripheral IP's enabling 4586 * - Set VTOR register with vector table address. 4587 * - Enable all the peripheral IP's using \ref Cy_SysClk_PeriGroupSetSlaveCtl. 4588 * 2. SMIF Initialization 4589 * - Perform SMIF Initialization. 4590 * 3. Jump to API in the Flash. 4591 * 4592 * \param deepSleepMode 4593 * CY_SYSPM_MODE_DEEPSLEEP or CY_SYSPM_MODE_DEEPSLEEP_RAM or CY_SYSPM_MODE_DEEPSLEEP_OFF 4594 * 4595 * \return 4596 * - CY_SYSPM_SUCCESS - Deep sleep mode is set 4597 * - CY_SYSPM_CANCELED - Operation was canceled. Call the function again until 4598 * the function returns CY_SYSPM_SUCCESS. 4599 * 4600 * \note 4601 * This API is available for CAT1D devices. 4602 * 4603 *******************************************************************************/ 4604 4605 cy_en_syspm_status_t Cy_SysPm_SetAppDeepSleepMode(cy_en_syspm_deep_sleep_mode_t deepSleepMode); 4606 4607 /******************************************************************************* 4608 * Function Name: Cy_SysPm_GetSysDeepSleepMode 4609 ****************************************************************************//** 4610 * 4611 * Get the SYS Power domain deepsleep mode - deepsleep or deepsleep-ram or deepsleep-off 4612 * 4613 * \return 4614 * Returns \ref cy_en_syspm_deep_sleep_mode_t 4615 * 4616 * \note 4617 * This API is available only for CAT1D devices. 4618 * 4619 *******************************************************************************/ 4620 cy_en_syspm_deep_sleep_mode_t Cy_SysPm_GetSysDeepSleepMode(void); 4621 4622 /******************************************************************************* 4623 * Function Name: Cy_SysPm_GetAppDeepSleepMode 4624 ****************************************************************************//** 4625 * 4626 * Get the APP Power domain deepsleep mode - deepsleep or deepsleep-ram or deepsleep-off 4627 * 4628 * \return 4629 * Returns \ref cy_en_syspm_deep_sleep_mode_t 4630 * 4631 * \note 4632 * This API is available only for CAT1D devices. 4633 * 4634 *******************************************************************************/ 4635 cy_en_syspm_deep_sleep_mode_t Cy_SysPm_GetAppDeepSleepMode(void); 4636 4637 4638 /******************************************************************************* 4639 * Function Name: Cy_SysPm_SetSOCMEMDeepSleepMode 4640 ****************************************************************************//** 4641 * 4642 * Set the deepsleep mode for SOCMEM PPU - deepsleep or deepsleep-ram or deepsleep-off 4643 * 4644 * \note 4645 * If mode is set to CY_SYSPM_MODE_DEEPSLEEP_RAM && Application in Flash, user 4646 * needs to take care of below 4647 * 4648 * Two types of images need to be generated 4649 * 1. Flash image 4650 * - Contains the actual application. 4651 * 4652 * 2. RAM Image(Resides in RAM) 4653 * - Contains Warmboot Entry Point function. 4654 * - SMIF initialization is performed only during coldboot, and not in 4655 * warmboot, so RAM Image will have the code performing SMIF 4656 * initialization before jumping to Flash Image. 4657 * 4658 * Before entering CY_SYSPM_MODE_DEEPSLEEP_RAM, user need to take care of below 4659 * 1. Entry point 4660 * - Set entry point to a function located in RAM Image using 4661 * - Cy_Syslib_SetWarmBootEntryPoint(Syslib Driver) 4662 * 4663 * After waking up from CY_SYSPM_MODE_DEEPSLEEP_RAM, bootrom jumps to 4664 * entry point function located in RAM image code. Entry point function should 4665 * take care of below 4666 * 4667 * 1. Vector table and Peripheral IP's enabling 4668 * - Set VTOR register with vector table address. 4669 * - Enable all the peripheral IP's using \ref Cy_SysClk_PeriGroupSetSlaveCtl. 4670 * 2. SMIF Initialization 4671 * - Perform SMIF Initialization. 4672 * 3. Jump to API in the Flash. 4673 * 4674 * \param deepSleepMode 4675 * CY_SYSPM_MODE_DEEPSLEEP or CY_SYSPM_MODE_DEEPSLEEP_RAM or CY_SYSPM_MODE_DEEPSLEEP_OFF 4676 * 4677 * \return 4678 * - CY_SYSPM_SUCCESS - Deep sleep mode is set 4679 * - CY_SYSPM_CANCELED - Operation was canceled. Call the function again until 4680 * the function returns CY_SYSPM_SUCCESS. 4681 * 4682 * \note 4683 * This API is available for CAT1D devices. 4684 * 4685 *******************************************************************************/ 4686 cy_en_syspm_status_t Cy_SysPm_SetSOCMEMDeepSleepMode(cy_en_syspm_deep_sleep_mode_t deepSleepMode); 4687 4688 #endif /* defined (CY_IP_MXS22SRSS) */ 4689 4690 /******************************************************************************* 4691 * Function Name: Cy_SysPm_GetDeepSleepMode 4692 ****************************************************************************//** 4693 * 4694 * Get the overall system's deepsleep mode - deepsleep or deepsleep-ram or deepsleep-off 4695 * 4696 * \return 4697 * Returns \ref cy_en_syspm_deep_sleep_mode_t 4698 * 4699 * \note 4700 * In a multi-core/multi-power domain architectures, CY_SYSPM_MODE_DEEPSLEEP_NONE 4701 * will be returned by the API, if any of the following conditions are met ... 4702 * 4703 * 1) Main Power domains(PD0, PD1) are not at all configured for a particular DS. 4704 * 4705 * 2) A mix in DS states between power domains, for example 4706 * PD0 configures deepsleep and PD1 configures deepsleep-RAM. 4707 * 4708 * \note 4709 * This API is available for CAT1B and CAT1D devices. 4710 * This API should only be used after Cy_SysPm_SetDeepSleepMode, as it will give only 4711 * the mode that is set by Cy_SysPm_SetDeepSleepMode. 4712 * 4713 *******************************************************************************/ 4714 cy_en_syspm_deep_sleep_mode_t Cy_SysPm_GetDeepSleepMode(void); 4715 4716 4717 /******************************************************************************* 4718 * Function Name: Cy_SysPm_GetBootMode 4719 ****************************************************************************//** 4720 * 4721 * Checks from which Deep Sleep mode the system has woke up. 4722 * 4723 * \return 4724 * Returns CY_SYSPM_WARM_BOOT_MODE or CY_SYSPM_WARM_COLD_MODE, if system performs 4725 * warm or cold, else return CY_SYSPM_POR_BOOT_MODE if its a normal(POR) boot. 4726 * 4727 * \note 4728 * This API is available for CAT1B devices. 4729 * 4730 * \note 4731 * Use this API immediately after the boot, before writing any of the PPU 4732 * registers,because this API depends on the programmed state of the PPU 4733 * registers, so call it before the PPU registers get overwritten. 4734 * 4735 * \note 4736 * This API is available for CAT1B and CAT1D devices. 4737 * 4738 *******************************************************************************/ 4739 cy_en_syspm_boot_mode_t Cy_SysPm_GetBootMode(void); 4740 4741 /******************************************************************************* 4742 * Function Name: Cy_SysPm_TriggerSoftReset 4743 ****************************************************************************//** 4744 * 4745 * Triggers the System Soft reset. 4746 * 4747 * \note 4748 * This API is available for CAT1B and CAT1D devices. 4749 * 4750 *******************************************************************************/ 4751 void Cy_SysPm_TriggerSoftReset(void); 4752 4753 /******************************************************************************* 4754 * Function Name: Cy_SysPm_TriggerXRes 4755 ****************************************************************************//** 4756 * 4757 * Triggers the XRES reset. 4758 * 4759 * \note 4760 * This API is available for CAT1B and CAT1D devices. 4761 * 4762 *******************************************************************************/ 4763 void Cy_SysPm_TriggerXRes(void); 4764 4765 #endif 4766 4767 /******************************************************************************* 4768 * Function Name: Cy_SysPm_CpuEnterDeepSleep 4769 ****************************************************************************//** 4770 * 4771 * Sets executing CPU to the Deep Sleep mode. 4772 * 4773 * Puts the CPU executing the function into CPU Deep Sleep. For a single CPU 4774 * devices the device will immediately transition to system Deep Sleep. For a 4775 * dual CPU devices the device will transition to system Deep Sleep only after 4776 * both CPUs are in CPU Deep Sleep power mode. 4777 * 4778 * Prior to entering the CPU Deep Sleep mode, all callbacks of the 4779 * CY_SYSPM_DEEPSLEEP type with the CY_SYSPM_CHECK_READY parameter registered 4780 * callbacks are called, allowing the driver to signal whether it is ready to 4781 * enter the power mode. If any CY_SYSPM_DEEPSLEEP type with the 4782 * CY_SYSPM_CHECK_READY parameter call returns CY_SYSPM_FAIL, the remaining 4783 * callback CY_SYSPM_DEEPSLEEP type with the CY_SYSPM_CHECK_READY parameter are 4784 * skipped. After the first CY_SYSPM_FAIL, all the CY_SYSPM_DEEPSLEEP callbacks 4785 * that were previously executed before getting the CY_SYSPM_CHECK_FAIL are 4786 * executed with the CY_SYSPM_CHECK_FAIL parameter. The CPU Deep Sleep mode is 4787 * not entered and the Cy_SysPm_CpuEnterDeepSleep() function returns 4788 * CY_SYSPM_FAIL. 4789 * 4790 * If all callbacks of the CY_SYSPM_DEEPSLEEP type with the CY_SYSPM_CHECK_READY 4791 * parameter return CY_SYSPM_SUCCESS, then all callbacks of the 4792 * CY_SYSPM_DEEPSLEEP type with the CY_SYSPM_CHECK_FAIL parameter calls are 4793 * skipped. All callbacks of the CY_SYSPM_DEEPSLEEP type with the 4794 * CY_SYSPM_BEFORE_TRANSITION parameter calls are then executed, allowing the 4795 * peripherals to prepare for CPU Deep Sleep. The Deep Sleep mode is then 4796 * entered. Any enabled interrupt can cause a wakeup from the Deep Sleep mode. 4797 * 4798 * \note The last callback that returns CY_SYSPM_FAIL is not executed with the 4799 * CY_SYSPM_CHECK_FAIL parameter because of the FAIL. The callback generating 4800 * CY_SYSPM_FAIL is expected to not make any changes that require being undone. 4801 * 4802 * For multi-CPU devices (except CY8C6xx6 and CY8C6xx7) there is a possible 4803 * situation when a syscall operation (for example during flash read or write) 4804 * is executing. If the CM0+ CPU tries to enter Deep Sleep, it will fail. All 4805 * the CY_SYSPM_DEEPSLEEP callbacks that were previously executed, are executed 4806 * with the CY_SYSPM_CHECK_FAIL parameter. Deep Sleep mode is not entered and 4807 * the Cy_SysPm_CpuEnterDeepSleep() function returns CY_SYSPM_SYSCALL_PENDING. 4808 * 4809 * The return value from executed callback functions with the 4810 * CY_SYSPM_CHECK_FAIL, CY_SYSPM_BEFORE_TRANSITION, and CY_SYSPM_AFTER_TRANSITION 4811 * modes are ignored. 4812 * 4813 * If the firmware attempts to enter this mode before the system is ready (that 4814 * is, when PWR_CONTROL.LPM_READY = 0), then the CPU(s) will go into the CPU 4815 * Sleep mode instead and automatically enter system Deep Sleep mode when the 4816 * system is ready. On dual CPU devices, if one CPU enters CPU Deep Sleep and the 4817 * other CPU remains active or is in CPU Sleep the first CPU will remain in CPU 4818 * Deep Sleep. A CPU Deep Sleep is functionally identical to CPU Sleep. 4819 * 4820 * The device enters system Deep Sleep mode when all the CPU(s) are in CPU 4821 * Deep Sleep, there are no busy peripherals, the debugger is not active, and the 4822 * Deep Sleep power and reference are ready (PWR_CONTROL.LPM_READY=1). 4823 * 4824 * The peripherals that do not need a clock or that receive a clock from their 4825 * external interface (e.g. I2C/SPI) may continue operating in system Deep Sleep. 4826 * All circuits using current from Vccdpslp supply are limited by its maximum 4827 * current specification of the Deep Sleep regulator. 4828 * 4829 * Wakeup occurs when an interrupt asserts from a Deep Sleep active peripheral. 4830 * For more detail, see the corresponding peripheral's datasheet. 4831 * 4832 * For multi-core devices, CPU wakeup can also be performed using the Send Event 4833 * (SEV) assembly instruction executed from the other active CPU. Such wakeup is 4834 * expected only if the CPU Sleep power mode is done with WFE assembly 4835 * instruction. 4836 * 4837 * \note 4838 * For multi-CPU devices, the second CPU, if it did not participate in 4839 * system wakeup, remains in CPU Deep Sleep mode. Any Deep Sleep capable 4840 * interrupt routed to this CPU can also wake it. 4841 * 4842 * For more detail about switching into the system Deep Sleep power mode and 4843 * debug, refer to the device TRM. 4844 * 4845 * A normal wakeup from the Deep Sleep power mode returns to either ULP or LP 4846 * mode, depending on the previous state and programmed behavior for the 4847 * particular wakeup interrupt. As soon as the system resumes LP or ULP mode the 4848 * CPU(s) return to CPU Active or CPU Deep Sleep mode, depending on their 4849 * configured wakeup settings. 4850 * 4851 * After wakeup from CPU Deep Sleep, all of the registered callbacks with 4852 * CY_SYSPM_DEEPSLEEP type with CY_SYSPM_AFTER_TRANSITION are executed to return 4853 * peripherals to active operation. The Cy_SysPm_CpuEnterDeepSleep() function 4854 * returns CY_SYSPM_SUCCESS. No callbacks are executed with CY_SYSPM_DEEPSLEEP 4855 * type with CY_SYSPM_BEFORE_TRANSITION or CY_SYSPM_AFTER_TRANSITION parameter, 4856 * if Deep Sleep mode was not entered. 4857 * 4858 * To support control of callback execution order th following method is 4859 * implemented. Callback function with the CY_SYSPM_CHECK_READY and 4860 * CY_SYSPM_BEFORE_TRANSITION parameter are executed in the same order they are 4861 * registered. Callback function with the CY_SYSPM_CHECK_FAIL and 4862 * CY_SYSPM_AFTER_TRANSITION parameter are executed in the reverse order they 4863 * are registered. 4864 * 4865 * \param waitFor 4866 * Selects wait for action. See \ref cy_en_syspm_waitfor_t. 4867 * 4868 * \sideeffect 4869 * For CY8C6xx6, CY8C6xx7 devices this function clears the Event Register of the 4870 * CM4 CPU after wakeup from WFE. 4871 * 4872 * \sideeffect 4873 * This function changes the slow and fast clock dividers right before 4874 * entering into system Deep Sleep and restores these dividers after wakeup. 4875 * 4876 * \return 4877 * Entered status, see \ref cy_en_syspm_status_t. 4878 * For the PSoC 64 devices there are possible situations when function returns 4879 * the PRA error status code. This is because for PSoC 64 devices the function 4880 * uses the PRA driver to change the protected registers. Refer to 4881 * \ref cy_en_pra_status_t for more details. 4882 * 4883 * \note 4884 * The FLL/PLL are not restored right before the CPU(s) start executing the 4885 * instructions after system Deep Sleep. This can affect the peripheral that is 4886 * driven by PLL/FLL. Ensure that the PLL/FLL are properly restored (locked) 4887 * after wakeup from System Deep Sleep. Refer to the 4888 * \ref group_sysclk driver documentation for information about how to 4889 * read the PLL/FLL lock statuses. 4890 * 4891 * \note The Arm BSD assembly instruction is not required in this function 4892 * because the function implementation ensures the SLEEPDEEP bit of SCS register 4893 * is settled prior executing the WFI/WFE instruction. 4894 * 4895 * \note 4896 * This parameter is available for CAT1B devices. 4897 * 4898 * \funcusage 4899 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_CpuEnterDeepSleep 4900 * 4901 *******************************************************************************/ 4902 cy_en_syspm_status_t Cy_SysPm_CpuEnterDeepSleep(cy_en_syspm_waitfor_t waitFor); 4903 4904 #if (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 2)) || defined (CY_IP_MXS22SRSS) || (defined (CY_IP_MXS40SSRSS) && (CY_MXS40SSRSS_VER_1_2 > 0UL)) || defined (CY_DOXYGEN) 4905 4906 /******************************************************************************* 4907 * Function Name: Cy_SysPm_SystemEnterLp 4908 ****************************************************************************//** 4909 * 4910 * Sets device into system Low Power mode. 4911 * 4912 * Returns the system to the default LP mode by raising the core voltage. 4913 * In the LP mode, the clock frequencies can be increased to t 4914 he LP mode 4915 * limitations. Refer to the device datasheet for frequency limitations in the 4916 * LP mode. Approximate LP limit values - \ref group_syspm_lp_limitations. 4917 * 4918 * Prior to entering the system LP mode, all the registered CY_SYSPM_LP callbacks 4919 * with CY_SYSPM_CHECK_READY parameter are called. This allows the driver to 4920 * signal that it is not ready to enter the system LP mode. If any CY_SYSPM_LP 4921 * callbacks with the CY_SYSPM_CHECK_READY parameter call return CY_SYSPM_FAIL, 4922 * the remaining CY_SYSPM_LP callbacks with the 4923 * CY_SYSPM_CHECK_READY parameter calls are skipped. 4924 * 4925 * After a CY_SYSPM_FAIL, all of the CY_SYSPM_LP callbacks with 4926 * CY_SYSPM_CHECK_FAIL parameter are executed that correspond to the 4927 * CY_SYSPM_LP callbacks with CY_SYSPM_CHECK_READY parameter that occurred up to 4928 * the point of failure. System LP mode is not entered and the 4929 * Cy_SysPm_SystemEnterLp() function returns CY_SYSPM_FAIL. 4930 * 4931 * If all CY_SYSPM_LP callbacks with the CY_SYSPM_CHECK_READY 4932 * parameter return CY_SYSPM_SUCCESS, then all CY_SYSPM_LP callbacks with 4933 * CY_SYSPM_CHECK_FAIL are skipped and all CY_SYSPM_LP callbacks with the 4934 * CY_SYSPM_BEFORE_TRANSITION parameter are executed. This allows the 4935 * peripherals to prepare for LP mode. The system LP mode is then entered. 4936 * 4937 * After entering the system LP mode, all of the registered 4938 * CY_SYSPM_LP callbacks with the CY_SYSPM_AFTER_TRANSITION parameter 4939 * are executed to complete preparing the peripherals for low power operation. 4940 * The Cy_SysPm_SystemEnterLp() function returns CY_SYSPM_SUCCESS. 4941 * No CY_SYSPM_LP callbacks with the CY_SYSPM_BEFORE_TRANSITION or 4942 * CY_SYSPM_AFTER_TRANSITION parameter are executed if the system LP mode is not 4943 * entered. 4944 * 4945 * \note The last callback that returns CY_SYSPM_FAIL is not executed with the 4946 * CY_SYSPM_CHECK_FAIL parameter because of the FAIL. The callback generating 4947 * CY_SYSPM_FAIL is expected to not make any changes that require being undone. 4948 * 4949 * \note CAT1D devices support ULP, LP and HP modes, transitioning between 4950 * ULP <-> HP modes requires LP mode to be entered first and then to the 4951 * required mode. 4952 * 4953 * The return value from executed callback functions with the 4954 * CY_SYSPM_CHECK_FAIL, CY_SYSPM_BEFORE_TRANSITION, and CY_SYSPM_AFTER_TRANSITION 4955 * modes are ignored. 4956 * 4957 * To support control of callback execution order th following method is 4958 * implemented. Callback function with the CY_SYSPM_CHECK_READY and 4959 * CY_SYSPM_BEFORE_TRANSITION parameter are executed in the same order they are 4960 * registered. Callback function with the CY_SYSPM_CHECK_FAIL and 4961 * CY_SYSPM_AFTER_TRANSITION parameter are executed in the reverse order they 4962 * are registered. 4963 * 4964 * \return 4965 * - CY_SYSPM_SUCCESS - Entered the system LP mode or the device is already in LP mode. 4966 * - CY_SYSPM_INVALID_STATE - The system LP mode was not set. The system LP mode 4967 * was not set because the protection context value is higher than zero 4968 * (PC > 0) or the device revision does not support modifying registers 4969 * (to enter LP mode) via syscall. 4970 * - CY_SYSPM_CANCELED - Operation was canceled. Call the function again until 4971 * the function returns CY_SYSPM_SUCCESS. 4972 * - CY_SYSPM_FAIL - The system LP mode is not entered. 4973 * For the PSoC 64 devices there are possible situations when function returns 4974 * the PRA error status code. This is because for PSoC 64 devices the function 4975 * uses the PRA driver to change the protected registers. Refer to 4976 * \ref cy_en_pra_status_t for more details. 4977 * 4978 * \note 4979 * This API is available for CAT1A, CAT1B(PSoC C3) & CAT1D devices. 4980 * 4981 * \funcusage 4982 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_SystemEnterLp 4983 * 4984 *******************************************************************************/ 4985 cy_en_syspm_status_t Cy_SysPm_SystemEnterLp(void); 4986 4987 4988 /******************************************************************************* 4989 * Function Name: Cy_SysPm_SystemEnterUlp 4990 ****************************************************************************//** 4991 * 4992 * Sets device into system Ultra Low Power mode. 4993 * 4994 * System ULP mode is similar to system LP mode. The difference is that the 4995 * system is put under \ref group_syspm_ulp_limitations. 4996 * 4997 * Before entering system ULP mode, the user must configure the system so 4998 * the maximum clock frequencies are less than the ULP mode specifications 4999 * presented in the device datasheet. Refer to the device datasheet for 5000 * the maximum clock limitations in the ULP mode with reduced core supply 5001 * regulator voltages. 5002 * 5003 * Prior to entering system ULP mode, all the registered CY_SYSPM_ULP callbacks 5004 * with CY_SYSPM_CHECK_READY parameter are called. This allows the driver to 5005 * signal if it is not ready to enter system ULP mode. If any CY_SYSPM_ULP 5006 * callback with the CY_SYSPM_CHECK_READY parameter call returns CY_SYSPM_FAIL, 5007 * the remaining CY_SYSPM_ULP callbacks with the CY_SYSPM_CHECK_READY parameter 5008 * are skipped. 5009 * 5010 * After a CY_SYSPM_FAIL, all of the CY_SYSPM_ULP callbacks with the 5011 * CY_SYSPM_CHECK_FAIL parameter are executed that correspond to the 5012 * CY_SYSPM_ULP callback with CY_SYSPM_CHECK_READY parameter that occurred up to 5013 * the point of failure. System ULP mode is not entered 5014 * and the Cy_SysPm_SystemEnterUlp() function returns CY_SYSPM_FAIL. 5015 * 5016 * If all CY_SYSPM_ULP callbacks with the CY_SYSPM_CHECK_READY 5017 * parameter return CY_SYSPM_SUCCESS, then all CY_SYSPM_ULP 5018 * callbacks with CY_SYSPM_CHECK_FAIL calls are skipped and all CY_SYSPM_ULP 5019 * callbacks with the CY_SYSPM_BEFORE_TRANSITION parameter are executed. This 5020 * allows preparation for ULP. The system ULP mode is then entered. 5021 * 5022 * After entering system ULP, all of the registered CY_SYSPM_ULP callbacks with 5023 * the CY_SYSPM_AFTER_TRANSITION parameter are executed to complete preparing the 5024 * peripherals for ULP operation. The Cy_SysPm_SystemEnterUlp() function 5025 * returns CY_SYSPM_SUCCESS. No CY_SYSPM_ULP callbacks with the 5026 * CY_SYSPM_BEFORE_TRANSITION or CY_SYSPM_AFTER_TRANSITION parameter are 5027 * executed, if ULP mode is not entered. 5028 * 5029 * \note The last callback that returns CY_SYSPM_FAIL is not executed with the 5030 * CY_SYSPM_CHECK_FAIL parameter because of the FAIL. The callback generating 5031 * CY_SYSPM_FAIL is expected to not make any changes that require being undone. 5032 * 5033 * \note CAT1D devices support ULP, LP and HP modes, transitioning between 5034 * ULP <-> HP modes requires LP mode to be entered first and then to the 5035 * required mode. 5036 * 5037 * The return value from executed callback functions with the 5038 * CY_SYSPM_CHECK_FAIL, CY_SYSPM_BEFORE_TRANSITION, and CY_SYSPM_AFTER_TRANSITION 5039 * modes are ignored. 5040 * 5041 * To support control of callback execution order th following method is 5042 * implemented. Callback function with the CY_SYSPM_CHECK_READY and 5043 * CY_SYSPM_BEFORE_TRANSITION parameter are executed in the same order they are 5044 * registered. Callback function with the CY_SYSPM_CHECK_FAIL and 5045 * CY_SYSPM_AFTER_TRANSITION parameter are executed in the reverse order they 5046 * are registered. 5047 * 5048 * \return 5049 * - CY_SYSPM_SUCCESS - Entered the system ULP mode or the device is already in ULP mode. 5050 * - CY_SYSPM_INVALID_STATE - System ULP mode was not set. The ULP mode was not 5051 * set because the protection context value is higher than zero (PC > 0) or the 5052 * device revision does not support modifying registers (to enter system 5053 * ULP mode) via syscall. 5054 * - CY_SYSPM_CANCELED - Operation was canceled. Call the function again until 5055 * the function returns CY_SYSPM_SUCCESS. 5056 * - CY_SYSPM_FAIL - The system ULP mode is not entered. 5057 * For the PSoC 64 devices there are possible situations when function returns 5058 * the PRA error status code. This is because for PSoC 64 devices the function 5059 * uses the PRA driver to change the protected registers. Refer to 5060 * \ref cy_en_pra_status_t for more details. 5061 * 5062 * \note 5063 * This API is available for CAT1A, CAT1B(PSoC C3) & CAT1D devices. 5064 * 5065 * \funcusage 5066 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_SystemEnterUlp 5067 * 5068 *******************************************************************************/ 5069 cy_en_syspm_status_t Cy_SysPm_SystemEnterUlp(void); 5070 5071 5072 #if defined (CY_IP_MXS22SRSS) || defined (CY_IP_MXS40SSRSS) && (CY_MXS40SSRSS_VER_1_2 > 0UL) || defined (CY_DOXYGEN) 5073 5074 #if defined (CY_IP_MXS22SRSS) 5075 /******************************************************************************* 5076 * Function Name: Cy_SysPm_SystemEnterHp 5077 ****************************************************************************//** 5078 * 5079 * Sets device into System High Performance mode. 5080 * 5081 * System HP mode is similar to system LP and ULP mode. The difference is that the 5082 * system is put at voltage which are above LP and ULP. 5083 * 5084 * Before entering system HP mode, the user must configure the system so 5085 * the maximum clock frequencies are at HP mode specifications 5086 * presented in the device datasheet. Refer to the device datasheet for 5087 * the maximum clock limitations in the HP mode with reduced core supply 5088 * regulator voltages. 5089 * 5090 * Prior to entering system HP mode, all the registered CY_SYSPM_HP callbacks 5091 * with CY_SYSPM_CHECK_READY parameter are called. This allows the driver to 5092 * signal if it is not ready to enter system HP mode. If any CY_SYSPM_HP 5093 * callback with the CY_SYSPM_CHECK_READY parameter call returns CY_SYSPM_FAIL, 5094 * the remaining CY_SYSPM_HP callbacks with the CY_SYSPM_CHECK_READY parameter 5095 * are skipped. 5096 * 5097 * After a CY_SYSPM_FAIL, all of the CY_SYSPM_HP callbacks with the 5098 * CY_SYSPM_CHECK_FAIL parameter are executed that correspond to the 5099 * CY_SYSPM_HP callback with CY_SYSPM_CHECK_READY parameter that occurred up to 5100 * the point of failure. System HP mode is not entered 5101 * and the Cy_SysPm_SystemEnterHp() function returns CY_SYSPM_FAIL. 5102 * 5103 * If all CY_SYSPM_HP callbacks with the CY_SYSPM_CHECK_READY 5104 * parameter return CY_SYSPM_SUCCESS, then all CY_SYSPM_HP 5105 * callbacks with CY_SYSPM_CHECK_FAIL calls are skipped and all CY_SYSPM_HP 5106 * callbacks with the CY_SYSPM_BEFORE_TRANSITION parameter are executed. This 5107 * allows preparation for HP. The system HP mode is then entered. 5108 * 5109 * After entering system HP, all of the registered CY_SYSPM_HP callbacks with 5110 * the CY_SYSPM_AFTER_TRANSITION parameter are executed to complete preparing the 5111 * peripherals for HP operation. The Cy_SysPm_SystemEnterUlp() function 5112 * returns CY_SYSPM_SUCCESS. No CY_SYSPM_HP callbacks with the 5113 * CY_SYSPM_BEFORE_TRANSITION or CY_SYSPM_AFTER_TRANSITION parameter are 5114 * executed, if HP mode is not entered. 5115 * 5116 * \note The last callback that returns CY_SYSPM_FAIL is not executed with the 5117 * CY_SYSPM_CHECK_FAIL parameter because of the FAIL. The callback generating 5118 * CY_SYSPM_FAIL is expected to not make any changes that require being undone. 5119 * 5120 * \note CAT1D devices support ULP, LP and HP modes, transitioning between 5121 * ULP <-> HP modes requires LP mode to be entered first and then to the 5122 * required mode. 5123 * 5124 * The return value from executed callback functions with the 5125 * CY_SYSPM_CHECK_FAIL, CY_SYSPM_BEFORE_TRANSITION, and CY_SYSPM_AFTER_TRANSITION 5126 * modes are ignored. 5127 * 5128 * To support control of callback execution order th following method is 5129 * implemented. Callback function with the CY_SYSPM_CHECK_READY and 5130 * CY_SYSPM_BEFORE_TRANSITION parameter are executed in the same order they are 5131 * registered. Callback function with the CY_SYSPM_CHECK_FAIL and 5132 * CY_SYSPM_AFTER_TRANSITION parameter are executed in the reverse order they 5133 * are registered. 5134 * 5135 * \return 5136 * - CY_SYSPM_SUCCESS - Entered the system HP mode or the device is already in HP mode. 5137 * - CY_SYSPM_INVALID_STATE - System HP mode was not set. The HP mode was not 5138 * set because the protection context value is higher than zero (PC > 0) or the 5139 * device revision does not support modifying registers (to enter system 5140 * HP mode) via syscall. 5141 * - CY_SYSPM_CANCELED - Operation was canceled. Call the function again until 5142 * the function returns CY_SYSPM_SUCCESS. 5143 * - CY_SYSPM_FAIL - The system HP mode is not entered. 5144 * For the PSoC 64 devices there are possible situations when function returns 5145 * the PRA error status code. This is because for PSoC 64 devices the function 5146 * uses the PRA driver to change the protected registers. Refer to 5147 * \ref cy_en_pra_status_t for more details. 5148 * 5149 * \note 5150 * This API is available only for CAT1D devices. 5151 * 5152 * \funcusage 5153 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_SystemEnterHp 5154 * 5155 *******************************************************************************/ 5156 cy_en_syspm_status_t Cy_SysPm_SystemEnterHp(void); 5157 5158 #endif 5159 5160 #if defined (CY_IP_MXS40SSRSS) && (CY_MXS40SSRSS_VER_1_2 > 0UL) 5161 /******************************************************************************* 5162 * Function Name: Cy_SysPm_SystemEnterMf 5163 ****************************************************************************//** 5164 * 5165 * Sets device into system Medium Frequency(MF) Low Power mode. 5166 * 5167 * System MF mode is similar to system LP and ULP mode. The difference is that the 5168 * system is put under voltage which are in between LP and ULP. 5169 * 5170 * Before entering system MF mode, the user must configure the system so 5171 * the maximum clock frequencies are less than the MF mode specifications 5172 * presented in the device datasheet. Refer to the device datasheet for 5173 * the maximum clock limitations in the MF mode with reduced core supply 5174 * regulator voltages. 5175 * 5176 * Prior to entering system MF mode, all the registered CY_SYSPM_MF callbacks 5177 * with CY_SYSPM_CHECK_READY parameter are called. This allows the driver to 5178 * signal if it is not ready to enter system MF mode. If any CY_SYSPM_MF 5179 * callback with the CY_SYSPM_CHECK_READY parameter call returns CY_SYSPM_FAIL, 5180 * the remaining CY_SYSPM_MF callbacks with the CY_SYSPM_CHECK_READY parameter 5181 * are skipped. 5182 * 5183 * After a CY_SYSPM_FAIL, all of the CY_SYSPM_MF callbacks with the 5184 * CY_SYSPM_CHECK_FAIL parameter are executed that correspond to the 5185 * CY_SYSPM_MF callback with CY_SYSPM_CHECK_READY parameter that occurred up to 5186 * the point of failure. System MF mode is not entered 5187 * and the Cy_SysPm_SystemEnterMf() function returns CY_SYSPM_FAIL. 5188 * 5189 * If all CY_SYSPM_MF callbacks with the CY_SYSPM_CHECK_READY 5190 * parameter return CY_SYSPM_SUCCESS, then all CY_SYSPM_MF 5191 * callbacks with CY_SYSPM_CHECK_FAIL calls are skipped and all CY_SYSPM_MF 5192 * callbacks with the CY_SYSPM_BEFORE_TRANSITION parameter are executed. This 5193 * allows preparation for MF. The system MF mode is then entered. 5194 * 5195 * After entering system MF, all of the registered CY_SYSPM_MF callbacks with 5196 * the CY_SYSPM_AFTER_TRANSITION parameter are executed to complete preparing the 5197 * peripherals for MF operation. The Cy_SysPm_SystemEnterUlp() function 5198 * returns CY_SYSPM_SUCCESS. No CY_SYSPM_MF callbacks with the 5199 * CY_SYSPM_BEFORE_TRANSITION or CY_SYSPM_AFTER_TRANSITION parameter are 5200 * executed, if MF mode is not entered. 5201 * 5202 * \note The last callback that returns CY_SYSPM_FAIL is not executed with the 5203 * CY_SYSPM_CHECK_FAIL parameter because of the FAIL. The callback generating 5204 * CY_SYSPM_FAIL is expected to not make any changes that require being undone. 5205 * 5206 * The return value from executed callback functions with the 5207 * CY_SYSPM_CHECK_FAIL, CY_SYSPM_BEFORE_TRANSITION, and CY_SYSPM_AFTER_TRANSITION 5208 * modes are ignored. 5209 * 5210 * To support control of callback execution order th following method is 5211 * implemented. Callback function with the CY_SYSPM_CHECK_READY and 5212 * CY_SYSPM_BEFORE_TRANSITION parameter are executed in the same order they are 5213 * registered. Callback function with the CY_SYSPM_CHECK_FAIL and 5214 * CY_SYSPM_AFTER_TRANSITION parameter are executed in the reverse order they 5215 * are registered. 5216 * 5217 * \return 5218 * - CY_SYSPM_SUCCESS - Entered the system MF mode or the device is already in MF mode. 5219 * - CY_SYSPM_INVALID_STATE - System MF mode was not set. The MF mode was not 5220 * set because the protection context value is higher than zero (PC > 0) or the 5221 * device revision does not support modifying registers (to enter system 5222 * MF mode) via syscall. 5223 * - CY_SYSPM_CANCELED - Operation was canceled. Call the function again until 5224 * the function returns CY_SYSPM_SUCCESS. 5225 * - CY_SYSPM_FAIL - The system MF mode is not entered. 5226 * For the PSoC 64 devices there are possible situations when function returns 5227 * the PRA error status code. This is because for PSoC 64 devices the function 5228 * uses the PRA driver to change the protected registers. Refer to 5229 * \ref cy_en_pra_status_t for more details. 5230 * 5231 * \note 5232 * This API is available only for CAT1B(PSoC C3) devices. 5233 * 5234 * \funcusage 5235 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_SystemEnterMf 5236 * 5237 *******************************************************************************/ 5238 cy_en_syspm_status_t Cy_SysPm_SystemEnterMf(void); 5239 5240 5241 /******************************************************************************* 5242 * Function Name: Cy_SysPm_SystemEnterOd 5243 ****************************************************************************//** 5244 * 5245 * Sets device into system Over drive Power mode. 5246 * 5247 * System OD mode is similar to system LP mode. The difference is that the 5248 * system is put under voltage which are is higher than LP. 5249 * 5250 * Before entering system OD mode, the user must configure the system so 5251 * the maximum clock frequencies are less than the OD mode specifications 5252 * presented in the device datasheet. Refer to the device datasheet for 5253 * the maximum clock limitations in the ULP mode with reduced core supply 5254 * regulator voltages. 5255 * 5256 * Prior to entering system OD mode, all the registered CY_SYSPM_OD callbacks 5257 * with CY_SYSPM_CHECK_READY parameter are called. This allows the driver to 5258 * signal if it is not ready to enter system OD mode. If any CY_SYSPM_OD 5259 * callback with the CY_SYSPM_CHECK_READY parameter call returns CY_SYSPM_FAIL, 5260 * the remaining CY_SYSPM_OD callbacks with the CY_SYSPM_CHECK_READY parameter 5261 * are skipped. 5262 * 5263 * After a CY_SYSPM_FAIL, all of the CY_SYSPM_OD callbacks with the 5264 * CY_SYSPM_CHECK_FAIL parameter are executed that correspond to the 5265 * CY_SYSPM_OD callback with CY_SYSPM_CHECK_READY parameter that occurred up to 5266 * the point of failure. System OD mode is not entered 5267 * and the Cy_SysPm_SystemEnterOd() function returns CY_SYSPM_FAIL. 5268 * 5269 * If all CY_SYSPM_OD callbacks with the CY_SYSPM_CHECK_READY 5270 * parameter return CY_SYSPM_SUCCESS, then all CY_SYSPM_OD 5271 * callbacks with CY_SYSPM_CHECK_FAIL calls are skipped and all CY_SYSPM_OD 5272 * callbacks with the CY_SYSPM_BEFORE_TRANSITION parameter are executed. This 5273 * allows preparation for OD. The system OD mode is then entered. 5274 * 5275 * After entering system OD, all of the registered CY_SYSPM_OD callbacks with 5276 * the CY_SYSPM_AFTER_TRANSITION parameter are executed to complete preparing the 5277 * peripherals for OD operation. The Cy_SysPm_SystemEnterOd() function 5278 * returns CY_SYSPM_SUCCESS. No CY_SYSPM_OD callbacks with the 5279 * CY_SYSPM_BEFORE_TRANSITION or CY_SYSPM_AFTER_TRANSITION parameter are 5280 * executed, if OD mode is not entered. 5281 * 5282 * \note The last callback that returns CY_SYSPM_FAIL is not executed with the 5283 * CY_SYSPM_CHECK_FAIL parameter because of the FAIL. The callback generating 5284 * CY_SYSPM_FAIL is expected to not make any changes that require being undone. 5285 * 5286 * The return value from executed callback functions with the 5287 * CY_SYSPM_CHECK_FAIL, CY_SYSPM_BEFORE_TRANSITION, and CY_SYSPM_AFTER_TRANSITION 5288 * modes are ignored. 5289 * 5290 * To support control of callback execution order th following method is 5291 * implemented. Callback function with the CY_SYSPM_CHECK_READY and 5292 * CY_SYSPM_BEFORE_TRANSITION parameter are executed in the same order they are 5293 * registered. Callback function with the CY_SYSPM_CHECK_FAIL and 5294 * CY_SYSPM_AFTER_TRANSITION parameter are executed in the reverse order they 5295 * are registered. 5296 * 5297 * \return 5298 * - CY_SYSPM_SUCCESS - Entered the system ULP mode or the device is already in ULP mode. 5299 * - CY_SYSPM_INVALID_STATE - System ULP mode was not set. The ULP mode was not 5300 * set because the protection context value is higher than zero (PC > 0) or the 5301 * device revision does not support modifying registers (to enter system 5302 * ULP mode) via syscall. 5303 * - CY_SYSPM_CANCELED - Operation was canceled. Call the function again until 5304 * the function returns CY_SYSPM_SUCCESS. 5305 * - CY_SYSPM_FAIL - The system OD mode is not entered. 5306 * 5307 * \note 5308 * This API is available for CAT1B(PSoC C3) devices. 5309 * 5310 * \funcusage 5311 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_SystemEnterOd 5312 * 5313 *******************************************************************************/ 5314 cy_en_syspm_status_t Cy_SysPm_SystemEnterOd(void); 5315 5316 #endif 5317 5318 #if defined (CY_IP_MXS22SRSS) 5319 /******************************************************************************* 5320 * Function Name: Cy_SysPm_SetRamTrimsPreDs 5321 ****************************************************************************//** 5322 * 5323 * Sets RAM trims before entering Deepsleep. 5324 * 5325 * \note 5326 * This API is available for CAT1D devices. 5327 * 5328 *******************************************************************************/ 5329 void Cy_SysPm_SetRamTrimsPreDs(void); 5330 5331 /******************************************************************************* 5332 * Function Name: Cy_SysPm_SetRamTrimsPostDs 5333 ****************************************************************************//** 5334 * 5335 * Sets RAM trims After exiting Deepsleep. 5336 * 5337 * \note 5338 * This API is available for CAT1D devices. 5339 * 5340 *******************************************************************************/ 5341 void Cy_SysPm_SetRamTrimsPostDs(void); 5342 5343 #endif 5344 5345 #endif /* CY_IP_MXS22SRSS || defined (CY_DOXYGEN)*/ 5346 5347 5348 #endif /* (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 2)) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) || 5349 (defined (CY_IP_MXS40SSRSS) && (CY_MXS40SSRSS_VER_1_2 > 0UL))*/ 5350 5351 /******************************************************************************* 5352 * Function Name: Cy_SysPm_SystemEnterHibernate 5353 ****************************************************************************//** 5354 * 5355 * Sets the device into system Hibernate mode. 5356 * 5357 * Puts the device into the system Hibernate power mode. Prior to entering 5358 * Hibernate mode, all callbacks of the CY_SYSPM_HIBERNATE type are executed. 5359 * 5360 * First, callbacks of the CY_SYSPM_HIBERNATE type are called with the 5361 * CY_SYSPM_CHECK_READY parameter. This allows the callback to signal that the 5362 * driver is not ready to enter the system Hibernate power mode. If any of the 5363 * callback return CY_SYSPM_FAIL, the remaining CY_SYSPM_HIBERNATE callbacks are 5364 * skipped. In this case, all of the callbacks that have already been called are 5365 * called again with the CY_SYSPM_CHECK_FAIL parameter. System Hibernate mode is 5366 * not entered and the Cy_SysPm_SystemEnterHibernate() function returns 5367 * CY_SYSPM_FAIL. 5368 * 5369 * If all CY_SYSPM_HIBERNATE callbacks with the CY_SYSPM_CHECK_READY parameter 5370 * return CY_SYSPM_SUCCESS, then all CY_SYSPM_HIBERNATE callbacks with 5371 * CY_SYSPM_CHECK_FAIL calls are skipped and all CY_SYSPM_HIBERNATE callbacks 5372 * with CY_SYSPM_BEFORE_TRANSITION parameter are executed allowing the 5373 * peripherals to prepare for system Hibernate. 5374 * 5375 * The I/O output state is automatically frozen by hardware system and Hibernate 5376 * mode is then entered. In Hibernate mode, all internal supplies are off and no 5377 * internal state is retained. The only exception is resources powered by the 5378 * Vbackup domain continue to operate, if enabled. For multi-CPU devices, there 5379 * is no handshake with the CPUs and the chip will enter Hibernate power 5380 * mode immediately. 5381 * 5382 * \note The last callback that returns CY_SYSPM_FAIL is not executed with the 5383 * CY_SYSPM_CHECK_FAIL parameter because of the FAIL. The callback generating 5384 * CY_SYSPM_FAIL is expected to not make any changes that require being undone. 5385 * 5386 * The return value from executed callback functions with the 5387 * CY_SYSPM_CHECK_FAIL, CY_SYSPM_BEFORE_TRANSITION, and CY_SYSPM_AFTER_TRANSITION 5388 * modes are ignored. 5389 * 5390 * Wakeup from system Hibernate is triggered by toggling the wakeup pin(s), WDT 5391 * match, or back-up domain RTC alarm expiration, depending on how the they are 5392 * configured. A wakeup causes a normal boot procedure. 5393 * To configure the wakeup pin(s), a digital input pin must be configured, and 5394 * resistively pulled up or down to the inverse state of the wakeup polarity. To 5395 * distinguish a Hibernate mode from a general reset wakeup event, the 5396 * Cy_SysLib_GetResetReason() function can be used. The wakeup pin and low-power 5397 * comparators are active-low by default. The wakeup pin or the LPComparators 5398 * polarity can be changed with the \ref Cy_SysPm_SetHibernateWakeupSource() 5399 * function. 5400 * This function call will not return if system Hibernate mode is entered. 5401 * The CY_SYSPM_HIBERNATE callbacks with the CY_SYSPM_AFTER_TRANSITION parameter 5402 * are never executed. 5403 * 5404 * This function freezes the I/O pins implicitly. Entering system Hibernate mode 5405 * before freezing the I/O pins is not possible. The I/O pins remain frozen after 5406 * waking from Hibernate mode until the firmware unfreezes them with 5407 * a \ref Cy_SysPm_IoUnfreeze() function call. 5408 * 5409 * Boot firmware should reconfigure the I/O pins as required by the application 5410 * prior unfreezing them. 5411 * 5412 * To support control of callback execution order the following method is 5413 * implemented. Callback function with the CY_SYSPM_CHECK_READY and 5414 * CY_SYSPM_BEFORE_TRANSITION parameter are executed in the same order they are 5415 * registered. Callback function with the CY_SYSPM_CHECK_FAIL and 5416 * CY_SYSPM_AFTER_TRANSITION parameter are executed in the reverse order they 5417 * are registered. 5418 * 5419 * \return 5420 * Entered status, see \ref cy_en_syspm_status_t. 5421 * For the PSoC 64 devices there are possible situations when function returns 5422 * the PRA error status code. This is because for PSoC 64 devices the function 5423 * uses the PRA driver to change the protected registers. Refer to 5424 * \ref cy_en_pra_status_t for more details. 5425 * 5426 * \funcusage 5427 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_SystemEnterHibernate 5428 * 5429 *******************************************************************************/ 5430 cy_en_syspm_status_t Cy_SysPm_SystemEnterHibernate(void); 5431 5432 5433 /******************************************************************************* 5434 * Function Name: Cy_SysPm_SetHibernateWakeupSource 5435 ****************************************************************************//** 5436 * 5437 * This function configures sources to wake up the device from the system 5438 * Hibernate power mode. Sources can be wakeup pins, LPComparators, Watchdog (WDT) 5439 * interrupt, or a Real-Time clock (RTC) alarm (interrupt). Wakeup from system 5440 * Hibernate always results in a device reset and normal boot process. 5441 * 5442 * Wakeup pins: 5443 * 5444 * A wakeup is supported by up to two pins with programmable polarity. These pins 5445 * are typically connected to the GPIO pins or on-chip peripherals under some 5446 * conditions. See device datasheet for specific pin connections. 5447 * Setting the wakeup pin to this level will cause a wakeup from system Hibernate 5448 * mode. The wakeup pins are active-low by default. 5449 * 5450 * LPComparators: 5451 * 5452 * A wakeup is supported by up to two LPComps with programmable polarity. 5453 * Setting the LPComp to this level will cause a wakeup from system Hibernate 5454 * mode. The wakeup LPComps are active-low by default. 5455 * 5456 * \note The low-power comparators should be configured and enabled before 5457 * switching to system Hibernate mode. Refer to the LPComp 5458 * driver description for more detail. 5459 * 5460 * Watchdog Timer: 5461 * 5462 * \note The WDT should be configured and enabled before entering to system 5463 * Hibernate mode. 5464 * 5465 * A wakeup is performed by a WDT interrupt. 5466 * 5467 * Real-time Clock: 5468 * 5469 * A wakeup is performed by the RTC alarm. 5470 * Refer to the Real-Time Clock (RTC) driver description for more detail. 5471 * 5472 * For information about wakeup sources and their assignment in specific 5473 * devices, refer to the appropriate device TRM. 5474 * 5475 * \param wakeupSource 5476 * The source to be configured as a wakeup source from 5477 * the system Hibernate power mode, see \ref cy_en_syspm_hibernate_wakeup_source_t. 5478 * The input parameter values can be ORed. For example, if you want to enable 5479 * LPComp0 (active high) and WDT, call this function: 5480 * Cy_SysPm_SetHibernateWakeupSource(CY_SYSPM_HIBERNATE_LPCOMP0_HIGH | CY_SYSPM_HIBERNATE_WDT). 5481 * 5482 * \warning Do not call this function with different polarity levels for the same 5483 * wakeup source. For example, do not call a function like this: 5484 * Cy_SysPm_SetHibernateWakeupSource(CY_SYSPM_HIBERNATE_LPCOMP0_LOW, CY_SYSPM_HIBERNATE_LPCOMP0_HIGH); 5485 * 5486 * \funcusage 5487 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_SetHibernateWakeupSource 5488 * 5489 *******************************************************************************/ 5490 void Cy_SysPm_SetHibernateWakeupSource(uint32_t wakeupSource); 5491 5492 5493 /******************************************************************************* 5494 * Function Name: Cy_SysPm_ClearHibernateWakeupSource 5495 ****************************************************************************//** 5496 * 5497 * This function disables a wakeup source that was previously configured to 5498 * wake up the device from the system Hibernate mode. 5499 * 5500 * \param wakeupSource 5501 * For the source to be disabled, see \ref cy_en_syspm_hibernate_wakeup_source_t. 5502 * The input parameters values can be ORed. For example, if you want to disable 5503 * LPComp0 (active high) and WDT call this function: 5504 * Cy_SysPm_ClearHibernateWakeupSource(CY_SYSPM_HIBERNATE_LPCOMP0_HIGH | CY_SYSPM_HIBERNATE_WDT). 5505 * 5506 * \funcusage 5507 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_ClearHibernateWakeupSource 5508 * 5509 *******************************************************************************/ 5510 void Cy_SysPm_ClearHibernateWakeupSource(uint32_t wakeupSource); 5511 5512 #if defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS22SRSS) || (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION == 3u) && defined (CY_IP_MXS40SRSS_VERSION_MINOR) && (CY_IP_MXS40SRSS_VERSION_MINOR >= 3u)) || defined (CY_DOXYGEN) 5513 /******************************************************************************* 5514 * Function Name: Cy_SysPm_GetHibernateWakeupCause 5515 ****************************************************************************//** 5516 * 5517 * This function gets the wakeup cause for Hibernate mode. 5518 * 5519 * \return 5520 * Wakeup Reason \ref cy_en_syspm_hibernate_wakeup_source_t 5521 * 5522 * \note 5523 * This API is available for CAT1B, CAT1C (Traveo II Cluster) and CAT1D devices. 5524 * 5525 *******************************************************************************/ 5526 cy_en_syspm_hibernate_wakeup_source_t Cy_SysPm_GetHibernateWakeupCause(void); 5527 5528 /******************************************************************************* 5529 * Function Name: Cy_SysPm_ClearHibernateWakeupCause 5530 ****************************************************************************//** 5531 * 5532 * This function Clears the wakeup cause register. 5533 * 5534 * \note 5535 * This API is available for CAT1B, CAT1C (Traveo II Cluster) and CAT1D devices. 5536 * 5537 *******************************************************************************/ 5538 void Cy_SysPm_ClearHibernateWakeupCause(void); 5539 5540 #endif 5541 5542 5543 5544 /******************************************************************************* 5545 * Function Name: Cy_SysPm_SystemSetMinRegulatorCurrent 5546 ****************************************************************************//** 5547 * 5548 * Sets the system into minimum core regulator current mode. This mode limits 5549 * maximum current available for the system core logic. 5550 * 5551 * Minimum regulator current mode modifies operation of the system in LP or ULP 5552 * modes to further reduce current consumption. If the system current is below 5553 * datasheet current limits for the active core voltage regulator (LDO or Buck), 5554 * this mode may be entered. The user is responsible for ensuring the 5555 * regulator current limit is met in their application. 5556 * 5557 * When in minimum regulator current mode, the following system resources are 5558 * also set to their LP mode: 5559 * - Linear regulator (If LDO is active regulator) 5560 * - POR/BOD circuit 5561 * - Bandgap reference circuit 5562 * - Reference buffer circuit 5563 * - Current reference circuit 5564 * 5565 * The LDO and Buck current limits must be met prior to entering this 5566 * mode. If these are not met, the device may brown out, resulting in an 5567 * exception or reset. These changes also reduce power supply rejection of 5568 * the affected system resources, which can result in increased noise or response 5569 * time. These effects must be evaluated in each application. 5570 * 5571 * \return 5572 * See \ref cy_en_syspm_status_t. 5573 * - CY_SYSPM_SUCCESS - Minimum regulator current mode was set 5574 * - CY_SYSPM_CANCELED - The power circuits were not ready to enter into 5575 * minimum current mode. You should call the function again. 5576 * For the PSoC 64 devices there are possible situations when function returns 5577 * the PRA error status code. This is because for PSoC 64 devices the function 5578 * uses the PRA driver to change the protected registers. Refer to 5579 * \ref cy_en_pra_status_t for more details. 5580 * 5581 * Refer to device datasheet for maximum current value in regulator minimum 5582 * current mode. 5583 * 5584 * \funcusage 5585 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_SystemSetMinRegulatorCurrent 5586 * 5587 *******************************************************************************/ 5588 cy_en_syspm_status_t Cy_SysPm_SystemSetMinRegulatorCurrent(void); 5589 5590 5591 /******************************************************************************* 5592 * Function Name: Cy_SysPm_SystemSetNormalRegulatorCurrent 5593 ****************************************************************************//** 5594 * 5595 * Sets the system to normal regulator current mode. 5596 * 5597 * Normal regulator current mode modifies operation of the system in LP or ULP 5598 * modes to provide maximum core current consumption. If the LDO core regulator 5599 * is in use, the normal mode output current limits may be used. If the buck 5600 * regulator is in use, its reduced current output limits still apply. 5601 * 5602 * When in normal regulator current mode, the following system resources are set 5603 * to their normal mode: 5604 * - Linear regulator (If LDO is active regulator) 5605 * - POR/BOD circuit 5606 * - Bandgap reference circuit 5607 * - Reference buffer circuit 5608 * - Current reference circuit 5609 * 5610 * \return 5611 * - CY_SYSPM_SUCCESS - Normal regulator current mode was set 5612 * - CY_SYSPM_TIMEOUT - The timeout occurred because device was not 5613 * ready to enter into the normal regulator current mode 5614 * For the PSoC 64 devices there are possible situations when function returns 5615 * the PRA error status code. This is because for PSoC 64 devices the function 5616 * uses the PRA driver to change the protected registers. Refer to 5617 * \ref cy_en_pra_status_t for more details. 5618 * 5619 * \funcusage 5620 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_SystemSetNormalRegulatorCurrent 5621 * 5622 *******************************************************************************/ 5623 cy_en_syspm_status_t Cy_SysPm_SystemSetNormalRegulatorCurrent(void); 5624 5625 5626 /******************************************************************************* 5627 * Function Name: Cy_SysPm_CpuSleepOnExit 5628 ****************************************************************************//** 5629 * 5630 * This function configures the sleep-on-exit feature of the CPU. 5631 * 5632 * This API sets the SLEEPONEXIT bit of the SCR register. 5633 * 5634 * When the sleep-on-exit feature is enabled (the SLEEPONEXIT bit is set), 5635 * the CPU wakes up to service the interrupt and then immediately goes 5636 * back to sleep. Because of this, the unstacking process is not carried out, so 5637 * this feature is useful for interrupt driven application and helps to 5638 * reduce unnecessary stack push and pop operations. 5639 * The CPU does not go to sleep if the interrupt handler returns to 5640 * another interrupt handler (nested interrupt). 5641 * You can use this feature in applications that require the CPU to only run 5642 * when an interrupt occurs. 5643 * 5644 * When the sleep-on-exit feature is disabled (the SLEEPONEXIT bit is cleared), 5645 * the CPU returns back to the main thread after servicing the interrupt 5646 * without going back to sleep. 5647 * 5648 * Refer to the Arm documentation about the sleep-on-exit feature and 5649 * SLEEPONEXIT in the SCR register. 5650 * 5651 * \param enable 5652 * - True if enable sleep-on-exit feature. 5653 * - False if disable sleep-on-exit feature. 5654 * 5655 * \funcusage 5656 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_CpuSleepOnExit 5657 * 5658 *******************************************************************************/ 5659 void Cy_SysPm_CpuSleepOnExit(bool enable); 5660 5661 /** \} group_syspm_functions_power */ 5662 5663 5664 /** 5665 * \addtogroup group_syspm_functions_ldo 5666 * \{ 5667 */ 5668 5669 #if (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 2)) || (defined (CY_IP_MXS40SSRSS) && (CY_MXS40SSRSS_VER_1_2 > 0UL)) || defined (CY_DOXYGEN) 5670 5671 /******************************************************************************* 5672 * Function Name: Cy_SysPm_LdoSetVoltage 5673 ****************************************************************************//** 5674 * 5675 * Set output voltage on the core LDO regulator. 5676 * 5677 * When changing from a higher voltage to a lower voltage as when the device 5678 * enters system ULP mode, ensure that: 5679 * * The device maximum operating frequency for all the Clk_HF paths, peripheral, 5680 * and slow clock are under the \ref group_syspm_ulp_limitations. 5681 * * The total current consumption is under the \ref group_syspm_ulp_limitations. 5682 * * The appropriate wait states values are set for the flash using 5683 * The Cy_SysLib_SetWaitStates() function as explained below. 5684 * 5685 * <b>Setting wait states values for flash</b> 5686 * 5687 * The flash access time when the core voltage is 0.9 V (nominal) is 5688 * longer than at 1.1 V (nominal). Therefore, the number of the wait states must 5689 * be adjusted. Use the Cy_SysLib_SetWaitStates() function to set the appropriate 5690 * wait state values for flash. 5691 * 5692 * To change from a higher voltage to a lower voltage 0.9 V (nominal), 5693 * call the Cy_SysLib_SetWaitStates(true, hfClkFreqMz) function before changing 5694 * the voltage, where hfClkFreqMz is the frequency of HfClk0 in MHz. 5695 * 5696 * To change from a lower voltage to a higher voltage 1.1 V (nominal), calling 5697 * the Cy_SysLib_SetWaitStates(false, hfClkFreqMz) function to set the 5698 * wait states is optional, but can be done to improve performance. 5699 * The clock frequency may now be increased up to 5700 * \ref group_syspm_lp_limitations. 5701 * 5702 * \note 1. The output is set to 0.9 V (nominal) - the system is in ULP mode and 5703 * flash works for read-only operation. 5704 * \note 2. The output is set to 1.1 V (nominal) - the system is in LP mode 5705 * and flash works for read and write operations. 5706 * \note 3. The actual device Vccd voltage can be different from the nominal 5707 * voltage because the actual voltage value depends on conditions 5708 * including the load current. 5709 * 5710 * For more detail, refer to the \ref group_syspm_switching_into_ulp and 5711 * \ref group_syspm_switching_into_lp sections. 5712 * Refer to the \ref group_syslib driver for more detail about setting the wait 5713 * states. 5714 * 5715 * \param voltage 5716 * The desired output regulator voltage. 5717 * See \ref cy_en_syspm_ldo_voltage_t voltage 5718 * 5719 * \return 5720 * - CY_SYSPM_SUCCESS - The voltage is set. 5721 * - CY_SYSPM_INVALID_STATE - The voltage was not set. The voltage cannot be set 5722 * because the protection context value is higher than zero (PC > 0) or the 5723 * device revision does not support modifying registers via syscall. 5724 * - CY_SYSPM_CANCELED - Operation was canceled. Call the function again until 5725 * the function returns CY_SYSPM_SUCCESS. See \ref cy_en_syspm_status_t. 5726 * For the PSoC 64 devices there are possible situations when function returns 5727 * the PRA error status code. This is because for PSoC 64 devices the function 5728 * uses the PRA driver to change the protected registers. Refer to 5729 * \ref cy_en_pra_status_t for more details. 5730 * 5731 * \note 5732 * This API is available for CAT1A, CAT1B(PSoC C3) devices. 5733 * 5734 * \funcusage 5735 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_VoltageRegulator 5736 * 5737 *******************************************************************************/ 5738 cy_en_syspm_status_t Cy_SysPm_LdoSetVoltage(cy_en_syspm_ldo_voltage_t voltage); 5739 #endif /* (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 2)) */ 5740 5741 /******************************************************************************* 5742 * Function Name: Cy_SysPm_LdoSetMode 5743 ****************************************************************************//** 5744 * 5745 * Configures the core LDO regulator operating mode to one of three modes. 5746 * Disabled - turns off the LDO regulator and should be selected only after the 5747 * Buck regulator is operating. Normal mode configures the LDO for operation at 5748 * the maximum output current limit. Minimal current mode optimizes the LDO at a 5749 * reduced output current limit. Specific device current limits can be found in 5750 * the device datasheet. 5751 * 5752 * \param mode 5753 * The desired LDO regulator operating mode. 5754 * See \ref cy_en_syspm_ldo_mode_t mode 5755 * 5756 * \return 5757 * - CY_SYSPM_SUCCESS - Requested regulator current mode was set 5758 * - CY_SYSPM_CANCELED - The power circuits were not ready to enter into 5759 * minimum current mode. You should try to call the function again 5760 * - CY_SYSPM_TIMEOUT - Timeout occurred because of active reference was not 5761 * ready to enter into the normal regulator current mode 5762 * - CY_SYSPM_FAIL - incorrect mode value was passed 5763 * For the PSoC 64 devices there are possible situations when function returns 5764 * the PRA error status code. This is because for PSoC 64 devices the function 5765 * uses the PRA driver to change the protected registers. Refer to 5766 * \ref cy_en_pra_status_t for more details. 5767 * 5768 * \sideeffect 5769 * For PSoC 64 series devices CY_SYSPM_LDO_MODE_DISABLED mode is not supported. 5770 * Use \ref Cy_SysPm_BuckEnable() instead. 5771 * 5772 *******************************************************************************/ 5773 cy_en_syspm_status_t Cy_SysPm_LdoSetMode(cy_en_syspm_ldo_mode_t mode); 5774 5775 5776 /******************************************************************************* 5777 * Function Name: Cy_SysPm_LdoGetMode 5778 ****************************************************************************//** 5779 * 5780 * Returns the current core LDO regulator operating mode. 5781 * 5782 * \return 5783 * The LDO regulator operating mode. 5784 * See \ref cy_en_syspm_ldo_mode_t mode 5785 * 5786 *******************************************************************************/ 5787 cy_en_syspm_ldo_mode_t Cy_SysPm_LdoGetMode(void); 5788 5789 /** \} group_syspm_functions_ldo */ 5790 5791 5792 /** 5793 * \addtogroup group_syspm_functions_linearreg 5794 * \{ 5795 */ 5796 #if (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 2)) || (defined (CY_IP_MXS40SSRSS) && (SRSS_S40S_REGSETA_PRESENT == 1UL)) 5797 5798 /******************************************************************************* 5799 * Function Name: Cy_SysPm_LinearRegDisable 5800 ****************************************************************************//** 5801 * 5802 * Disables internal linear regulator. 5803 * 5804 * \note 5805 * This API is available for CAT1A (TVIIBE only), CAT1B(PSoC C3), CAT1C devices. 5806 * 5807 *******************************************************************************/ 5808 void Cy_SysPm_LinearRegDisable(void); 5809 5810 /******************************************************************************* 5811 * Function Name: Cy_SysPm_LinearRegEnable 5812 ****************************************************************************//** 5813 * 5814 * Enables internal linear regulator. 5815 * 5816 * \note 5817 * This API is available for CAT1A (TVIIBE only), CAT1B(PSoC C3), CAT1C devices. 5818 * 5819 *******************************************************************************/ 5820 void Cy_SysPm_LinearRegEnable(void); 5821 5822 5823 /******************************************************************************* 5824 * Function Name: Cy_SysPm_LinearRegGetStatus 5825 ****************************************************************************//** 5826 * 5827 * Check the status of the internal linear regulator. 5828 * 5829 * \return 5830 * true - status ok 5831 * false - status fail 5832 * 5833 * \note 5834 * This API is available for CAT1A (TVIIBE only), CAT1B(PSoC C3), CAT1C devices. 5835 * 5836 *******************************************************************************/ 5837 bool Cy_SysPm_LinearRegGetStatus(void); 5838 5839 5840 /******************************************************************************* 5841 * Function Name: Cy_SysPm_DeepSleepRegDisable 5842 ****************************************************************************//** 5843 * 5844 * Disables internal DeepSleep regulator. 5845 * 5846 * \note 5847 * This API is available for CAT1B(PSoC C3), CAT1C devices. 5848 * 5849 *******************************************************************************/ 5850 void Cy_SysPm_DeepSleepRegDisable(void); 5851 5852 5853 /******************************************************************************* 5854 * Function Name: Cy_SysPm_DeepSleepRegEnable 5855 ****************************************************************************//** 5856 * 5857 * Enables internal DeepSleep regulator. 5858 * 5859 * \note 5860 * This API is available for CAT1B(PSoC C3), CAT1C devices. 5861 * 5862 *******************************************************************************/ 5863 void Cy_SysPm_DeepSleepRegEnable(void); 5864 5865 /******************************************************************************* 5866 * Function Name: Cy_SySPm_IsDeepSleepRegEnabled 5867 ****************************************************************************//** 5868 * 5869 * Checks if internal DeepSleep regulator is enabled or not. 5870 * 5871 * \return 5872 * true - Enabled 5873 * false - Disabled 5874 * 5875 * \note 5876 * This API is available for CAT1B(PSoC C3), CAT1C devices. 5877 * 5878 *******************************************************************************/ 5879 bool Cy_SySPm_IsDeepSleepRegEnabled(void); 5880 5881 #endif /* defined ((CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 2) */ 5882 5883 /** \} group_syspm_functions_linearreg */ 5884 5885 /** 5886 * \addtogroup group_syspm_functions_reghc 5887 * \{ 5888 */ 5889 #if (defined (SRSS_S40E_REGHC_PRESENT) && (SRSS_S40E_REGHC_PRESENT == 1u)) || \ 5890 ((defined (SRSS_S40E_HTREGHC_PRESENT) && (SRSS_S40E_HTREGHC_PRESENT == 1u))) || \ 5891 defined (CY_DOXYGEN) 5892 5893 /******************************************************************************* 5894 * Function Name: Cy_SysPm_ReghcSelectMode 5895 ****************************************************************************//** 5896 * 5897 * Selects one of the supported REGHC modes. 5898 * 5899 * \param 5900 * mode - PMIC or Pass Transistor 5901 * 5902 * \note 5903 * This API is available for CAT1C devices. 5904 * 5905 *******************************************************************************/ 5906 void Cy_SysPm_ReghcSelectMode(cy_en_syspm_reghc_mode_t mode); 5907 5908 /******************************************************************************* 5909 * Function Name: Cy_SysPm_ReghcGetMode 5910 ****************************************************************************//** 5911 * 5912 * Gets the supported REGHC modes. 5913 * 5914 * \return \ref cy_en_syspm_reghc_mode_t 5915 * 5916 * \note 5917 * This API is available for CAT1C devices. 5918 * 5919 *******************************************************************************/ 5920 cy_en_syspm_reghc_mode_t Cy_SysPm_ReghcGetMode(void); 5921 5922 /******************************************************************************* 5923 * Function Name: Cy_SysPm_ReghcSelectDriveOut 5924 ****************************************************************************//** 5925 * 5926 * Selects DRV_OUT setting. 5927 * 5928 * \param 5929 * drvOut - \ref cy_en_syspm_reghc_drive_out_t 5930 * 5931 * \note 5932 * This API is available for CAT1C devices. 5933 * 5934 *******************************************************************************/ 5935 void Cy_SysPm_ReghcSelectDriveOut(cy_en_syspm_reghc_drive_out_t drvOut); 5936 5937 /******************************************************************************* 5938 * Function Name: Cy_SysPm_ReghcGetDriveOut 5939 ****************************************************************************//** 5940 * 5941 * Gets the DRV_OUT setting. 5942 * 5943 * \return \ref cy_en_syspm_reghc_drive_out_t 5944 * 5945 * \note 5946 * This API is available for CAT1C devices. 5947 * 5948 *******************************************************************************/ 5949 cy_en_syspm_reghc_drive_out_t Cy_SysPm_ReghcGetDriveOut(void); 5950 5951 5952 /******************************************************************************* 5953 * Function Name: Cy_SysPm_ReghcAdjustOutputVoltage 5954 ****************************************************************************//** 5955 * 5956 * Selects regulator output voltage adjustment. 5957 * 5958 * \param 5959 * trim - \ref cy_en_syspm_reghc_vadj_t 5960 * 5961 * \note 5962 * This API is available for CAT1C devices. 5963 * 5964 *******************************************************************************/ 5965 void Cy_SysPm_ReghcAdjustOutputVoltage(cy_en_syspm_reghc_vadj_t trim); 5966 5967 5968 /******************************************************************************* 5969 * Function Name: Cy_SysPm_ReghcDisableIntSupplyWhileExtActive 5970 ****************************************************************************//** 5971 * 5972 * Internal Active Linear Regulator disabled after PMIC enabled. OCD is disabled. 5973 * 5974 * \note 5975 * This API is available for CAT1C devices. 5976 * 5977 *******************************************************************************/ 5978 void Cy_SysPm_ReghcDisableIntSupplyWhileExtActive(void); 5979 5980 5981 /******************************************************************************* 5982 * Function Name: Cy_SysPm_ReghcEnableIntSupplyWhileExtActive 5983 ****************************************************************************//** 5984 * 5985 * Internal Active Linear Regulator kept enabled. See datasheet for minimum 5986 * PMIC vccd input to prevent OCD. 5987 * 5988 * \note 5989 * This API is available for CAT1C devices. 5990 * 5991 *******************************************************************************/ 5992 void Cy_SysPm_ReghcEnableIntSupplyWhileExtActive(void); 5993 5994 5995 /******************************************************************************* 5996 * Function Name: Cy_SysPm_ReghcDisablePmicEnableOutput 5997 ****************************************************************************//** 5998 * 5999 * Disables "PMIC enable" output. 6000 * 6001 * \note 6002 * This API is available for CAT1C devices. 6003 * 6004 *******************************************************************************/ 6005 void Cy_SysPm_ReghcDisablePmicEnableOutput(void); 6006 6007 6008 /******************************************************************************* 6009 * Function Name: Cy_SysPm_ReghcEnablePmicEnableOutput 6010 ****************************************************************************//** 6011 * 6012 * Enables "PMIC enable" output. 6013 * 6014 * \param 6015 * polarity => true - output high, false - output low. 6016 * 6017 * \note 6018 * This API is available for CAT1C devices. 6019 * 6020 *******************************************************************************/ 6021 void Cy_SysPm_ReghcEnablePmicEnableOutput(bool polarity); 6022 6023 6024 /******************************************************************************* 6025 * Function Name: Cy_SysPm_ReghcEnablePmicStatusInput 6026 ****************************************************************************//** 6027 * 6028 * Enables receiving status from PMIC. 6029 * 6030 * \param 6031 * polarity => true/false -> receiving high/low means abnormal status. 6032 * 6033 * \note 6034 * This API is available for CAT1C devices. 6035 * 6036 *******************************************************************************/ 6037 void Cy_SysPm_ReghcEnablePmicStatusInput(bool polarity); 6038 6039 /******************************************************************************* 6040 * Function Name: Cy_SysPm_ReghcDisablePmicStatusInput 6041 ****************************************************************************//** 6042 * 6043 * Disables PMIC status input 6044 * 6045 * \note 6046 * This API is available for CAT1C devices. 6047 * 6048 *******************************************************************************/ 6049 void Cy_SysPm_ReghcDisablePmicStatusInput(void); 6050 6051 /******************************************************************************* 6052 * Function Name: Cy_SysPm_ReghcSetPmicStatusWaitTime 6053 ****************************************************************************//** 6054 * 6055 * Wait count in 4us steps after PMIC status ok. This is used by the hardware 6056 * sequencer to allow additional settling time before disabling the internal 6057 * regulator. 6058 * The LSB is 32 IMO periods which results in a nominal LSB step of 4us. 6059 * 6060 * \param 6061 * waitTime = 0 to 1023 -> (waitTime * 4us) Delay 6062 * 6063 * \note 6064 * This API is available for CAT1C devices. 6065 * 6066 *******************************************************************************/ 6067 void Cy_SysPm_ReghcSetPmicStatusWaitTime(uint16_t waitTime); 6068 6069 /******************************************************************************* 6070 * Function Name: Cy_SysPm_ReghcIsConfigured 6071 ****************************************************************************//** 6072 * 6073 * Indicates that the REGHC has been configured. 6074 * Do not change REGHC settings after this bit is high. 6075 * 6076 * \return 6077 * true - Configured, false - Not configured 6078 * 6079 * \note 6080 * This API is available for CAT1C devices. 6081 * 6082 *******************************************************************************/ 6083 bool Cy_SysPm_ReghcIsConfigured(void); 6084 6085 6086 /******************************************************************************* 6087 * Function Name: Cy_SysPm_ReghcSetConfigured 6088 ****************************************************************************//** 6089 * 6090 * Set REGHC is configured. This is required to apply setting before enabling REGHC. 6091 * 6092 * \note 6093 * This API is available for CAT1C devices. 6094 * 6095 *******************************************************************************/ 6096 void Cy_SysPm_ReghcSetConfigured(void); 6097 6098 /******************************************************************************* 6099 * Function Name: Cy_SysPm_ReghcDisable 6100 ****************************************************************************//** 6101 * 6102 * Disables REGHC. 6103 * 6104 * \note 6105 * This API is available for CAT1C devices. 6106 * 6107 *******************************************************************************/ 6108 void Cy_SysPm_ReghcDisable(void); 6109 6110 /******************************************************************************* 6111 * Function Name: Cy_SysPm_ReghcEnable 6112 ****************************************************************************//** 6113 * 6114 * Enables REGHC. 6115 * 6116 * \note 6117 * This API is available for CAT1C devices. 6118 * 6119 *******************************************************************************/ 6120 void Cy_SysPm_ReghcEnable(void); 6121 6122 6123 /******************************************************************************* 6124 * Function Name: Cy_SysPm_ReghcDisablePmicStatusTimeout 6125 ****************************************************************************//** 6126 * 6127 * Disables timeout when waiting for REGHC_PMIC_STATUS_OK. 6128 * 6129 * \note 6130 * This API is available for CAT1C devices. 6131 * 6132 *******************************************************************************/ 6133 void Cy_SysPm_ReghcDisablePmicStatusTimeout(void); 6134 6135 6136 /******************************************************************************* 6137 * Function Name: Cy_SysPm_ReghcEnablePmicStatusTimeout 6138 ****************************************************************************//** 6139 * 6140 * Enables timeout while waiting for REGHC_PMIC_STATUS_OK==1 when switching to PMIC. 6141 * Timeout expiration triggers reset. 6142 * 6143 * \param 6144 * timeout = 1 - 255 -> (timeout * 128us) delay until reset 6145 * 6146 * \note 6147 * This API is available for CAT1C devices. 6148 * 6149 *******************************************************************************/ 6150 void Cy_SysPm_ReghcEnablePmicStatusTimeout(uint8_t timeout); 6151 6152 6153 /******************************************************************************* 6154 * Function Name: Cy_SysPm_ReghcIsEnabled 6155 ****************************************************************************//** 6156 * 6157 * Indicates the state of the REGHC enable/disable sequencer. This bit is only 6158 * valid when REGHC_SEQ_BUSY==0. 6159 * 6160 * \return 6161 * true - Enabled, false - Disabled 6162 * 6163 * \note 6164 * This API is available for CAT1C devices. 6165 * 6166 *******************************************************************************/ 6167 bool Cy_SysPm_ReghcIsEnabled(void); 6168 6169 6170 /******************************************************************************* 6171 * Function Name: Cy_SysPm_ReghcIsStatusOk 6172 ****************************************************************************//** 6173 * 6174 * Indicates the PMIC status is ok. This includes polarity adjustment according 6175 * to REGHC_PMIC_STATUS_POLARITY. 6176 * 6177 * \return 6178 * false: PMIC status is not ok or PMIC input is disabled (PMIC_STATUS_INEN == 0) 6179 * true: PMIC status input is enabled and indicates ok 6180 * 6181 * \note 6182 * This API is available for CAT1C devices. 6183 * 6184 *******************************************************************************/ 6185 bool Cy_SysPm_ReghcIsStatusOk(void); 6186 6187 6188 /******************************************************************************* 6189 * Function Name: Cy_SysPm_ReghcIsSequencerBusy 6190 ****************************************************************************//** 6191 * 6192 * Indicates whether the REGHC circuit is busy. Indicates the REGHC enable/disable 6193 * sequencer is busy transitioning to/from REGHC. 6194 * 6195 * \return 6196 * true: REGHC busy 6197 * false: REGHC not busy 6198 * 6199 * \note 6200 * This API is available for CAT1C devices. 6201 * 6202 *******************************************************************************/ 6203 bool Cy_SysPm_ReghcIsSequencerBusy(void); 6204 6205 6206 /******************************************************************************* 6207 * Function Name: Cy_SysPm_ReghcDisableVAdj 6208 ****************************************************************************//** 6209 * 6210 * Device does not generate VADJ, and it must not be part of the PMIC feedback loop. 6211 * This reduces current by turning off the internal resistor divider that generates 6212 * VADJ. 6213 * 6214 * \note 6215 * This API is available for CAT1C devices. 6216 * 6217 *******************************************************************************/ 6218 void Cy_SysPm_ReghcDisableVAdj(void); 6219 6220 /******************************************************************************* 6221 * Function Name: Cy_SysPm_ReghcEnableVAdj 6222 ****************************************************************************//** 6223 * 6224 * Device generates VADJ when PMIC is enabled. This allows the feedback loop to 6225 * compensate for voltage drops in the PCB and package. 6226 * 6227 * \note 6228 * This API is available for CAT1C devices. 6229 * 6230 *******************************************************************************/ 6231 void Cy_SysPm_ReghcEnableVAdj(void); 6232 6233 /******************************************************************************* 6234 * Function Name: Cy_SysPm_ReghcDisablePmicInDeepSleep 6235 ****************************************************************************//** 6236 * 6237 * Device operates from internal regulators during DEEPSLEEP. If PMIC is enabled 6238 * at the beginning of the DEEPSLEEP transition, hardware changes to the internal 6239 * regulators and disables the PMIC. 6240 * 6241 * \note 6242 * This API is available for CAT1C devices. 6243 * 6244 *******************************************************************************/ 6245 void Cy_SysPm_ReghcDisablePmicInDeepSleep(void); 6246 6247 6248 /******************************************************************************* 6249 * Function Name: Cy_SysPm_ReghcEnablePmicInDeepSleep 6250 ****************************************************************************//** 6251 * 6252 * DEEPSLEEP transition does not change PMIC enable. 6253 * 6254 * \note 6255 * This API is available for CAT1C devices. 6256 * 6257 *******************************************************************************/ 6258 void Cy_SysPm_ReghcEnablePmicInDeepSleep(void); 6259 6260 /******************************************************************************* 6261 * Function Name: Cy_SysPm_ReghcIsOcdWithinLimits 6262 ****************************************************************************//** 6263 * 6264 * Indicates the over-current detector is operating and the current drawn from 6265 * REGHC is within limits. OCD is only a choice for transistor mode, and it is 6266 * disabled for PMIC mode. 6267 * 6268 * \return 6269 * false: Current measurement exceeds limit or detector is OFF, 6270 * true: Current measurement within limit 6271 * 6272 * \note 6273 * This API is available for CAT1C devices. 6274 * 6275 *******************************************************************************/ 6276 bool Cy_SysPm_ReghcIsOcdWithinLimits(void); 6277 6278 6279 /******************************************************************************* 6280 * Function Name: Cy_SysPm_ReghcIsCircuitEnabledAndOperating 6281 ****************************************************************************//** 6282 * 6283 * Indicates the REGHC circuit is enabled and operating. 6284 * 6285 * \return 6286 * false: REGHC Disabled 6287 * true: REGHC Enabled and Operating 6288 * 6289 * \note 6290 * This API is available for CAT1C devices. 6291 * 6292 *******************************************************************************/ 6293 bool Cy_SysPm_ReghcIsCircuitEnabledAndOperating(void); 6294 6295 /******************************************************************************* 6296 * Function Name: Cy_SysPm_ReghcConfigure 6297 ****************************************************************************//** 6298 * 6299 * Configures REGHC. 6300 * 6301 * \param mode \ref cy_en_syspm_reghc_mode_t. 6302 * 6303 * \param vadj \ref cy_en_syspm_reghc_vadj_t. 6304 * 6305 * \return 6306 * - CY_SYSPM_SUCCESS - REGHC Configured Successfully 6307 * - CY_SYSPM_TIMEOUT - REGHC Configuration Failed 6308 * 6309 * \note 6310 * This API is available for CAT1C devices. 6311 * 6312 * \note 6313 * This API takes care of the sequence needed for changing from Linear 6314 * Regulator to REGHC with External Transistor, this API do not support changing to 6315 * REGHC with External PMIC. 6316 * 6317 *******************************************************************************/ 6318 cy_en_syspm_status_t Cy_SysPm_ReghcConfigure(cy_en_syspm_reghc_mode_t mode, cy_en_syspm_reghc_vadj_t vadj); 6319 6320 /******************************************************************************* 6321 * Function Name: Cy_SysPm_ReghcDeConfigure 6322 ****************************************************************************//** 6323 * 6324 * De-Configures REGHC. 6325 * 6326 * \return 6327 * - CY_SYSPM_SUCCESS - REGHC De-Configured Successfully 6328 * - CY_SYSPM_TIMEOUT - REGHC De-Configuration Failed 6329 * 6330 * \note 6331 * This API is available for CAT1C devices. 6332 * 6333 *******************************************************************************/ 6334 cy_en_syspm_status_t Cy_SysPm_ReghcDeConfigure(void); 6335 6336 6337 #endif /* (SRSS_S40E_REGHC_PRESENT == 1u) || (SRSS_S40E_HTREGHC_PRESENT == 1u) || defined (CY_DOXYGEN) */ 6338 /** \} group_syspm_functions_reghc */ 6339 6340 6341 /** 6342 * \addtogroup group_syspm_functions_ovd 6343 * \{ 6344 */ 6345 #if (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 2)) || defined (CY_DOXYGEN) 6346 /******************************************************************************* 6347 * Function Name: Cy_SysPm_OvdEnable 6348 ****************************************************************************//** 6349 * 6350 * Enables OVD over either VDDD or VDDA or VCCD. 6351 * 6352 * \param ovdSel \ref cy_en_syspm_ovd_sel_t. 6353 * 6354 * \note 6355 * This API is available for CAT1C devices. 6356 * 6357 * \note 6358 * OVD over VDDD and VCCD are enabled by default and cannot be disabled. 6359 * 6360 *******************************************************************************/ 6361 void Cy_SysPm_OvdEnable(cy_en_syspm_ovd_sel_t ovdSel); 6362 6363 6364 6365 /******************************************************************************* 6366 * Function Name: Cy_SysPm_OvdDisable 6367 ****************************************************************************//** 6368 * 6369 * Disables OVD over either VDDD or VDDA or VCCD. 6370 * 6371 * \param ovdSel \ref cy_en_syspm_ovd_sel_t. 6372 * 6373 * \note 6374 * This API is available for CAT1C devices. 6375 * 6376 * \note 6377 * OVD over VDDD and VCCD are enabled by default and cannot be disabled. 6378 * 6379 * \note 6380 * Disabling OVD over VDDA will perform the /ref cy_en_syspm_ovd_action_select_t 6381 * action selected for VDDA. If no action is desired when disabling, firmware 6382 * must first write CY_SYSPM_OVD_ACTION_NOTHING in a separate write cycle. 6383 * 6384 *******************************************************************************/ 6385 void Cy_SysPm_OvdDisable(cy_en_syspm_ovd_sel_t ovdSel); 6386 6387 6388 6389 /******************************************************************************* 6390 * Function Name: Cy_SysPm_OvdVdddSelect 6391 ****************************************************************************//** 6392 * 6393 * Selects voltage threshold for OVD on VDDD 6394 * 6395 * \param ovdVdddSel \ref cy_en_syspm_ovd_vddd_sel_t. 6396 * 6397 * \note 6398 * This API is available for CAT1C devices. 6399 * 6400 *******************************************************************************/ 6401 void Cy_SysPm_OvdVdddSelect(cy_en_syspm_ovd_vddd_sel_t ovdVdddSel); 6402 6403 6404 /******************************************************************************* 6405 * Function Name: Cy_SysPm_OvdVddaSelect 6406 ****************************************************************************//** 6407 * 6408 * Selects voltage threshold for OVD on VDDA 6409 * 6410 * \param ovdVddaSel \ref cy_en_syspm_ovd_vdda_sel_t. 6411 * 6412 * \note 6413 * This API is available for CAT1C devices. 6414 * 6415 *******************************************************************************/ 6416 void Cy_SysPm_OvdVddaSelect(cy_en_syspm_ovd_vdda_sel_t ovdVddaSel); 6417 6418 6419 /******************************************************************************* 6420 * Function Name: Cy_SysPm_OvdActionSelect 6421 ****************************************************************************//** 6422 * 6423 * Sets the action taken when the threshold is crossed in the programmed directions(s) 6424 * for VDDA. 6425 * 6426 * \param ovdActionSelect \ref cy_en_syspm_ovd_action_select_t. 6427 * 6428 * \note 6429 * This API is available for CAT1C devices. 6430 * 6431 * \note 6432 * This API is not applicable for selectng actions for VDDD and VCCD as the default 6433 * action is RESET for them. 6434 * 6435 *******************************************************************************/ 6436 void Cy_SysPm_OvdActionSelect(cy_en_syspm_ovd_action_select_t ovdActionSelect); 6437 6438 #endif 6439 6440 /** \} group_syspm_functions_ovd */ 6441 6442 /** 6443 * \addtogroup group_syspm_functions_bod 6444 * \{ 6445 */ 6446 #if (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 2)) 6447 /******************************************************************************* 6448 * Function Name: Cy_SysPm_BodEnable 6449 ****************************************************************************//** 6450 * 6451 * Enables BOD over either VDDD or VDDA or VCCD. 6452 * 6453 * \param bodSel \ref cy_en_syspm_bod_sel_t. 6454 * 6455 * \note 6456 * This API is available for CAT1C devices. 6457 * 6458 * \note 6459 * BOD over VDDD and VCCD are enabled by default and cannot be disabled. 6460 * 6461 *******************************************************************************/ 6462 void Cy_SysPm_BodEnable(cy_en_syspm_bod_sel_t bodSel); 6463 6464 /******************************************************************************* 6465 * Function Name: Cy_SysPm_BodDisable 6466 ****************************************************************************//** 6467 * 6468 * Disables BOD over either VDDD or VDDA or VCCD. 6469 * 6470 * \param bodSel \ref cy_en_syspm_bod_sel_t. 6471 * 6472 * \note 6473 * This API is available for CAT1C devices. 6474 * 6475 * \note 6476 * BOD over VDDD and VCCD are enabled by default and cannot be disabled. 6477 * 6478 * \note 6479 * Disabling BOD over VDDA will perform the /ref cy_en_syspm_bod_action_select_t 6480 * action selected for VDDA. If no action is desired when disabling, firmware 6481 * must first write CY_SYSPM_BOD_ACTION_NOTHING in a separate write cycle. 6482 * 6483 *******************************************************************************/ 6484 void Cy_SysPm_BodDisable(cy_en_syspm_bod_sel_t bodSel); 6485 6486 6487 /******************************************************************************* 6488 * Function Name: Cy_SysPm_BodVdddSelect 6489 ****************************************************************************//** 6490 * 6491 * Selects voltage threshold for BOD on VDDD 6492 * 6493 * \param bodVdddSel \ref cy_en_syspm_bod_vddd_sel_t. 6494 * 6495 * \note 6496 * This API is available for CAT1C devices. 6497 * 6498 *******************************************************************************/ 6499 void Cy_SysPm_BodVdddSelect(cy_en_syspm_bod_vddd_sel_t bodVdddSel); 6500 6501 6502 /******************************************************************************* 6503 * Function Name: Cy_SysPm_BodVddaSelect 6504 ****************************************************************************//** 6505 * 6506 * Selects voltage threshold for BOD on VDDA 6507 * 6508 * \param bodVddaSel \ref cy_en_syspm_bod_vdda_sel_t. 6509 * 6510 * \note 6511 * This API is available for CAT1C devices. 6512 * 6513 *******************************************************************************/ 6514 void Cy_SysPm_BodVddaSelect(cy_en_syspm_bod_vdda_sel_t bodVddaSel); 6515 6516 6517 /******************************************************************************* 6518 * Function Name: Cy_SysPm_BodActionSelect 6519 ****************************************************************************//** 6520 * 6521 * Sets the action taken when the threshold is crossed in the programmed directions(s) 6522 * for VDDA. 6523 * 6524 * \param bodActionSelect \ref cy_en_syspm_bod_action_select_t. 6525 * 6526 * \note 6527 * This API is available for CAT1C devices. 6528 * 6529 * \note 6530 * This API is not applicable for selectng actions for VDDD and VCCD as the default 6531 * action is RESET for them. 6532 * 6533 *******************************************************************************/ 6534 void Cy_SysPm_BodActionSelect(cy_en_syspm_bod_action_select_t bodActionSelect); 6535 6536 6537 /******************************************************************************* 6538 * Function Name: Cy_SysPm_SupplySupervisionStatus 6539 ****************************************************************************//** 6540 * 6541 * Supply Status. 6542 * 6543 * \param supplyEntitySelect \ref cy_en_syspm_supply_entity_select_t. 6544 6545 * \return 6546 * State of BOD/OVD on VDDD/VDDA/VCCD, whether OK or Not OK 6547 * 6548 * \note 6549 * This API is available for CAT1C devices. 6550 * 6551 *******************************************************************************/ 6552 bool Cy_SysPm_SupplySupervisionStatus(cy_en_syspm_supply_entity_select_t supplyEntitySelect); 6553 6554 #endif 6555 6556 /** \} group_syspm_functions_bod */ 6557 6558 6559 /** 6560 * \addtogroup group_syspm_functions_buck 6561 * \{ 6562 */ 6563 6564 #if (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 2)) || defined (CY_DOXYGEN) 6565 6566 /******************************************************************************* 6567 * Function Name: Cy_SysPm_BuckEnable 6568 ****************************************************************************//** 6569 * 6570 * Switch the core supply regulator to Buck core regulator instead of the LDO 6571 * regulator. 6572 * The Buck core regulator provides output voltage(s) using one external 6573 * inductor and can supply Vccd with higher efficiency than the LDO under some 6574 * conditions, such as high external supply voltage. 6575 * 6576 * Before changing from LDO to Buck, ensure that the circuit board has 6577 * connected Vccbuck1 to Vccd and also populated the 6578 * necessary external components for the Buck regulator, including an 6579 * inductor and a capacitor for each output. 6580 * Refer to the device TRM for more detail. 6581 * 6582 * When changing from a higher voltage to a lower voltage 6583 * (from system LP = LDO 1.1 V (nominal) to system ULP = Buck 0.9 V (nominal)), 6584 * ensure that: 6585 * * The device maximum operating frequency for all the Clk_HF paths, peripheral, 6586 * and slow clock are under the \ref group_syspm_ulp_limitations. 6587 * * The total current consumption is under the \ref group_syspm_ulp_limitations. 6588 * 6589 * * The appropriate wait states values are set for the flash using 6590 * the Cy_SysLib_SetWaitStates() function as explained below. 6591 * 6592 * <b>Setting wait states values for flash</b> 6593 * 6594 * The flash access time when the core output voltage is 0.9 V (nominal) is 6595 * longer than at 1.1 V (nominal). Therefore, the number of the wait states must 6596 * be adjusted. Use the Cy_SysLib_SetWaitStates() function to set the appropriate 6597 * wait state values for flash. 6598 * 6599 * To change from a higher voltage (LDO 1.1 V) to a lower voltage (Buck 0.9 V), 6600 * call the Cy_SysLib_SetWaitStates(true, hfClkFreqMz) function before changing 6601 * the voltage, where hfClkFreqMz is the frequency of HfClk0 in MHz. 6602 * 6603 * To change from a lower voltage (LDO 0.9 V (nominal) to a higher voltage 6604 * (Buck 1.1 V (nominal)), call the Cy_SysLib_SetWaitStates(false, 6605 * hfClkFreqMz) function to set the wait states after the voltage change. 6606 * It is optional, but can be done to improve performance. The clock frequency 6607 * may now be increased up to system LP mode limits for the new voltage. 6608 * 6609 * \note 1. If the final Buck output is set to 0.9 V (nominal) - the system is in 6610 * ULP mode and flash allows read-only operations. 6611 * \note 2. If the final Buck output is set to 1.1 V (nominal) - the system is in 6612 * LP mode flash allows the read and write operations. 6613 * \note 3. The actual device Vccd voltage can be different from the nominal 6614 * voltage because the actual voltage value depends on conditions 6615 * including the load current. 6616 * 6617 * \warning There is no safe way to go back to the LDO after the 6618 * Buck regulator supplies a core. The function enabling the Buck regulator 6619 * switches off the LDO. 6620 * 6621 * \warning Buck converter requires additional external components populated on 6622 * dedicated pins. Refer to device datasheet for details. 6623 * 6624 * For more detail, refer to the \ref group_syspm_switching_into_ulp and 6625 * \ref group_syspm_switching_into_lp sections. 6626 * Refer to the \ref group_syslib driver for more detail about setting wait 6627 * states. 6628 * 6629 * \param voltage 6630 * The desired output 1 regulator voltage (Vccbuck1). 6631 * See \ref cy_en_syspm_buck_voltage1_t. 6632 * 6633 * \return 6634 * - CY_SYSPM_SUCCESS - The voltage is set as requested. 6635 * (There is no change if the new voltage is the same as the previous voltage.) 6636 * - CY_SYSPM_INVALID_STATE - The voltage was not set. The voltage cannot be set 6637 * because the protection context value is higher than zero (PC > 0) or the 6638 * device revision does not support modifying registers via syscall. 6639 * - CY_SYSPM_CANCELED - Operation was canceled. Call the function again until 6640 * the function returns CY_SYSPM_SUCCESS. See \ref cy_en_syspm_status_t. 6641 * For the PSoC 64 devices there are possible situations when function returns 6642 * the PRA error status code. This is because for PSoC 64 devices the function 6643 * uses the PRA driver to change the protected registers. Refer to 6644 * \ref cy_en_pra_status_t for more details. 6645 * 6646 * \note 6647 * The function is applicable only for devices with a Buck regulator. 6648 * 6649 * Function uses a critical section to prevent interrupting the regulators 6650 * switch. 6651 * 6652 * \funcusage 6653 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_BuckEnable 6654 * 6655 * \note 6656 * This API is available for CAT1A devices. 6657 * 6658 *******************************************************************************/ 6659 cy_en_syspm_status_t Cy_SysPm_BuckEnable(cy_en_syspm_buck_voltage1_t voltage); 6660 6661 6662 /******************************************************************************* 6663 * Function Name: Cy_SysPm_BuckSetVoltage1 6664 ****************************************************************************//** 6665 * 6666 * Sets the output 1 voltage for the Buck regulator that can supply the device 6667 * core. This output can supply the device core instead of the LDO regulator. 6668 * 6669 * When changing from a higher voltage 1.1 V (nominal) to a lower voltage 0.9 V 6670 * (nominal), ensure that: 6671 * * The device maximum operating frequency for all the Clk_HF paths, peripheral, 6672 * and slow clock are under the \ref group_syspm_ulp_limitations. 6673 * * The total current consumption is under the \ref group_syspm_ulp_limitations. 6674 * * The appropriate wait states values are set for the flash using 6675 * the Cy_SysLib_SetWaitStates() function as explained below. 6676 * 6677 * <b>Setting wait states values for flash</b> 6678 * 6679 * The flash access time when the core output voltage is 0.9 V (nominal) is 6680 * longer than at 1.1 V (nominal). Therefore, the number of the wait states must 6681 * be adjusted. Use the Cy_SysLib_SetWaitStates() function to set the appropriate 6682 * wait state values for flash. 6683 * 6684 * To change from a higher voltage to a lower voltage 0.9 V (nominal), 6685 * call the Cy_SysLib_SetWaitStates(true, hfClkFreqMz) function before changing 6686 * the voltage, where hfClkFreqMz is the frequency of HfClk0 in MHz. 6687 * 6688 * To change from a lower voltage to a higher voltage 1.1 V (nominal), call 6689 * the Cy_SysLib_SetWaitStates(false, hfClkFreqMz) function to set the 6690 * wait states. It is optional, but can be done to improve the performance. 6691 * The clock frequency may now be increased up to 6692 * \ref group_syspm_lp_limitations for a new voltage. 6693 * 6694 * \note 1. The output is set to 0.9 V (nominal) - the system is in ULP mode 6695 * flash allows read-only operations. 6696 * \note 2. The output is set to 1.1 V (nominal) - the system is in LP mode and 6697 * flash allows the read and write operations. 6698 * \note 3. The actual device Vccd voltage can be different from the nominal 6699 * voltage because the actual voltage value depends on the conditions 6700 * including the load current. 6701 * 6702 * \warning Buck converter requires additional external components populated on 6703 * dedicated pins. Refer to device datasheet for details. 6704 * 6705 * For more detail, refer to the \ref group_syspm_switching_into_ulp and 6706 * \ref group_syspm_switching_into_lp sections. 6707 * Refer to the \ref group_syslib driver for more detail about setting the 6708 * wait states. 6709 * 6710 * \param voltage 6711 * The desired output 1 regulator voltage (Vccbuck1). 6712 * See \ref cy_en_syspm_buck_voltage1_t 6713 * 6714 * \return 6715 * - CY_SYSPM_SUCCESS - The voltage is set. 6716 * - CY_SYSPM_INVALID_STATE - The voltage was not set. The voltage cannot be set 6717 * because the protection context value is higher than zero (PC > 0) or the 6718 * device revision does not support modifying registers via syscall. 6719 * - CY_SYSPM_CANCELED - Operation was canceled. Call the function again until 6720 * the function returns CY_SYSPM_SUCCESS. See \ref cy_en_syspm_status_t. 6721 * For the PSoC 64 devices there are possible situations when function returns 6722 * the PRA error status code. This is because for PSoC 64 devices the function 6723 * uses the PRA driver to change the protected registers. Refer to 6724 * \ref cy_en_pra_status_t for more details. 6725 * 6726 * \funcusage 6727 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_VoltageRegulator 6728 * 6729 * \sideeffect 6730 * For PSoC 64 series devices Cy_SysPm_BuckSetVoltage1() has the same functional 6731 * behavior as \ref Cy_SysPm_BuckEnable() function. 6732 * 6733 * \note 6734 * This API is available for CAT1A devices. 6735 * 6736 *******************************************************************************/ 6737 cy_en_syspm_status_t Cy_SysPm_BuckSetVoltage1(cy_en_syspm_buck_voltage1_t voltage); 6738 6739 6740 /******************************************************************************* 6741 * Function Name: Cy_SysPm_BuckSetVoltage2 6742 ****************************************************************************//** 6743 * 6744 * This function sets output voltage 2 (Vbuckrf) of the SIMO Buck regulator. 6745 * 6746 * \param voltage 6747 * The voltage of the Buck regulator output 2 (Vbuckrf). 6748 * See \ref cy_en_syspm_buck_voltage2_t. 6749 * 6750 * \param waitToSettle 6751 * - True to enable the 200 us delay after setting a higher voltage. 6752 * - False to disable the 200 us delay after setting a higher voltage. 6753 * 6754 * \warning You must enable the delay (waitToSettle = true) 6755 * while changing from a lower voltage to a higher voltage. 6756 * 6757 * \note The 200 us delay is required only when changing from a 6758 * lower voltage to a higher voltage. When changing from a higher voltage to a 6759 * lower one, the delay is not required. 6760 * 6761 * \warning The function works only on devices with the SIMO Buck regulator. 6762 * Refer to the device datasheet for information on whether the device contains 6763 * SIMO Buck. 6764 * 6765 * \warning Buck converter requires additional external components populated on 6766 * dedicated pins. Refer to device datasheet for details. 6767 * 6768 * \funcusage 6769 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_BuckSetVoltage2 6770 * 6771 * \note 6772 * This API is available for CAT1A devices. 6773 * 6774 *******************************************************************************/ 6775 void Cy_SysPm_BuckSetVoltage2(cy_en_syspm_buck_voltage2_t voltage, bool waitToSettle); 6776 6777 6778 /******************************************************************************* 6779 * Function Name: Cy_SysPm_BuckEnableVoltage2 6780 ****************************************************************************//** 6781 * 6782 * Enable the output 2 voltage (Vbuckrf) of the SIMO Buck regulator. 6783 * The output 2 voltage (Vbuckrf) of the Buck regulator is typically used to 6784 * supply the BLE radio. 6785 * This function does following actions, when the Buck regulator does not 6786 * supply the core: 6787 * * Enables the Buck regulator 6788 * * Enables the output 2, but do not enables the output 1. 6789 * 6790 * \note The function does not affect Buck output 1 that typically supplies core. 6791 * 6792 * \warning The function does not select the Buck output 2 voltage and 6793 * does not set/clear the HW-controlled bit for Buck output 2. Call 6794 * Cy_SysPm_BuckSetVoltage2() or Cy_SysPm_BuckSetVoltage2HwControl() to 6795 * configure the Buck output 2. 6796 * 6797 * \warning The function works only on devices with the SIMO Buck regulator. 6798 * Refer to the device datasheet for information on whether the device contains 6799 * the SIMO Buck. 6800 * 6801 * \warning Buck converter requires additional external components populated on 6802 * dedicated pins. Refer to device datasheet for details. 6803 * 6804 * \funcusage 6805 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_BuckEnableVoltage2 6806 * 6807 * \note 6808 * This API is available for CAT1A devices. 6809 * 6810 *******************************************************************************/ 6811 void Cy_SysPm_BuckEnableVoltage2(void); 6812 6813 6814 /******************************************************************************* 6815 * Function Name: Cy_SysPm_BuckIsOutputEnabled 6816 ****************************************************************************//** 6817 * 6818 * This function gets the current output status of the Buck outputs. 6819 * 6820 * \param output 6821 * The Buck regulator output. See \ref cy_en_syspm_buck_out_t. 6822 * 6823 * \return 6824 * - True if the requested output is enabled. 6825 * - False if the requested output is disabled. 6826 * 6827 * \funcusage 6828 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_BuckIsOutputEnabled 6829 * 6830 * \note 6831 * This API is available for CAT1A devices. 6832 * 6833 *******************************************************************************/ 6834 bool Cy_SysPm_BuckIsOutputEnabled(cy_en_syspm_buck_out_t output); 6835 #endif /* (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 2)) */ 6836 /** \} group_syspm_functions_buck */ 6837 6838 /** 6839 * \addtogroup group_syspm_functions_callback 6840 * \{ 6841 */ 6842 6843 6844 /******************************************************************************* 6845 * Function Name: Cy_SysPm_RegisterCallback 6846 ****************************************************************************//** 6847 * 6848 * Registers a new syspm callback. 6849 * 6850 * A callback is a function called after an event in the driver or 6851 * middleware module has occurred. The handler callback API will be executed if 6852 * the specific event occurs. SysPm callbacks are called when changing power 6853 * modes. See \ref cy_stc_syspm_callback_t. 6854 * 6855 * \note The registered callbacks are executed in two orders, based on callback 6856 * mode \ref cy_en_syspm_callback_mode_t. For modes CY_SYSPM_CHECK_READY and 6857 * CY_SYSPM_BEFORE_TRANSITION, the order is same order as callbacks were 6858 * registered. 6859 * For modes CY_SYSPM_AFTER_TRANSITION and CY_SYSPM_CHECK_FAIL, the order is 6860 * reverse as the order callbacks were registered. 6861 * 6862 * \param handler 6863 * The address of the syspm callback structure. 6864 * See \ref cy_stc_syspm_callback_t. 6865 * 6866 * \return 6867 * - True if a callback was registered. 6868 * - False if a callback was not registered. 6869 * 6870 * \note Do not modify the registered structure in run-time. 6871 * \warning After being registered, the SysPm callback structures must be 6872 * allocated during power mode transition. 6873 * 6874 * \funcusage 6875 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_Callback_Func_Declaration 6876 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_Callback_Params_Declaration 6877 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_Callback_Structure_Declaration 6878 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_Callback_Func_Implementation 6879 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_RegisterCallback 6880 * 6881 *******************************************************************************/ 6882 bool Cy_SysPm_RegisterCallback(cy_stc_syspm_callback_t *handler); 6883 6884 6885 /******************************************************************************* 6886 * Function Name: Cy_SysPm_UnregisterCallback 6887 ****************************************************************************//** 6888 * 6889 * This function unregisters a callback. 6890 * 6891 * The registered callback can be unregistered and the function returns true. 6892 * Otherwise, false is returned. 6893 * 6894 * \param handler The item that should be unregistered. 6895 * See \ref cy_stc_syspm_callback_t. 6896 * 6897 * \return 6898 * - True if callback was unregistered. 6899 * - False if it was not unregistered or no callbacks are registered. 6900 * 6901 * \funcusage 6902 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_UnregisterCallback 6903 * 6904 *******************************************************************************/ 6905 bool Cy_SysPm_UnregisterCallback(cy_stc_syspm_callback_t const *handler); 6906 6907 6908 /******************************************************************************* 6909 * Function Name: Cy_SysPm_ExecuteCallback 6910 ****************************************************************************//** 6911 * 6912 * The function executes all registered callbacks with provided type and mode. 6913 * \note This low-level function is being used by \ref Cy_SysPm_CpuEnterSleep, 6914 * \ref Cy_SysPm_CpuEnterDeepSleep, \ref Cy_SysPm_SystemEnterHibernate, 6915 * \ref Cy_SysPm_SystemEnterUlp and \ref Cy_SysPm_SystemEnterLp API functions. 6916 * However, it might be also useful as an independent API function in some custom 6917 * applications. 6918 * 6919 * \note The registered callbacks will be executed in order based on 6920 * \ref cy_en_syspm_callback_type_t value. There are two possible callback 6921 * execution orders: 6922 * * From first registered to last registered. This order applies to 6923 * callbacks with mode CY_SYSPM_CHECK_READY and CY_SYSPM_BEFORE_TRANSITION. 6924 * * Backward flow execution: 6925 * - From last registered to the first registered. This order applies 6926 * to callbacks with mode CY_SYSPM_AFTER_TRANSITION. 6927 * - From last called to the first registered callback. This order applies 6928 * to callbacks with mode CY_SYSPM_CHECK_FAIL. Note that, the last called 6929 * callback function that generated the CY_SYSPM_CHECK_FAIL is skipped when 6930 * mode CY_SYSPM_CHECK_FAIL. This is because the callback that returns 6931 * CY_SYSPM_FAIL already knows that it failed and will not take any action 6932 * that requires correction. 6933 * 6934 * If no callbacks are registered, returns CY_SYSPM_SUCCESS. 6935 * 6936 * \param type 6937 * The callback type. See \ref cy_en_syspm_callback_type_t. 6938 * 6939 * \param mode 6940 * The callback mode. See \ref cy_en_syspm_callback_mode_t. 6941 * 6942 * \return 6943 * - CY_SYSPM_SUCCESS if callback successfully completed or nor callbacks 6944 * registered. 6945 * - CY_SYSPM_FAIL one of the executed callback(s) returned fail. 6946 * 6947 * \funcusage 6948 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_ExecuteCallback 6949 * 6950 *******************************************************************************/ 6951 cy_en_syspm_status_t Cy_SysPm_ExecuteCallback(cy_en_syspm_callback_type_t type, cy_en_syspm_callback_mode_t mode); 6952 6953 6954 /******************************************************************************* 6955 * Function Name: Cy_SysPm_GetFailedCallback 6956 ****************************************************************************//** 6957 * 6958 * Reads the result of the callback execution after the power mode functions 6959 * execution. 6960 * 6961 * This function reads the value of the pointer that stores the result of callback 6962 * execution. It takes power mode as the parameter and returns the address of the 6963 * callback configuration structure in the case of failure or NULL in the case of 6964 * success. This address of the failed callback allows finding the callback that 6965 * blocks entering power mode. 6966 * 6967 * \param type 6968 * Power mode for which a callback execution result is required. 6969 * 6970 * \return 6971 * - The address of the callback configuration structure if the callback handler 6972 * function failed. 6973 * - NULL if the callback skipped or executed successfully. 6974 * 6975 * \funcusage 6976 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_GetFailedCallback 6977 * 6978 *******************************************************************************/ 6979 cy_stc_syspm_callback_t* Cy_SysPm_GetFailedCallback(cy_en_syspm_callback_type_t type); 6980 /** \} group_syspm_functions_callback */ 6981 6982 /** 6983 * \addtogroup group_syspm_functions_power_status 6984 * \{ 6985 */ 6986 6987 #if defined (CY_IP_MXS40SRSS) || defined (CY_IP_MXS22SRSS) || (defined (CY_IP_MXS40SSRSS) && (CY_MXS40SSRSS_VER_1_2 > 0UL)) || defined (CY_DOXYGEN) 6988 6989 #if (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 2)) || defined (CY_IP_MXS22SRSS) || (defined (CY_IP_MXS40SSRSS) && (CY_MXS40SSRSS_VER_1_2 > 0UL)) || defined (CY_DOXYGEN) 6990 6991 /******************************************************************************* 6992 * Function Name: Cy_SysPm_IsSystemUlp 6993 ****************************************************************************//** 6994 * 6995 * Checks if the system is in ULP mode. 6996 * 6997 * \return 6998 * - True the system is in ULP mode. 6999 * - False the system is is not ULP mode. 7000 * 7001 * \note 7002 * This API is available for CAT1A, CAT1B(PSoC C3) and CAT1D devices. 7003 * 7004 * \funcusage 7005 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_IsSystemUlp 7006 * 7007 *******************************************************************************/ 7008 bool Cy_SysPm_IsSystemUlp(void); 7009 #endif /* (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 2)) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) */ 7010 7011 #if defined (CY_IP_MXS40SRSS) || defined (CY_IP_MXS22SRSS) || (defined (CY_IP_MXS40SSRSS) && (CY_MXS40SSRSS_VER_1_2 > 0UL)) ||defined (CY_DOXYGEN) 7012 7013 /******************************************************************************* 7014 * Function Name: Cy_SysPm_IsSystemLp 7015 ****************************************************************************//** 7016 * 7017 * Checks if the system is in LP mode. 7018 * 7019 * \return 7020 * - True the system is in LP mode. 7021 * - False the system is not in LP mode. 7022 * 7023 * \note 7024 * This API is available for CAT1A, CAT1B(PSoC C3), CAT1C & CAT1D devices. 7025 * 7026 * \funcusage 7027 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_IsSystemLp 7028 * 7029 *******************************************************************************/ 7030 bool Cy_SysPm_IsSystemLp(void); 7031 #endif 7032 7033 7034 #if (defined (CY_IP_MXS40SSRSS) && (CY_MXS40SSRSS_VER_1_2 > 0UL)) || defined (CY_DOXYGEN) 7035 7036 /******************************************************************************* 7037 * Function Name: Cy_SysPm_IsSystemMf 7038 ****************************************************************************//** 7039 * 7040 * Checks if the system is in MF mode. 7041 * 7042 * \return 7043 * - True the system is in MF mode. 7044 * - False the system is not in MF mode. 7045 * 7046 * \note 7047 * This API is available for CAT1B(PSoC C3) devices only. 7048 * 7049 * \funcusage 7050 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_IsSystemMf 7051 * 7052 *******************************************************************************/ 7053 bool Cy_SysPm_IsSystemMf(void); 7054 #endif 7055 7056 #if defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 7057 /******************************************************************************* 7058 * Function Name: Cy_SysPm_IsSystemHp 7059 ****************************************************************************//** 7060 * 7061 * Checks if the system is in HP mode. 7062 * 7063 * \return 7064 * - True the system is in HP mode. 7065 * - False the system is not in HP mode. 7066 * 7067 * \note 7068 * This API is available for CAT1D devices only. 7069 * 7070 * \funcusage 7071 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_IsSystemHp 7072 * 7073 *******************************************************************************/ 7074 bool Cy_SysPm_IsSystemHp(void); 7075 7076 7077 #endif 7078 7079 7080 7081 #if (defined (CY_IP_MXS40SSRSS) && (CY_MXS40SSRSS_VER_1_2 > 0UL)) 7082 /******************************************************************************* 7083 * Function Name: Cy_SysPm_IsSystemOd 7084 ****************************************************************************//** 7085 * 7086 * Checks if the system is in OD mode. 7087 * 7088 * \return 7089 * - True the system is in OD mode. 7090 * - False the system is not in OD mode. 7091 * 7092 * \note 7093 * This API is available for CAT1B(PSoC C3)devices only. 7094 * 7095 * \funcusage 7096 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_IsSystemOd 7097 * 7098 *******************************************************************************/ 7099 bool Cy_SysPm_IsSystemOd(void); 7100 #endif 7101 7102 #endif 7103 7104 7105 #if defined (CY_IP_MXS40SRSS) || defined (CY_DOXYGEN) 7106 7107 #if (defined (CY_IP_M4CPUSS) && (CY_IP_M4CPUSS == 1u)) || defined (CY_DOXYGEN) 7108 /******************************************************************************* 7109 * Function Name: Cy_SysPm_Cm4IsActive 7110 ****************************************************************************//** 7111 * 7112 * Checks if CM4 is in CPU Active mode. 7113 * 7114 * \return 7115 * - True if CM4 is in CPU Active mode. 7116 * - False if the CM4 is not in CPU Active mode. 7117 * 7118 * \note 7119 * This API is available for CAT1A devices. 7120 * 7121 * \funcusage 7122 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_Cm4IsActive 7123 * 7124 *******************************************************************************/ 7125 bool Cy_SysPm_Cm4IsActive(void); 7126 7127 7128 /******************************************************************************* 7129 * Function Name: Cy_SysPm_Cm4IsSleep 7130 ****************************************************************************//** 7131 * 7132 * Checks if the CM4 is in CPU Sleep mode. 7133 * 7134 * \return 7135 * - True if the CM4 is in CPU Sleep mode. 7136 * - False if the CM4 is not in CPU Sleep mode. 7137 * 7138 * \note 7139 * This API is available for CAT1A devices. 7140 * 7141 * \funcusage 7142 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_Cm4IsSleep 7143 * 7144 *******************************************************************************/ 7145 bool Cy_SysPm_Cm4IsSleep(void); 7146 7147 7148 /******************************************************************************* 7149 * Function Name: Cy_SysPm_Cm4IsDeepSleep 7150 ****************************************************************************//** 7151 * 7152 * Checks if the CM4 is in the CPU Deep Sleep mode. 7153 * 7154 * \return 7155 * - True if CM4 is in CPU Deep Sleep mode. 7156 * - False if the CM4 is not CPU in Deep Sleep mode. 7157 * 7158 * \note 7159 * This API is available for CAT1A devices. 7160 * 7161 * \funcusage 7162 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_Cm4IsDeepSleep 7163 * 7164 *******************************************************************************/ 7165 bool Cy_SysPm_Cm4IsDeepSleep(void); 7166 7167 #endif /* (defined (CY_IP_M4CPUSS) && (CY_IP_M4CPUSS == 1u)) || defined (CY_DOXYGEN) */ 7168 7169 /******************************************************************************* 7170 * Function Name: Cy_SysPm_Cm0IsActive 7171 ****************************************************************************//** 7172 * 7173 * Checks if the CM0+ is in CPU Active mode. 7174 * 7175 * \return 7176 * - True if the CM0+ is in CPU Active mode. 7177 * - False if the CM0+ is not in CPU Active mode. 7178 * 7179 * \note 7180 * This API is available for CAT1A & CAT1C devices. 7181 * 7182 * \funcusage 7183 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_Cm0IsActive 7184 * 7185 *******************************************************************************/ 7186 bool Cy_SysPm_Cm0IsActive(void); 7187 7188 7189 /******************************************************************************* 7190 * Function Name: Cy_SysPm_Cm0IsSleep 7191 ****************************************************************************//** 7192 * 7193 * Checks if the CM0+ is in CPU Sleep mode. 7194 * 7195 * \return 7196 * - True if the CM0+ is in CPU Sleep mode. 7197 * - False if the CM0+ is not in CPU Sleep mode. 7198 * 7199 * \note 7200 * This API is available for CAT1A & CAT1C devices. 7201 * 7202 * \funcusage 7203 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_Cm0IsSleep 7204 * 7205 *******************************************************************************/ 7206 bool Cy_SysPm_Cm0IsSleep(void); 7207 7208 7209 /******************************************************************************* 7210 * Function Name: Cy_SysPm_Cm0IsDeepSleep 7211 ****************************************************************************//** 7212 * 7213 * Checks if the CM0+ is in CPU Deep Sleep mode. 7214 * 7215 * \return 7216 * - True if the CM0+ is in CPU Deep Sleep mode 7217 * - False if the CM0+ is not in CPU Deep Sleep mode 7218 * 7219 * \note 7220 * This API is available for CAT1A & CAT1C devices. 7221 * 7222 * \funcusage 7223 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_Cm0IsDeepSleep 7224 * 7225 *******************************************************************************/ 7226 bool Cy_SysPm_Cm0IsDeepSleep(void); 7227 7228 #if (CY_IP_MXS40SRSS_VERSION >= 2) 7229 /******************************************************************************* 7230 * Function Name: Cy_SysPm_IsBgRefCtrl 7231 ****************************************************************************//** 7232 * 7233 * Get the power mode status of Bandgap Ref Circuits 7234 * 7235 * \return 7236 * true - Bandgap Ref Circuits power mode is enabled, 7237 * false - Bandgap Ref Circuits power mode is disabled. 7238 * 7239 * \note 7240 * This API is available for CAT1A (TVIIBE only) and CAT1C devices. 7241 * 7242 *******************************************************************************/ 7243 bool Cy_SysPm_IsBgRefCtrl(void); 7244 7245 /******************************************************************************* 7246 * Function Name: Cy_SysPm_BgRefCtrl 7247 ****************************************************************************//** 7248 * 7249 * Enables/Disables powers mode of Bandgap Ref Circuits 7250 * 7251 * \param enable 7252 * true - to enable, false - to disable 7253 * 7254 * \note 7255 * This API is available for CAT1A (TVIIBE only) and CAT1C devices. 7256 * 7257 *******************************************************************************/ 7258 void Cy_SysPm_BgRefCtrl(bool enable); 7259 7260 #endif /* (CY_IP_MXS40SRSS_VERSION >= 2) */ 7261 7262 #endif /* defined (CY_IP_MXS40SRSS) || defined (CY_DOXYGEN) */ 7263 7264 #if defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 7265 /******************************************************************************* 7266 * Function Name: Cy_SysPm_Cm33IsActive 7267 ****************************************************************************//** 7268 * 7269 * Checks if CM33 is in the active mode. 7270 * 7271 * \note 7272 * This API is available for CAT1D devices. 7273 * 7274 * \return 7275 * true - if CM33 is in the active mode, false - if the CM33 is not in active mode. 7276 * 7277 *******************************************************************************/ 7278 bool Cy_SysPm_Cm33IsActive(void); 7279 7280 7281 /******************************************************************************* 7282 * Function Name: Cy_SysPm_Cm33IsSleep 7283 ****************************************************************************//** 7284 * 7285 * Checks if the CM33 is in the sleep mode. 7286 * 7287 * \note 7288 * This API is available for CAT1D devices. 7289 * 7290 * \return 7291 * true - if the CM33 is in the sleep mode, 7292 * false - if the CM33 is not in the sleep mode. 7293 * 7294 *******************************************************************************/ 7295 bool Cy_SysPm_Cm33IsSleep(void); 7296 7297 7298 /******************************************************************************* 7299 * Function Name: Cy_SysPm_Cm33IsDeepSleep 7300 ****************************************************************************//** 7301 * 7302 * Checks if the CM33 is in the deep sleep mode. 7303 * 7304 * \return 7305 * true - if CM33 is in the deep sleep mode, false - if the CM33 is not in 7306 * the deep sleep mode. 7307 * 7308 *******************************************************************************/ 7309 bool Cy_SysPm_Cm33IsDeepSleep(void); 7310 7311 /******************************************************************************* 7312 * Function Name: Cy_SysPm_Cm55IsActive 7313 ****************************************************************************//** 7314 * 7315 * Checks if CM55 is in the active mode. 7316 * 7317 * \note 7318 * This API is available for CAT1D devices. 7319 * 7320 * \return 7321 * true - if CM55 is in the active mode, false - if the CM55 is not in active mode. 7322 * 7323 *******************************************************************************/ 7324 bool Cy_SysPm_Cm55IsActive(void); 7325 7326 7327 /******************************************************************************* 7328 * Function Name: Cy_SysPm_Cm55IsSleep 7329 ****************************************************************************//** 7330 * 7331 * Checks if the CM55 is in the sleep mode. 7332 * 7333 * \note 7334 * This API is available for CAT1D devices. 7335 * 7336 * \return 7337 * true - if the CM55 is in the sleep mode, 7338 * false - if the CM55 is not in the sleep mode. 7339 * 7340 *******************************************************************************/ 7341 bool Cy_SysPm_Cm55IsSleep(void); 7342 7343 7344 /******************************************************************************* 7345 * Function Name: Cy_SysPm_Cm55IsDeepSleep 7346 ****************************************************************************//** 7347 * 7348 * Checks if the CM55 is in the deep sleep mode. 7349 * 7350 * \return 7351 * true - if CM55 is in the deep sleep mode, false - if the CM55 is not in 7352 * the deep sleep mode. 7353 * 7354 *******************************************************************************/ 7355 bool Cy_SysPm_Cm55IsDeepSleep(void); 7356 7357 #endif 7358 7359 7360 #if (defined (CY_IP_M7CPUSS) && (CY_IP_M7CPUSS == 1u)) || defined (CY_DOXYGEN) 7361 7362 /******************************************************************************* 7363 * Function Name: Cy_SysPm_Cm7IsActive 7364 ****************************************************************************//** 7365 * 7366 * Checks if CM7 is in the active mode. 7367 * 7368 * \param core 7369 * Selects the core, 0 for CM7_0, 1 for CM7_1 7370 * 7371 * \note 7372 * This API is available for CAT1C devices. 7373 * 7374 * \return 7375 * true - if CM7 is in the active mode, false - if the CM7 is not in active mode. 7376 * 7377 *******************************************************************************/ 7378 bool Cy_SysPm_Cm7IsActive(uint8_t core); 7379 7380 7381 /******************************************************************************* 7382 * Function Name: Cy_SysPm_Cm7IsSleep 7383 ****************************************************************************//** 7384 * 7385 * Checks if the CM7 is in the sleep mode. 7386 * 7387 * \param core 7388 * Selects the core, 0 for CM7_0, 1 for CM7_1 7389 * 7390 * \note 7391 * This API is available for CAT1C devices. 7392 * 7393 * \return 7394 * true - if the CM7 is in the sleep mode, 7395 * false - if the CM7 is not in the sleep mode. 7396 * 7397 *******************************************************************************/ 7398 bool Cy_SysPm_Cm7IsSleep(uint8_t core); 7399 7400 7401 /******************************************************************************* 7402 * Function Name: Cy_SysPm_Cm7IsDeepSleep 7403 ****************************************************************************//** 7404 * 7405 * Checks if the CM7 is in the deep sleep mode. 7406 * 7407 * \param core 7408 * Selects the core, 0 for CM7_0, 1 for CM7_1 7409 * 7410 * \return 7411 * true - if CM7 is in the deep sleep mode, false - if the CM7 is not in 7412 * the deep sleep mode. 7413 * 7414 *******************************************************************************/ 7415 bool Cy_SysPm_Cm7IsDeepSleep(uint8_t core); 7416 7417 7418 #endif 7419 /** \} group_syspm_functions_power_status */ 7420 7421 7422 /** 7423 * \addtogroup group_syspm_functions_power 7424 * \{ 7425 */ 7426 /******************************************************************************* 7427 * Function Name: Cy_SysPm_CpuSendWakeupEvent 7428 ****************************************************************************//** 7429 * 7430 * Sends the SEV (Send Event) ARM instruction to the system. 7431 * 7432 * \funcusage 7433 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_CpuSendWakeupEvent 7434 * 7435 *******************************************************************************/ 7436 void Cy_SysPm_CpuSendWakeupEvent(void); 7437 7438 7439 #if defined (CY_IP_MXS40SRSS) || defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 7440 /******************************************************************************* 7441 * Function Name: Cy_SysPm_SystemIsMinRegulatorCurrentSet 7442 ****************************************************************************//** 7443 * 7444 * Check whether the system regulator is set to minimal current mode. 7445 * 7446 * \return 7447 * - True - system is in regulator minimum current mode. 7448 * - False - system is in normal regulator current mode. 7449 * 7450 * \funcusage 7451 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_SystemSetNormalRegulatorCurrent 7452 * 7453 *******************************************************************************/ 7454 bool Cy_SysPm_SystemIsMinRegulatorCurrentSet(void); 7455 #endif /* defined (CY_IP_MXS40SRSS) || defined (CY_IP_MXS40SSRSS) || defined (CY_DOXYGEN) */ 7456 /** \} group_syspm_functions_power */ 7457 7458 7459 #if (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 2)) || defined (CY_DOXYGEN) 7460 /** 7461 * \addtogroup group_syspm_functions_buck 7462 * \{ 7463 */ 7464 /******************************************************************************* 7465 * Function Name: Cy_SysPm_BuckIsEnabled 7466 ****************************************************************************//** 7467 * 7468 * Get the current status of the Buck regulator. 7469 * 7470 * \return 7471 * - True if the Buck regulator is enabled. 7472 * - False if it is disabled. 7473 * 7474 * \note 7475 * This API is available for CAT1A devices. 7476 * 7477 * \funcusage 7478 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_VoltageRegulator 7479 * 7480 *******************************************************************************/ 7481 bool Cy_SysPm_BuckIsEnabled(void); 7482 7483 7484 /******************************************************************************* 7485 * Function Name: Cy_SysPm_BuckGetVoltage1 7486 ****************************************************************************//** 7487 * 7488 * Gets the current nominal output 1 voltage (Vccbuck1) of 7489 * the Buck regulator. 7490 * 7491 * \note The actual device output 1 voltage (Vccbuck1) can be different from 7492 * the nominal voltage because the actual voltage value depends on conditions 7493 * including load current. 7494 * 7495 * \return 7496 * The nominal output voltage 1 (Vccbuck1) of the Buck regulator. 7497 * See \ref cy_en_syspm_buck_voltage1_t. 7498 * 7499 * \funcusage 7500 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_VoltageRegulator 7501 * 7502 * \note 7503 * This API is available for CAT1A devices. 7504 * 7505 * 7506 *******************************************************************************/ 7507 cy_en_syspm_buck_voltage1_t Cy_SysPm_BuckGetVoltage1(void); 7508 7509 /******************************************************************************* 7510 * Function Name: Cy_SysPm_BuckGetVoltage2 7511 ****************************************************************************//** 7512 * 7513 * Gets the current output 2 nominal voltage (Vbuckrf) of the SIMO 7514 * Buck regulator. 7515 * 7516 * \note The actual device output 2 voltage (Vbuckrf) can be different from the 7517 * nominal voltage because the actual voltage value depends on conditions 7518 * including load current. 7519 * 7520 * \return 7521 * The nominal output voltage of the Buck SIMO regulator output 2 7522 * voltage (Vbuckrf). See \ref cy_en_syspm_buck_voltage2_t. 7523 * 7524 * \note 7525 * Function returns zero for devices without a SIMO Buck regulator. 7526 * Refer to the device datasheet about information on whether device contains 7527 * a SIMO Buck. 7528 * 7529 * \note 7530 * This API is available for CAT1A devices. 7531 * 7532 * \funcusage 7533 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_BuckGetVoltage2 7534 * 7535 *******************************************************************************/ 7536 cy_en_syspm_buck_voltage2_t Cy_SysPm_BuckGetVoltage2(void); 7537 7538 /******************************************************************************* 7539 * Function Name: Cy_SysPm_BuckDisableVoltage2 7540 ****************************************************************************//** 7541 * 7542 * Disables the output 2 voltage (Vbuckrf) of the SIMO Buck regulator. The 7543 * output 2 voltage (Vbuckrf) of the Buck regulator is typically used to supply 7544 * the BLE radio. 7545 * 7546 * \note The function does not have effect, if the Buck regulator is 7547 * switched off. 7548 * 7549 * \note If you are switching the voltage supply source for BLE radio, ensure 7550 * that the new voltage supply for the BLE HW block is settled 7551 * and is stable before calling the Cy_SysPm_BuckDisableVoltage2() function. 7552 * 7553 * This function is applicable for devices with the SIMO Buck regulator. 7554 * Refer to the device datasheet for information about whether the device 7555 * contains a SIMO Buck. 7556 * 7557 * \note 7558 * This API is available for CAT1A devices. 7559 * 7560 * \funcusage 7561 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_BuckDisableVoltage2 7562 * 7563 *******************************************************************************/ 7564 void Cy_SysPm_BuckDisableVoltage2(void); 7565 7566 /******************************************************************************* 7567 * Function Name: Cy_SysPm_BuckSetVoltage2HwControl 7568 ****************************************************************************//** 7569 * 7570 * Sets the hardware control for SIMO Buck output 2 (Vbuckrf). 7571 * 7572 * When hardware control is enabled for the Vbuckrf output, the firmware 7573 * controlled enable register setting is ignored and the hardware signal is used 7574 * instead. If the product has supporting hardware like BLE radio, it can 7575 * directly control the enable signal for Vbuckrf. 7576 * 7577 * \param hwControl 7578 * Enables/disables hardware control for the SIMO Buck output 2. 7579 * 7580 * Function does not have an effect if SIMO Buck regulator is disabled. 7581 * 7582 * The function is applicable for devices with the SIMO Buck regulator. 7583 * Refer to the device datasheet for information about whether the device 7584 * contains a SIMO Buck. 7585 * 7586 * \note 7587 * This API is available for CAT1A devices. 7588 * 7589 * \funcusage 7590 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_BuckSetVoltage2HwControl 7591 * 7592 *******************************************************************************/ 7593 void Cy_SysPm_BuckSetVoltage2HwControl(bool hwControl); 7594 7595 /******************************************************************************* 7596 * Function Name: Cy_SysPm_BuckIsVoltage2HwControlled 7597 ****************************************************************************//** 7598 * 7599 * Returns the hardware control state for Buck output 2 (Vbuckrf). 7600 * 7601 * When hardware control is enabled for the Vbuckrf output, the firmware 7602 * controlled enable register setting is ignored and the hardware signal is used 7603 * instead. If the product has supporting hardware like BLE radio, it can 7604 * directly control the enable signal for Vbuckrf. 7605 * 7606 * \return 7607 * - True if HW control is set. 7608 * - False if FW control is set for the Buck output 2. 7609 * 7610 * The function is applicable for devices with the SIMO Buck regulator. 7611 * Refer to device datasheet about information if device contains 7612 * SIMO Buck. 7613 * 7614 * \note 7615 * This API is available for CAT1A devices. 7616 * 7617 * \funcusage 7618 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_BuckIsVoltage2HwControlled 7619 * 7620 *******************************************************************************/ 7621 bool Cy_SysPm_BuckIsVoltage2HwControlled(void); 7622 #endif /* (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 2)) */ 7623 7624 7625 #if defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 7626 7627 /******************************************************************************* 7628 * Function Name: Cy_SysPm_CoreBuckSetVoltage 7629 ****************************************************************************//** 7630 * 7631 * Set the Core Buck Regulator Voltage 7632 * 7633 * \param voltage 7634 * Pick from \ref cy_en_syspm_core_buck_voltage_t 7635 * 7636 * \return 7637 * see \ref cy_en_syspm_status_t. 7638 * 7639 * \note 7640 * This API is available for CAT1B and CAT1D devices. 7641 * 7642 *******************************************************************************/ 7643 cy_en_syspm_status_t Cy_SysPm_CoreBuckSetVoltage(cy_en_syspm_core_buck_voltage_t voltage); 7644 7645 /******************************************************************************* 7646 * Function Name: Cy_SysPm_CoreBuckGetVoltage 7647 ****************************************************************************//** 7648 * 7649 * Get the Core Buck Regulator Voltage 7650 * 7651 * \return 7652 * Gets enum value of type \ref cy_en_syspm_core_buck_voltage_t 7653 * 7654 * \note 7655 * This API is available for CAT1B and CAT1D devices. 7656 * 7657 *******************************************************************************/ 7658 cy_en_syspm_core_buck_voltage_t Cy_SysPm_CoreBuckGetVoltage(void); 7659 7660 /******************************************************************************* 7661 * Function Name: Cy_SysPm_CoreBuckSetMode 7662 ****************************************************************************//** 7663 * 7664 * Set the Core Buck Regulator mode 7665 * 7666 * \param mode 7667 * Pick from \ref cy_en_syspm_core_buck_mode_t 7668 * 7669 * \note 7670 * This API is available for CAT1B and CAT1D devices. 7671 * 7672 *******************************************************************************/ 7673 void Cy_SysPm_CoreBuckSetMode(cy_en_syspm_core_buck_mode_t mode); 7674 7675 /******************************************************************************* 7676 * Function Name: Cy_SysPm_CoreBuckGetMode 7677 ****************************************************************************//** 7678 * 7679 * Get the Core Buck Regulator Mode 7680 * 7681 * \return 7682 * Gets enum value of type \ref cy_en_syspm_core_buck_mode_t 7683 * 7684 * \note 7685 * This API is available for CAT1B and CAT1D devices. 7686 * 7687 *******************************************************************************/ 7688 cy_en_syspm_core_buck_mode_t Cy_SysPm_CoreBuckGetMode(void); 7689 7690 /******************************************************************************* 7691 * Function Name: Cy_SysPm_CoreBuckStatus 7692 ****************************************************************************//** 7693 * 7694 * Get the status of Core Buck Regulator 7695 * 7696 * \return 7697 * Gets enum value of type \ref cy_en_syspm_status_t 7698 * 7699 * \note 7700 * This API is available for CAT1B and CAT1D devices. 7701 * 7702 *******************************************************************************/ 7703 cy_en_syspm_status_t Cy_SysPm_CoreBuckStatus(void); 7704 7705 #if defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 7706 7707 /******************************************************************************* 7708 * Function Name: Cy_SysPm_CoreBuckDpslpSetVoltage 7709 ****************************************************************************//** 7710 * 7711 * Set the Deepsleep mode Core Buck Regulator Voltage 7712 * 7713 * \param voltage 7714 * Pick from \ref cy_en_syspm_core_buck_voltage_t 7715 * 7716 * \note 7717 * This API is available for CAT1D devices. 7718 * 7719 *******************************************************************************/ 7720 cy_en_syspm_status_t Cy_SysPm_CoreBuckDpslpSetVoltage(cy_en_syspm_core_buck_voltage_t voltage); 7721 7722 /******************************************************************************* 7723 * Function Name: Cy_SysPm_CoreBuckDpslpGetVoltage 7724 ****************************************************************************//** 7725 * 7726 * Get the Deepsleep Core Buck Regulator Voltage 7727 * 7728 * \return 7729 * Gets enum value of type \ref cy_en_syspm_core_buck_voltage_t 7730 * 7731 * \note 7732 * This API is available for CAT1D devices. 7733 * 7734 * \return 7735 * see \ref cy_en_syspm_status_t. 7736 * 7737 *******************************************************************************/ 7738 cy_en_syspm_core_buck_voltage_t Cy_SysPm_CoreBuckDpslpGetVoltage(void); 7739 7740 /******************************************************************************* 7741 * Function Name: Cy_SysPm_CoreBuckDpslpSetMode 7742 ****************************************************************************//** 7743 * 7744 * Set the Deepsleep Core Buck Regulator mode 7745 * 7746 * \param mode 7747 * Pick from \ref cy_en_syspm_core_buck_mode_t 7748 * 7749 * \note 7750 * This API is available for CAT1D devices. 7751 * 7752 *******************************************************************************/ 7753 void Cy_SysPm_CoreBuckDpslpSetMode(cy_en_syspm_core_buck_mode_t mode); 7754 7755 /******************************************************************************* 7756 * Function Name: Cy_SysPm_CoreBuckDpslpGetMode 7757 ****************************************************************************//** 7758 * 7759 * Get the Deepsleep Core Buck Regulator Mode 7760 * 7761 * \return 7762 * Gets enum value of type \ref cy_en_syspm_core_buck_mode_t 7763 * 7764 * \note 7765 * This API is available for CAT1D devices. 7766 * 7767 *******************************************************************************/ 7768 cy_en_syspm_core_buck_mode_t Cy_SysPm_CoreBuckDpslpGetMode(void); 7769 7770 7771 /******************************************************************************* 7772 * Function Name: Cy_SysPm_CoreBuckDpslpEnableOverride 7773 ****************************************************************************//** 7774 * 7775 * Enable the Override feature for core buck during Deepsleep 7776 * 7777 * \param enable 7778 * true - enable, false - disable 7779 * 7780 * \note 7781 * This function is available for CAT1D devices. 7782 * 7783 *******************************************************************************/ 7784 void Cy_SysPm_CoreBuckDpslpEnableOverride(bool enable); 7785 7786 /******************************************************************************* 7787 * Function Name: Cy_SysPm_CoreBuckDpslpIsOverrideEnabled 7788 ****************************************************************************//** 7789 * 7790 * Checks if Override feature of core buck during deepsleep is enabled or not. 7791 * 7792 * \return 7793 * True if enabled, False if disabled. 7794 * 7795 * \note 7796 * This function is available for CAT1D devices. 7797 * 7798 *******************************************************************************/ 7799 bool Cy_SysPm_CoreBuckDpslpIsOverrideEnabled(void); 7800 7801 /******************************************************************************* 7802 * Function Name: Cy_SysPm_CoreBuckSetProfile 7803 ****************************************************************************//** 7804 * 7805 * Set the Core Buck Regulator Profile 7806 * 7807 * \param profile 7808 * Pick from \ref cy_en_syspm_core_buck_profile_t 7809 * 7810 * \note 7811 * This API is available for CAT1D devices. 7812 * 7813 *******************************************************************************/ 7814 void Cy_SysPm_CoreBuckSetProfile(cy_en_syspm_core_buck_profile_t profile); 7815 7816 /******************************************************************************* 7817 * Function Name: Cy_SysPm_CoreBuckGetProfile 7818 ****************************************************************************//** 7819 * 7820 * Get the Core Buck Regulator Profile 7821 * 7822 * \return 7823 * Gets enum value of type \ref cy_en_syspm_core_buck_profile_t 7824 * 7825 * \note 7826 * This API is available for CAT1D devices. 7827 * 7828 *******************************************************************************/ 7829 cy_en_syspm_core_buck_profile_t Cy_SysPm_CoreBuckGetProfile(void); 7830 7831 /******************************************************************************* 7832 * Function Name: Cy_SysPm_RetLdoStatus 7833 ****************************************************************************//** 7834 * 7835 * Get the status of RETLDO Regulator 7836 * 7837 * \return 7838 * Gets enum value of type \ref cy_en_syspm_status_t 7839 * 7840 * \note 7841 * This API is available for CAT1D devices. 7842 * 7843 *******************************************************************************/ 7844 cy_en_syspm_status_t Cy_SysPm_RetLdoStatus(void); 7845 7846 /******************************************************************************* 7847 * Function Name: Cy_SysPm_RetLdoConfigure 7848 ****************************************************************************//** 7849 * 7850 * Configures the RETLDO Regulator 7851 * 7852 * \param retLdoParam 7853 * Structure containing the config parameters, \ref cy_stc_syspm_retldo_params_t 7854 * 7855 * \note 7856 * This API is available for CAT1D devices. 7857 * 7858 * \return 7859 * see \ref cy_en_syspm_status_t. 7860 * 7861 *******************************************************************************/ 7862 cy_en_syspm_status_t Cy_SysPm_RetLdoConfigure(cy_stc_syspm_retldo_params_t *retLdoParam); 7863 7864 /******************************************************************************* 7865 * Function Name: Cy_SysPm_SramLdoStatus 7866 ****************************************************************************//** 7867 * 7868 * Get the status of SRAMLDO Regulator 7869 * 7870 * \return 7871 * Gets enum value of type \ref cy_en_syspm_status_t 7872 * 7873 * \note 7874 * This API is available for CAT1D devices. 7875 * 7876 *******************************************************************************/ 7877 cy_en_syspm_status_t Cy_SysPm_SramLdoStatus(void); 7878 7879 /******************************************************************************* 7880 * Function Name: Cy_SysPm_SramLdoConfigure 7881 ****************************************************************************//** 7882 * 7883 * Configures the SRAMLDO Regulator 7884 * 7885 * \param sramLdoParam 7886 * Structure containing the config parameters, \ref cy_stc_syspm_sramldo_params_t 7887 * 7888 * \note 7889 * This API is available for CAT1D devices. 7890 * 7891 * \return 7892 * see \ref cy_en_syspm_status_t. 7893 * 7894 *******************************************************************************/ 7895 cy_en_syspm_status_t Cy_SysPm_SramLdoConfigure(cy_stc_syspm_sramldo_params_t *sramLdoParam); 7896 7897 /******************************************************************************* 7898 * Function Name: Cy_SysPm_SramLdoEnable 7899 ****************************************************************************//** 7900 * 7901 * Enable/Disable SRAMLDO Regulator 7902 * 7903 * \param enable 7904 * true - enable, false - disable 7905 * 7906 * \note 7907 * This API is available for CAT1D devices. 7908 * 7909 * \return 7910 * see \ref cy_en_syspm_status_t. 7911 * 7912 *******************************************************************************/ 7913 cy_en_syspm_status_t Cy_SysPm_SramLdoEnable(bool enable); 7914 7915 /******************************************************************************* 7916 * Function Name: Cy_SysPm_SramLdoSetVoltage 7917 ****************************************************************************//** 7918 * 7919 * Set SRAM LDO Voltage 7920 * 7921 * \param voltage 7922 * Enum \ref cy_en_syspm_sramldo_voltage_t 7923 * 7924 * \note 7925 * This API is available for CAT1D devices. 7926 * 7927 *******************************************************************************/ 7928 void Cy_SysPm_SramLdoSetVoltage(cy_en_syspm_sramldo_voltage_t voltage); 7929 7930 /******************************************************************************* 7931 * Function Name: Cy_SysPm_SramLdoGetVoltage 7932 ****************************************************************************//** 7933 * 7934 * Get the SRAM LDO Voltage 7935 * 7936 * \return 7937 * Gets enum value of type \ref cy_en_syspm_sramldo_voltage_t 7938 * 7939 * \note 7940 * This API is available for CAT1D devices. 7941 * 7942 *******************************************************************************/ 7943 cy_en_syspm_sramldo_voltage_t Cy_SysPm_SramLdoGetVoltage(void); 7944 7945 /******************************************************************************* 7946 * Function Name: Cy_SysPm_MiscLdoStatus 7947 ****************************************************************************//** 7948 * 7949 * Get the status of MISCLDO Regulator 7950 * 7951 * \return 7952 * Gets enum value of type \ref cy_en_syspm_status_t 7953 * 7954 * \note 7955 * This API is available for CAT1D devices. 7956 * 7957 *******************************************************************************/ 7958 cy_en_syspm_status_t Cy_SysPm_MiscLdoStatus(void); 7959 7960 /******************************************************************************* 7961 * Function Name: Cy_SysPm_MiscLdoConfigure 7962 ****************************************************************************//** 7963 * 7964 * Configures the MISCLDO Regulator 7965 * 7966 * \param miscLdoParam 7967 * Structure containing the config parameters, \ref cy_stc_syspm_miscldo_params_t 7968 * 7969 * \note 7970 * This API is available for CAT1D devices. 7971 * 7972 * \return 7973 * see \ref cy_en_syspm_status_t. 7974 * 7975 *******************************************************************************/ 7976 cy_en_syspm_status_t Cy_SysPm_MiscLdoConfigure(cy_stc_syspm_miscldo_params_t *miscLdoParam); 7977 7978 7979 7980 #endif /* defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) */ 7981 7982 7983 #if defined (CY_IP_MXS40SSRSS) || defined (CY_DOXYGEN) 7984 7985 /******************************************************************************* 7986 * Function Name: Cy_SysPm_CoreBuckSetInrushLimit 7987 ****************************************************************************//** 7988 * 7989 * Set the Core Buck Inrush Limit 7990 * 7991 * \param inrushLimit 7992 * Pick from \ref cy_en_syspm_core_inrush_limit_t 7993 * 7994 * \note 7995 * This API is available for CAT1B devices. 7996 * 7997 *******************************************************************************/ 7998 void Cy_SysPm_CoreBuckSetInrushLimit(cy_en_syspm_core_inrush_limit_t inrushLimit); 7999 8000 8001 /******************************************************************************* 8002 * Function Name: Cy_SysPm_CoreBuckGetInrushLimit 8003 ****************************************************************************//** 8004 * 8005 * Get the Core Buck Inrush Limit 8006 * 8007 * \return 8008 * Gets enum value of type \ref cy_en_syspm_core_inrush_limit_t 8009 * 8010 * \note 8011 * This API is available for CAT1B devices. 8012 * 8013 *******************************************************************************/ 8014 cy_en_syspm_core_inrush_limit_t Cy_SysPm_CoreBuckGetInrushLimit(void); 8015 8016 8017 /******************************************************************************* 8018 * Function Name: Cy_SysPm_CoreBuckConfig 8019 ****************************************************************************//** 8020 * 8021 * Configures the Core Buck Regulator 8022 * 8023 * \note 8024 * Core buck voltage and mode are selected based on a voting system by the 8025 * following 5 requesters 8026 * Deepsleep Requester, SDR0 DS Requester, SDR0 Requester, SDR1 Requester and 8027 * Extra Requester. 8028 * The requesters may all request different voltages and CBUCK modes. 8029 * When multiple requesters are used for a profile, the requests are harmonized 8030 * into a composite request according to rules: 8031 * - The composite CBUCK voltage request is the maximum voltage from all 8032 * enabled requesters. 8033 * - The composite CBUCK mode is the maximum setting among all enabled requesters 8034 * to get the highest mode. 8035 * 8036 * For information about the CBUCK control, refer to the appropriate device TRM. 8037 * 8038 * \param config 8039 * Structure containing the config parameters, \ref cy_stc_syspm_core_buck_params_t 8040 * 8041 * \note 8042 * This API is available for CAT1B devices. 8043 * 8044 * \return 8045 * see \ref cy_en_syspm_status_t. 8046 * 8047 *******************************************************************************/ 8048 cy_en_syspm_status_t Cy_SysPm_CoreBuckConfig(cy_stc_syspm_core_buck_params_t *config); 8049 8050 /******************************************************************************* 8051 * Function Name: Cy_SysPm_LdoExtraRequesterConfig 8052 ****************************************************************************//** 8053 * 8054 * Configures the Extra Requester for Core Buck Regulator 8055 * 8056 * \note 8057 * The extra requester caters to two special cases: 8058 * - To temporarily force the system to choose a scratch profile with the 8059 * settings defined by the extra requester. This allows other requester 8060 * settings to be changed without changing the internal setting of an active 8061 * profile. This can be used to change the target voltage of an enabled 8062 * stepdown regulator. 8063 * - To participate in requester harmonization as an extra requester. 8064 * This can be used to restrict the composite settings higher than the 8065 * hardware would normally choose according to the harmonization rules. 8066 * 8067 * For information about the CBUCK control, refer to the appropriate device TRM. 8068 * 8069 * \param extraReqConfig 8070 * Pointer to structure containing the extra requester config parameters, 8071 * \ref cy_stc_syspm_extraReq_params_t 8072 * 8073 * \note 8074 * This API is available for CAT1B devices. 8075 * 8076 * \return 8077 * see \ref cy_en_syspm_status_t. 8078 * 8079 *******************************************************************************/ 8080 cy_en_syspm_status_t Cy_SysPm_LdoExtraRequesterConfig(cy_stc_syspm_extraReq_params_t *extraReqConfig); 8081 #endif /* defined (CY_IP_MXS40SSRSS) || defined (CY_DOXYGEN) */ 8082 8083 #endif /* defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) */ 8084 /** \} group_syspm_functions_buck */ 8085 8086 8087 /** 8088 * \addtogroup group_syspm_functions_ldo 8089 * \{ 8090 */ 8091 #if (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 2)) || (defined (CY_IP_MXS40SSRSS) && (CY_MXS40SSRSS_VER_1_2 > 0UL)) 8092 8093 /******************************************************************************* 8094 * Function Name: Cy_SysPm_LdoGetVoltage 8095 ****************************************************************************//** 8096 * 8097 * Gets the current output voltage value of the core LDO regulator. 8098 * 8099 * \note The actual device Vccd voltage can be different from the 8100 * nominal voltage because the actual voltage value depends on conditions 8101 * including the load current. 8102 * 8103 * \return 8104 * The nominal output voltage of the LDO. See \ref cy_en_syspm_ldo_voltage_t. 8105 * 8106 * \funcusage 8107 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_VoltageRegulator 8108 * 8109 * \note 8110 * This API is available for CAT1A devices. 8111 * 8112 *******************************************************************************/ 8113 cy_en_syspm_ldo_voltage_t Cy_SysPm_LdoGetVoltage(void); 8114 8115 #endif /* (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 2)) */ 8116 8117 #if defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS40SRSS) || defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 2) || defined (CY_DOXYGEN) 8118 8119 /******************************************************************************* 8120 * Function Name: Cy_SysPm_LdoIsEnabled 8121 ****************************************************************************//** 8122 * 8123 * Reads the current status of the core LDO regulator. 8124 * 8125 * \return 8126 * - True means the LDO is enabled. 8127 * - False means it is disabled. 8128 * 8129 * \funcusage 8130 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_VoltageRegulator 8131 * 8132 *******************************************************************************/ 8133 bool Cy_SysPm_LdoIsEnabled(void); 8134 8135 #endif /* defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS40SRSS) || defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 2) */ 8136 8137 #if defined (CY_IP_MXS40SSRSS) || defined (CY_DOXYGEN) 8138 /******************************************************************************* 8139 * Function Name: Cy_SysPm_SdrConfigure 8140 ****************************************************************************//** 8141 * 8142 * Configures the SDR(Step Down Regulator) 8143 * 8144 * \note 8145 * The CBUCK voltage selection must be 60mV higher than the SDR output or the 8146 * regulator output may bypass. 8147 * 8148 * \param sdr 8149 * CY_SYSPM_SDR_0 - for SDR0 8150 * CY_SYSPM_SDR_1 - for SDR1 8151 * 8152 * \param config 8153 * Structure containing the config parameters, \ref cy_stc_syspm_sdr_params_t 8154 * 8155 * \note 8156 * Maintain below conditions when switching th voltages 8157 * High to Low voltage --> Set TRIM's first , Set Voltage next 8158 * Low to High voltage --> Set Voltage first , Set TRIM's next 8159 * 8160 * \note 8161 * This API is available for CAT1B devices. 8162 * 8163 *******************************************************************************/ 8164 void Cy_SysPm_SdrConfigure(cy_en_syspm_sdr_t sdr, cy_stc_syspm_sdr_params_t *config); 8165 8166 /******************************************************************************* 8167 * Function Name: Cy_SysPm_SdrSetVoltage 8168 ****************************************************************************//** 8169 * 8170 * Set the SDR(Step Down Regulator) Voltage 8171 * 8172 * \note 8173 * The CBUCK voltage selection must be 60mV higher than the SDR output or the 8174 * regulator output may bypass. 8175 * 8176 * \param sdr 8177 * CY_SYSPM_SDR_0 - for SDR0 8178 * CY_SYSPM_SDR_1 - for SDR1 8179 * 8180 * \param voltage 8181 * Pick from \ref cy_en_syspm_sdr_voltage_t 8182 * 8183 * \note 8184 * Maintain below conditions when switching th voltages 8185 * High to Low voltage --> Set TRIM's first , Set Voltage next 8186 * Low to High voltage --> Set Voltage first , Set TRIM's next 8187 * 8188 * \note 8189 * This API is available for CAT1B devices. 8190 * 8191 *******************************************************************************/ 8192 void Cy_SysPm_SdrSetVoltage(cy_en_syspm_sdr_t sdr, cy_en_syspm_sdr_voltage_t voltage); 8193 8194 8195 /******************************************************************************* 8196 * Function Name: Cy_SysPm_SdrGetVoltage 8197 ****************************************************************************//** 8198 * 8199 * Get the SDR(Step Down Regulator) Voltage 8200 * 8201 * \param sdr 8202 * CY_SYSPM_SDR_0 - for SDR0 8203 * CY_SYSPM_SDR_1 - for SDR1 8204 * 8205 * \return 8206 * Gets Voltage enum value of type \ref cy_en_syspm_sdr_t 8207 * 8208 * \note 8209 * This API is available for CAT1B devices. 8210 * 8211 *******************************************************************************/ 8212 cy_en_syspm_sdr_voltage_t Cy_SysPm_SdrGetVoltage(cy_en_syspm_sdr_t sdr); 8213 8214 /******************************************************************************* 8215 * Function Name: Cy_SysPm_SdrEnable 8216 ****************************************************************************//** 8217 * 8218 * Enable the SDR(Step Down Regulator) 8219 * 8220 * \note 8221 * Applicable for only SDR1, whereas SDR0 is always enabled. 8222 * 8223 * \param sdr 8224 * CY_SYSPM_SDR_0 - for SDR0 8225 * CY_SYSPM_SDR_1 - for SDR1 8226 * 8227 * \param enable 8228 * true - enable, false - disable 8229 * 8230 * \note 8231 * This function is available for CAT1B devices. 8232 * 8233 *******************************************************************************/ 8234 void Cy_SysPm_SdrEnable(cy_en_syspm_sdr_t sdr, bool enable); 8235 8236 /******************************************************************************* 8237 * Function Name: Cy_SysPm_IsSdrEnabled 8238 ****************************************************************************//** 8239 * 8240 * Checks if SDR(Step Down Regulator) is enabled or not. 8241 * 8242 * \param sdr 8243 * CY_SYSPM_SDR_0 - for SDR0 8244 * CY_SYSPM_SDR_1 - for SDR1 8245 * 8246 * \return 8247 * True if enabled, False if disabled. 8248 * 8249 * \note 8250 * This function is available for CAT1B devices. 8251 * 8252 *******************************************************************************/ 8253 bool Cy_SysPm_IsSdrEnabled(cy_en_syspm_sdr_t sdr); 8254 8255 /******************************************************************************* 8256 * Function Name: Cy_SysPm_HvLdoConfigure 8257 ****************************************************************************//** 8258 * 8259 * Configures the HVLDO Regulator 8260 * 8261 * \param config 8262 * Structure containing the config parameters, \ref cy_stc_syspm_hvldo_params_t 8263 * 8264 * \note 8265 * This function is available for CAT1B devices. 8266 * 8267 *******************************************************************************/ 8268 void Cy_SysPm_HvLdoConfigure(cy_stc_syspm_hvldo_params_t *config); 8269 8270 /******************************************************************************* 8271 * Function Name: Cy_SysPm_HvLdoSetVoltage 8272 ****************************************************************************//** 8273 * 8274 * Set the HVLDO Regulator Voltage 8275 * 8276 * \param voltage 8277 * Pick from \ref cy_en_syspm_hvldo_voltage_t 8278 * 8279 * \note 8280 * This function is available for CAT1B devices. 8281 * 8282 *******************************************************************************/ 8283 void Cy_SysPm_HvLdoSetVoltage(cy_en_syspm_hvldo_voltage_t voltage); 8284 8285 /******************************************************************************* 8286 * Function Name: Cy_SysPm_HvLdoGetVoltage 8287 ****************************************************************************//** 8288 * 8289 * Get the HVLDO Regulator Voltage 8290 * 8291 * \return 8292 * Gets Voltage enum value of type \ref cy_en_syspm_hvldo_voltage_t 8293 * 8294 * \note 8295 * This function is available for CAT1B devices. 8296 * 8297 *******************************************************************************/ 8298 cy_en_syspm_hvldo_voltage_t Cy_SysPm_HvLdoGetVoltage(void); 8299 8300 /******************************************************************************* 8301 * Function Name: Cy_SysPm_HvLdoEnable 8302 ****************************************************************************//** 8303 * 8304 * Enable the HVLDO Regulator 8305 * 8306 * \param enable 8307 * true - enable, false - disable 8308 * 8309 * \note 8310 * This parameter is available for CAT1B devices. 8311 * 8312 *******************************************************************************/ 8313 void Cy_SysPm_HvLdoEnable(bool enable); 8314 8315 /******************************************************************************* 8316 * Function Name: Cy_SysPm_IsHvLdoEnabled 8317 ****************************************************************************//** 8318 * 8319 * Checks if HVLDO Regulator is enabled or not. 8320 * 8321 * \return 8322 * True if enabled, False if disabled. 8323 * 8324 * \note 8325 * This parameter is available for CAT1B devices. 8326 * 8327 *******************************************************************************/ 8328 bool Cy_SysPm_IsHvLdoEnabled(void); 8329 8330 #endif /* defined (CY_IP_MXS40SSRSS) || defined (CY_DOXYGEN) */ 8331 /** \} group_syspm_functions_ldo */ 8332 8333 8334 /** 8335 * \addtogroup group_syspm_functions_iofreeze 8336 * \{ 8337 */ 8338 /******************************************************************************* 8339 * Function Name: Cy_SysPm_IoIsFrozen 8340 ****************************************************************************//** 8341 * 8342 * Checks whether IOs are frozen. 8343 * 8344 * \return 8345 * - True if IOs are frozen. 8346 * - False if IOs are unfrozen. 8347 * 8348 * \funcusage 8349 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_IoUnfreeze 8350 * 8351 *******************************************************************************/ 8352 bool Cy_SysPm_IoIsFrozen(void); 8353 8354 /******************************************************************************* 8355 * Function Name: Cy_SysPm_IoUnfreeze 8356 ****************************************************************************//** 8357 * 8358 * This function unfreezes the I/O cells that are automatically frozen when 8359 * Hibernate is entered with the call to \ref Cy_SysPm_SystemEnterHibernate(). 8360 * 8361 * I/O cells remain frozen after a wakeup from Hibernate mode until the 8362 * firmware unfreezes them by calling this function. 8363 * 8364 * If the firmware must retain the data value on the pin, then the 8365 * value must be read and re-written to the pin's port data register before 8366 * calling this function. Furthermore, the drive mode must be re-programmed 8367 * before the pins are unfrozen. If this is not done, the pin will change to 8368 * the default state the moment the freeze is removed. 8369 * 8370 * Note that I/O cell configuration can be changed while frozen. The new 8371 * configuration becomes effective only after the pins are unfrozen. 8372 * 8373 * \funcusage 8374 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_IoUnfreeze 8375 * 8376 *******************************************************************************/ 8377 void Cy_SysPm_IoUnfreeze(void); 8378 8379 #if (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 2)) 8380 /******************************************************************************* 8381 * Function Name: Cy_SysPm_IoFreeze 8382 ****************************************************************************//** 8383 * 8384 * Freezes IOs. 8385 * 8386 * Freezes the IO cells directly to save the IO-cell state on a wakeup from the 8387 * Hibernate. Do not call this function before entering the 8388 * Hibernate mode, because Cy_SysPm_Hibernate() function freezes the IO cells. 8389 * 8390 * \note 8391 * This function is available for CAT1C devices. 8392 * 8393 ******************************************************************************/ 8394 void Cy_SysPm_IoFreeze(void); 8395 #endif /* (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 2)) */ 8396 8397 #if defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) 8398 8399 /******************************************************************************* 8400 * Function Name: Cy_SysPm_DeepSleepIoIsFrozen 8401 ****************************************************************************//** 8402 * 8403 * Checks whether IOs are frozen during DEEPSLEEP-RAM/OFF 8404 * 8405 * \return 8406 * - True if IOs are frozen. 8407 * - False if IOs are unfrozen. 8408 * 8409 * \note 8410 * This function is available for CAT1B and CAT1D devices. 8411 * 8412 *******************************************************************************/ 8413 bool Cy_SysPm_DeepSleepIoIsFrozen(void); 8414 8415 /******************************************************************************* 8416 * Function Name: Cy_SysPm_DeepSleepIoUnfreeze 8417 ****************************************************************************//** 8418 * 8419 * This function unfreezes the I/O cells that are automatically frozen when 8420 * DEEPSLEEP-RAM/OFF is entered. 8421 * 8422 * I/O cells remain frozen after a wakeup from DEEPSLEEP_RAM/OFF mode until the 8423 * firmware unfreezes them by calling this function. 8424 * 8425 * If the firmware must retain the data value on the pin, then the 8426 * value must be read and re-written to the pin's port data register before 8427 * calling this function. Furthermore, the drive mode must be re-programmed 8428 * before the pins are unfrozen. If this is not done, the pin will change to 8429 * the default state the moment the freeze is removed. 8430 * 8431 * Note that I/O cell configuration can be changed while frozen. The new 8432 * configuration becomes effective only after the pins are unfrozen. 8433 * 8434 * \note 8435 * This function is available for CAT1B and CAT1D devices. 8436 * 8437 *******************************************************************************/ 8438 void Cy_SysPm_DeepSleepIoUnfreeze(void); 8439 8440 #endif /* defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS22SRSS) || defined (CY_DOXYGEN) */ 8441 8442 /** \} group_syspm_functions_iofreeze */ 8443 8444 8445 8446 /** 8447 * \addtogroup group_syspm_functions_pmic 8448 * \{ 8449 */ 8450 8451 /* The pmic functionality is available for SRSSv1, or SRSSv2+ only if the BACKUP_VBCK IP is present. */ 8452 #if ((defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 2u)) || \ 8453 ((defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 2u)) && (defined (SRSS_BACKUP_VBCK_PRESENT) && (SRSS_BACKUP_VBCK_PRESENT == 1u)))) || \ 8454 defined (CY_DOXYGEN) 8455 /******************************************************************************* 8456 * Function Name: Cy_SysPm_PmicEnable 8457 ****************************************************************************//** 8458 * 8459 * Enable the external PMIC controller that supplies Vddd (if present). 8460 * 8461 * For information about the PMIC controller input and output pins and their 8462 * assignment in specific devices, refer to the appropriate device TRM. 8463 * 8464 * This function is not effective when the PMIC controller is locked. Call 8465 * Cy_SysPm_PmicUnlock() before enabling the PMIC. 8466 * 8467 * \funcusage 8468 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_PmicEnable 8469 * 8470 * \note 8471 * This API is available for CAT1A, CAT1B(PSoC C3) & CAT1C devices. 8472 * 8473 *******************************************************************************/ 8474 void Cy_SysPm_PmicEnable(void); 8475 8476 8477 /******************************************************************************* 8478 * Function Name: Cy_SysPm_PmicDisable 8479 ****************************************************************************//** 8480 * 8481 * Disable the external PMIC controller that supplies Vddd (if present). 8482 * This function does not affect the PMIC controller output pin. The PMIC 8483 * controller input pin has programmable polarity to 8484 * enable the external PMIC using different input polarities. The PMIC controller 8485 * is automatically enabled when the input pin polarity and configured polarity 8486 * match. This function is not effective when the active level of PMIC controller 8487 * input pin is equal to the configured PMIC controller polarity. 8488 * 8489 * The function is not effective when the PMIC controller is locked. Call 8490 * Cy_SysPm_PmicUnlock() before enabling the PMIC controller. 8491 * 8492 * \param polarity 8493 * Configures the PMIC controller wakeup input pin to be active low or active 8494 * high. The PMIC will be automatically enabled when the set polarity and the 8495 * active level of PMIC input pin match. 8496 * See \ref cy_en_syspm_pmic_wakeup_polarity_t. 8497 * 8498 * The PMIC controller will be enabled automatically by any of RTC alarm or 8499 * PMIC wakeup events, regardless of the PMIC controller lock state. 8500 * 8501 * \note 8502 * Before disabling the PMIC controller, ensure that PMIC input and PMIC output 8503 * pins are configured correctly to enable expected PMIC operation. 8504 * 8505 * \warning 8506 * The PMIC is enabled automatically when you call Cy_SysPm_PmicLock(). 8507 * To keep the external PMIC disabled, the PMIC controller must remain unlocked. 8508 * 8509 * \warning 8510 * Do not call Cy_SysPm_PmicDisable(CY_SYSPM_PMIC_POLARITY_LOW) because this 8511 * is not supported by hardware. 8512 * 8513 * For information about the PMIC controller input and output pins and their 8514 * assignment in the specific devices, refer to the appropriate 8515 * device TRM. 8516 * 8517 * \funcusage 8518 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_PmicDisable 8519 * 8520 * \note 8521 * This API is available for CAT1A, CAT1B(PSoC C3) & CAT1C devices. 8522 * 8523 *******************************************************************************/ 8524 void Cy_SysPm_PmicDisable(cy_en_syspm_pmic_wakeup_polarity_t polarity); 8525 8526 8527 /******************************************************************************* 8528 * Function Name: Cy_SysPm_PmicAlwaysEnable 8529 ****************************************************************************//** 8530 * 8531 * Enable the external PMIC controller that supplies Vddd (if present) and force 8532 * active. This is a Write once API. It ensures that the PMIC controller cannot 8533 * be disabled or polarity changed until a next device reset. 8534 * 8535 * For information about the PMIC controller input and output pins and their 8536 * assignment in the specific devices, refer to the appropriate device TRM. 8537 * 8538 * \funcusage 8539 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_PmicAlwaysEnable 8540 * 8541 * \note 8542 * This API is available for CAT1A, CAT1B(PSoC C3) & CAT1C devices. 8543 * 8544 *******************************************************************************/ 8545 void Cy_SysPm_PmicAlwaysEnable(void); 8546 8547 8548 /******************************************************************************* 8549 * Function Name: Cy_SysPm_PmicEnableOutput 8550 ****************************************************************************//** 8551 * 8552 * Enables the PMIC controller output pin. 8553 * 8554 * The function is not effective when the PMIC controller is locked. Call 8555 * Cy_SysPm_PmicUnlock() before enabling the PMIC controller. 8556 * 8557 * For information about the PMIC controller output pin and its assignment in 8558 * specific devices, refer to the appropriate device TRM. 8559 * 8560 * \funcusage 8561 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_PmicEnableOutput 8562 * 8563 * \note 8564 * This API is available for CAT1A, CAT1B(PSoC C3) & CAT1C devices. 8565 * 8566 *******************************************************************************/ 8567 void Cy_SysPm_PmicEnableOutput(void); 8568 8569 8570 /******************************************************************************* 8571 * Function Name: Cy_SysPm_PmicDisableOutput 8572 ****************************************************************************//** 8573 * 8574 * Disables the PMIC controller output pin. 8575 * 8576 * When the PMIC controller output pin is disabled and is unlocked, the PMIC 8577 * controller output pin can be used for the another purpose. 8578 * 8579 * The function has no effect when the PMIC is locked. Call 8580 * Cy_SysPm_PmicUnlock() before enabling the PMIC. 8581 * 8582 * For information about the PMIC controller output pin and its assignment in 8583 * specific devices, refer to the appropriate device TRM. 8584 * 8585 * \note 8586 * After the PMIC controller output is disabled, the PMIC output pin returns to 8587 * its GPIO configured state. 8588 * 8589 * \warning 8590 * The PMIC controller output is enabled automatically when you call 8591 * Cy_SysPm_PmicLock(). To keep the PMIC controller output disabled, the PMIC 8592 * controller must remain unlocked. 8593 * 8594 * \funcusage 8595 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_PmicDisableOutput 8596 * 8597 * \note 8598 * This API is available for CAT1A, CAT1B(PSoC C3) & CAT1C devices. 8599 * 8600 *******************************************************************************/ 8601 void Cy_SysPm_PmicDisableOutput(void); 8602 8603 8604 /******************************************************************************* 8605 * Function Name: Cy_SysPm_PmicLock 8606 ****************************************************************************//** 8607 * 8608 * Locks the PMIC control controller register so that no changes can be made. 8609 * The changes are related to PMIC enabling/disabling and PMIC output pin 8610 * enabling/disabling. 8611 * 8612 * \warning 8613 * The PMIC controller and/or the PMIC output are enabled automatically when 8614 * you call Cy_SysPm_PmicLock(). To keep the PMIC or PMIC controller output 8615 * disabled, the PMIC controller must remain unlocked. 8616 * 8617 * \funcusage 8618 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_PmicLock 8619 * 8620 * \note 8621 * This API is available for CAT1A, CAT1B(PSoC C3) & CAT1C devices. 8622 * 8623 *******************************************************************************/ 8624 void Cy_SysPm_PmicLock(void); 8625 8626 8627 /******************************************************************************* 8628 * Function Name: Cy_SysPm_PmicUnlock 8629 ****************************************************************************//** 8630 * 8631 * Unlocks the PMIC control register so that changes can be made. The changes are 8632 * related to the PMIC controller enabling/disabling and PMIC output pin 8633 * enabling/disabling. 8634 * 8635 * \warning 8636 * The PMIC controller and/or the PMIC output are enabled automatically when 8637 * you call Cy_SysPm_PmicLock(). To keep the PMIC controller or PMIC output 8638 * disabled, the PMIC must remain unlocked. 8639 * 8640 * \funcusage 8641 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_PmicEnable 8642 * 8643 * \note 8644 * This API is available for CAT1A, CAT1B(PSoC C3) & CAT1C devices. 8645 * 8646 *******************************************************************************/ 8647 void Cy_SysPm_PmicUnlock(void); 8648 8649 8650 /******************************************************************************* 8651 * Function Name: Cy_SysPm_PmicIsEnabled 8652 ****************************************************************************//** 8653 * 8654 * This function returns the status of the PMIC controller. 8655 * 8656 * \return 8657 * - True if the PMIC is enabled. 8658 * - False if the PMIC is disabled. 8659 * 8660 * \funcusage 8661 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_PmicLock 8662 * 8663 * \note 8664 * This API is available for CAT1A, CAT1B(PSoC C3) & CAT1C devices. 8665 * 8666 *******************************************************************************/ 8667 bool Cy_SysPm_PmicIsEnabled(void); 8668 8669 8670 /******************************************************************************* 8671 * Function Name: Cy_SysPm_PmicIsOutputEnabled 8672 ****************************************************************************//** 8673 * 8674 * This function returns the status of the PMIC controller output. 8675 * 8676 * \return 8677 * - True if the PMIC output is enabled. 8678 * - False if the PMIC output is disabled. 8679 * 8680 * \funcusage 8681 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_PmicDisable 8682 * 8683 * \note 8684 * This API is available for CAT1A, CAT1B(PSoC C3) & CAT1C devices. 8685 * 8686 *******************************************************************************/ 8687 bool Cy_SysPm_PmicIsOutputEnabled(void); 8688 8689 8690 /******************************************************************************* 8691 * Function Name: Cy_SysPm_PmicIsLocked 8692 ****************************************************************************//** 8693 * 8694 * Returns the PMIC controller lock status. 8695 * 8696 * \return 8697 * - True if the PMIC is locked. 8698 * - False if the PMIC is unlocked. 8699 * 8700 * \funcusage 8701 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_PmicLock 8702 * 8703 * \note 8704 * This API is available for CAT1A, CAT1B(PSoC C3) & CAT1C devices. 8705 * 8706 *******************************************************************************/ 8707 bool Cy_SysPm_PmicIsLocked(void); 8708 #endif /* (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 2)) || ((CY_IP_MXS40SRSS_VERSION >= 2u) && (SRSS_BACKUP_VBCK_PRESENT)) */ 8709 /** \} group_syspm_functions_pmic */ 8710 8711 8712 /** 8713 * \addtogroup group_syspm_functions_backup 8714 * \{ 8715 */ 8716 #if defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS40SRSS) || defined (CY_DOXYGEN) 8717 8718 /******************************************************************************* 8719 * Function Name: Cy_SysPm_BackupSetSupply 8720 ****************************************************************************//** 8721 * 8722 * Sets the backup supply (Vddback) operation mode. 8723 * 8724 * \param 8725 * vddBackControl 8726 * Selects backup supply (Vddback) operation mode. 8727 * See \ref cy_en_syspm_vddbackup_control_t. 8728 * 8729 * Refer to device TRM for more detail about backup supply modes. Will do nothing 8730 * if device TRM denotes VDDBAK_CTL register field is unavailable. 8731 * 8732 * \funcusage 8733 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_BackupSetSupply 8734 * 8735 *******************************************************************************/ 8736 void Cy_SysPm_BackupSetSupply(cy_en_syspm_vddbackup_control_t vddBackControl); 8737 8738 8739 /******************************************************************************* 8740 * Function Name: Cy_SysPm_BackupGetSupply 8741 ****************************************************************************//** 8742 * 8743 * Returns the current backup supply (Vddback) operation mode. 8744 * 8745 * \return 8746 * The current backup supply (Vddback) operation mode, 8747 * see \ref cy_en_syspm_status_t. 8748 * 8749 * Refer to device TRM for more detail about backup supply modes. 8750 * 8751 * \funcusage 8752 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_BackupGetSupply 8753 * 8754 *******************************************************************************/ 8755 cy_en_syspm_vddbackup_control_t Cy_SysPm_BackupGetSupply(void); 8756 8757 /******************************************************************************* 8758 * Function Name: Cy_SysPm_BackupEnableVoltageMeasurement 8759 ****************************************************************************//** 8760 * 8761 * This function enables Vbackup supply measurement by the ADC. The function 8762 * connects the Vbackup supply to AMuxBusA. The ADC input can then be connected 8763 * to AMuxBusA. Note that the measured signal is scaled by 10% to allow full 8764 * range measurement by the ADC. 8765 * 8766 * Refer to device TRM for more detail about backup supply modes. Will do nothing 8767 * if device TRM denotes VBACKUP_MEAS register field is unavailable. 8768 * 8769 * \funcusage 8770 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_BackupEnableVoltageMeasurement 8771 * 8772 *******************************************************************************/ 8773 void Cy_SysPm_BackupEnableVoltageMeasurement(void); 8774 8775 8776 /******************************************************************************* 8777 * Function Name: Cy_SysPm_BackupDisableVoltageMeasurement 8778 ****************************************************************************//** 8779 * 8780 * The function disables Vbackup supply measurement by the ADC by disconnecting 8781 * the Vbackup supply from AMuxBusA. 8782 * 8783 * Refer to device TRM for more detail about backup supply modes. Will do nothing 8784 * if device TRM denotes VBACKUP_MEAS register field is unavailable. 8785 * 8786 * \funcusage 8787 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_BackupDisableVoltageMeasurement 8788 * 8789 *******************************************************************************/ 8790 void Cy_SysPm_BackupDisableVoltageMeasurement(void); 8791 8792 /******************************************************************************* 8793 * Function Name: Cy_SysPm_BackupSuperCapCharge 8794 ****************************************************************************//** 8795 * 8796 * Configures the supercapacitor charger circuit. 8797 * 8798 * \param key 8799 * Passes the key to enable or disable the supercapacitor charger circuit. 8800 * See \ref cy_en_syspm_sc_charge_key_t. 8801 * 8802 * \warning 8803 * This function is used only for charging the supercapacitor. 8804 * Do not use this function to charge a battery. Refer to device TRM for more 8805 * detail about backup supply modes. Will do nothing if device TRM denotes 8806 * EN_CHARGE_KEY register field is unavailable. 8807 * 8808 * \funcusage 8809 * \snippet syspm/snippet/main.c snippet_Cy_SysPm_BackupSuperCapCharge 8810 * 8811 *******************************************************************************/ 8812 void Cy_SysPm_BackupSuperCapCharge(cy_en_syspm_sc_charge_key_t key); 8813 #endif 8814 8815 8816 #if defined (CY_IP_MXS40SSRSS) || (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 2) && (defined (SRSS_BACKUP_PRESENT) && (SRSS_BACKUP_PRESENT == 1u))) || defined (CY_DOXYGEN) 8817 /******************************************************************************* 8818 * Function Name: Cy_SysPm_BackupWordStore 8819 ****************************************************************************//** 8820 * 8821 * Stores supported number of words(SRSS_BACKUP_NUM_BREG) in Backup Domain 8822 * 8823 * \param wordIndex 8824 * Offset/Index of Backup Register Region(BREG) to where the data needs 8825 * to be stored. 8826 * Starts with 0, ends with (SRSS_BACKUP_NUM_BREG - 1) 8827 * 8828 * \param wordSrcPointer 8829 * Source address from where the words have to be picked and backed up. 8830 * 8831 * \param wordSize 8832 * Number of words to be stored 8833 * 8834 * \note 8835 * This API is available for CAT1A (TVIIBE only), CAT1B and CAT1C devices. 8836 * 8837 *******************************************************************************/ 8838 8839 void Cy_SysPm_BackupWordStore(uint32_t wordIndex, uint32_t *wordSrcPointer, uint32_t wordSize); 8840 8841 /******************************************************************************* 8842 * Function Name: Cy_SysPm_BackupWordReStore 8843 ****************************************************************************//** 8844 * 8845 * Restores supported number of words(SRSS_BACKUP_NUM_BREG) in Backup Domain 8846 * 8847 * \param wordIndex 8848 * Offset/Index of Backup Register Region(BREG) from where the data need 8849 * to be Restored. 8850 * Starts with 0, ends with (SRSS_BACKUP_NUM_BREG - 1) 8851 * 8852 * \param wordDstPointer 8853 * Destination address from where the backed up words have to be written. 8854 * 8855 * \param wordSize 8856 * Number of words to be Restored 8857 * 8858 * \note 8859 * This API is available for CAT1A (TVIIBE only), CAT1B and CAT1C devices. 8860 * 8861 *******************************************************************************/ 8862 void Cy_SysPm_BackupWordReStore(uint32_t wordIndex, uint32_t *wordDstPointer, uint32_t wordSize); 8863 #endif /* (defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS40SRSS)) && (defined (SRSS_BACKUP_PRESENT) && (SRSS_BACKUP_PRESENT == 1u)) || defined (CY_DOXYGEN) */ 8864 8865 #if defined (CY_IP_MXS40SSRSS) || defined (CY_DOXYGEN) 8866 /******************************************************************************* 8867 * Function Name: Cy_SysPm_SetupDeepSleepRAM 8868 ****************************************************************************//** 8869 * 8870 * Implements Pre and Post Deepsleep RAM Setup. 8871 * 8872 * \param dsramCheck 8873 * CY_SYSPM_PRE_DSRAM or CY_SYSPM_POST_DSRAM 8874 * 8875 * \param dsramIntState 8876 * Variable to save the interrupt state before and after Deepsleep RAM. 8877 * 8878 * \return 8879 * - CY_SYSPM_SUCCESS - Deepsleep RAM checks are successful 8880 * - CY_SYSPM_CANCELED - Operation was canceled. Call the function again until 8881 * the function returns CY_SYSPM_SUCCESS. 8882 * 8883 * \note 8884 * This API is available for CAT1B devices. 8885 * 8886 *******************************************************************************/ 8887 cy_en_syspm_status_t Cy_SysPm_SetupDeepSleepRAM(cy_en_syspm_dsram_checks_t dsramCheck, uint32_t *dsramIntState); 8888 8889 /******************************************************************************* 8890 * Function Name: Cy_SysPm_CpuEnterRAMOffDeepSleep 8891 ****************************************************************************//** 8892 * 8893 * Sets executing CPU to the Deep Sleep mode forceful RAM OFF. 8894 * 8895 * \return 8896 * Entered status, see \ref cy_en_syspm_status_t. 8897 * 8898 * \note 8899 * This API is available for CAT1B devices. 8900 * 8901 * \note 8902 * This API is not a standard PDL interface, it is a custom defined Power 8903 * Management State, not to be used by the customers. 8904 * 8905 *******************************************************************************/ 8906 cy_en_syspm_status_t Cy_SysPm_CpuEnterRAMOffDeepSleep(void); 8907 8908 #endif /* defined (CY_IP_MXS40SSRSS) || defined (CY_DOXYGEN) */ 8909 8910 8911 /** \} group_syspm_functions_backup */ 8912 /** \} group_syspm_functions */ 8913 8914 /** \cond INTERNAL */ 8915 8916 /******************************************************************************* 8917 * Backward compatibility macro. The following code is DEPRECATED and must 8918 * not be used in new projects 8919 *******************************************************************************/ 8920 #if (defined (SRSS_BUCKCTL_PRESENT) && (SRSS_BUCKCTL_PRESENT == 1u)) 8921 /** 8922 * \note 8923 * These macros are available for CAT1A devices. 8924 **/ 8925 /* BWC defines for Buck related functions */ 8926 typedef cy_en_syspm_buck_voltage1_t cy_en_syspm_simo_buck_voltage1_t; 8927 typedef cy_en_syspm_buck_voltage2_t cy_en_syspm_simo_buck_voltage2_t; 8928 8929 #define Cy_SysPm_SimoBuckGetVoltage2 Cy_SysPm_BuckGetVoltage2 8930 #define Cy_SysPm_DisableVoltage2 Cy_SysPm_BuckDisableVoltage2 8931 #define Cy_SysPm_EnableVoltage2 Cy_SysPm_BuckEnableVoltage2 8932 #define Cy_SysPm_SimoBuckSetHwControl Cy_SysPm_BuckSetVoltage2HwControl 8933 #define Cy_SysPm_SimoBuckGetHwControl Cy_SysPm_BuckIsVoltage2HwControlled 8934 #define Cy_SysPm_SimoBuckSetVoltage2 Cy_SysPm_BuckSetVoltage2 8935 8936 #define CY_SYSPM_SIMO_BUCK_OUT2_VOLTAGE_1_15V CY_SYSPM_BUCK_OUT2_VOLTAGE_1_15V 8937 #define CY_SYSPM_SIMO_BUCK_OUT2_VOLTAGE_1_2V CY_SYSPM_BUCK_OUT2_VOLTAGE_1_2V 8938 #define CY_SYSPM_SIMO_BUCK_OUT2_VOLTAGE_1_25V CY_SYSPM_BUCK_OUT2_VOLTAGE_1_25V 8939 #define CY_SYSPM_SIMO_BUCK_OUT2_VOLTAGE_1_3V CY_SYSPM_BUCK_OUT2_VOLTAGE_1_3V 8940 #define CY_SYSPM_SIMO_BUCK_OUT2_VOLTAGE_1_35V CY_SYSPM_BUCK_OUT2_VOLTAGE_1_35V 8941 #define CY_SYSPM_SIMO_BUCK_OUT2_VOLTAGE_1_4V CY_SYSPM_BUCK_OUT2_VOLTAGE_1_4V 8942 #define CY_SYSPM_SIMO_BUCK_OUT2_VOLTAGE_1_45V CY_SYSPM_BUCK_OUT2_VOLTAGE_1_45V 8943 #define CY_SYSPM_SIMO_BUCK_OUT2_VOLTAGE_1_5V CY_SYSPM_BUCK_OUT2_VOLTAGE_1_5V 8944 8945 #define CY_SYSPM_SIMO_BUCK_OUT1_VOLTAGE_0_9V CY_SYSPM_BUCK_OUT1_VOLTAGE_0_9V 8946 #define CY_SYSPM_SIMO_BUCK_OUT1_VOLTAGE_1_1V CY_SYSPM_BUCK_OUT1_VOLTAGE_1_1V 8947 8948 #define Cy_SysPm_SwitchToSimoBuck() (Cy_SysPm_BuckEnable(CY_SYSPM_BUCK_OUT1_VOLTAGE_0_9V)) 8949 #define Cy_SysPm_SimoBuckGetVoltage1 Cy_SysPm_BuckGetVoltage1 8950 #define Cy_SysPm_SimoBuckIsEnabled Cy_SysPm_BuckIsEnabled 8951 #define Cy_SysPm_SimoBuckSetVoltage1 Cy_SysPm_BuckSetVoltage1 8952 #define Cy_SysPm_SimoBuckOutputIsEnabled Cy_SysPm_BuckIsOutputEnabled 8953 #endif /* (defined (SRSS_BUCKCTL_PRESENT) && (SRSS_BUCKCTL_PRESENT == 1u)) */ 8954 8955 #define CY_SYSPM_LPCOMP0_LOW CY_SYSPM_HIBERNATE_LPCOMP0_LOW 8956 #define CY_SYSPM_LPCOMP0_HIGH CY_SYSPM_HIBERNATE_LPCOMP0_HIGH 8957 #define CY_SYSPM_LPCOMP1_LOW CY_SYSPM_HIBERNATE_LPCOMP1_LOW 8958 #define CY_SYSPM_LPCOMP1_HIGH CY_SYSPM_HIBERNATE_LPCOMP1_HIGH 8959 #define CY_SYSPM_HIBALARM CY_SYSPM_HIBERNATE_RTC_ALARM 8960 #define CY_SYSPM_HIBWDT CY_SYSPM_HIBERNATE_WDT 8961 #define CY_SYSPM_HIBPIN0_LOW CY_SYSPM_HIBERNATE_PIN0_LOW 8962 #define CY_SYSPM_HIBPIN0_HIGH CY_SYSPM_HIBERNATE_PIN0_HIGH 8963 #define CY_SYSPM_HIBPIN1_LOW CY_SYSPM_HIBERNATE_PIN1_LOW 8964 #define CY_SYSPM_HIBPIN1_HIGH CY_SYSPM_HIBERNATE_PIN1_HIGH 8965 8966 #if (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 2)) 8967 /** 8968 * \note 8969 * These macros are available for CAT1A devices. 8970 **/ 8971 #define CY_SYSPM_ENTER_LP_MODE CY_SYSPM_ULP 8972 #define CY_SYSPM_EXIT_LP_MODE CY_SYSPM_LP 8973 #define CY_SYSPM_STATUS_SYSTEM_LOWPOWER CY_SYSPM_STATUS_SYSTEM_ULP 8974 #endif /* (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 2) */ 8975 8976 #if (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 2)) 8977 /** 8978 * \note 8979 * These macros are available for CAT1C devices. 8980 **/ 8981 #define CY_SYSPM_STATUS_SYSTEM_LOWPOWER CY_SYSPM_STATUS_SYSTEM_LPACTIVE 8982 #endif /* (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 2) */ 8983 8984 typedef cy_en_syspm_hibernate_wakeup_source_t cy_en_syspm_hib_wakeup_source_t; 8985 8986 /* BWC defines related to hibernation functions */ 8987 #define Cy_SysPm_SetHibWakeupSource Cy_SysPm_SetHibernateWakeupSource 8988 #define Cy_SysPm_ClearHibWakeupSource Cy_SysPm_ClearHibernateWakeupSource 8989 #define Cy_SysPm_GetIoFreezeStatus Cy_SysPm_IoIsFrozen 8990 8991 /* BWC defines for Backup related functions */ 8992 #define Cy_SysPm_SetBackupSupply Cy_SysPm_BackupSetSupply 8993 #define Cy_SysPm_GetBackupSupply Cy_SysPm_BackupGetSupply 8994 #define Cy_SysPm_EnableBackupVMeasure Cy_SysPm_BackupEnableVoltageMeasurement 8995 #define Cy_SysPm_DisableBackupVMeasure Cy_SysPm_BackupDisableVoltageMeasurement 8996 8997 #if defined (CY_IP_MXS40SRSS) 8998 /** 8999 * \note 9000 * These macros are available for CAT1A devices. 9001 **/ 9002 /* BWC defines for PMIC related functions */ 9003 #define Cy_SysPm_EnablePmic Cy_SysPm_PmicEnable 9004 #define Cy_SysPm_DisablePmic Cy_SysPm_PmicDisable 9005 #define Cy_SysPm_AlwaysEnablePmic Cy_SysPm_PmicAlwaysEnable 9006 #define Cy_SysPm_EnablePmicOutput Cy_SysPm_PmicEnableOutput 9007 #define Cy_SysPm_DisablePmicOutput Cy_SysPm_PmicDisableOutput 9008 #define Cy_SysPm_LockPmic Cy_SysPm_PmicLock 9009 #define Cy_SysPm_UnlockPmic Cy_SysPm_PmicUnlock 9010 #define Cy_SysPm_IsPmicEnabled Cy_SysPm_PmicIsEnabled 9011 #define Cy_SysPm_IsPmicOutputEnabled Cy_SysPm_PmicIsOutputEnabled 9012 #define Cy_SysPm_IsPmicLocked Cy_SysPm_PmicIsLocked 9013 #endif /* CY_IP_MXS40SRSS */ 9014 9015 /* BWC defines for functions related to low power transition */ 9016 #define Cy_SysPm_Sleep Cy_SysPm_CpuEnterSleep 9017 #define Cy_SysPm_DeepSleep Cy_SysPm_CpuEnterDeepSleep 9018 #define Cy_SysPm_Hibernate Cy_SysPm_SystemEnterHibernate 9019 9020 #define Cy_SysPm_SleepOnExit Cy_SysPm_CpuSleepOnExit 9021 9022 /* BWC defines for functions related to low power transition */ 9023 #define Cy_SysPm_EnterLpMode Cy_SysPm_EnterLowPowerMode 9024 #define Cy_SysPm_ExitLpMode Cy_SysPm_ExitLowPowerMode 9025 #define Cy_SysPm_IsLowPower Cy_SysPm_IsSystemUlp 9026 9027 #define Cy_SysPm_EnterLowPowerMode Cy_SysPm_SystemSetMinRegulatorCurrent 9028 #define Cy_SysPm_ExitLowPowerMode Cy_SysPm_SystemSetNormalRegulatorCurrent 9029 9030 #define CY_SYSPM_WAKEUP_PIN0_BIT CY_SYSPM_HIB_WAKEUP_PIN0_POS 9031 #define CY_SYSPM_WAKEUP_PIN1_BIT CY_SYSPM_HIB_WAKEUP_PIN1_POS 9032 #define CY_SYSPM_WAKEUP_LPCOMP0_BIT CY_SYSPM_HIB_WAKEUP_LPCOMP0_POS 9033 #define CY_SYSPM_WAKEUP_LPCOMP1_BIT CY_SYSPM_HIB_WAKEUP_LPCOMP1_POS 9034 9035 #define CY_SYSPM_WAKEUP_LPCOMP0 CY_SYSPM_HIB_WAKEUP_LPCOMP0_MASK 9036 #define CY_SYSPM_WAKEUP_LPCOMP1 CY_SYSPM_HIB_WAKEUP_LPCOMP1_MASK 9037 #define CY_SYSPM_WAKEUP_PIN0 CY_SYSPM_HIB_WAKEUP_PIN0_MASK 9038 #define CY_SYSPM_WAKEUP_PIN1 CY_SYSPM_HIB_WAKEUP_PIN1_MASK 9039 #define CY_SYSPM_WAKEUP_LPCOMP0_POLARITY_HIGH CY_SYSPM_HIB_WAKEUP_LPCOMP0_POLARITY_HIGH_MASK 9040 #define CY_SYSPM_WAKEUP_LPCOMP1_POLARITY_HIGH CY_SYSPM_HIB_WAKEUP_LPCOMP1_POLARITY_HIGH_MASK 9041 #define CY_SYSPM_WAKEUP_PIN0_POLARITY_HIGH CY_SYSPM_HIB_WAKEUP_PIN0_POLARITY_HIGH_MASK 9042 #define CY_SYSPM_WAKEUP_PIN1_POLARITY_HIGH CY_SYSPM_HIB_WAKEUP_PIN1_POLARITY_HIGH_MASK 9043 9044 #define CY_SYSPM_PWR_TOKEN_HIBERNATE HIBERNATE_TOKEN 9045 #define CY_SYSPM_PWR_WAKEUP_HIB_MASK HIBERNATE_WAKEUP_MASK 9046 #define CY_SYSPM_PWR_RETAIN_HIBERNATE_STATUS HIBERNATE_RETAIN_STATUS_MASK 9047 #define CY_SYSPM_PWR_SET_HIBERNATE SET_HIBERNATE_MODE 9048 #define CY_SYSPM_PWR_HIBERNATE_UNLOCK HIBERNATE_UNLOCK_VAL 9049 9050 /** \endcond */ 9051 9052 #ifdef __cplusplus 9053 } 9054 #endif 9055 9056 #endif /* defined (CY_IP_MXS28SRSS) || defined (CY_IP_MXS40SRSS) || defined (CY_IP_MXS40SSRSS) || defined (CY_IP_MXS22SRSS) */ 9057 9058 #endif /* CY_SYSPM_H */ 9059 9060 /** \} group_syspm */ 9061 9062 9063 /* [] END OF FILE */ 9064
