1 // Copyright 2020 Espressif Systems (Shanghai) PTE LTD
2 //
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
6 
7 //     http://www.apache.org/licenses/LICENSE-2.0
8 //
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
14 
15 #include <stdint.h>
16 #include <stdlib.h>
17 
18 #include "sdkconfig.h"
19 #include "esp_err.h"
20 
21 #include "hal/cpu_hal.h"
22 #include "hal/cpu_types.h"
23 
24 #include "soc/soc_caps.h"
25 
26 
27 #if SOC_CPU_BREAKPOINTS_NUM > 0
cpu_hal_set_breakpoint(int id,const void * addr)28 void cpu_hal_set_breakpoint(int id, const void* addr)
29 {
30     cpu_ll_set_breakpoint(id, cpu_ll_ptr_to_pc(addr));
31 }
32 
cpu_hal_clear_breakpoint(int id)33 void cpu_hal_clear_breakpoint(int id)
34 {
35     cpu_ll_clear_breakpoint(id);
36 }
37 #endif // SOC_CPU_BREAKPOINTS_NUM > 0
38 
39 #if SOC_CPU_WATCHPOINTS_NUM > 0
cpu_hal_set_watchpoint(int id,const void * addr,size_t size,watchpoint_trigger_t trigger)40 void cpu_hal_set_watchpoint(int id, const void* addr, size_t size, watchpoint_trigger_t trigger)
41 {
42     bool on_read = false, on_write = false;
43 
44     if (trigger == WATCHPOINT_TRIGGER_ON_RO) {
45         on_read = true;
46     } else if (trigger == WATCHPOINT_TRIGGER_ON_WO) {
47         on_write = true;
48     } else {
49         on_read = on_write = true;
50     }
51 
52     cpu_ll_set_watchpoint(id, addr, size, on_read, on_write);
53 }
54 
cpu_hal_clear_watchpoint(int id)55 void cpu_hal_clear_watchpoint(int id)
56 {
57     cpu_ll_clear_watchpoint(id);
58 }
59 #endif // SOC_CPU_WATCHPOINTS_NUM > 0
60 
cpu_hal_set_vecbase(const void * base)61 void cpu_hal_set_vecbase(const void* base)
62 {
63     cpu_ll_set_vecbase(base);
64 }
65