1 /*
2 * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #include "soc/soc_caps.h"
8 #include "hal/cp_dma_hal.h"
9 #include "hal/cp_dma_ll.h"
10
cp_dma_hal_init(cp_dma_hal_context_t * hal,const cp_dma_hal_config_t * config)11 void cp_dma_hal_init(cp_dma_hal_context_t *hal, const cp_dma_hal_config_t *config)
12 {
13 hal->dev = &CP_DMA;
14 cp_dma_ll_enable_clock(hal->dev, true);
15 cp_dma_ll_reset_in_link(hal->dev);
16 cp_dma_ll_reset_out_link(hal->dev);
17 cp_dma_ll_reset_cmd_fifo(hal->dev);
18 cp_dma_ll_reset_fifo(hal->dev);
19 cp_dma_ll_enable_intr(hal->dev, UINT32_MAX, false);
20 cp_dma_ll_clear_intr_status(hal->dev, UINT32_MAX);
21 cp_dma_ll_enable_owner_check(hal->dev, true);
22 }
23
cp_dma_hal_set_desc_base_addr(cp_dma_hal_context_t * hal,intptr_t outlink_base,intptr_t inlink_base)24 void cp_dma_hal_set_desc_base_addr(cp_dma_hal_context_t *hal, intptr_t outlink_base, intptr_t inlink_base)
25 {
26 /* set base address of the first descriptor */
27 cp_dma_ll_tx_set_descriptor_base_addr(hal->dev, outlink_base);
28 cp_dma_ll_rx_set_descriptor_base_addr(hal->dev, inlink_base);
29 }
30
cp_dma_hal_deinit(cp_dma_hal_context_t * hal)31 void cp_dma_hal_deinit(cp_dma_hal_context_t *hal)
32 {
33 cp_dma_ll_enable_clock(hal->dev, false);
34 hal->dev = NULL;
35 }
36
cp_dma_hal_start(cp_dma_hal_context_t * hal)37 void cp_dma_hal_start(cp_dma_hal_context_t *hal)
38 {
39 // enable DMA engine
40 cp_dma_ll_start_rx(hal->dev, true);
41 cp_dma_ll_start_tx(hal->dev, true);
42 // enable RX EOF interrupt
43 cp_dma_ll_enable_intr(hal->dev, CP_DMA_LL_EVENT_RX_EOF, true);
44 }
45
cp_dma_hal_stop(cp_dma_hal_context_t * hal)46 void cp_dma_hal_stop(cp_dma_hal_context_t *hal)
47 {
48 // disable interrupt
49 cp_dma_ll_enable_intr(hal->dev, CP_DMA_LL_EVENT_RX_EOF, false);
50
51 // disable DMA
52 cp_dma_ll_start_rx(hal->dev, false);
53 cp_dma_ll_start_tx(hal->dev, false);
54 }
55
cp_dma_hal_get_intr_status(cp_dma_hal_context_t * hal)56 uint32_t cp_dma_hal_get_intr_status(cp_dma_hal_context_t *hal)
57 {
58 return cp_dma_ll_get_intr_status(hal->dev);
59 }
60
cp_dma_hal_clear_intr_status(cp_dma_hal_context_t * hal,uint32_t mask)61 void cp_dma_hal_clear_intr_status(cp_dma_hal_context_t *hal, uint32_t mask)
62 {
63 cp_dma_ll_clear_intr_status(hal->dev, mask);
64 }
65
cp_dma_hal_restart_tx(cp_dma_hal_context_t * hal)66 void cp_dma_hal_restart_tx(cp_dma_hal_context_t *hal)
67 {
68 cp_dma_ll_restart_tx(hal->dev);
69 }
70
cp_dma_hal_restart_rx(cp_dma_hal_context_t * hal)71 void cp_dma_hal_restart_rx(cp_dma_hal_context_t *hal)
72 {
73 cp_dma_ll_restart_rx(hal->dev);
74 }
75
