Searched defs:cache_mode (Results 1 – 6 of 6) sorted by relevance
| /hal_espressif-latest/components/esp_rom/include/esp32s2/rom/ |
| D | cache.h | 80 struct cache_mode { struct
81 uint32_t cache_size; /*!< cache size in byte */
82 uint16_t cache_line_size; /*!< cache line size in byte */
83 uint8_t cache_ways; /*!< cache ways, always 4 */
84 uint8_t icache; /*!< the cache index, 0 for dcache, 1 for icache */
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| /hal_espressif-latest/components/esp_rom/include/esp32c6/rom/ |
| D | cache.h | 82 struct cache_mode { struct
83 uint32_t cache_size; /*!< cache size in byte */
84 uint16_t cache_line_size; /*!< cache line size in byte */
85 uint8_t cache_ways; /*!< cache ways, always 4 */
109 struct cache_mode mode; /*!< cache and cache mode */ argument
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| /hal_espressif-latest/components/esp_rom/include/esp32h2/rom/ |
| D | cache.h | 86 struct cache_mode { struct
87 uint32_t cache_size; /*!< cache size in byte */
88 uint16_t cache_line_size; /*!< cache line size in byte */
89 uint8_t cache_ways; /*!< cache ways, always 4 */
113 struct cache_mode mode; /*!< cache and cache mode */ argument
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| /hal_espressif-latest/components/esp_rom/include/esp32c2/rom/ |
| D | cache.h | 98 struct cache_mode { struct
99 uint32_t cache_size; /*!< cache size in byte */
100 uint16_t cache_line_size; /*!< cache line size in byte */
101 uint8_t cache_ways; /*!< cache ways, always 4 */
125 struct cache_mode mode; /*!< cache and cache mode */ argument
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| /hal_espressif-latest/components/esp_rom/include/esp32c3/rom/ |
| D | cache.h | 98 struct cache_mode { struct
99 uint32_t cache_size; /*!< cache size in byte */
100 uint16_t cache_line_size; /*!< cache line size in byte */
101 uint8_t cache_ways; /*!< cache ways, always 4 */
125 struct cache_mode mode; /*!< cache and cache mode */ argument
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| /hal_espressif-latest/components/esp_rom/include/esp32s3/rom/ |
| D | cache.h | 116 struct cache_mode { struct
117 uint32_t cache_size; /*!< cache size in byte */
118 uint16_t cache_line_size; /*!< cache line size in byte */
119 uint8_t cache_ways; /*!< cache ways, always 4 */
120 uint8_t icache; /*!< the cache index, 0 for dcache, 1 for icache */
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