1//#########################################################################################
2//  Copyright (c) 2022 Texas Instruments Incorporated
3//
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29//
30//#########################################################################################
31// Filename: aes_iar.s
32// Description: Low level AES functions
33// Language: IAR Assembly for ARM
34// Processor: ARM Cortex M0
35// Compiler: IAR
36//#########################################################################################
37
38//-----------------------------------------------------------------------------------------
39//  AESProcessAlignedBlocksCMAC
40//-----------------------------------------------------------------------------------------
41    SECTION .text:CODE(2)
42    THUMB
43    EXPORT AESProcessAlignedBlocksCMAC
44
45
46    #define input   R0
47    #define blocks  R1
48    #define buf0    R2
49
50AESProcessAlignedBlocksCMAC:
51    PUSH {R4-R6}
52
53CMAC_WRITE_BLOCK:
54    LDM input!, {R3-R6}         // Read input block (4 words)
55    LDR buf0, AES_BUF0_ADDR     // buf0 = AES BUF0 register addr
56    STM buf0!, {R3-R6}          // Write input block to AES BUF regs
57    SUBS blocks, blocks, #0x1   // Decrement block cnt by 1
58    BNE CMAC_WRITE_BLOCK
59
60    POP {R4-R6}
61    BX LR
62
63    #undef input
64    #undef blocks
65    #undef buf0
66
67//-----------------------------------------------------------------------------------------
68//  AESProcessAlignedBlocksCTR
69//-----------------------------------------------------------------------------------------
70    SECTION .text:CODE(2)
71    THUMB
72    EXPORT AESProcessAlignedBlocksCTR
73
74    #define input   R0
75    #define output  R1
76    #define blocks  R2
77    #define dst     R3
78
79AESProcessAlignedBlocksCTR:
80
81    PUSH {R4-R7}
82
83CTR_PROCESS_BLOCK:
84    LDM input!, {R4-R7}         // Read input block (4 words)
85    LDR dst, AES_TXTX0_ADDR     // dst = AES TXTX0 register addr
86    STM dst!, {R4-R7}           // Write input block to AES TXTX regs
87    LDR dst, AES_TXT0_ADDR      // dst = AES TXT0 register addr
88    LDM dst!, {R4-R7}           // Read output block from TXT regs (4 words)
89    STM output!, {R4-R7}        // Write output block (4 words)
90    SUBS blocks, blocks, #0x1   // Decrement block cnt by 1
91    BNE CTR_PROCESS_BLOCK
92
93    POP {R4-R7}
94    BX LR
95
96    #undef input
97    #undef output
98    #undef blocks
99    #undef dst
100
101//-----------------------------------------------------------------------------------------
102//  AESProcessAlignedBlocksECB
103//-----------------------------------------------------------------------------------------
104    SECTION .text:CODE(2)
105    THUMB
106    EXPORT AESProcessAlignedBlocksECB
107
108    #define input   R0
109    #define output  R1
110    #define blocks  R2
111    #define dst     R3
112
113AESProcessAlignedBlocksECB:
114
115    PUSH {R4-R7}
116
117    LDM input!, {R4-R7}         // Read first input block (4 words)
118    LDR dst, AES_BUF0_ADDR      // dst = AES BUF0 register addr
119    STM dst!, {R4-R7}           // Write first input block to AES TXTX regs
120    SUBS blocks, blocks, #0x1   // Decrement block cnt by 1
121    BEQ ECB_READ_FINAL_OUTPUT
122
123ECB_PROCESS_BLOCK:
124    LDM input!, {R4-R7}         // Read input block (4 words)
125    LDR dst, AES_BUF0_ADDR      // dst = AES BUF0 register addr
126    STM dst!, {R4-R7}           // Write input block to AES TXTX regs
127    LDR dst, AES_TXT0_ADDR      // dst = AES TXT0 register addr
128    LDM dst!, {R4-R7}           // Read output block from TXT regs (4 words)
129    STM output!, {R4-R7}        // Write output block (4 words)
130    SUBS blocks, blocks, #0x1   // Decrement block cnt by 1
131    BNE ECB_PROCESS_BLOCK
132
133ECB_READ_FINAL_OUTPUT:
134    // Clear the AUTOCFG trigger mask to avoid triggering a spurious encryption
135    // upon reading the TXT3 register.
136    LDR R3, AES_AUTOCFG_ADDR    // R3 = AES AUTOCFG register addr
137    LDR R4, [R3]                // R4 = AES AUTOCFG register value
138    MOVS R5, #0xF               // R5 = TRGECB_MASK
139    BICS R4, R4, R5             // R4 = AUTOCFG & ~TRGECB_MASK
140    STR R4, [R3]                // Write modified AUTOCFG value
141
142    LDR dst, AES_TXT0_ADDR      // dst = AES TXT0 register addr
143    LDM dst!, {R4-R7}           // Read final output block from TXT regs (4 words)
144    STM output!, {R4-R7}        // Write final output block (4 words)
145
146    POP {R4-R7}
147    BX LR
148
149    #undef input
150    #undef output
151    #undef blocks
152    #undef dst
153
154//-----------------------------------------------------------------------------------------
155//  Constants
156//-----------------------------------------------------------------------------------------
157
158    SECTION .text:CONST(2)
159    DATA
160    ALIGNROM 2
161
162AES_AUTOCFG_ADDR:
163    DC32 0x400C002C             // AES AUTOCFG register addr
164AES_TXT0_ADDR:
165    DC32 0x400C0070             // AES TXT0 register addr
166AES_TXTX0_ADDR:
167    DC32 0x400C0080             // AES TXTX0 register addr
168AES_BUF0_ADDR:
169    DC32 0x400C0090             // AES BUF0 register addr
170
171
172//-----------------------------------------------------------------------------------------
173//  AESCopyBlock
174//-----------------------------------------------------------------------------------------
175    SECTION .text:CODE(2)
176    THUMB
177    EXPORT AESCopyBlock
178
179    #define dst R0
180    #define src R1
181    #define tmp R2
182    #define len R3
183
184AESCopyBlock:
185
186    LSLS tmp, dst, #0x1e        // dst << 30
187    BNE UNALIGNED_COPY
188    LSLS tmp, src, #0x1e        // src << 30
189    BNE UNALIGNED_COPY
190
191WORD_ALIGNED_COPY:
192    PUSH {R4-R5}
193    LDM src!, {R2-R5}           // Read src block (4 words)
194    STM dst!, {R2-R5}           // dst block = src block
195    POP {R4-R5}
196    BX LR
197
198UNALIGNED_COPY:
199    MOVS len, #16               // len = 16 bytes
200UNALIGNED_COPY_LOOP:
201    LDRB tmp, [src]             // tmp = src[i]
202    STRB tmp, [dst]             // dst[i] = src[i]
203    ADDS src, src, #1           // Increment src ptr by 1
204    ADDS dst, dst, #1           // Increment dst ptr by 1
205    SUBS len, #1                // Decrement len by 1
206    BNE UNALIGNED_COPY_LOOP
207    BX LR
208
209    #undef dst
210    #undef src
211    #undef tmp
212    #undef len
213
214    END
215