1 /*
2 * Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 /***********************************************************************************************************************
8 * Includes <System Includes> , "Project Includes"
9 **********************************************************************************************************************/
10 #include "bsp_api.h"
11
12 /***********************************************************************************************************************
13 * Macro definitions
14 **********************************************************************************************************************/
15 #if (1 == _RZN_ORDINAL)
16 #if (1 == BSP_FEATURE_BSP_MASTER_MPU_REGION_TYPE)
17 #define BSP_PRV_MASTER_MPU_REGION_NUM (8)
18 #elif (2 == BSP_FEATURE_BSP_MASTER_MPU_REGION_TYPE)
19 #define BSP_PRV_MASTER_MPU_REGION_NUM (16)
20 #endif
21 #define BSP_PRV_M_MPU_35BIT_ADDRESS_MASK (0x700000000UL)
22
23 #define BSP_PRV_MASTER_MPU_STADD(master, \
24 region) (((BSP_CFG_MPU ## master ## _STADD ## region) &~ \
25 BSP_PRV_M_MPU_35BIT_ADDRESS_MASK) | \
26 (((BSP_CFG_MPU ## master ## _STADD ## region) & \
27 BSP_PRV_M_MPU_35BIT_ADDRESS_MASK) >> 28) | \
28 (BSP_CFG_MPU ## master ## _WRITE ## region << 1) | \
29 BSP_CFG_MPU ## master ## _READ ## region)
30
31 #define BSP_PRV_MASTER_MPU_ENDADD(master, \
32 region) ((BSP_CFG_MPU ## master ## _ENDADD ## region) &~ \
33 BSP_PRV_M_MPU_35BIT_ADDRESS_MASK) | \
34 (((BSP_CFG_MPU ## master ## _ENDADD ## region) & \
35 BSP_PRV_M_MPU_35BIT_ADDRESS_MASK) >> 28)
36
37 #endif
38
39 #if (1U < BSP_FEATURE_BSP_CR52_CORE_NUM) || (1U < BSP_FEATURE_BSP_CA55_CORE_NUM)
40 #if !(BSP_CFG_RAM_EXECUTION)
41
42 #define BSP_PRV_LOADER_TEXT_OFFSET (0x1000U)
43 #define BSP_PRV_ATCM_AXIS_CR520_ADDRESS (0x20000000)
44 #define BSP_PRV_ATCM_AXIS_CR521_ADDRESS (0x21000000)
45
46 #define BSP_PRV_IMAGE_INFO_OFFSET (0x800)
47 #define BSP_PRV_IMAGE_INFO_BRANCH_INSTRUCTION_CR520 (0xE51FF004)
48 #define BSP_PRV_IMAGE_INFO_BRANCH_INSTRUCTION_CR521 (0xE51FF000)
49 #define BSP_PRV_IMAGE_INFO_BRANCH_ADDRESS ((uint32_t) ((uintptr_t) BSP_PRV_SECTION_SECONDARY_RAM_START + \
50 BSP_PRV_LOADER_TEXT_OFFSET))
51 #define BSP_PRV_IMAGE_INFO_NEXT_CORE_ADDRESS ((uint32_t) ((uintptr_t) BSP_PRV_SECTION_SECONDARY_RAM_START))
52
53 #if defined(BSP_CFG_CORE_CR52)
54 #if (0 == BSP_CFG_CORE_CR52)
55 #define BSP_PRV_IMAGE_INFO_CPU (BSP_PRIV_ASSIGNMENT_CPU_CR52_0)
56
57 #elif (1 == BSP_CFG_CORE_CR52)
58 #define BSP_PRV_IMAGE_INFO_CPU (BSP_PRIV_ASSIGNMENT_CPU_CR52_1)
59
60 #endif
61 #elif defined(BSP_CFG_CORE_CA55)
62 #if (0 == BSP_CFG_CORE_CA55)
63 #define BSP_PRV_IMAGE_INFO_CPU (BSP_PRIV_ASSIGNMENT_CPU_CA55_0)
64
65 #elif (1 == BSP_CFG_CORE_CA55)
66 #define BSP_PRV_IMAGE_INFO_CPU (BSP_PRIV_ASSIGNMENT_CPU_CA55_1)
67
68 #elif (2 == BSP_CFG_CORE_CA55)
69 #define BSP_PRV_IMAGE_INFO_CPU (BSP_PRIV_ASSIGNMENT_CPU_CA55_2)
70
71 #elif (3 == BSP_CFG_CORE_CA55)
72 #define BSP_PRV_IMAGE_INFO_CPU (BSP_PRIV_ASSIGNMENT_CPU_CA55_3)
73
74 #endif
75 #endif
76 #endif
77 #endif
78
79 #if defined(__ICCARM__)
80 #if BSP_CFG_C_RUNTIME_INIT
81 #define BSP_PRV_SECTION_LDR_DATA_ROM_ADDRESS __section_begin("LDR_DATA_RBLOCK")
82 #define BSP_PRV_SECTION_LDR_DATA_RAM_START __section_begin("LDR_DATA_WBLOCK")
83 #define BSP_PRV_SECTION_LDR_DATA_RAM_END __section_end("LDR_DATA_WBLOCK")
84
85 #define BSP_PRV_SECTION_LDR_DATA_BSS_START __section_begin("LDR_DATA_ZBLOCK")
86 #define BSP_PRV_SECTION_LDR_DATA_BSS_END __section_end("LDR_DATA_ZBLOCK")
87
88 #endif
89
90 #if !(BSP_CFG_RAM_EXECUTION)
91 #define BSP_PRV_SECTION_VECTOR_ROM_ADDRESS __section_begin("VECTOR_RBLOCK")
92 #define BSP_PRV_SECTION_VECTOR_RAM_START __section_begin("VECTOR_WBLOCK")
93 #define BSP_PRV_SECTION_VECTOR_RAM_END __section_end("VECTOR_WBLOCK")
94
95 #define BSP_PRV_SECTION_USER_PRG_ROM_ADDRESS __section_begin("USER_PRG_RBLOCK")
96 #define BSP_PRV_SECTION_USER_PRG_RAM_START __section_begin("USER_PRG_WBLOCK")
97 #define BSP_PRV_SECTION_USER_PRG_RAM_END __section_end("USER_PRG_WBLOCK")
98
99 #define BSP_PRV_SECTION_USER_DATA_ROM_ADDRESS __section_begin("USER_DATA_RBLOCK")
100 #define BSP_PRV_SECTION_USER_DATA_RAM_START __section_begin("USER_DATA_WBLOCK")
101 #define BSP_PRV_SECTION_USER_DATA_RAM_END __section_end("USER_DATA_WBLOCK")
102
103 #define BSP_PRV_SECTION_USER_DATA_NONCACHE_ROM_ADDRESS __section_begin("USER_DATA_NONCACHE_RBLOCK")
104 #define BSP_PRV_SECTION_USER_DATA_NONCACHE_RAM_START __section_begin("USER_DATA_NONCACHE_WBLOCK")
105 #define BSP_PRV_SECTION_USER_DATA_NONCACHE_RAM_END __section_end("USER_DATA_NONCACHE_WBLOCK")
106
107 #define BSP_PRV_SECTION_DMAC_LINK_MODE_ROM_ADDRESS __section_begin("DMAC_LINK_MODE_RBLOCK")
108 #define BSP_PRV_SECTION_DMAC_LINK_MODE_RAM_START __section_begin("DMAC_LINK_MODE_WBLOCK")
109 #define BSP_PRV_SECTION_DMAC_LINK_MODE_RAM_END __section_end("DMAC_LINK_MODE_WBLOCK")
110
111 #define BSP_PRV_SECTION_SHARED_NONCACHE_BUFFER_ROM_ADDRESS __section_begin("SHARED_NONCACHE_BUFFER_RBLOCK")
112 #define BSP_PRV_SECTION_SHARED_NONCACHE_BUFFER_RAM_START __section_begin("SHARED_NONCACHE_BUFFER_WBLOCK")
113 #define BSP_PRV_SECTION_SHARED_NONCACHE_BUFFER_RAM_END __section_end("SHARED_NONCACHE_BUFFER_WBLOCK")
114
115 #define BSP_PRV_SECTION_NONCACHE_BUFFER_ROM_ADDRESS __section_begin("NONCACHE_BUFFER_RBLOCK")
116 #define BSP_PRV_SECTION_NONCACHE_BUFFER_RAM_START __section_begin("NONCACHE_BUFFER_WBLOCK")
117 #define BSP_PRV_SECTION_NONCACHE_BUFFER_RAM_END __section_end("NONCACHE_BUFFER_WBLOCK")
118
119 #define BSP_PRV_SECTION_LDR_PRG_ROM_ADDRESS __section_begin("LDR_PRG_RBLOCK")
120 #define BSP_PRV_SECTION_LDR_PRG_RAM_START __section_begin("LDR_PRG_WBLOCK")
121 #define BSP_PRV_SECTION_LDR_PRG_RAM_END __section_end("LDR_PRG_WBLOCK")
122
123 #define BSP_PRV_SECTION_USER_DATA_BSS_START __section_begin("USER_DATA_ZBLOCK")
124 #define BSP_PRV_SECTION_USER_DATA_BSS_END __section_end("USER_DATA_ZBLOCK")
125
126 #define BSP_PRV_SECTION_USER_DATA_NONCACHE_BSS_START __section_begin("USER_DATA_NONCACHE_ZBLOCK")
127 #define BSP_PRV_SECTION_USER_DATA_NONCACHE_BSS_END __section_end("USER_DATA_NONCACHE_ZBLOCK")
128
129 #define BSP_PRV_SECTION_DMAC_LINK_MODE_BSS_START __section_begin("DMAC_LINK_MODE_ZBLOCK")
130 #define BSP_PRV_SECTION_DMAC_LINK_MODE_BSS_END __section_end("DMAC_LINK_MODE_ZBLOCK")
131
132 #define BSP_PRV_SECTION_SHARED_NONCACHE_BUFFER_BSS_START __section_begin("SHARED_NONCACHE_BUFFER_ZBLOCK")
133 #define BSP_PRV_SECTION_SHARED_NONCACHE_BUFFER_BSS_END __section_end("SHARED_NONCACHE_BUFFER_ZBLOCK")
134
135 #define BSP_PRV_SECTION_NONCACHE_BUFFER_BSS_START __section_begin("NONCACHE_BUFFER_ZBLOCK")
136 #define BSP_PRV_SECTION_NONCACHE_BUFFER_BSS_END __section_end("NONCACHE_BUFFER_ZBLOCK")
137
138 #if !(BSP_CFG_C_RUNTIME_INIT)
139 #define BSP_PRV_SECTION_LDR_DATA_ROM_ADDRESS __section_begin("LDR_DATA_RBLOCK")
140 #define BSP_PRV_SECTION_LDR_DATA_RAM_START __section_begin("LDR_DATA_WBLOCK")
141 #define BSP_PRV_SECTION_LDR_DATA_RAM_END __section_end("LDR_DATA_WBLOCK")
142
143 #endif
144 #endif
145
146 #if (1U < BSP_FEATURE_BSP_CR52_CORE_NUM) || (1U < BSP_FEATURE_BSP_CA55_CORE_NUM)
147 #define BSP_PRV_SECTION_SECONDARY_ROM_ADDRESS __section_begin("SECONDARY_RBLOCK")
148 #define BSP_PRV_SECTION_SECONDARY_RAM_START __section_begin("SECONDARY_WBLOCK")
149 #define BSP_PRV_SECTION_SECONDARY_RAM_END __section_end("SECONDARY_WBLOCK")
150
151 #endif
152
153 #elif defined(__GNUC__)
154 #if BSP_CFG_C_RUNTIME_INIT
155 #define BSP_PRV_SECTION_LDR_DATA_ROM_ADDRESS &LOADER_DATA_IMAGE
156 #define BSP_PRV_SECTION_LDR_DATA_RAM_START &__loader_data_start
157 #define BSP_PRV_SECTION_LDR_DATA_RAM_END &__loader_data_end
158
159 #define BSP_PRV_SECTION_LDR_DATA_BSS_START &__loader_bss_start
160 #define BSP_PRV_SECTION_LDR_DATA_BSS_END &__loader_bss_end
161
162 #endif
163
164 #if !(BSP_CFG_RAM_EXECUTION)
165 #define BSP_PRV_SECTION_VECTOR_ROM_ADDRESS &INTVEC_IMAGE
166 #define BSP_PRV_SECTION_VECTOR_RAM_START &_fvector_start
167 #define BSP_PRV_SECTION_VECTOR_RAM_END &_fvector_end
168
169 #define BSP_PRV_SECTION_USER_PRG_ROM_ADDRESS &TEXT_IMAGE
170 #define BSP_PRV_SECTION_USER_PRG_RAM_START &_text_start
171 #define BSP_PRV_SECTION_USER_PRG_RAM_END &_text_end
172
173 #define BSP_PRV_SECTION_USER_DATA_ROM_ADDRESS &DATA_IMAGE
174 #define BSP_PRV_SECTION_USER_DATA_RAM_START &_data_start
175 #define BSP_PRV_SECTION_USER_DATA_RAM_END &_data_end
176
177 #define BSP_PRV_SECTION_USER_DATA_NONCACHE_ROM_ADDRESS &_mdata_noncache
178 #define BSP_PRV_SECTION_USER_DATA_NONCACHE_RAM_START &_data_noncache_start
179 #define BSP_PRV_SECTION_USER_DATA_NONCACHE_RAM_END &_data_noncache_end
180
181 #define BSP_PRV_SECTION_DMAC_LINK_MODE_ROM_ADDRESS &_mdmac_link_mode
182 #define BSP_PRV_SECTION_DMAC_LINK_MODE_RAM_START &_dmac_link_mode_start
183 #define BSP_PRV_SECTION_DMAC_LINK_MODE_RAM_END &_dmac_link_mode_end
184
185 #define BSP_PRV_SECTION_SHARED_NONCACHE_BUFFER_ROM_ADDRESS &_msncbuffer
186 #define BSP_PRV_SECTION_SHARED_NONCACHE_BUFFER_RAM_START &_sncbuffer_start
187 #define BSP_PRV_SECTION_SHARED_NONCACHE_BUFFER_RAM_END &_sncbuffer_end
188
189 #define BSP_PRV_SECTION_NONCACHE_BUFFER_ROM_ADDRESS &_mncbuffer
190 #define BSP_PRV_SECTION_NONCACHE_BUFFER_RAM_START &_ncbuffer_start
191 #define BSP_PRV_SECTION_NONCACHE_BUFFER_RAM_END &_ncbuffer_end
192
193 #define BSP_PRV_SECTION_LDR_PRG_ROM_ADDRESS &LOADER_TEXT_IMAGE
194 #define BSP_PRV_SECTION_LDR_PRG_RAM_START &_loader_text_start
195 #define BSP_PRV_SECTION_LDR_PRG_RAM_END &_loader_text_end
196
197 #if !(BSP_CFG_C_RUNTIME_INIT)
198 #define BSP_PRV_SECTION_LDR_DATA_ROM_ADDRESS &LOADER_DATA_IMAGE
199 #define BSP_PRV_SECTION_LDR_DATA_RAM_START &__loader_data_start
200 #define BSP_PRV_SECTION_LDR_DATA_RAM_END &__loader_data_end
201
202 #endif
203 #endif
204
205 #if (1U < BSP_FEATURE_BSP_CR52_CORE_NUM) || (1U < BSP_FEATURE_BSP_CA55_CORE_NUM)
206 #define BSP_PRV_SECTION_SECONDARY_ROM_ADDRESS &SECONDARY_IMAGE
207 #define BSP_PRV_SECTION_SECONDARY_RAM_START &_secondary_start
208 #define BSP_PRV_SECTION_SECONDARY_RAM_END &_secondary_end
209
210 #endif
211
212 #define BSP_PRV_SECTION_USER_DATA_BSS_START &__bss_start__
213 #define BSP_PRV_SECTION_USER_DATA_BSS_END &__bss_end__
214
215 #endif
216
217 /***********************************************************************************************************************
218 * Typedef definitions
219 **********************************************************************************************************************/
220 #if (1U < BSP_FEATURE_BSP_CR52_CORE_NUM) || (1U < BSP_FEATURE_BSP_CA55_CORE_NUM)
221
222 typedef enum e_bsp_assignment_cpu
223 {
224 BSP_PRIV_ASSIGNMENT_CPU_CR52_0 = 0xAC54E000,
225 BSP_PRIV_ASSIGNMENT_CPU_CR52_1 = 0xAC54E001,
226 BSP_PRIV_ASSIGNMENT_CPU_CA55_0 = 0xAC54E002,
227 BSP_PRIV_ASSIGNMENT_CPU_CA55_1 = 0xAC54E003,
228 BSP_PRIV_ASSIGNMENT_CPU_CA55_2 = 0xAC54E004,
229 BSP_PRIV_ASSIGNMENT_CPU_CA55_3 = 0xAC54E005
230 } bsp_assignment_cpu_t;
231
232 #endif
233
234 /***********************************************************************************************************************
235 * Exported global variables (to be accessed by other files)
236 **********************************************************************************************************************/
237
238 /*******************************************************************************************************************//**
239 * @addtogroup BSP_MCU
240 * @{
241 **********************************************************************************************************************/
242
243 /** System Clock Frequency (Core Clock) */
244 uint32_t SystemCoreClock = 0U;
245
246 /** @} (end addtogroup BSP_MCU) */
247
248 #if defined(__ICCARM__)
249 #if BSP_CFG_C_RUNTIME_INIT
250 #pragma section="LDR_DATA_RBLOCK"
251 #pragma section="LDR_DATA_WBLOCK"
252 #pragma section="LDR_DATA_ZBLOCK"
253
254 #endif
255
256 #if !(BSP_CFG_RAM_EXECUTION)
257 #pragma section="VECTOR_RBLOCK"
258 #pragma section="VECTOR_WBLOCK"
259
260 #pragma section="USER_PRG_RBLOCK"
261 #pragma section="USER_PRG_WBLOCK"
262
263 #pragma section="USER_DATA_RBLOCK"
264 #pragma section="USER_DATA_WBLOCK"
265 #pragma section="USER_DATA_ZBLOCK"
266
267 #pragma section="USER_DATA_NONCACHE_RBLOCK"
268 #pragma section="USER_DATA_NONCACHE_WBLOCK"
269 #pragma section="USER_DATA_NONCACHE_ZBLOCK"
270
271 #pragma section="DMAC_LINK_MODE_RBLOCK"
272 #pragma section="DMAC_LINK_MODE_WBLOCK"
273 #pragma section="DMAC_LINK_MODE_ZBLOCK"
274
275 #pragma section="SHARED_NONCACHE_BUFFER_RBLOCK"
276 #pragma section="SHARED_NONCACHE_BUFFER_WBLOCK"
277 #pragma section="SHARED_NONCACHE_BUFFER_ZBLOCK"
278
279 #pragma section="NONCACHE_BUFFER_RBLOCK"
280 #pragma section="NONCACHE_BUFFER_WBLOCK"
281 #pragma section="NONCACHE_BUFFER_ZBLOCK"
282
283 #pragma section="LDR_PRG_RBLOCK"
284 #pragma section="LDR_PRG_WBLOCK"
285
286 #if !(BSP_CFG_C_RUNTIME_INIT)
287 #pragma section="LDR_DATA_RBLOCK"
288 #pragma section="LDR_DATA_WBLOCK"
289
290 #endif
291 #endif
292
293 #pragma section="SECONDARY_RBLOCK"
294 #pragma section="SECONDARY_WBLOCK"
295
296 #elif defined(__GNUC__)
297 #if BSP_CFG_C_RUNTIME_INIT
298 extern void * LOADER_DATA_IMAGE;
299 extern void * __loader_data_start;
300 extern void * __loader_data_end;
301
302 extern void * __loader_bss_start;
303 extern void * __loader_bss_end;
304
305 extern void (* __preinit_array_start[])(void);
306 extern void (* __preinit_array_end[])(void);
307 extern void (* __init_array_start[])(void);
308 extern void (* __init_array_end[])(void);
309
310 #endif
311
312 #if !(BSP_CFG_RAM_EXECUTION)
313 extern void * INTVEC_IMAGE;
314 extern void * _fvector_start;
315 extern void * _fvector_end;
316
317 extern void * TEXT_IMAGE;
318 extern void * _text_start;
319 extern void * _text_end;
320
321 extern void * DATA_IMAGE;
322 extern void * _data_start;
323 extern void * _data_end;
324
325 extern void * _mdata_noncache;
326 extern void * _data_noncache_start;
327 extern void * _data_noncache_end;
328
329 extern void * _mdmac_link_mode;
330 extern void * _dmac_link_mode_start;
331 extern void * _dmac_link_mode_end;
332
333 extern void * _msncbuffer;
334 extern void * _sncbuffer_start;
335 extern void * _sncbuffer_end;
336
337 extern void * _mncbuffer;
338 extern void * _ncbuffer_start;
339 extern void * _ncbuffer_end;
340
341 extern void * LOADER_TEXT_IMAGE;
342 extern void * _loader_text_start;
343 extern void * _loader_text_end;
344
345 #if !(BSP_CFG_C_RUNTIME_INIT)
346 extern void * LOADER_DATA_IMAGE;
347 extern void * __loader_data_start;
348 extern void * __loader_data_end;
349
350 #endif
351 #endif
352
353 #if (1U < BSP_FEATURE_BSP_CR52_CORE_NUM) || (1U < BSP_FEATURE_BSP_CA55_CORE_NUM)
354 extern void * SECONDARY_IMAGE;
355 extern void * _secondary_start;
356 extern void * _secondary_end;
357
358 #endif
359
360 extern void * __bss_start__;
361 extern void * __bss_end__;
362
363 #endif
364
365 /***********************************************************************************************************************
366 * Exported global functions (to be accessed by other files)
367 **********************************************************************************************************************/
368 #if defined(__ICCARM__)
369 #if BSP_CFG_C_RUNTIME_INIT
370 extern void __iar_data_init3(void);
371
372 #endif
373 #endif
374
375 /***********************************************************************************************************************
376 * Private global variables and functions
377 **********************************************************************************************************************/
378 #if (1 == _RZN_ORDINAL)
379 #if (1 == BSP_FEATURE_BSP_MASTER_MPU0_SUPPORTED)
380 const uint32_t g_bsp_master_mpu0_cfg[BSP_PRV_MASTER_MPU_REGION_NUM][2] =
381 {
382 {BSP_PRV_MASTER_MPU_STADD(0, 0), BSP_PRV_MASTER_MPU_ENDADD(0, 0) },
383 {BSP_PRV_MASTER_MPU_STADD(0, 1), BSP_PRV_MASTER_MPU_ENDADD(0, 1) },
384 {BSP_PRV_MASTER_MPU_STADD(0, 2), BSP_PRV_MASTER_MPU_ENDADD(0, 2) },
385 {BSP_PRV_MASTER_MPU_STADD(0, 3), BSP_PRV_MASTER_MPU_ENDADD(0, 3) },
386 {BSP_PRV_MASTER_MPU_STADD(0, 4), BSP_PRV_MASTER_MPU_ENDADD(0, 4) },
387 {BSP_PRV_MASTER_MPU_STADD(0, 5), BSP_PRV_MASTER_MPU_ENDADD(0, 5) },
388 {BSP_PRV_MASTER_MPU_STADD(0, 6), BSP_PRV_MASTER_MPU_ENDADD(0, 6) },
389 {BSP_PRV_MASTER_MPU_STADD(0, 7), BSP_PRV_MASTER_MPU_ENDADD(0, 7) },
390 #if (2 == BSP_FEATURE_BSP_MASTER_MPU_REGION_TYPE)
391 {BSP_PRV_MASTER_MPU_STADD(0, 8), BSP_PRV_MASTER_MPU_ENDADD(0, 8) },
392 {BSP_PRV_MASTER_MPU_STADD(0, 9), BSP_PRV_MASTER_MPU_ENDADD(0, 9) },
393 {BSP_PRV_MASTER_MPU_STADD(0, 10), BSP_PRV_MASTER_MPU_ENDADD(0, 10)},
394 {BSP_PRV_MASTER_MPU_STADD(0, 11), BSP_PRV_MASTER_MPU_ENDADD(0, 11)},
395 {BSP_PRV_MASTER_MPU_STADD(0, 12), BSP_PRV_MASTER_MPU_ENDADD(0, 12)},
396 {BSP_PRV_MASTER_MPU_STADD(0, 13), BSP_PRV_MASTER_MPU_ENDADD(0, 13)},
397 {BSP_PRV_MASTER_MPU_STADD(0, 14), BSP_PRV_MASTER_MPU_ENDADD(0, 14)},
398 {BSP_PRV_MASTER_MPU_STADD(0, 15), BSP_PRV_MASTER_MPU_ENDADD(0, 15)},
399 #endif
400 };
401 #endif
402 #if (1 == BSP_FEATURE_BSP_MASTER_MPU1_SUPPORTED)
403 const uint32_t g_bsp_master_mpu1_cfg[BSP_PRV_MASTER_MPU_REGION_NUM][2] =
404 {
405 {BSP_PRV_MASTER_MPU_STADD(1, 0), BSP_PRV_MASTER_MPU_ENDADD(1, 0) },
406 {BSP_PRV_MASTER_MPU_STADD(1, 1), BSP_PRV_MASTER_MPU_ENDADD(1, 1) },
407 {BSP_PRV_MASTER_MPU_STADD(1, 2), BSP_PRV_MASTER_MPU_ENDADD(1, 2) },
408 {BSP_PRV_MASTER_MPU_STADD(1, 3), BSP_PRV_MASTER_MPU_ENDADD(1, 3) },
409 {BSP_PRV_MASTER_MPU_STADD(1, 4), BSP_PRV_MASTER_MPU_ENDADD(1, 4) },
410 {BSP_PRV_MASTER_MPU_STADD(1, 5), BSP_PRV_MASTER_MPU_ENDADD(1, 5) },
411 {BSP_PRV_MASTER_MPU_STADD(1, 6), BSP_PRV_MASTER_MPU_ENDADD(1, 6) },
412 {BSP_PRV_MASTER_MPU_STADD(1, 7), BSP_PRV_MASTER_MPU_ENDADD(1, 7) },
413 #if (2 == BSP_FEATURE_BSP_MASTER_MPU_REGION_TYPE)
414 {BSP_PRV_MASTER_MPU_STADD(1, 8), BSP_PRV_MASTER_MPU_ENDADD(1, 8) },
415 {BSP_PRV_MASTER_MPU_STADD(1, 9), BSP_PRV_MASTER_MPU_ENDADD(1, 9) },
416 {BSP_PRV_MASTER_MPU_STADD(1, 10), BSP_PRV_MASTER_MPU_ENDADD(1, 10)},
417 {BSP_PRV_MASTER_MPU_STADD(1, 11), BSP_PRV_MASTER_MPU_ENDADD(1, 11)},
418 {BSP_PRV_MASTER_MPU_STADD(1, 12), BSP_PRV_MASTER_MPU_ENDADD(1, 12)},
419 {BSP_PRV_MASTER_MPU_STADD(1, 13), BSP_PRV_MASTER_MPU_ENDADD(1, 13)},
420 {BSP_PRV_MASTER_MPU_STADD(1, 14), BSP_PRV_MASTER_MPU_ENDADD(1, 14)},
421 {BSP_PRV_MASTER_MPU_STADD(1, 15), BSP_PRV_MASTER_MPU_ENDADD(1, 15)},
422 #endif
423 };
424 #endif
425 #if (1 == BSP_FEATURE_BSP_MASTER_MPU2_SUPPORTED)
426 const uint32_t g_bsp_master_mpu2_cfg[BSP_PRV_MASTER_MPU_REGION_NUM][2] =
427 {
428 {BSP_PRV_MASTER_MPU_STADD(2, 0), BSP_PRV_MASTER_MPU_ENDADD(2, 0) },
429 {BSP_PRV_MASTER_MPU_STADD(2, 1), BSP_PRV_MASTER_MPU_ENDADD(2, 1) },
430 {BSP_PRV_MASTER_MPU_STADD(2, 2), BSP_PRV_MASTER_MPU_ENDADD(2, 2) },
431 {BSP_PRV_MASTER_MPU_STADD(2, 3), BSP_PRV_MASTER_MPU_ENDADD(2, 3) },
432 {BSP_PRV_MASTER_MPU_STADD(2, 4), BSP_PRV_MASTER_MPU_ENDADD(2, 4) },
433 {BSP_PRV_MASTER_MPU_STADD(2, 5), BSP_PRV_MASTER_MPU_ENDADD(2, 5) },
434 {BSP_PRV_MASTER_MPU_STADD(2, 6), BSP_PRV_MASTER_MPU_ENDADD(2, 6) },
435 {BSP_PRV_MASTER_MPU_STADD(2, 7), BSP_PRV_MASTER_MPU_ENDADD(2, 7) },
436 #if (2 == BSP_FEATURE_BSP_MASTER_MPU_REGION_TYPE)
437 {BSP_PRV_MASTER_MPU_STADD(2, 8), BSP_PRV_MASTER_MPU_ENDADD(2, 8) },
438 {BSP_PRV_MASTER_MPU_STADD(2, 9), BSP_PRV_MASTER_MPU_ENDADD(2, 9) },
439 {BSP_PRV_MASTER_MPU_STADD(2, 10), BSP_PRV_MASTER_MPU_ENDADD(2, 10)},
440 {BSP_PRV_MASTER_MPU_STADD(2, 11), BSP_PRV_MASTER_MPU_ENDADD(2, 11)},
441 {BSP_PRV_MASTER_MPU_STADD(2, 12), BSP_PRV_MASTER_MPU_ENDADD(2, 12)},
442 {BSP_PRV_MASTER_MPU_STADD(2, 13), BSP_PRV_MASTER_MPU_ENDADD(2, 13)},
443 {BSP_PRV_MASTER_MPU_STADD(2, 14), BSP_PRV_MASTER_MPU_ENDADD(2, 14)},
444 {BSP_PRV_MASTER_MPU_STADD(2, 15), BSP_PRV_MASTER_MPU_ENDADD(2, 15)},
445 #endif
446 };
447 #endif
448 #if (1 == BSP_FEATURE_BSP_MASTER_MPU3_SUPPORTED)
449 const uint32_t g_bsp_master_mpu3_cfg[BSP_PRV_MASTER_MPU_REGION_NUM][2] =
450 {
451 {BSP_PRV_MASTER_MPU_STADD(3, 0), BSP_PRV_MASTER_MPU_ENDADD(3, 0) },
452 {BSP_PRV_MASTER_MPU_STADD(3, 1), BSP_PRV_MASTER_MPU_ENDADD(3, 1) },
453 {BSP_PRV_MASTER_MPU_STADD(3, 2), BSP_PRV_MASTER_MPU_ENDADD(3, 2) },
454 {BSP_PRV_MASTER_MPU_STADD(3, 3), BSP_PRV_MASTER_MPU_ENDADD(3, 3) },
455 {BSP_PRV_MASTER_MPU_STADD(3, 4), BSP_PRV_MASTER_MPU_ENDADD(3, 4) },
456 {BSP_PRV_MASTER_MPU_STADD(3, 5), BSP_PRV_MASTER_MPU_ENDADD(3, 5) },
457 {BSP_PRV_MASTER_MPU_STADD(3, 6), BSP_PRV_MASTER_MPU_ENDADD(3, 6) },
458 {BSP_PRV_MASTER_MPU_STADD(3, 7), BSP_PRV_MASTER_MPU_ENDADD(3, 7) },
459 #if (2 == BSP_FEATURE_BSP_MASTER_MPU_REGION_TYPE)
460 {BSP_PRV_MASTER_MPU_STADD(3, 8), BSP_PRV_MASTER_MPU_ENDADD(3, 8) },
461 {BSP_PRV_MASTER_MPU_STADD(3, 9), BSP_PRV_MASTER_MPU_ENDADD(3, 9) },
462 {BSP_PRV_MASTER_MPU_STADD(3, 10), BSP_PRV_MASTER_MPU_ENDADD(3, 10)},
463 {BSP_PRV_MASTER_MPU_STADD(3, 11), BSP_PRV_MASTER_MPU_ENDADD(3, 11)},
464 {BSP_PRV_MASTER_MPU_STADD(3, 12), BSP_PRV_MASTER_MPU_ENDADD(3, 12)},
465 {BSP_PRV_MASTER_MPU_STADD(3, 13), BSP_PRV_MASTER_MPU_ENDADD(3, 13)},
466 {BSP_PRV_MASTER_MPU_STADD(3, 14), BSP_PRV_MASTER_MPU_ENDADD(3, 14)},
467 {BSP_PRV_MASTER_MPU_STADD(3, 15), BSP_PRV_MASTER_MPU_ENDADD(3, 15)},
468 #endif
469 };
470 #endif
471 #if (1 == BSP_FEATURE_BSP_MASTER_MPU4_SUPPORTED)
472 const uint32_t g_bsp_master_mpu4_cfg[BSP_PRV_MASTER_MPU_REGION_NUM][2] =
473 {
474 {BSP_PRV_MASTER_MPU_STADD(4, 0), BSP_PRV_MASTER_MPU_ENDADD(4, 0) },
475 {BSP_PRV_MASTER_MPU_STADD(4, 1), BSP_PRV_MASTER_MPU_ENDADD(4, 1) },
476 {BSP_PRV_MASTER_MPU_STADD(4, 2), BSP_PRV_MASTER_MPU_ENDADD(4, 2) },
477 {BSP_PRV_MASTER_MPU_STADD(4, 3), BSP_PRV_MASTER_MPU_ENDADD(4, 3) },
478 {BSP_PRV_MASTER_MPU_STADD(4, 4), BSP_PRV_MASTER_MPU_ENDADD(4, 4) },
479 {BSP_PRV_MASTER_MPU_STADD(4, 5), BSP_PRV_MASTER_MPU_ENDADD(4, 5) },
480 {BSP_PRV_MASTER_MPU_STADD(4, 6), BSP_PRV_MASTER_MPU_ENDADD(4, 6) },
481 {BSP_PRV_MASTER_MPU_STADD(4, 7), BSP_PRV_MASTER_MPU_ENDADD(4, 7) },
482 #if (2 == BSP_FEATURE_BSP_MASTER_MPU_REGION_TYPE)
483 {BSP_PRV_MASTER_MPU_STADD(4, 8), BSP_PRV_MASTER_MPU_ENDADD(4, 8) },
484 {BSP_PRV_MASTER_MPU_STADD(4, 9), BSP_PRV_MASTER_MPU_ENDADD(4, 9) },
485 {BSP_PRV_MASTER_MPU_STADD(4, 10), BSP_PRV_MASTER_MPU_ENDADD(4, 10)},
486 {BSP_PRV_MASTER_MPU_STADD(4, 11), BSP_PRV_MASTER_MPU_ENDADD(4, 11)},
487 {BSP_PRV_MASTER_MPU_STADD(4, 12), BSP_PRV_MASTER_MPU_ENDADD(4, 12)},
488 {BSP_PRV_MASTER_MPU_STADD(4, 13), BSP_PRV_MASTER_MPU_ENDADD(4, 13)},
489 {BSP_PRV_MASTER_MPU_STADD(4, 14), BSP_PRV_MASTER_MPU_ENDADD(4, 14)},
490 {BSP_PRV_MASTER_MPU_STADD(4, 15), BSP_PRV_MASTER_MPU_ENDADD(4, 15)},
491 #endif
492 };
493 #endif
494 #if (1 == BSP_FEATURE_BSP_MASTER_MPU5_SUPPORTED)
495 const uint32_t g_bsp_master_mpu5_cfg[BSP_PRV_MASTER_MPU_REGION_NUM][2] =
496 {
497 {BSP_PRV_MASTER_MPU_STADD(5, 0), BSP_PRV_MASTER_MPU_ENDADD(5, 0) },
498 {BSP_PRV_MASTER_MPU_STADD(5, 1), BSP_PRV_MASTER_MPU_ENDADD(5, 1) },
499 {BSP_PRV_MASTER_MPU_STADD(5, 2), BSP_PRV_MASTER_MPU_ENDADD(5, 2) },
500 {BSP_PRV_MASTER_MPU_STADD(5, 3), BSP_PRV_MASTER_MPU_ENDADD(5, 3) },
501 {BSP_PRV_MASTER_MPU_STADD(5, 4), BSP_PRV_MASTER_MPU_ENDADD(5, 4) },
502 {BSP_PRV_MASTER_MPU_STADD(5, 5), BSP_PRV_MASTER_MPU_ENDADD(5, 5) },
503 {BSP_PRV_MASTER_MPU_STADD(5, 6), BSP_PRV_MASTER_MPU_ENDADD(5, 6) },
504 {BSP_PRV_MASTER_MPU_STADD(5, 7), BSP_PRV_MASTER_MPU_ENDADD(5, 7) },
505 #if (2 == BSP_FEATURE_BSP_MASTER_MPU_REGION_TYPE)
506 {BSP_PRV_MASTER_MPU_STADD(5, 8), BSP_PRV_MASTER_MPU_ENDADD(5, 8) },
507 {BSP_PRV_MASTER_MPU_STADD(5, 9), BSP_PRV_MASTER_MPU_ENDADD(5, 9) },
508 {BSP_PRV_MASTER_MPU_STADD(5, 10), BSP_PRV_MASTER_MPU_ENDADD(5, 10)},
509 {BSP_PRV_MASTER_MPU_STADD(5, 11), BSP_PRV_MASTER_MPU_ENDADD(5, 11)},
510 {BSP_PRV_MASTER_MPU_STADD(5, 12), BSP_PRV_MASTER_MPU_ENDADD(5, 12)},
511 {BSP_PRV_MASTER_MPU_STADD(5, 13), BSP_PRV_MASTER_MPU_ENDADD(5, 13)},
512 {BSP_PRV_MASTER_MPU_STADD(5, 14), BSP_PRV_MASTER_MPU_ENDADD(5, 14)},
513 {BSP_PRV_MASTER_MPU_STADD(5, 15), BSP_PRV_MASTER_MPU_ENDADD(5, 15)},
514 #endif
515 };
516 #endif
517 #if (1 == BSP_FEATURE_BSP_MASTER_MPU6_SUPPORTED)
518 const uint32_t g_bsp_master_mpu6_cfg[BSP_PRV_MASTER_MPU_REGION_NUM][2] =
519 {
520 {BSP_PRV_MASTER_MPU_STADD(6, 0), BSP_PRV_MASTER_MPU_ENDADD(6, 0) },
521 {BSP_PRV_MASTER_MPU_STADD(6, 1), BSP_PRV_MASTER_MPU_ENDADD(6, 1) },
522 {BSP_PRV_MASTER_MPU_STADD(6, 2), BSP_PRV_MASTER_MPU_ENDADD(6, 2) },
523 {BSP_PRV_MASTER_MPU_STADD(6, 3), BSP_PRV_MASTER_MPU_ENDADD(6, 3) },
524 {BSP_PRV_MASTER_MPU_STADD(6, 4), BSP_PRV_MASTER_MPU_ENDADD(6, 4) },
525 {BSP_PRV_MASTER_MPU_STADD(6, 5), BSP_PRV_MASTER_MPU_ENDADD(6, 5) },
526 {BSP_PRV_MASTER_MPU_STADD(6, 6), BSP_PRV_MASTER_MPU_ENDADD(6, 6) },
527 {BSP_PRV_MASTER_MPU_STADD(6, 7), BSP_PRV_MASTER_MPU_ENDADD(6, 7) },
528 #if (2 == BSP_FEATURE_BSP_MASTER_MPU_REGION_TYPE)
529 {BSP_PRV_MASTER_MPU_STADD(6, 8), BSP_PRV_MASTER_MPU_ENDADD(6, 8) },
530 {BSP_PRV_MASTER_MPU_STADD(6, 9), BSP_PRV_MASTER_MPU_ENDADD(6, 9) },
531 {BSP_PRV_MASTER_MPU_STADD(6, 10), BSP_PRV_MASTER_MPU_ENDADD(6, 10)},
532 {BSP_PRV_MASTER_MPU_STADD(6, 11), BSP_PRV_MASTER_MPU_ENDADD(6, 11)},
533 {BSP_PRV_MASTER_MPU_STADD(6, 12), BSP_PRV_MASTER_MPU_ENDADD(6, 12)},
534 {BSP_PRV_MASTER_MPU_STADD(6, 13), BSP_PRV_MASTER_MPU_ENDADD(6, 13)},
535 {BSP_PRV_MASTER_MPU_STADD(6, 14), BSP_PRV_MASTER_MPU_ENDADD(6, 14)},
536 {BSP_PRV_MASTER_MPU_STADD(6, 15), BSP_PRV_MASTER_MPU_ENDADD(6, 15)},
537 #endif
538 };
539 #endif
540 #if (1 == BSP_FEATURE_BSP_MASTER_MPU7_SUPPORTED)
541 const uint32_t g_bsp_master_mpu7_cfg[BSP_PRV_MASTER_MPU_REGION_NUM][2] =
542 {
543 {BSP_PRV_MASTER_MPU_STADD(7, 0), BSP_PRV_MASTER_MPU_ENDADD(7, 0) },
544 {BSP_PRV_MASTER_MPU_STADD(7, 1), BSP_PRV_MASTER_MPU_ENDADD(7, 1) },
545 {BSP_PRV_MASTER_MPU_STADD(7, 2), BSP_PRV_MASTER_MPU_ENDADD(7, 2) },
546 {BSP_PRV_MASTER_MPU_STADD(7, 3), BSP_PRV_MASTER_MPU_ENDADD(7, 3) },
547 {BSP_PRV_MASTER_MPU_STADD(7, 4), BSP_PRV_MASTER_MPU_ENDADD(7, 4) },
548 {BSP_PRV_MASTER_MPU_STADD(7, 5), BSP_PRV_MASTER_MPU_ENDADD(7, 5) },
549 {BSP_PRV_MASTER_MPU_STADD(7, 6), BSP_PRV_MASTER_MPU_ENDADD(7, 6) },
550 {BSP_PRV_MASTER_MPU_STADD(7, 7), BSP_PRV_MASTER_MPU_ENDADD(7, 7) },
551 #if (2 == BSP_FEATURE_BSP_MASTER_MPU_REGION_TYPE)
552 {BSP_PRV_MASTER_MPU_STADD(7, 8), BSP_PRV_MASTER_MPU_ENDADD(7, 8) },
553 {BSP_PRV_MASTER_MPU_STADD(7, 9), BSP_PRV_MASTER_MPU_ENDADD(7, 9) },
554 {BSP_PRV_MASTER_MPU_STADD(7, 10), BSP_PRV_MASTER_MPU_ENDADD(7, 10)},
555 {BSP_PRV_MASTER_MPU_STADD(7, 11), BSP_PRV_MASTER_MPU_ENDADD(7, 11)},
556 {BSP_PRV_MASTER_MPU_STADD(7, 12), BSP_PRV_MASTER_MPU_ENDADD(7, 12)},
557 {BSP_PRV_MASTER_MPU_STADD(7, 13), BSP_PRV_MASTER_MPU_ENDADD(7, 13)},
558 {BSP_PRV_MASTER_MPU_STADD(7, 14), BSP_PRV_MASTER_MPU_ENDADD(7, 14)},
559 {BSP_PRV_MASTER_MPU_STADD(7, 15), BSP_PRV_MASTER_MPU_ENDADD(7, 15)},
560 #endif
561 };
562 #endif
563 #if (1 == BSP_FEATURE_BSP_MASTER_MPU8_SUPPORTED)
564 const uint32_t g_bsp_master_mpu8_cfg[BSP_PRV_MASTER_MPU_REGION_NUM][2] =
565 {
566 {BSP_PRV_MASTER_MPU_STADD(8, 0), BSP_PRV_MASTER_MPU_ENDADD(8, 0) },
567 {BSP_PRV_MASTER_MPU_STADD(8, 1), BSP_PRV_MASTER_MPU_ENDADD(8, 1) },
568 {BSP_PRV_MASTER_MPU_STADD(8, 2), BSP_PRV_MASTER_MPU_ENDADD(8, 2) },
569 {BSP_PRV_MASTER_MPU_STADD(8, 3), BSP_PRV_MASTER_MPU_ENDADD(8, 3) },
570 {BSP_PRV_MASTER_MPU_STADD(8, 4), BSP_PRV_MASTER_MPU_ENDADD(8, 4) },
571 {BSP_PRV_MASTER_MPU_STADD(8, 5), BSP_PRV_MASTER_MPU_ENDADD(8, 5) },
572 {BSP_PRV_MASTER_MPU_STADD(8, 6), BSP_PRV_MASTER_MPU_ENDADD(8, 6) },
573 {BSP_PRV_MASTER_MPU_STADD(8, 7), BSP_PRV_MASTER_MPU_ENDADD(8, 7) },
574 #if (2 == BSP_FEATURE_BSP_MASTER_MPU_REGION_TYPE)
575 {BSP_PRV_MASTER_MPU_STADD(8, 8), BSP_PRV_MASTER_MPU_ENDADD(8, 8) },
576 {BSP_PRV_MASTER_MPU_STADD(8, 9), BSP_PRV_MASTER_MPU_ENDADD(8, 9) },
577 {BSP_PRV_MASTER_MPU_STADD(8, 10), BSP_PRV_MASTER_MPU_ENDADD(8, 10)},
578 {BSP_PRV_MASTER_MPU_STADD(8, 11), BSP_PRV_MASTER_MPU_ENDADD(8, 11)},
579 {BSP_PRV_MASTER_MPU_STADD(8, 12), BSP_PRV_MASTER_MPU_ENDADD(8, 12)},
580 {BSP_PRV_MASTER_MPU_STADD(8, 13), BSP_PRV_MASTER_MPU_ENDADD(8, 13)},
581 {BSP_PRV_MASTER_MPU_STADD(8, 14), BSP_PRV_MASTER_MPU_ENDADD(8, 14)},
582 {BSP_PRV_MASTER_MPU_STADD(8, 15), BSP_PRV_MASTER_MPU_ENDADD(8, 15)},
583 #endif
584 };
585 #endif
586 #if (1 == BSP_FEATURE_BSP_MASTER_MPU9_SUPPORTED)
587 const uint32_t g_bsp_master_mpu9_cfg[BSP_PRV_MASTER_MPU_REGION_NUM][2] =
588 {
589 {BSP_PRV_MASTER_MPU_STADD(9, 0), BSP_PRV_MASTER_MPU_ENDADD(9, 0) },
590 {BSP_PRV_MASTER_MPU_STADD(9, 1), BSP_PRV_MASTER_MPU_ENDADD(9, 1) },
591 {BSP_PRV_MASTER_MPU_STADD(9, 2), BSP_PRV_MASTER_MPU_ENDADD(9, 2) },
592 {BSP_PRV_MASTER_MPU_STADD(9, 3), BSP_PRV_MASTER_MPU_ENDADD(9, 3) },
593 {BSP_PRV_MASTER_MPU_STADD(9, 4), BSP_PRV_MASTER_MPU_ENDADD(9, 4) },
594 {BSP_PRV_MASTER_MPU_STADD(9, 5), BSP_PRV_MASTER_MPU_ENDADD(9, 5) },
595 {BSP_PRV_MASTER_MPU_STADD(9, 6), BSP_PRV_MASTER_MPU_ENDADD(9, 6) },
596 {BSP_PRV_MASTER_MPU_STADD(9, 7), BSP_PRV_MASTER_MPU_ENDADD(9, 7) },
597 #if (2 == BSP_FEATURE_BSP_MASTER_MPU_REGION_TYPE)
598 {BSP_PRV_MASTER_MPU_STADD(9, 8), BSP_PRV_MASTER_MPU_ENDADD(9, 8) },
599 {BSP_PRV_MASTER_MPU_STADD(9, 9), BSP_PRV_MASTER_MPU_ENDADD(9, 9) },
600 {BSP_PRV_MASTER_MPU_STADD(9, 10), BSP_PRV_MASTER_MPU_ENDADD(9, 10)},
601 {BSP_PRV_MASTER_MPU_STADD(9, 11), BSP_PRV_MASTER_MPU_ENDADD(9, 11)},
602 {BSP_PRV_MASTER_MPU_STADD(9, 12), BSP_PRV_MASTER_MPU_ENDADD(9, 12)},
603 {BSP_PRV_MASTER_MPU_STADD(9, 13), BSP_PRV_MASTER_MPU_ENDADD(9, 13)},
604 {BSP_PRV_MASTER_MPU_STADD(9, 14), BSP_PRV_MASTER_MPU_ENDADD(9, 14)},
605 {BSP_PRV_MASTER_MPU_STADD(9, 15), BSP_PRV_MASTER_MPU_ENDADD(9, 15)},
606 #endif
607 };
608 #endif
609 #if (1 == BSP_FEATURE_BSP_MASTER_MPU10_SUPPORTED)
610 const uint32_t g_bsp_master_mpu10_cfg[BSP_PRV_MASTER_MPU_REGION_NUM][2] =
611 {
612 {BSP_PRV_MASTER_MPU_STADD(10, 0), BSP_PRV_MASTER_MPU_ENDADD(10, 0) },
613 {BSP_PRV_MASTER_MPU_STADD(10, 1), BSP_PRV_MASTER_MPU_ENDADD(10, 1) },
614 {BSP_PRV_MASTER_MPU_STADD(10, 2), BSP_PRV_MASTER_MPU_ENDADD(10, 2) },
615 {BSP_PRV_MASTER_MPU_STADD(10, 3), BSP_PRV_MASTER_MPU_ENDADD(10, 3) },
616 {BSP_PRV_MASTER_MPU_STADD(10, 4), BSP_PRV_MASTER_MPU_ENDADD(10, 4) },
617 {BSP_PRV_MASTER_MPU_STADD(10, 5), BSP_PRV_MASTER_MPU_ENDADD(10, 5) },
618 {BSP_PRV_MASTER_MPU_STADD(10, 6), BSP_PRV_MASTER_MPU_ENDADD(10, 6) },
619 {BSP_PRV_MASTER_MPU_STADD(10, 7), BSP_PRV_MASTER_MPU_ENDADD(10, 7) },
620 #if (2 == BSP_FEATURE_BSP_MASTER_MPU_REGION_TYPE)
621 {BSP_PRV_MASTER_MPU_STADD(10, 8), BSP_PRV_MASTER_MPU_ENDADD(10, 8) },
622 {BSP_PRV_MASTER_MPU_STADD(10, 9), BSP_PRV_MASTER_MPU_ENDADD(10, 9) },
623 {BSP_PRV_MASTER_MPU_STADD(10, 10), BSP_PRV_MASTER_MPU_ENDADD(10, 10)},
624 {BSP_PRV_MASTER_MPU_STADD(10, 11), BSP_PRV_MASTER_MPU_ENDADD(10, 11)},
625 {BSP_PRV_MASTER_MPU_STADD(10, 12), BSP_PRV_MASTER_MPU_ENDADD(10, 12)},
626 {BSP_PRV_MASTER_MPU_STADD(10, 13), BSP_PRV_MASTER_MPU_ENDADD(10, 13)},
627 {BSP_PRV_MASTER_MPU_STADD(10, 14), BSP_PRV_MASTER_MPU_ENDADD(10, 14)},
628 {BSP_PRV_MASTER_MPU_STADD(10, 15), BSP_PRV_MASTER_MPU_ENDADD(10, 15)},
629 #endif
630 };
631 #endif
632 #if (1 == BSP_FEATURE_BSP_MASTER_MPU11_SUPPORTED)
633 const uint32_t g_bsp_master_mpu11_cfg[BSP_PRV_MASTER_MPU_REGION_NUM][2] =
634 {
635 {BSP_PRV_MASTER_MPU_STADD(11, 0), BSP_PRV_MASTER_MPU_ENDADD(11, 0) },
636 {BSP_PRV_MASTER_MPU_STADD(11, 1), BSP_PRV_MASTER_MPU_ENDADD(11, 1) },
637 {BSP_PRV_MASTER_MPU_STADD(11, 2), BSP_PRV_MASTER_MPU_ENDADD(11, 2) },
638 {BSP_PRV_MASTER_MPU_STADD(11, 3), BSP_PRV_MASTER_MPU_ENDADD(11, 3) },
639 {BSP_PRV_MASTER_MPU_STADD(11, 4), BSP_PRV_MASTER_MPU_ENDADD(11, 4) },
640 {BSP_PRV_MASTER_MPU_STADD(11, 5), BSP_PRV_MASTER_MPU_ENDADD(11, 5) },
641 {BSP_PRV_MASTER_MPU_STADD(11, 6), BSP_PRV_MASTER_MPU_ENDADD(11, 6) },
642 {BSP_PRV_MASTER_MPU_STADD(11, 7), BSP_PRV_MASTER_MPU_ENDADD(11, 7) },
643 #if (2 == BSP_FEATURE_BSP_MASTER_MPU_REGION_TYPE)
644 {BSP_PRV_MASTER_MPU_STADD(11, 8), BSP_PRV_MASTER_MPU_ENDADD(11, 8) },
645 {BSP_PRV_MASTER_MPU_STADD(11, 9), BSP_PRV_MASTER_MPU_ENDADD(11, 9) },
646 {BSP_PRV_MASTER_MPU_STADD(11, 10), BSP_PRV_MASTER_MPU_ENDADD(11, 10)},
647 {BSP_PRV_MASTER_MPU_STADD(11, 11), BSP_PRV_MASTER_MPU_ENDADD(11, 11)},
648 {BSP_PRV_MASTER_MPU_STADD(11, 12), BSP_PRV_MASTER_MPU_ENDADD(11, 12)},
649 {BSP_PRV_MASTER_MPU_STADD(11, 13), BSP_PRV_MASTER_MPU_ENDADD(11, 13)},
650 {BSP_PRV_MASTER_MPU_STADD(11, 14), BSP_PRV_MASTER_MPU_ENDADD(11, 14)},
651 {BSP_PRV_MASTER_MPU_STADD(11, 15), BSP_PRV_MASTER_MPU_ENDADD(11, 15)},
652 #endif
653 };
654 #endif
655 #if (1 == BSP_FEATURE_BSP_MASTER_MPU12_SUPPORTED)
656 const uint32_t g_bsp_master_mpu12_cfg[BSP_PRV_MASTER_MPU_REGION_NUM][2] =
657 {
658 {BSP_PRV_MASTER_MPU_STADD(12, 0), BSP_PRV_MASTER_MPU_ENDADD(12, 0) },
659 {BSP_PRV_MASTER_MPU_STADD(12, 1), BSP_PRV_MASTER_MPU_ENDADD(12, 1) },
660 {BSP_PRV_MASTER_MPU_STADD(12, 2), BSP_PRV_MASTER_MPU_ENDADD(12, 2) },
661 {BSP_PRV_MASTER_MPU_STADD(12, 3), BSP_PRV_MASTER_MPU_ENDADD(12, 3) },
662 {BSP_PRV_MASTER_MPU_STADD(12, 4), BSP_PRV_MASTER_MPU_ENDADD(12, 4) },
663 {BSP_PRV_MASTER_MPU_STADD(12, 5), BSP_PRV_MASTER_MPU_ENDADD(12, 5) },
664 {BSP_PRV_MASTER_MPU_STADD(12, 6), BSP_PRV_MASTER_MPU_ENDADD(12, 6) },
665 {BSP_PRV_MASTER_MPU_STADD(12, 7), BSP_PRV_MASTER_MPU_ENDADD(12, 7) },
666 #if (2 == BSP_FEATURE_BSP_MASTER_MPU_REGION_TYPE)
667 {BSP_PRV_MASTER_MPU_STADD(12, 8), BSP_PRV_MASTER_MPU_ENDADD(12, 8) },
668 {BSP_PRV_MASTER_MPU_STADD(12, 9), BSP_PRV_MASTER_MPU_ENDADD(12, 9) },
669 {BSP_PRV_MASTER_MPU_STADD(12, 10), BSP_PRV_MASTER_MPU_ENDADD(12, 10)},
670 {BSP_PRV_MASTER_MPU_STADD(12, 11), BSP_PRV_MASTER_MPU_ENDADD(12, 11)},
671 {BSP_PRV_MASTER_MPU_STADD(12, 12), BSP_PRV_MASTER_MPU_ENDADD(12, 12)},
672 {BSP_PRV_MASTER_MPU_STADD(12, 13), BSP_PRV_MASTER_MPU_ENDADD(12, 13)},
673 {BSP_PRV_MASTER_MPU_STADD(12, 14), BSP_PRV_MASTER_MPU_ENDADD(12, 14)},
674 {BSP_PRV_MASTER_MPU_STADD(12, 15), BSP_PRV_MASTER_MPU_ENDADD(12, 15)},
675 #endif
676 };
677 #endif
678 #if (1 == BSP_FEATURE_BSP_MASTER_MPU13_SUPPORTED)
679 const uint32_t g_bsp_master_mpu13_cfg[BSP_PRV_MASTER_MPU_REGION_NUM][2] =
680 {
681 {BSP_PRV_MASTER_MPU_STADD(13, 0), BSP_PRV_MASTER_MPU_ENDADD(13, 0) },
682 {BSP_PRV_MASTER_MPU_STADD(13, 1), BSP_PRV_MASTER_MPU_ENDADD(13, 1) },
683 {BSP_PRV_MASTER_MPU_STADD(13, 2), BSP_PRV_MASTER_MPU_ENDADD(13, 2) },
684 {BSP_PRV_MASTER_MPU_STADD(13, 3), BSP_PRV_MASTER_MPU_ENDADD(13, 3) },
685 {BSP_PRV_MASTER_MPU_STADD(13, 4), BSP_PRV_MASTER_MPU_ENDADD(13, 4) },
686 {BSP_PRV_MASTER_MPU_STADD(13, 5), BSP_PRV_MASTER_MPU_ENDADD(13, 5) },
687 {BSP_PRV_MASTER_MPU_STADD(13, 6), BSP_PRV_MASTER_MPU_ENDADD(13, 6) },
688 {BSP_PRV_MASTER_MPU_STADD(13, 7), BSP_PRV_MASTER_MPU_ENDADD(13, 7) },
689 #if (2 == BSP_FEATURE_BSP_MASTER_MPU_REGION_TYPE)
690 {BSP_PRV_MASTER_MPU_STADD(13, 8), BSP_PRV_MASTER_MPU_ENDADD(13, 8) },
691 {BSP_PRV_MASTER_MPU_STADD(13, 9), BSP_PRV_MASTER_MPU_ENDADD(13, 9) },
692 {BSP_PRV_MASTER_MPU_STADD(13, 10), BSP_PRV_MASTER_MPU_ENDADD(13, 10)},
693 {BSP_PRV_MASTER_MPU_STADD(13, 11), BSP_PRV_MASTER_MPU_ENDADD(13, 11)},
694 {BSP_PRV_MASTER_MPU_STADD(13, 12), BSP_PRV_MASTER_MPU_ENDADD(13, 12)},
695 {BSP_PRV_MASTER_MPU_STADD(13, 13), BSP_PRV_MASTER_MPU_ENDADD(13, 13)},
696 {BSP_PRV_MASTER_MPU_STADD(13, 14), BSP_PRV_MASTER_MPU_ENDADD(13, 14)},
697 {BSP_PRV_MASTER_MPU_STADD(13, 15), BSP_PRV_MASTER_MPU_ENDADD(13, 15)},
698 #endif
699 };
700 #endif
701 #if (1 == BSP_FEATURE_BSP_MASTER_MPU14_SUPPORTED)
702 const uint32_t g_bsp_master_mpu14_cfg[BSP_PRV_MASTER_MPU_REGION_NUM][2] =
703 {
704 {BSP_PRV_MASTER_MPU_STADD(14, 0), BSP_PRV_MASTER_MPU_ENDADD(14, 0) },
705 {BSP_PRV_MASTER_MPU_STADD(14, 1), BSP_PRV_MASTER_MPU_ENDADD(14, 1) },
706 {BSP_PRV_MASTER_MPU_STADD(14, 2), BSP_PRV_MASTER_MPU_ENDADD(14, 2) },
707 {BSP_PRV_MASTER_MPU_STADD(14, 3), BSP_PRV_MASTER_MPU_ENDADD(14, 3) },
708 {BSP_PRV_MASTER_MPU_STADD(14, 4), BSP_PRV_MASTER_MPU_ENDADD(14, 4) },
709 {BSP_PRV_MASTER_MPU_STADD(14, 5), BSP_PRV_MASTER_MPU_ENDADD(14, 5) },
710 {BSP_PRV_MASTER_MPU_STADD(14, 6), BSP_PRV_MASTER_MPU_ENDADD(14, 6) },
711 {BSP_PRV_MASTER_MPU_STADD(14, 7), BSP_PRV_MASTER_MPU_ENDADD(14, 7) },
712 #if (2 == BSP_FEATURE_BSP_MASTER_MPU_REGION_TYPE)
713 {BSP_PRV_MASTER_MPU_STADD(14, 8), BSP_PRV_MASTER_MPU_ENDADD(14, 8) },
714 {BSP_PRV_MASTER_MPU_STADD(14, 9), BSP_PRV_MASTER_MPU_ENDADD(14, 9) },
715 {BSP_PRV_MASTER_MPU_STADD(14, 10), BSP_PRV_MASTER_MPU_ENDADD(14, 10)},
716 {BSP_PRV_MASTER_MPU_STADD(14, 11), BSP_PRV_MASTER_MPU_ENDADD(14, 11)},
717 {BSP_PRV_MASTER_MPU_STADD(14, 12), BSP_PRV_MASTER_MPU_ENDADD(14, 12)},
718 {BSP_PRV_MASTER_MPU_STADD(14, 13), BSP_PRV_MASTER_MPU_ENDADD(14, 13)},
719 {BSP_PRV_MASTER_MPU_STADD(14, 14), BSP_PRV_MASTER_MPU_ENDADD(14, 14)},
720 {BSP_PRV_MASTER_MPU_STADD(14, 15), BSP_PRV_MASTER_MPU_ENDADD(14, 15)},
721 #endif
722 };
723 #endif
724 #if (1 == BSP_FEATURE_BSP_MASTER_MPU15_SUPPORTED)
725 const uint32_t g_bsp_master_mpu15_cfg[BSP_PRV_MASTER_MPU_REGION_NUM][2] =
726 {
727 {BSP_PRV_MASTER_MPU_STADD(15, 0), BSP_PRV_MASTER_MPU_ENDADD(15, 0) },
728 {BSP_PRV_MASTER_MPU_STADD(15, 1), BSP_PRV_MASTER_MPU_ENDADD(15, 1) },
729 {BSP_PRV_MASTER_MPU_STADD(15, 2), BSP_PRV_MASTER_MPU_ENDADD(15, 2) },
730 {BSP_PRV_MASTER_MPU_STADD(15, 3), BSP_PRV_MASTER_MPU_ENDADD(15, 3) },
731 {BSP_PRV_MASTER_MPU_STADD(15, 4), BSP_PRV_MASTER_MPU_ENDADD(15, 4) },
732 {BSP_PRV_MASTER_MPU_STADD(15, 5), BSP_PRV_MASTER_MPU_ENDADD(15, 5) },
733 {BSP_PRV_MASTER_MPU_STADD(15, 6), BSP_PRV_MASTER_MPU_ENDADD(15, 6) },
734 {BSP_PRV_MASTER_MPU_STADD(15, 7), BSP_PRV_MASTER_MPU_ENDADD(15, 7) },
735 #if (2 == BSP_FEATURE_BSP_MASTER_MPU_REGION_TYPE)
736 {BSP_PRV_MASTER_MPU_STADD(15, 8), BSP_PRV_MASTER_MPU_ENDADD(15, 8) },
737 {BSP_PRV_MASTER_MPU_STADD(15, 9), BSP_PRV_MASTER_MPU_ENDADD(15, 9) },
738 {BSP_PRV_MASTER_MPU_STADD(15, 10), BSP_PRV_MASTER_MPU_ENDADD(15, 10)},
739 {BSP_PRV_MASTER_MPU_STADD(15, 11), BSP_PRV_MASTER_MPU_ENDADD(15, 11)},
740 {BSP_PRV_MASTER_MPU_STADD(15, 12), BSP_PRV_MASTER_MPU_ENDADD(15, 12)},
741 {BSP_PRV_MASTER_MPU_STADD(15, 13), BSP_PRV_MASTER_MPU_ENDADD(15, 13)},
742 {BSP_PRV_MASTER_MPU_STADD(15, 14), BSP_PRV_MASTER_MPU_ENDADD(15, 14)},
743 {BSP_PRV_MASTER_MPU_STADD(15, 15), BSP_PRV_MASTER_MPU_ENDADD(15, 15)},
744 #endif
745 };
746 #endif
747 #endif
748
749 #if (1U < BSP_FEATURE_BSP_CR52_CORE_NUM) || (1U < BSP_FEATURE_BSP_CA55_CORE_NUM)
750 #if !(BSP_CFG_RAM_EXECUTION)
751 #if (1 != _RZN_ORDINAL)
752 uint32_t g_bsp_image_info_cpu BSP_PLACE_IN_SECTION(".image_info") = BSP_PRV_IMAGE_INFO_CPU;
753
754 #endif
755 #endif
756
757 #if defined(__ICCARM__)
758 #if (1 == _RZN_ORDINAL)
759 #if defined(BSP_CFG_CORE_CR52)
760 BSP_DONT_REMOVE const void * __ddsc_ATCM_END BSP_PLACE_IN_SECTION(".ddsc_atcm_end");
761 BSP_DONT_REMOVE const void * __ddsc_BTCM_END BSP_PLACE_IN_SECTION(".ddsc_btcm_end");
762
763 #else
764 BSP_DONT_REMOVE const void * __ddsc_SYSTEM_RAM_END BSP_PLACE_IN_SECTION(".ddsc_system_ram_end");
765
766 #endif
767
768 #if BSP_CFG_XSPI0_X1_BOOT || BSP_CFG_XSPI0_X8_BOOT
769 BSP_DONT_REMOVE const void * __ddsc_xSPI0_CS0_SPACE_END BSP_PLACE_IN_SECTION(".ddsc_xspi0_cs0_space_end");
770
771 #elif BSP_CFG_XSPI1_X1_BOOT
772 BSP_DONT_REMOVE const void * __ddsc_xSPI1_CS0_SPACE_END BSP_PLACE_IN_SECTION(".ddsc_xspi1_cs0_space_end");
773
774 #elif BSP_CFG_16BIT_NOR_BOOT || BSP_CFG_32BIT_NOR_BOOT
775 BSP_DONT_REMOVE const void * __ddsc_CS0_SPACE_END BSP_PLACE_IN_SECTION(".ddsc_cs0_space_end");
776
777 #endif
778
779 #else
780 BSP_DONT_REMOVE const void * __ddsc_SYSTEM_RAM_END BSP_PLACE_IN_SECTION(".ddsc_system_ram_end");
781
782 #endif
783 #endif
784 #endif
785
786 #if defined(__ICCARM__)
787
788 void R_BSP_WarmStart(bsp_warm_start_event_t event);
789
790 #pragma weak R_BSP_WarmStart
791
792 #elif defined(__GNUC__) || defined(__ARMCC_VERSION)
793
794 void R_BSP_WarmStart(bsp_warm_start_event_t event) __attribute__((weak));
795
796 #endif
797
798 #if BSP_CFG_C_RUNTIME_INIT
799 void bsp_loader_data_init(void);
800 void bsp_loader_bss_init(void);
801 void bsp_static_constructor_init(void);
802
803 #endif
804
805 void bsp_copy_multibyte(uintptr_t * src, uintptr_t * dst, uintptr_t bytesize);
806 void bsp_bss_init_multibyte(uintptr_t * src, uintptr_t bytesize);
807
808 #if !(BSP_CFG_RAM_EXECUTION)
809 void bsp_application_bss_init(void);
810 void bsp_copy_to_ram(void);
811
812 #if (1U < BSP_FEATURE_BSP_CR52_CORE_NUM) || (1U < BSP_FEATURE_BSP_CA55_CORE_NUM)
813 void bsp_cpu_reset_release(void);
814
815 #endif
816 #endif
817
818 #if (1 == _RZN_ORDINAL)
819 void bsp_master_mpu_init(void);
820 void bsp_global_system_counter_init(void);
821
822 #endif
823
824 #if defined(BSP_CFG_CORE_CR52)
825 #if (BSP_FEATURE_TFU_SUPPORTED & BSP_CFG_USE_TFU_MATHLIB)
826 void bsp_tfu_init(void);
827
828 #endif
829 #endif
830
831 #if !BSP_CFG_PORT_PROTECT
832 void bsp_release_port_protect(void);
833
834 #endif
835
836 #if (1 == _RZN_ORDINAL)
837
838 /*******************************************************************************************************************//**
839 * Initialize the Master-MPU settings.
840 **********************************************************************************************************************/
bsp_master_mpu_init(void)841 void bsp_master_mpu_init (void)
842 {
843 /* Disable register protection for Master-MPU related registers. */
844 R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_SYSTEM);
845
846 for (uint8_t region_num = 0; region_num < BSP_PRV_MASTER_MPU_REGION_NUM; region_num++)
847 {
848 #if (1 == BSP_FEATURE_BSP_MASTER_MPU0_SUPPORTED)
849 R_MPU0->RGN[region_num].STADD = g_bsp_master_mpu0_cfg[region_num][0];
850 R_MPU0->RGN[region_num].ENDADD = g_bsp_master_mpu0_cfg[region_num][1];
851 #endif
852 #if (1 == BSP_FEATURE_BSP_MASTER_MPU1_SUPPORTED)
853 R_MPU1->RGN[region_num].STADD = g_bsp_master_mpu1_cfg[region_num][0];
854 R_MPU1->RGN[region_num].ENDADD = g_bsp_master_mpu1_cfg[region_num][1];
855 #endif
856 #if (1 == BSP_FEATURE_BSP_MASTER_MPU2_SUPPORTED)
857 R_MPU2->RGN[region_num].STADD = g_bsp_master_mpu2_cfg[region_num][0];
858 R_MPU2->RGN[region_num].ENDADD = g_bsp_master_mpu2_cfg[region_num][1];
859 #endif
860 #if (1 == BSP_FEATURE_BSP_MASTER_MPU3_SUPPORTED)
861 R_MPU3->RGN[region_num].STADD = g_bsp_master_mpu3_cfg[region_num][0];
862 R_MPU3->RGN[region_num].ENDADD = g_bsp_master_mpu3_cfg[region_num][1];
863 #endif
864 #if (1 == BSP_FEATURE_BSP_MASTER_MPU4_SUPPORTED)
865 R_MPU4->RGN[region_num].STADD = g_bsp_master_mpu4_cfg[region_num][0];
866 R_MPU4->RGN[region_num].ENDADD = g_bsp_master_mpu4_cfg[region_num][1];
867 #endif
868 #if (1 == BSP_FEATURE_BSP_MASTER_MPU5_SUPPORTED)
869 R_MPU5->RGN[region_num].STADD = g_bsp_master_mpu5_cfg[region_num][0];
870 R_MPU5->RGN[region_num].ENDADD = g_bsp_master_mpu5_cfg[region_num][1];
871 #endif
872 #if (1 == BSP_FEATURE_BSP_MASTER_MPU6_SUPPORTED)
873 R_MPU6->RGN[region_num].STADD = g_bsp_master_mpu6_cfg[region_num][0];
874 R_MPU6->RGN[region_num].ENDADD = g_bsp_master_mpu6_cfg[region_num][1];
875 #endif
876 #if (1 == BSP_FEATURE_BSP_MASTER_MPU7_SUPPORTED)
877 R_MPU7->RGN[region_num].STADD = g_bsp_master_mpu7_cfg[region_num][0];
878 R_MPU7->RGN[region_num].ENDADD = g_bsp_master_mpu7_cfg[region_num][1];
879 #endif
880 #if (1 == BSP_FEATURE_BSP_MASTER_MPU8_SUPPORTED)
881 R_MPU8->RGN[region_num].STADD = g_bsp_master_mpu8_cfg[region_num][0];
882 R_MPU8->RGN[region_num].ENDADD = g_bsp_master_mpu8_cfg[region_num][1];
883 #endif
884 #if (1 == BSP_FEATURE_BSP_MASTER_MPU9_SUPPORTED)
885 R_MPU9->RGN[region_num].STADD = g_bsp_master_mpu9_cfg[region_num][0];
886 R_MPU9->RGN[region_num].ENDADD = g_bsp_master_mpu9_cfg[region_num][1];
887 #endif
888 #if (1 == BSP_FEATURE_BSP_MASTER_MPU10_SUPPORTED)
889 R_MPU10->RGN[region_num].STADD = g_bsp_master_mpu10_cfg[region_num][0];
890 R_MPU10->RGN[region_num].ENDADD = g_bsp_master_mpu10_cfg[region_num][1];
891 #endif
892 #if (1 == BSP_FEATURE_BSP_MASTER_MPU11_SUPPORTED)
893 R_MPU11->RGN[region_num].STADD = g_bsp_master_mpu11_cfg[region_num][0];
894 R_MPU11->RGN[region_num].ENDADD = g_bsp_master_mpu11_cfg[region_num][1];
895 #endif
896 #if (1 == BSP_FEATURE_BSP_MASTER_MPU12_SUPPORTED)
897 R_MPU12->RGN[region_num].STADD = g_bsp_master_mpu12_cfg[region_num][0];
898 R_MPU12->RGN[region_num].ENDADD = g_bsp_master_mpu12_cfg[region_num][1];
899 #endif
900 #if (1 == BSP_FEATURE_BSP_MASTER_MPU13_SUPPORTED)
901 R_MPU13->RGN[region_num].STADD = g_bsp_master_mpu13_cfg[region_num][0];
902 R_MPU13->RGN[region_num].ENDADD = g_bsp_master_mpu13_cfg[region_num][1];
903 #endif
904 #if (1 == BSP_FEATURE_BSP_MASTER_MPU14_SUPPORTED)
905 R_MPU14->RGN[region_num].STADD = g_bsp_master_mpu14_cfg[region_num][0];
906 R_MPU14->RGN[region_num].ENDADD = g_bsp_master_mpu14_cfg[region_num][1];
907 #endif
908 #if (1 == BSP_FEATURE_BSP_MASTER_MPU15_SUPPORTED)
909 R_MPU15->RGN[region_num].STADD = g_bsp_master_mpu15_cfg[region_num][0];
910 R_MPU15->RGN[region_num].ENDADD = g_bsp_master_mpu15_cfg[region_num][1];
911 #endif
912 }
913
914 /* Enable register protection for Master-MPU related registers. */
915 R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_SYSTEM);
916 }
917
918 /*******************************************************************************************************************//**
919 * Initialize global system counter. The counter is enabled and is incrementing.
920 **********************************************************************************************************************/
bsp_global_system_counter_init(void)921 void bsp_global_system_counter_init (void)
922 {
923 /* Initialize registers related the global system counter. */
924 R_GSC->CNTCR &= (uint32_t) (~R_GSC_CNTCR_EN_Msk);
925 R_GSC->CNTFID0 = BSP_GLOBAL_SYSTEM_COUNTER_CLOCK_HZ;
926 R_GSC->CNTCVL = 0;
927 R_GSC->CNTCVU = 0;
928 R_GSC->CNTCR |= R_GSC_CNTCR_EN_Msk;
929 }
930
931 #endif
932
933 /*******************************************************************************************************************//**
934 * @addtogroup BSP_MCU
935 * @{
936 **********************************************************************************************************************/
937
938 /*******************************************************************************************************************//**
939 * This function is called at various points during the startup process.
940 * This function is declared as a weak symbol higher up in this file because it is meant to be overridden by a user
941 * implemented version. One of the main uses for this function is to call functional safety code during the startup
942 * process. To use this function just copy this function into your own code and modify it to meet your needs.
943 *
944 * @param[in] event Where the code currently is in the start up process
945 *
946 * @note All programs that are executed when a BSP_WARM_START_RESET, or BSP_WARM_START_POST_CLOCK event occurs
947 * must be placed in the LOADER section(BTCM for CR52 core, SystemRAM for CA55 core).
948 * These events occur before the copy of the application program in the startup code is executed,
949 * so the application program is on ROM and cannot be executed at that time.
950 * The FSP linker script specifies that the .warm_start section be placed in the LOADER section.
951 * Adding a section specification to the definition of a function or
952 * variable makes it easier to place it in the LOADER section.
953 **********************************************************************************************************************/
R_BSP_WarmStart(bsp_warm_start_event_t event)954 void R_BSP_WarmStart (bsp_warm_start_event_t event)
955 {
956 if (BSP_WARM_START_RESET == event)
957 {
958 /* C runtime environment has not been setup so you cannot use globals. System clocks are not setup. */
959 }
960
961 if (BSP_WARM_START_POST_CLOCK == event)
962 {
963 /* C runtime environment has not been setup so you cannot use globals. Clocks have been initialized. */
964 }
965 else if (BSP_WARM_START_POST_C == event)
966 {
967 /* C runtime environment, system clocks, and pins are all setup. */
968 }
969 else
970 {
971 /* Do nothing */
972 }
973 }
974
975 /** @} (end addtogroup BSP_MCU) */
976
977 #if BSP_CFG_C_RUNTIME_INIT
978
979 /*******************************************************************************************************************//**
980 * Copy the loader data block from external Flash to internal RAM.
981 **********************************************************************************************************************/
bsp_loader_data_init(void)982 void bsp_loader_data_init (void)
983 {
984 #if (1 == _RZN_ORDINAL) && !(BSP_CFG_RAM_EXECUTION)
985
986 /* Define destination/source address pointer and block size */
987 uintptr_t * src;
988 uintptr_t * dst;
989 uintptr_t size;
990
991 /* Copy loader data block */
992 src = (uintptr_t *) BSP_PRV_SECTION_LDR_DATA_ROM_ADDRESS;
993 dst = (uintptr_t *) BSP_PRV_SECTION_LDR_DATA_RAM_START;
994 size = (uintptr_t) BSP_PRV_SECTION_LDR_DATA_RAM_END - (uintptr_t) BSP_PRV_SECTION_LDR_DATA_RAM_START;
995 bsp_copy_multibyte(src, dst, size);
996 #endif
997 }
998
999 /*******************************************************************************************************************//**
1000 * Clear the loader bss block in internal RAM.
1001 **********************************************************************************************************************/
bsp_loader_bss_init(void)1002 void bsp_loader_bss_init (void)
1003 {
1004 /* Define source address pointer and block size */
1005 uintptr_t * src;
1006 uintptr_t size;
1007
1008 /* Clear loader bss block. */
1009 src = (uintptr_t *) BSP_PRV_SECTION_LDR_DATA_BSS_START;
1010 size = (uintptr_t) BSP_PRV_SECTION_LDR_DATA_BSS_END - (uintptr_t) BSP_PRV_SECTION_LDR_DATA_BSS_START;
1011 bsp_bss_init_multibyte(src, size);
1012
1013 #if BSP_CFG_RAM_EXECUTION
1014 #if defined(__ICCARM__)
1015
1016 /* Initialize the application data and clear the application bss.
1017 * This code is for RAM Execution. If you want to boot with ROM,
1018 * enable app_copy and app_bss_init, and disable this code.
1019 * Also need to change icf file. */
1020 __iar_data_init3();
1021 #elif defined(__GNUC__)
1022
1023 /* Clear application bss block. */
1024 src = (uintptr_t *) BSP_PRV_SECTION_USER_DATA_BSS_START;
1025 size = (uintptr_t) BSP_PRV_SECTION_USER_DATA_BSS_END - (uintptr_t) BSP_PRV_SECTION_USER_DATA_BSS_START;
1026 bsp_bss_init_multibyte(src, size);
1027 #endif
1028 #endif
1029 }
1030
1031 #endif
1032
1033 /*******************************************************************************************************************//**
1034 * Copy the memory block from Source address to Destination address by the multi byte unit.
1035 **********************************************************************************************************************/
bsp_copy_multibyte(uintptr_t * src,uintptr_t * dst,uintptr_t bytesize)1036 void bsp_copy_multibyte (uintptr_t * src, uintptr_t * dst, uintptr_t bytesize)
1037 {
1038 uintptr_t i;
1039 uintptr_t cnt;
1040
1041 uintptr_t bytesize_mod;
1042 uint8_t * src_single_byte;
1043 uint8_t * dst_single_byte;
1044
1045 if (0 != bytesize)
1046 {
1047 /* Copy Count in multi byte unit */
1048 cnt = bytesize / sizeof(uintptr_t);
1049
1050 for (i = 0; i < cnt; i++)
1051 {
1052 *dst++ = *src++;
1053 }
1054
1055 /* Copy Count in single byte unit */
1056 bytesize_mod = bytesize % sizeof(uintptr_t);
1057
1058 if (0 != bytesize_mod)
1059 {
1060 src_single_byte = (uint8_t *) src;
1061 dst_single_byte = (uint8_t *) dst;
1062
1063 for (i = 0; i < bytesize_mod; i++)
1064 {
1065 *dst_single_byte++ = *src_single_byte++;
1066 }
1067 }
1068 else
1069 {
1070 /* Do nothing */
1071 }
1072
1073 /* Ensuring data-changing */
1074 __asm volatile ("DSB SY");
1075 }
1076 else
1077 {
1078 /* Do nothing */
1079 }
1080 }
1081
1082 /*******************************************************************************************************************//**
1083 * Clear the bss block by the multi byte unit.
1084 **********************************************************************************************************************/
bsp_bss_init_multibyte(uintptr_t * src,uintptr_t bytesize)1085 void bsp_bss_init_multibyte (uintptr_t * src, uintptr_t bytesize)
1086 {
1087 uintptr_t i;
1088 uintptr_t cnt;
1089 uintptr_t zero = 0;
1090
1091 uintptr_t bytesize_mod;
1092 uint8_t * src_single_byte;
1093 uint8_t zero_single_byte = 0;
1094
1095 if (0 != bytesize)
1096 {
1097 /* Clear Count in multi byte unit */
1098 cnt = bytesize / sizeof(uintptr_t);
1099
1100 for (i = 0; i < cnt; i++)
1101 {
1102 *src++ = zero;
1103 }
1104
1105 /* Clear Count in single byte unit */
1106 bytesize_mod = bytesize % sizeof(uintptr_t);
1107
1108 if (0 != bytesize_mod)
1109 {
1110 src_single_byte = (uint8_t *) src;
1111
1112 for (i = 0; i < bytesize_mod; i++)
1113 {
1114 *src_single_byte++ = zero_single_byte;
1115 }
1116 }
1117 else
1118 {
1119 /* Do nothing */
1120 }
1121
1122 /* Ensuring data-changing */
1123 __asm volatile ("DSB SY");
1124 }
1125 else
1126 {
1127 /* Do nothing */
1128 }
1129 }
1130
1131 #if !(BSP_CFG_RAM_EXECUTION)
1132
1133 /*******************************************************************************************************************//**
1134 * Clear the application bss block in internal RAM.
1135 **********************************************************************************************************************/
bsp_application_bss_init(void)1136 void bsp_application_bss_init (void)
1137 {
1138 /* Define source address pointer and block size */
1139 uintptr_t * src;
1140 uintptr_t size;
1141
1142 /* Clear application bss block. */
1143 src = (uintptr_t *) BSP_PRV_SECTION_USER_DATA_BSS_START;
1144 size = (uintptr_t) BSP_PRV_SECTION_USER_DATA_BSS_END - (uintptr_t) BSP_PRV_SECTION_USER_DATA_BSS_START;
1145 bsp_bss_init_multibyte(src, size);
1146
1147 #if defined(__ICCARM__)
1148
1149 /* Clear user data_noncache block. */
1150 src = (uintptr_t *) BSP_PRV_SECTION_USER_DATA_NONCACHE_BSS_START;
1151 size = (uintptr_t) BSP_PRV_SECTION_USER_DATA_NONCACHE_BSS_END -
1152 (uintptr_t) BSP_PRV_SECTION_USER_DATA_NONCACHE_BSS_START;
1153 bsp_bss_init_multibyte(src, size);
1154
1155 /* Clear DMAC link mode data block. */
1156 src = (uintptr_t *) BSP_PRV_SECTION_DMAC_LINK_MODE_BSS_START;
1157 size = (uintptr_t) BSP_PRV_SECTION_DMAC_LINK_MODE_BSS_END -
1158 (uintptr_t) BSP_PRV_SECTION_DMAC_LINK_MODE_BSS_START;
1159 bsp_bss_init_multibyte(src, size);
1160
1161 #if (1 == _RZN_ORDINAL)
1162
1163 /* Clear shared non-cache buffer block. */
1164 src = (uintptr_t *) BSP_PRV_SECTION_SHARED_NONCACHE_BUFFER_BSS_START;
1165 size = (uintptr_t) BSP_PRV_SECTION_SHARED_NONCACHE_BUFFER_BSS_END -
1166 (uintptr_t) BSP_PRV_SECTION_SHARED_NONCACHE_BUFFER_BSS_START;
1167 bsp_bss_init_multibyte(src, size);
1168 #endif
1169
1170 /* Clear non-cache buffer block. */
1171 src = (uintptr_t *) BSP_PRV_SECTION_NONCACHE_BUFFER_BSS_START;
1172 size = (uintptr_t) BSP_PRV_SECTION_NONCACHE_BUFFER_BSS_END -
1173 (uintptr_t) BSP_PRV_SECTION_NONCACHE_BUFFER_BSS_START;
1174 bsp_bss_init_multibyte(src, size);
1175 #endif
1176 }
1177
1178 /*******************************************************************************************************************//**
1179 * Copy the application program block from external Flash to internal RAM.
1180 * In the case of multi-core operation, copies each section (vector, loader(program/data), user(program/data)) of
1181 * the secondary core (or later).
1182 **********************************************************************************************************************/
bsp_copy_to_ram(void)1183 void bsp_copy_to_ram (void)
1184 {
1185 /* Define destination/source address pointer and block size */
1186 #if (1 == _RZN_ORDINAL) || defined(__ICCARM__)
1187 uintptr_t * src;
1188 uintptr_t * dst;
1189 #endif
1190
1191 uintptr_t size;
1192
1193 #if (1 == _RZN_ORDINAL)
1194
1195 /* Copy exception vector block */
1196 src = (uintptr_t *) BSP_PRV_SECTION_VECTOR_ROM_ADDRESS;
1197 dst = (uintptr_t *) BSP_PRV_SECTION_VECTOR_RAM_START;
1198 size = (uintptr_t) BSP_PRV_SECTION_VECTOR_RAM_END - (uintptr_t) BSP_PRV_SECTION_VECTOR_RAM_START;
1199 bsp_copy_multibyte(src, dst, size);
1200
1201 /* Copy user program block */
1202 src = (uintptr_t *) BSP_PRV_SECTION_USER_PRG_ROM_ADDRESS;
1203 dst = (uintptr_t *) BSP_PRV_SECTION_USER_PRG_RAM_START;
1204 size = (uintptr_t) BSP_PRV_SECTION_USER_PRG_RAM_END - (uintptr_t) BSP_PRV_SECTION_USER_PRG_RAM_START;
1205 bsp_copy_multibyte(src, dst, size);
1206
1207 /* Copy user data block */
1208 src = (uintptr_t *) BSP_PRV_SECTION_USER_DATA_ROM_ADDRESS;
1209 dst = (uintptr_t *) BSP_PRV_SECTION_USER_DATA_RAM_START;
1210 size = (uintptr_t) BSP_PRV_SECTION_USER_DATA_RAM_END - (uintptr_t) BSP_PRV_SECTION_USER_DATA_RAM_START;
1211 bsp_copy_multibyte(src, dst, size);
1212
1213 /* Copy shared non-cache buffer block. */
1214 src = (uintptr_t *) BSP_PRV_SECTION_SHARED_NONCACHE_BUFFER_ROM_ADDRESS;
1215 dst = (uintptr_t *) BSP_PRV_SECTION_SHARED_NONCACHE_BUFFER_RAM_START;
1216 size = (uintptr_t) BSP_PRV_SECTION_SHARED_NONCACHE_BUFFER_RAM_END -
1217 (uintptr_t) BSP_PRV_SECTION_SHARED_NONCACHE_BUFFER_RAM_START;
1218 bsp_copy_multibyte(src, dst, size);
1219 #endif
1220 #if (1 == _RZN_ORDINAL) || defined(__ICCARM__)
1221
1222 /* Copy user data_noncache block */
1223 src = (uintptr_t *) BSP_PRV_SECTION_USER_DATA_NONCACHE_ROM_ADDRESS;
1224 dst = (uintptr_t *) BSP_PRV_SECTION_USER_DATA_NONCACHE_RAM_START;
1225 size = (uintptr_t) BSP_PRV_SECTION_USER_DATA_NONCACHE_RAM_END -
1226 (uintptr_t) BSP_PRV_SECTION_USER_DATA_NONCACHE_RAM_START;
1227 bsp_copy_multibyte(src, dst, size);
1228
1229 /* Copy DMAC link mode data block. */
1230 src = (uintptr_t *) BSP_PRV_SECTION_DMAC_LINK_MODE_ROM_ADDRESS;
1231 dst = (uintptr_t *) BSP_PRV_SECTION_DMAC_LINK_MODE_RAM_START;
1232 size = (uintptr_t) BSP_PRV_SECTION_DMAC_LINK_MODE_RAM_END -
1233 (uintptr_t) BSP_PRV_SECTION_DMAC_LINK_MODE_RAM_START;
1234 bsp_copy_multibyte(src, dst, size);
1235
1236 /* Copy non-cache buffer block. */
1237 src = (uintptr_t *) BSP_PRV_SECTION_NONCACHE_BUFFER_ROM_ADDRESS;
1238 dst = (uintptr_t *) BSP_PRV_SECTION_NONCACHE_BUFFER_RAM_START;
1239 size = (uintptr_t) BSP_PRV_SECTION_NONCACHE_BUFFER_RAM_END -
1240 (uintptr_t) BSP_PRV_SECTION_NONCACHE_BUFFER_RAM_START;
1241 bsp_copy_multibyte(src, dst, size);
1242 #endif
1243 #if (1U < BSP_FEATURE_BSP_CR52_CORE_NUM) || (1U < BSP_FEATURE_BSP_CA55_CORE_NUM)
1244 #if (1 == _RZN_ORDINAL)
1245
1246 /* Copy secondary core application */
1247 src = (uintptr_t *) BSP_PRV_SECTION_SECONDARY_ROM_ADDRESS;
1248 dst = (uintptr_t *) BSP_PRV_SECTION_SECONDARY_RAM_START;
1249 size = (uintptr_t) BSP_PRV_SECTION_SECONDARY_RAM_END -
1250 (uintptr_t) BSP_PRV_SECTION_SECONDARY_RAM_START;
1251
1252 #if (1U <= BSP_FEATURE_BSP_CA55_CORE_NUM)
1253 if ((0 == R_SYSC_NS->RSTSR0_b.SWR0F) && (0 == R_SYSC_NS->RSTSR0_b.SWR550) && (0 == R_SYSC_NS->RSTSR0_b.SWR55C))
1254 #else
1255 if (0 == R_SYSC_NS->RSTSR0_b.SWR0F)
1256 #endif
1257 {
1258 bsp_copy_multibyte(src, dst, size);
1259 }
1260 else
1261 {
1262 size = 0;
1263 }
1264 #else
1265 size = (uintptr_t) BSP_PRV_SECTION_SECONDARY_RAM_END -
1266 (uintptr_t) BSP_PRV_SECTION_SECONDARY_RAM_START;
1267 #endif
1268
1269 if (0 != size)
1270 {
1271 bsp_cpu_reset_release();
1272 }
1273 #endif
1274 }
1275
1276 #if (1U < BSP_FEATURE_BSP_CR52_CORE_NUM) || (1U < BSP_FEATURE_BSP_CA55_CORE_NUM)
1277
1278 /*******************************************************************************************************************//**
1279 * Reset release each CPU
1280 **********************************************************************************************************************/
bsp_cpu_reset_release(void)1281 void bsp_cpu_reset_release (void)
1282 {
1283 uint32_t image_info_cpu;
1284
1285 #if (1 == BSP_FEATURE_BSP_HAS_CR52_CPU1_TCM)
1286 uint32_t * dst;
1287 #endif
1288
1289 R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_LPC_RESET);
1290 R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_SYSTEM);
1291
1292 image_info_cpu = *(uint32_t *) (BSP_PRV_IMAGE_INFO_NEXT_CORE_ADDRESS + BSP_PRV_IMAGE_INFO_OFFSET);
1293
1294 switch (image_info_cpu)
1295 {
1296 case BSP_PRIV_ASSIGNMENT_CPU_CR52_0:
1297 {
1298 #if (1 == BSP_FEATURE_BSP_HAS_CR52_CPU1_TCM)
1299 R_BSP_CacheCleanAll();
1300
1301 dst = (uint32_t *) BSP_PRV_ATCM_AXIS_CR520_ADDRESS;
1302 *dst++ = BSP_PRV_IMAGE_INFO_BRANCH_INSTRUCTION_CR520;
1303 __asm volatile ("DSB SY");
1304 *dst++ = BSP_PRV_IMAGE_INFO_BRANCH_ADDRESS;
1305 __asm volatile ("DSB SY");
1306
1307 R_BSP_CPUResetAutoRelease(BSP_RESET_CR52_0);
1308 #endif
1309
1310 break;
1311 }
1312
1313 case BSP_PRIV_ASSIGNMENT_CPU_CR52_1:
1314 {
1315 #if (0 == BSP_FEATURE_BSP_HAS_CR52_CPU1_TCM)
1316
1317 /* Release CR52_CPU1 reset state. */
1318 R_BSP_CPUResetRelease(BSP_RESET_CR52_1);
1319 #elif (1 == BSP_FEATURE_BSP_HAS_CR52_CPU1_TCM)
1320 R_BSP_CacheCleanAll();
1321
1322 R_BSP_MODULE_START(FSP_IP_CR52, 1U);
1323
1324 /* Release CR52_CPU1 reset state. */
1325 R_BSP_CPUResetRelease(BSP_RESET_CR52_1);
1326
1327 /* Release from the slave stop state */
1328 R_SSC->SSTPCR7 = (uint32_t) ((uintptr_t) (R_SSC->SSTPCR7 & ~R_SSC_SSTPCR7_AXIS1_REQ_Msk));
1329
1330 /* Polling ACK bit in SSTPCR */
1331 FSP_HARDWARE_REGISTER_WAIT(R_SSC->SSTPCR7_b.AXIS1_ACK, 0);
1332
1333 #if defined(BSP_CFG_CORE_CR52)
1334 __asm volatile (
1335 " MOVS r1, #0 \n"
1336 " MOVS r2, %[dst_cpu1] \n"
1337 " MOVS r0, %[inst] \n"
1338 " STRD r0, r1, [r2] \n"
1339 " DSB SY \n"
1340 " MOVS r0, %[addr] \n"
1341 " STRD r0, r1, [r2, #8] \n"
1342 " DSB SY \n"
1343 ::[inst] "r" (BSP_PRV_IMAGE_INFO_BRANCH_INSTRUCTION_CR521),
1344 [addr] "r" (BSP_PRV_IMAGE_INFO_BRANCH_ADDRESS),
1345 [dst_cpu1] "r" (BSP_PRV_ATCM_AXIS_CR521_ADDRESS) : "memory", "r0", "r1", "r2");
1346 #elif defined(BSP_CFG_CORE_CA55)
1347 uint64_t * dst_cpu1 = (uint64_t *) BSP_PRV_ATCM_AXIS_CR521_ADDRESS;
1348 *dst_cpu1++ = BSP_PRV_IMAGE_INFO_BRANCH_INSTRUCTION_CR521;
1349 __asm volatile ("DSB SY");
1350 *dst_cpu1++ = BSP_PRV_IMAGE_INFO_BRANCH_ADDRESS;
1351 __asm volatile ("DSB SY");
1352 #endif
1353
1354 R_TCMAW->CPU1HALT = 0x00000000;
1355 #endif
1356
1357 break;
1358 }
1359
1360 #if (1U < BSP_FEATURE_BSP_CA55_CORE_NUM)
1361 case BSP_PRIV_ASSIGNMENT_CPU_CA55_0:
1362 {
1363 R_CA55->RVBA[0].L = (uint32_t) (BSP_PRV_IMAGE_INFO_NEXT_CORE_ADDRESS + BSP_PRV_LOADER_TEXT_OFFSET);
1364
1365 R_BSP_MODULE_START(FSP_IP_CA55, 0U);
1366
1367 R_BSP_CPUResetRelease(BSP_RESET_CA55_CLUSTER);
1368 R_BSP_CacheCleanAll();
1369 R_BSP_CPUResetRelease(BSP_RESET_CA55_0);
1370 R_BSP_CacheCleanAll();
1371
1372 break;
1373 }
1374
1375 case BSP_PRIV_ASSIGNMENT_CPU_CA55_1:
1376 {
1377 R_CA55->RVBA[1].L = (uint32_t) (BSP_PRV_IMAGE_INFO_NEXT_CORE_ADDRESS + BSP_PRV_LOADER_TEXT_OFFSET);
1378
1379 R_BSP_MODULE_START(FSP_IP_CA55, 1U);
1380
1381 R_BSP_CPUResetRelease(BSP_RESET_CA55_CLUSTER);
1382 R_BSP_CacheCleanAll();
1383 R_BSP_CPUResetRelease(BSP_RESET_CA55_1);
1384 R_BSP_CacheCleanAll();
1385
1386 break;
1387 }
1388
1389 case BSP_PRIV_ASSIGNMENT_CPU_CA55_2:
1390 {
1391 R_CA55->RVBA[2].L = (uint32_t) (BSP_PRV_IMAGE_INFO_NEXT_CORE_ADDRESS + BSP_PRV_LOADER_TEXT_OFFSET);
1392
1393 R_BSP_MODULE_START(FSP_IP_CA55, 2U);
1394
1395 R_BSP_CPUResetRelease(BSP_RESET_CA55_CLUSTER);
1396 R_BSP_CacheCleanAll();
1397 R_BSP_CPUResetRelease(BSP_RESET_CA55_2);
1398 R_BSP_CacheCleanAll();
1399
1400 break;
1401 }
1402
1403 case BSP_PRIV_ASSIGNMENT_CPU_CA55_3:
1404 {
1405 R_CA55->RVBA[3].L = (uint32_t) (BSP_PRV_IMAGE_INFO_NEXT_CORE_ADDRESS + BSP_PRV_LOADER_TEXT_OFFSET);
1406
1407 R_BSP_MODULE_START(FSP_IP_CA55, 3U);
1408
1409 R_BSP_CPUResetRelease(BSP_RESET_CA55_CLUSTER);
1410 R_BSP_CacheCleanAll();
1411 R_BSP_CPUResetRelease(BSP_RESET_CA55_3);
1412 R_BSP_CacheCleanAll();
1413
1414 break;
1415 }
1416 #endif
1417
1418 default:
1419 {
1420 break;
1421 }
1422 }
1423
1424 R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_SYSTEM);
1425 R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_LPC_RESET);
1426 }
1427
1428 #endif
1429 #endif
1430
1431 #if defined(BSP_CFG_CORE_CR52)
1432 #if (BSP_FEATURE_TFU_SUPPORTED & BSP_CFG_USE_TFU_MATHLIB)
bsp_tfu_init(void)1433 void bsp_tfu_init (void)
1434 {
1435 R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_LPC_RESET);
1436 #if (1 != BSP_FEATURE_TFU_UNIT_NUMBER)
1437 R_BSP_MODULE_START(FSP_IP_TFU, 0U);
1438 #else
1439 R_BSP_MODULE_START(FSP_IP_TFU, 1U);
1440 #endif
1441 R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_LPC_RESET);
1442
1443 #if 2 == BSP_FEATURE_TFU_VERSION
1444 #if (1 == BSP_FEATURE_TFU_UNIT)
1445 #if (1 == _RZN_ORDINAL)
1446 R_TFU->FXSCIOC_b.IUF = BSP_CFG_TFU_FIXED_POINT_SINCOS_INPUT_SETTING;
1447 R_TFU->FXSCIOC_b.OF = BSP_CFG_TFU_FIXED_POINT_SINCOS_OUTPUT_SETTING;
1448 R_TFU->FXATIOC_b.OUF = BSP_CFG_TFU_FIXED_POINT_ARCTAN_OUTPUT_SETTING;
1449 #endif
1450 #else
1451 #if (0 == BSP_FEATURE_TFU_UNIT_NUMBER)
1452 R_TFU0->FXSCIOC_b.IUF = BSP_CFG_TFU_FIXED_POINT_SINCOS_INPUT_SETTING;
1453 R_TFU0->FXSCIOC_b.OF = BSP_CFG_TFU_FIXED_POINT_SINCOS_OUTPUT_SETTING;
1454 R_TFU0->FXATIOC_b.OUF = BSP_CFG_TFU_FIXED_POINT_ARCTAN_OUTPUT_SETTING;
1455 #else
1456 R_TFU1->FXSCIOC_b.IUF = BSP_CFG_TFU_FIXED_POINT_SINCOS_INPUT_SETTING;
1457 R_TFU1->FXSCIOC_b.OF = BSP_CFG_TFU_FIXED_POINT_SINCOS_OUTPUT_SETTING;
1458 R_TFU1->FXATIOC_b.OUF = BSP_CFG_TFU_FIXED_POINT_ARCTAN_OUTPUT_SETTING;
1459 #endif
1460 #endif
1461 #endif
1462 }
1463
1464 #endif
1465 #endif
1466
1467 #if !BSP_CFG_PORT_PROTECT
bsp_release_port_protect(void)1468 void bsp_release_port_protect (void)
1469 {
1470 /** When writing to the PRCR register the upper 8-bits must be the correct key. Set lower bits to 0 to
1471 * disable writes. */
1472 R_RWP_NS->PRCRN = ((R_RWP_NS->PRCRN | BSP_IO_PRV_PRCR_KEY) | BSP_IO_REG_PROTECT_GPIO);
1473 R_RWP_S->PRCRS = ((R_RWP_S->PRCRS | BSP_IO_PRV_PRCR_KEY) | BSP_IO_REG_PROTECT_GPIO);
1474 }
1475
1476 #endif
1477
1478 /*******************************************************************************************************************//**
1479 * Initialize static constructors.
1480 **********************************************************************************************************************/
1481 #if BSP_CFG_C_RUNTIME_INIT
bsp_static_constructor_init(void)1482 void bsp_static_constructor_init (void)
1483 {
1484 #if defined(__ICCARM__)
1485 #if !(BSP_CFG_RAM_EXECUTION)
1486
1487 /* In the case of ROM boot, initialization of static constructors is performed by __iar_data_init3(). */
1488 __iar_data_init3();
1489 #endif
1490 #elif defined(__GNUC__)
1491 intptr_t count;
1492 intptr_t i;
1493
1494 count = __preinit_array_end - __preinit_array_start;
1495 for (i = 0; i < count; i++)
1496 {
1497 __preinit_array_start[i]();
1498 }
1499
1500 count = __init_array_end - __init_array_start;
1501 for (i = 0; i < count; i++)
1502 {
1503 __init_array_start[i]();
1504 }
1505 #endif
1506 }
1507
1508 #endif
1509
