1 /* hci_spi_st.c - STMicroelectronics HCI SPI Bluetooth driver */
2
3 /*
4 * Copyright (c) 2017 Linaro Ltd.
5 * Copyright (c) 2024 STMicroelectronics
6 *
7 * SPDX-License-Identifier: Apache-2.0
8 */
9
10 #if defined(CONFIG_DT_HAS_ST_HCI_SPI_V1_ENABLED)
11 #define DT_DRV_COMPAT st_hci_spi_v1
12
13 #elif defined(CONFIG_DT_HAS_ST_HCI_SPI_V2_ENABLED)
14 #define DT_DRV_COMPAT st_hci_spi_v2
15
16 #endif /* CONFIG_DT_HAS_ST_HCI_SPI_V1_ENABLED */
17
18 #include <zephyr/drivers/gpio.h>
19 #include <zephyr/init.h>
20 #include <zephyr/drivers/spi.h>
21 #include <zephyr/sys/byteorder.h>
22 #include <zephyr/sys/util.h>
23
24 #include <zephyr/bluetooth/hci.h>
25 #include <zephyr/drivers/bluetooth.h>
26 #include <zephyr/bluetooth/hci_raw.h>
27
28 #define LOG_LEVEL CONFIG_BT_HCI_DRIVER_LOG_LEVEL
29 #include <zephyr/logging/log.h>
30 LOG_MODULE_REGISTER(bt_driver);
31
32 /* ST Proprietary extended event */
33 #define HCI_EXT_EVT 0x82
34
35 /* Special Values */
36 #define SPI_WRITE 0x0A
37 #define SPI_READ 0x0B
38 #define READY_NOW 0x02
39
40 #define EVT_BLUE_INITIALIZED 0x01
41 #define FW_STARTED_PROPERLY 0X01
42 /* Offsets */
43 #define STATUS_HEADER_READY 0
44 #define STATUS_HEADER_TOREAD 3
45 #define STATUS_HEADER_TOWRITE 1
46
47 #define PACKET_TYPE 0
48 #define EVT_HEADER_TYPE 0
49 #define EVT_HEADER_EVENT 1
50 #define EVT_HEADER_SIZE 2
51 #define EVT_LE_META_SUBEVENT 3
52 #define EVT_VENDOR_CODE_LSB 3
53 #define EVT_VENDOR_CODE_MSB 4
54 #define REASON_CODE 5
55
56 #define CMD_OGF 1
57 #define CMD_OCF 2
58 /* packet type (1) + opcode (2) + Parameter Total Length (1) + max parameter length (255) */
59 #define SPI_MAX_MSG_LEN 259
60
61 /* Single byte header denoting the buffer type */
62 #define H4_HDR_SIZE 1
63
64 /* Maximum L2CAP MTU that can fit in a single packet */
65 #define MAX_MTU (SPI_MAX_MSG_LEN - H4_HDR_SIZE - BT_L2CAP_HDR_SIZE - BT_HCI_ACL_HDR_SIZE)
66
67 #if CONFIG_BT_L2CAP_TX_MTU > MAX_MTU
68 #warning CONFIG_BT_L2CAP_TX_MTU is too large and can result in packets that cannot \
69 be transmitted across this HCI link
70 #endif /* CONFIG_BT_L2CAP_TX_MTU > MAX_MTU */
71
72 static uint8_t __noinit rxmsg[SPI_MAX_MSG_LEN];
73 static uint8_t __noinit txmsg[SPI_MAX_MSG_LEN];
74
75 static const struct gpio_dt_spec irq_gpio = GPIO_DT_SPEC_INST_GET(0, irq_gpios);
76 static const struct gpio_dt_spec rst_gpio = GPIO_DT_SPEC_INST_GET(0, reset_gpios);
77
78 static struct gpio_callback gpio_cb;
79
80 static K_SEM_DEFINE(sem_initialised, 0, 1);
81 static K_SEM_DEFINE(sem_request, 0, 1);
82 static K_SEM_DEFINE(sem_busy, 1, 1);
83
84 static K_KERNEL_STACK_DEFINE(spi_rx_stack, CONFIG_BT_DRV_RX_STACK_SIZE);
85 static struct k_thread spi_rx_thread_data;
86
87 #define BLUENRG_ACI_WRITE_CONFIG_DATA BT_OP(BT_OGF_VS, 0x000C)
88 #define BLUENRG_CONFIG_PUBADDR_OFFSET 0x00
89 #define BLUENRG_CONFIG_PUBADDR_LEN 0x06
90 #define BLUENRG_CONFIG_LL_ONLY_OFFSET 0x2C
91 #define BLUENRG_CONFIG_LL_ONLY_LEN 0x01
92
93 struct bt_spi_data {
94 bt_hci_recv_t recv;
95 };
96
97 static const struct spi_dt_spec bus = SPI_DT_SPEC_INST_GET(
98 0, SPI_OP_MODE_MASTER | SPI_TRANSFER_MSB | SPI_WORD_SET(8) | SPI_LOCK_ON, 0);
99
100 static struct spi_buf spi_tx_buf;
101 static struct spi_buf spi_rx_buf;
102 static const struct spi_buf_set spi_tx = {
103 .buffers = &spi_tx_buf,
104 .count = 1
105 };
106 static const struct spi_buf_set spi_rx = {
107 .buffers = &spi_rx_buf,
108 .count = 1
109 };
110
111 struct bt_hci_ext_evt_hdr {
112 uint8_t evt;
113 uint16_t len;
114 } __packed;
115
bluenrg_bt_reset(bool updater_mode)116 int bluenrg_bt_reset(bool updater_mode)
117 {
118 int err = 0;
119 /* Assert reset */
120 if (!updater_mode) {
121 gpio_pin_set_dt(&rst_gpio, 1);
122 k_sleep(K_MSEC(DT_INST_PROP_OR(0, reset_assert_duration_ms, 0)));
123 gpio_pin_set_dt(&rst_gpio, 0);
124 } else {
125 #if DT_HAS_COMPAT_STATUS_OKAY(st_hci_spi_v2)
126 return -ENOTSUP;
127 #else /* DT_HAS_COMPAT_STATUS_OKAY(st_hci_spi_v1) */
128 gpio_pin_set_dt(&rst_gpio, 1);
129 gpio_pin_interrupt_configure_dt(&irq_gpio, GPIO_INT_DISABLE);
130 /* Configure IRQ pin as output and force it high */
131 err = gpio_pin_configure_dt(&irq_gpio, GPIO_OUTPUT_ACTIVE);
132 if (err) {
133 return err;
134 }
135 /* Add reset delay and release reset */
136 k_sleep(K_MSEC(DT_INST_PROP_OR(0, reset_assert_duration_ms, 0)));
137 gpio_pin_set_dt(&rst_gpio, 0);
138 /* Give firmware some time to read the IRQ high */
139 k_sleep(K_MSEC(5));
140 gpio_pin_interrupt_configure_dt(&irq_gpio, GPIO_INT_EDGE_TO_ACTIVE);
141 /* Reconfigure IRQ pin as input */
142 err = gpio_pin_configure_dt(&irq_gpio, GPIO_INPUT);
143 if (err) {
144 return err;
145 }
146 /* Emulate possibly missed rising edge IRQ by signaling the IRQ semaphore */
147 k_sem_give(&sem_request);
148 #endif /* DT_HAS_COMPAT_STATUS_OKAY(st_hci_spi_v2) */
149 }
150 return err;
151 }
152
bt_spi_transceive(void * tx,uint32_t tx_len,void * rx,uint32_t rx_len)153 static inline int bt_spi_transceive(void *tx, uint32_t tx_len,
154 void *rx, uint32_t rx_len)
155 {
156 spi_tx_buf.buf = tx;
157 spi_tx_buf.len = (size_t)tx_len;
158 spi_rx_buf.buf = rx;
159 spi_rx_buf.len = (size_t)rx_len;
160 return spi_transceive_dt(&bus, &spi_tx, &spi_rx);
161 }
162
bt_spi_get_cmd(uint8_t * msg)163 static inline uint16_t bt_spi_get_cmd(uint8_t *msg)
164 {
165 return (msg[CMD_OCF] << 8) | msg[CMD_OGF];
166 }
167
bt_spi_get_evt(uint8_t * msg)168 static inline uint16_t bt_spi_get_evt(uint8_t *msg)
169 {
170 return (msg[EVT_VENDOR_CODE_MSB] << 8) | msg[EVT_VENDOR_CODE_LSB];
171 }
172
bt_spi_isr(const struct device * unused1,struct gpio_callback * unused2,uint32_t unused3)173 static void bt_spi_isr(const struct device *unused1,
174 struct gpio_callback *unused2,
175 uint32_t unused3)
176 {
177 LOG_DBG("");
178
179 k_sem_give(&sem_request);
180 }
181
bt_spi_handle_vendor_evt(uint8_t * msg)182 static bool bt_spi_handle_vendor_evt(uint8_t *msg)
183 {
184 bool handled = false;
185 uint8_t reset_reason;
186
187 switch (bt_spi_get_evt(msg)) {
188 case EVT_BLUE_INITIALIZED: {
189 reset_reason = msg[REASON_CODE];
190 if (reset_reason == FW_STARTED_PROPERLY) {
191 k_sem_give(&sem_initialised);
192 #if defined(CONFIG_BT_BLUENRG_ACI)
193 handled = true;
194 #endif
195 }
196 }
197 default:
198 break;
199 }
200 return handled;
201 }
202
203 #define IS_IRQ_HIGH gpio_pin_get_dt(&irq_gpio)
204
205 #if DT_HAS_COMPAT_STATUS_OKAY(st_hci_spi_v1)
206
207 /* Define a limit when reading IRQ high */
208 #define IRQ_HIGH_MAX_READ 15
209
210 /* On BlueNRG-MS, host is expected to read */
211 /* as long as IRQ pin is high */
212 #define READ_CONDITION IS_IRQ_HIGH
213
release_cs(bool data_transaction)214 static void release_cs(bool data_transaction)
215 {
216 ARG_UNUSED(data_transaction);
217 spi_release_dt(&bus);
218 }
219
bt_spi_get_header(uint8_t op,uint16_t * size)220 static int bt_spi_get_header(uint8_t op, uint16_t *size)
221 {
222 uint8_t header_master[5] = {op, 0, 0, 0, 0};
223 uint8_t header_slave[5];
224 uint8_t size_offset, attempts;
225 int ret;
226
227 if (op == SPI_READ) {
228 if (!IS_IRQ_HIGH) {
229 *size = 0;
230 return 0;
231 }
232 size_offset = STATUS_HEADER_TOREAD;
233 } else if (op == SPI_WRITE) {
234 size_offset = STATUS_HEADER_TOWRITE;
235 } else {
236 return -EINVAL;
237 }
238 attempts = IRQ_HIGH_MAX_READ;
239 do {
240 if (op == SPI_READ) {
241 /* Keep checking that IRQ is still high, if we need to read */
242 if (!IS_IRQ_HIGH) {
243 *size = 0;
244 return 0;
245 }
246 }
247 /* Make sure CS is raised before a new attempt */
248 gpio_pin_set_dt(&bus.config.cs.gpio, 0);
249 ret = bt_spi_transceive(header_master, 5, header_slave, 5);
250 if (ret) {
251 /* SPI transaction failed */
252 break;
253 }
254
255 *size = (header_slave[STATUS_HEADER_READY] == READY_NOW) ?
256 header_slave[size_offset] : 0;
257 attempts--;
258 } while ((*size == 0) && attempts);
259
260 return ret;
261 }
262
263 #elif DT_HAS_COMPAT_STATUS_OKAY(st_hci_spi_v2)
264
265 #define READ_CONDITION false
266
release_cs(bool data_transaction)267 static void release_cs(bool data_transaction)
268 {
269 /* Consume possible event signals */
270 while (k_sem_take(&sem_request, K_NO_WAIT) == 0) {
271 }
272 if (data_transaction) {
273 /* Wait for IRQ to become low only when data phase has been performed */
274 while (IS_IRQ_HIGH) {
275 }
276 }
277 gpio_pin_interrupt_configure_dt(&irq_gpio, GPIO_INT_EDGE_TO_ACTIVE);
278 spi_release_dt(&bus);
279 }
280
bt_spi_get_header(uint8_t op,uint16_t * size)281 static int bt_spi_get_header(uint8_t op, uint16_t *size)
282 {
283 uint8_t header_master[5] = {op, 0, 0, 0, 0};
284 uint8_t header_slave[5];
285 uint16_t cs_delay;
286 uint8_t size_offset;
287 int ret;
288
289 if (op == SPI_READ) {
290 if (!IS_IRQ_HIGH) {
291 *size = 0;
292 return 0;
293 }
294 cs_delay = 0;
295 size_offset = STATUS_HEADER_TOREAD;
296 } else if (op == SPI_WRITE) {
297 /* To make sure we have a minimum delay from previous release cs */
298 cs_delay = 100;
299 size_offset = STATUS_HEADER_TOWRITE;
300 } else {
301 return -EINVAL;
302 }
303
304 if (cs_delay) {
305 k_sleep(K_USEC(cs_delay));
306 }
307 /* Perform a zero byte SPI transaction to acquire the SPI lock and lower CS
308 * while waiting for IRQ to be raised
309 */
310 bt_spi_transceive(header_master, 0, header_slave, 0);
311 gpio_pin_interrupt_configure_dt(&irq_gpio, GPIO_INT_DISABLE);
312
313 /* Wait up to a maximum time of 100 ms */
314 if (!WAIT_FOR(IS_IRQ_HIGH, 100000, k_usleep(100))) {
315 LOG_ERR("IRQ pin did not raise");
316 return -EIO;
317 }
318
319 ret = bt_spi_transceive(header_master, 5, header_slave, 5);
320 *size = header_slave[size_offset] | (header_slave[size_offset + 1] << 8);
321 return ret;
322 }
323 #endif /* DT_HAS_COMPAT_STATUS_OKAY(st_hci_spi_v1) */
324
325 #if defined(CONFIG_BT_BLUENRG_ACI)
bt_spi_send_aci_config(uint8_t offset,const uint8_t * value,size_t value_len)326 static int bt_spi_send_aci_config(uint8_t offset, const uint8_t *value, size_t value_len)
327 {
328 struct net_buf *buf;
329 uint8_t *cmd_data;
330 size_t data_len = 2 + value_len;
331 #if defined(CONFIG_BT_HCI_RAW)
332 struct bt_hci_cmd_hdr hdr;
333
334 hdr.opcode = sys_cpu_to_le16(BLUENRG_ACI_WRITE_CONFIG_DATA);
335 hdr.param_len = data_len;
336 buf = bt_buf_get_tx(BT_BUF_CMD, K_NO_WAIT, &hdr, sizeof(hdr));
337 #else
338 buf = bt_hci_cmd_create(BLUENRG_ACI_WRITE_CONFIG_DATA, data_len);
339 #endif /* CONFIG_BT_HCI_RAW */
340
341 if (!buf) {
342 return -ENOBUFS;
343 }
344
345 cmd_data = net_buf_add(buf, data_len);
346 cmd_data[0] = offset;
347 cmd_data[1] = value_len;
348 memcpy(&cmd_data[2], value, value_len);
349
350 #if defined(CONFIG_BT_HCI_RAW)
351 return bt_send(buf);
352 #else
353 return bt_hci_cmd_send(BLUENRG_ACI_WRITE_CONFIG_DATA, buf);
354 #endif /* CONFIG_BT_HCI_RAW */
355 }
356
357 #if !defined(CONFIG_BT_HCI_RAW)
bt_spi_bluenrg_setup(const struct device * dev,const struct bt_hci_setup_params * params)358 static int bt_spi_bluenrg_setup(const struct device *dev,
359 const struct bt_hci_setup_params *params)
360 {
361 int ret;
362 const bt_addr_t *addr = ¶ms->public_addr;
363
364 /* force BlueNRG to be on controller mode */
365 uint8_t data = 1;
366
367 bt_spi_send_aci_config(BLUENRG_CONFIG_LL_ONLY_OFFSET, &data, 1);
368
369 if (!bt_addr_eq(addr, BT_ADDR_NONE) && !bt_addr_eq(addr, BT_ADDR_ANY)) {
370 ret = bt_spi_send_aci_config(
371 BLUENRG_CONFIG_PUBADDR_OFFSET,
372 addr->val, sizeof(addr->val));
373
374 if (ret != 0) {
375 LOG_ERR("Failed to set BlueNRG public address (%d)", ret);
376 return ret;
377 }
378 }
379
380 return 0;
381 }
382 #endif /* !CONFIG_BT_HCI_RAW */
383
384 #endif /* CONFIG_BT_BLUENRG_ACI */
385
bt_spi_rx_buf_construct(uint8_t * msg,struct net_buf ** bufp,uint16_t size)386 static int bt_spi_rx_buf_construct(uint8_t *msg, struct net_buf **bufp, uint16_t size)
387 {
388 bool discardable = false;
389 k_timeout_t timeout = K_FOREVER;
390 struct bt_hci_acl_hdr acl_hdr;
391 /* persistent variable to keep packet length in case the HCI packet is split in
392 * multiple SPI transactions
393 */
394 static uint16_t len;
395 struct net_buf *buf = *bufp;
396 int ret = 0;
397
398 #if DT_HAS_COMPAT_STATUS_OKAY(st_hci_spi_v1)
399 if (buf) {
400 /* Buffer already allocated, waiting to complete event reception */
401 net_buf_add_mem(buf, msg, MIN(size, len - buf->len));
402 if (buf->len >= len) {
403 return 0;
404 } else {
405 return -EINPROGRESS;
406 }
407 }
408 #endif /* DT_HAS_COMPAT_STATUS_OKAY(st_hci_spi_v1) */
409
410 switch (msg[PACKET_TYPE]) {
411 #if DT_HAS_COMPAT_STATUS_OKAY(st_hci_spi_v2)
412 case HCI_EXT_EVT:
413 struct bt_hci_ext_evt_hdr *evt = (struct bt_hci_ext_evt_hdr *) (msg + 1);
414 struct bt_hci_evt_hdr *evt2 = (struct bt_hci_evt_hdr *) (msg + 1);
415
416 if (sys_le16_to_cpu(evt->len) > 0xff) {
417 return -ENOMEM;
418 }
419 /* Use memmove instead of memcpy due to buffer overlapping */
420 memmove(msg + (1 + sizeof(*evt2)), msg + (1 + sizeof(*evt)), evt2->len);
421 /* Manage event as regular BT_HCI_H4_EVT */
422 __fallthrough;
423 #endif /* DT_HAS_COMPAT_STATUS_OKAY(st_hci_spi_v2) */
424 case BT_HCI_H4_EVT:
425 switch (msg[EVT_HEADER_EVENT]) {
426 case BT_HCI_EVT_VENDOR:
427 /* Run event through interface handler */
428 if (bt_spi_handle_vendor_evt(msg)) {
429 return -ECANCELED;
430 }
431 /* Event has not yet been handled */
432 __fallthrough;
433 default:
434 if (msg[EVT_HEADER_EVENT] == BT_HCI_EVT_LE_META_EVENT &&
435 (msg[EVT_LE_META_SUBEVENT] == BT_HCI_EVT_LE_ADVERTISING_REPORT)) {
436 discardable = true;
437 timeout = K_NO_WAIT;
438 }
439 buf = bt_buf_get_evt(msg[EVT_HEADER_EVENT],
440 discardable, timeout);
441 if (!buf) {
442 LOG_DBG("Discard adv report due to insufficient buf");
443 return -ENOMEM;
444 }
445 }
446
447 len = sizeof(struct bt_hci_evt_hdr) + msg[EVT_HEADER_SIZE];
448 if (len > net_buf_tailroom(buf)) {
449 LOG_ERR("Event too long: %d", len);
450 net_buf_unref(buf);
451 return -ENOMEM;
452 }
453 /* Skip the first byte (HCI packet indicator) */
454 size = size - 1;
455 net_buf_add_mem(buf, &msg[1], size);
456 #if DT_HAS_COMPAT_STATUS_OKAY(st_hci_spi_v1)
457 if (size < len) {
458 ret = -EINPROGRESS;
459 }
460 #endif /* DT_HAS_COMPAT_STATUS_OKAY(st_hci_spi_v1) */
461 break;
462 case BT_HCI_H4_ACL:
463 buf = bt_buf_get_rx(BT_BUF_ACL_IN, K_FOREVER);
464 memcpy(&acl_hdr, &msg[1], sizeof(acl_hdr));
465 len = sizeof(acl_hdr) + sys_le16_to_cpu(acl_hdr.len);
466 if (len > net_buf_tailroom(buf)) {
467 LOG_ERR("ACL too long: %d", len);
468 net_buf_unref(buf);
469 return -ENOMEM;
470 }
471 net_buf_add_mem(buf, &msg[1], len);
472 break;
473 #if defined(CONFIG_BT_ISO)
474 case BT_HCI_H4_ISO:
475 struct bt_hci_iso_hdr iso_hdr;
476
477 buf = bt_buf_get_rx(BT_BUF_ISO_IN, timeout);
478 if (buf) {
479 memcpy(&iso_hdr, &msg[1], sizeof(iso_hdr));
480 len = sizeof(iso_hdr) + bt_iso_hdr_len(sys_le16_to_cpu(iso_hdr.len));
481 } else {
482 LOG_ERR("No available ISO buffers!");
483 return -ENOMEM;
484 }
485 if (len > net_buf_tailroom(buf)) {
486 LOG_ERR("ISO too long: %d", len);
487 net_buf_unref(buf);
488 return -ENOMEM;
489 }
490 net_buf_add_mem(buf, &msg[1], len);
491 break;
492 #endif /* CONFIG_BT_ISO */
493 default:
494 LOG_ERR("Unknown BT buf type %d", msg[0]);
495 return -ENOTSUP;
496 }
497
498 *bufp = buf;
499 return ret;
500 }
501
bt_spi_rx_thread(void * p1,void * p2,void * p3)502 static void bt_spi_rx_thread(void *p1, void *p2, void *p3)
503 {
504 const struct device *dev = p1;
505 struct bt_spi_data *hci = dev->data;
506
507 ARG_UNUSED(p2);
508 ARG_UNUSED(p3);
509
510 struct net_buf *buf = NULL;
511 uint16_t size = 0U;
512 int ret;
513
514 (void)memset(&txmsg, 0xFF, SPI_MAX_MSG_LEN);
515 while (true) {
516
517 /* Wait for interrupt pin to be active */
518 k_sem_take(&sem_request, K_FOREVER);
519
520 LOG_DBG("");
521
522 do {
523 /* Wait for SPI bus to be available */
524 k_sem_take(&sem_busy, K_FOREVER);
525 ret = bt_spi_get_header(SPI_READ, &size);
526
527 /* Read data */
528 if (ret == 0 && size != 0) {
529 ret = bt_spi_transceive(&txmsg, size, &rxmsg, size);
530 }
531
532 release_cs(size > 0);
533
534 k_sem_give(&sem_busy);
535
536 if (ret || size == 0) {
537 if (ret) {
538 LOG_ERR("Error %d", ret);
539 }
540 continue;
541 }
542
543 LOG_HEXDUMP_DBG(rxmsg, size, "SPI RX");
544
545 /* Construct net_buf from SPI data */
546 ret = bt_spi_rx_buf_construct(rxmsg, &buf, size);
547 if (!ret) {
548 /* Handle the received HCI data */
549 hci->recv(dev, buf);
550 buf = NULL;
551 }
552 } while (READ_CONDITION);
553 }
554 }
555
bt_spi_send(const struct device * dev,struct net_buf * buf)556 static int bt_spi_send(const struct device *dev, struct net_buf *buf)
557 {
558 uint16_t size;
559 uint8_t rx_first[1];
560 int ret;
561 uint8_t *data_ptr;
562 uint16_t remaining_bytes;
563
564 LOG_DBG("");
565
566 /* Buffer needs an additional byte for type */
567 if (buf->len >= SPI_MAX_MSG_LEN) {
568 LOG_ERR("Message too long (%d)", buf->len);
569 return -EINVAL;
570 }
571
572 switch (bt_buf_get_type(buf)) {
573 case BT_BUF_ACL_OUT:
574 net_buf_push_u8(buf, BT_HCI_H4_ACL);
575 break;
576 case BT_BUF_CMD:
577 net_buf_push_u8(buf, BT_HCI_H4_CMD);
578 break;
579 #if defined(CONFIG_BT_ISO)
580 case BT_BUF_ISO_OUT:
581 net_buf_push_u8(buf, BT_HCI_H4_ISO);
582 break;
583 #endif /* CONFIG_BT_ISO */
584 default:
585 LOG_ERR("Unsupported type");
586 return -EINVAL;
587 }
588
589 /* Wait for SPI bus to be available */
590 k_sem_take(&sem_busy, K_FOREVER);
591 data_ptr = buf->data;
592 remaining_bytes = buf->len;
593 do {
594 ret = bt_spi_get_header(SPI_WRITE, &size);
595 size = MIN(remaining_bytes, size);
596
597 #if DT_HAS_COMPAT_STATUS_OKAY(st_hci_spi_v2)
598
599 if (size < remaining_bytes) {
600 LOG_WRN("Unable to write full data, skipping");
601 size = 0;
602 ret = -ECANCELED;
603 }
604 #endif /* DT_HAS_COMPAT_STATUS_OKAY(st_hci_spi_v2) */
605
606 if (!ret) {
607 /* Transmit the message */
608 ret = bt_spi_transceive(data_ptr, size, rx_first, 1);
609 }
610 remaining_bytes -= size;
611 data_ptr += size;
612 } while (remaining_bytes > 0 && !ret);
613
614 release_cs(size > 0);
615
616 k_sem_give(&sem_busy);
617
618 if (ret) {
619 LOG_ERR("Error %d", ret);
620 return ret;
621 }
622
623 LOG_HEXDUMP_DBG(buf->data, buf->len, "SPI TX");
624
625 #if DT_HAS_COMPAT_STATUS_OKAY(st_hci_spi_v1)
626 /*
627 * Since a RESET has been requested, the chip will now restart.
628 * Unfortunately the BlueNRG will reply with "reset received" but
629 * since it does not send back a NOP, we have no way to tell when the
630 * RESET has actually taken place. Instead, we use the vendor command
631 * EVT_BLUE_INITIALIZED as an indication that it is safe to proceed.
632 */
633 if (bt_spi_get_cmd(buf->data) == BT_HCI_OP_RESET) {
634 k_sem_take(&sem_initialised, K_FOREVER);
635 }
636 #endif /* DT_HAS_COMPAT_STATUS_OKAY(st_hci_spi_v1) */
637 net_buf_unref(buf);
638
639 return ret;
640 }
641
bt_spi_open(const struct device * dev,bt_hci_recv_t recv)642 static int bt_spi_open(const struct device *dev, bt_hci_recv_t recv)
643 {
644 struct bt_spi_data *hci = dev->data;
645 int err;
646
647 /* Configure RST pin and hold BLE in Reset */
648 err = gpio_pin_configure_dt(&rst_gpio, GPIO_OUTPUT_ACTIVE);
649 if (err) {
650 return err;
651 }
652
653 /* Configure IRQ pin and the IRQ call-back/handler */
654 err = gpio_pin_configure_dt(&irq_gpio, GPIO_INPUT);
655 if (err) {
656 return err;
657 }
658
659 gpio_init_callback(&gpio_cb, bt_spi_isr, BIT(irq_gpio.pin));
660 err = gpio_add_callback(irq_gpio.port, &gpio_cb);
661 if (err) {
662 return err;
663 }
664
665 /* Enable the interrupt line */
666 err = gpio_pin_interrupt_configure_dt(&irq_gpio, GPIO_INT_EDGE_TO_ACTIVE);
667 if (err) {
668 return err;
669 }
670
671 hci->recv = recv;
672
673 /* Take BLE out of reset */
674 k_sleep(K_MSEC(DT_INST_PROP_OR(0, reset_assert_duration_ms, 0)));
675 gpio_pin_set_dt(&rst_gpio, 0);
676
677 /* Start RX thread */
678 k_thread_create(&spi_rx_thread_data, spi_rx_stack,
679 K_KERNEL_STACK_SIZEOF(spi_rx_stack),
680 bt_spi_rx_thread, (void *)dev, NULL, NULL,
681 K_PRIO_COOP(CONFIG_BT_DRIVER_RX_HIGH_PRIO),
682 0, K_NO_WAIT);
683
684 /* Device will let us know when it's ready */
685 k_sem_take(&sem_initialised, K_FOREVER);
686
687 #if defined(CONFIG_BT_HCI_RAW) && defined(CONFIG_BT_BLUENRG_ACI)
688 /* force BlueNRG to be on controller mode */
689 uint8_t data = 1;
690
691 bt_spi_send_aci_config(BLUENRG_CONFIG_LL_ONLY_OFFSET, &data, 1);
692 #endif /* CONFIG_BT_HCI_RAW && CONFIG_BT_BLUENRG_ACI */
693 return 0;
694 }
695
696 static const struct bt_hci_driver_api drv = {
697 #if defined(CONFIG_BT_BLUENRG_ACI) && !defined(CONFIG_BT_HCI_RAW)
698 .setup = bt_spi_bluenrg_setup,
699 #endif /* CONFIG_BT_BLUENRG_ACI && !CONFIG_BT_HCI_RAW */
700 .open = bt_spi_open,
701 .send = bt_spi_send,
702 };
703
bt_spi_init(const struct device * dev)704 static int bt_spi_init(const struct device *dev)
705 {
706
707 if (!spi_is_ready_dt(&bus)) {
708 LOG_ERR("SPI device not ready");
709 return -ENODEV;
710 }
711
712 if (!gpio_is_ready_dt(&irq_gpio)) {
713 LOG_ERR("IRQ GPIO device not ready");
714 return -ENODEV;
715 }
716
717 if (!gpio_is_ready_dt(&rst_gpio)) {
718 LOG_ERR("Reset GPIO device not ready");
719 return -ENODEV;
720 }
721
722 LOG_DBG("BT SPI initialized");
723
724 return 0;
725 }
726
727 #define HCI_DEVICE_INIT(inst) \
728 static struct bt_spi_data hci_data_##inst = { \
729 }; \
730 DEVICE_DT_INST_DEFINE(inst, bt_spi_init, NULL, &hci_data_##inst, NULL, \
731 POST_KERNEL, CONFIG_BT_SPI_INIT_PRIORITY, &drv)
732
733 /* Only one instance supported right now */
734 HCI_DEVICE_INIT(0)
735
