| /hal_silabs-latest/si32/si32Hal/SI32_Modules/ |
| D | SI32_ACCTR_A_Type.c | 40 SI32_ACCTR_A_Type * basePointer, in _SI32_ACCTR_A_initialize_module()
75 SI32_ACCTR_A_Type * basePointer, in _SI32_ACCTR_A_write_config()
90 SI32_ACCTR_A_Type * basePointer) in _SI32_ACCTR_A_read_config()
103 SI32_ACCTR_A_Type * basePointer) in _SI32_ACCTR_A_reset_module()
116 SI32_ACCTR_A_Type * basePointer) in _SI32_ACCTR_A_disable_module()
129 SI32_ACCTR_A_Type * basePointer) in _SI32_ACCTR_A_is_write_in_progress()
142 SI32_ACCTR_A_Type * basePointer) in _SI32_ACCTR_A_select_no_debug_outputs()
155 SI32_ACCTR_A_Type * basePointer) in _SI32_ACCTR_A_select_lc_mode_cmp0_and_cmp1_debug_outputs()
168 SI32_ACCTR_A_Type * basePointer) in _SI32_ACCTR_A_select_lc_mode_cmp0_and_integ0_debug_outputs()
181 SI32_ACCTR_A_Type * basePointer) in _SI32_ACCTR_A_select_lc_mode_cmp1_and_integ1_debug_outputs()
[all …]
|
| D | SI32_ACCTR_A_Type.h | 115 #define SI32_ACCTR_A_initialize_module(basePointer, config, control, lcconfig, lctiming, lcmode, lc… argument
149 #define SI32_ACCTR_A_write_config(basePointer, config) \ argument
165 #define SI32_ACCTR_A_read_config(basePointer) \ argument
178 #define SI32_ACCTR_A_reset_module(basePointer) \ argument
191 #define SI32_ACCTR_A_disable_module(basePointer) \ argument
204 #define SI32_ACCTR_A_is_write_in_progress(basePointer) \ argument
217 #define SI32_ACCTR_A_select_no_debug_outputs(basePointer) \ argument
230 #define SI32_ACCTR_A_select_lc_mode_cmp0_and_cmp1_debug_outputs(basePointer) \ argument
243 #define SI32_ACCTR_A_select_lc_mode_cmp0_and_integ0_debug_outputs(basePointer) \ argument
256 #define SI32_ACCTR_A_select_lc_mode_cmp1_and_integ1_debug_outputs(basePointer) \ argument
[all …]
|
| D | SI32_USART_B_Type.c | 39 SI32_USART_B_Type * basePointer, in _SI32_USART_B_initialize()
74 SI32_USART_B_Type * basePointer, in _SI32_USART_B_write_config()
89 SI32_USART_B_Type * basePointer) in _SI32_USART_B_read_config()
102 SI32_USART_B_Type * basePointer) in _SI32_USART_B_enable_rx_start_bit()
115 SI32_USART_B_Type * basePointer) in _SI32_USART_B_disable_rx_start_bit()
128 SI32_USART_B_Type * basePointer) in _SI32_USART_B_enable_rx_parity_bit()
141 SI32_USART_B_Type * basePointer) in _SI32_USART_B_disable_rx_parity_bit()
154 SI32_USART_B_Type * basePointer) in _SI32_USART_B_enable_rx_stop_bit()
167 SI32_USART_B_Type * basePointer) in _SI32_USART_B_disable_rx_stop_bit()
182 SI32_USART_B_Type * basePointer, in _SI32_USART_B_select_rx_stop_bits()
[all …]
|
| D | SI32_USART_B_Type.h | 102 #define SI32_USART_B_initialize(basePointer, config, mode, flowcn, control, ipdelay, baudrate, fifo… argument
124 #define SI32_USART_B_write_config(basePointer, config) \ argument
140 #define SI32_USART_B_read_config(basePointer) \ argument
153 #define SI32_USART_B_enable_rx_start_bit(basePointer) \ argument
166 #define SI32_USART_B_disable_rx_start_bit(basePointer) \ argument
179 #define SI32_USART_B_enable_rx_parity_bit(basePointer) \ argument
192 #define SI32_USART_B_disable_rx_parity_bit(basePointer) \ argument
205 #define SI32_USART_B_enable_rx_stop_bit(basePointer) \ argument
218 #define SI32_USART_B_disable_rx_stop_bit(basePointer) \ argument
241 #define SI32_USART_B_select_rx_stop_bits(basePointer, bits) do{ \ argument
[all …]
|
| D | SI32_SARADC_A_Type.c | 40 SI32_SARADC_A_Type * basePointer, in _SI32_SARADC_A_initialize()
61 SI32_SARADC_A_Type * basePointer, in _SI32_SARADC_A_initialize_channels()
86 SI32_SARADC_A_Type * basePointer, in _SI32_SARADC_A_write_config()
101 SI32_SARADC_A_Type * basePointer) in _SI32_SARADC_A_read_config()
116 SI32_SARADC_A_Type * basePointer, in _SI32_SARADC_A_set_sampling_phase()
134 SI32_SARADC_A_Type * basePointer) in _SI32_SARADC_A_enable_sampling_phase()
148 SI32_SARADC_A_Type * basePointer) in _SI32_SARADC_A_disable_sampling_phase()
161 SI32_SARADC_A_Type * basePointer) in _SI32_SARADC_A_enable_ssg_conversion_start()
174 SI32_SARADC_A_Type * basePointer) in _SI32_SARADC_A_disable_ssg_conversion_start()
189 SI32_SARADC_A_Type * basePointer) in _SI32_SARADC_A_select_output_packing_mode_upper_halfword_only()
[all …]
|
| D | SI32_SARADC_A_Type.h | 77 #define SI32_SARADC_A_initialize(basePointer, config, control, wclimits) do{ \ argument
121 #define SI32_SARADC_A_initialize_channels(basePointer, char10, char32, sq3210, sq7654) do{ \ argument
147 #define SI32_SARADC_A_write_config(basePointer, config) \ argument
163 #define SI32_SARADC_A_read_config(basePointer) \ argument
187 #define SI32_SARADC_A_set_sampling_phase(basePointer, sphase) do{ \ argument
205 #define SI32_SARADC_A_enable_sampling_phase(basePointer) \ argument
221 #define SI32_SARADC_A_disable_sampling_phase(basePointer) \ argument
234 #define SI32_SARADC_A_enable_ssg_conversion_start(basePointer) \ argument
247 #define SI32_SARADC_A_disable_ssg_conversion_start(basePointer) \ argument
264 #define SI32_SARADC_A_select_output_packing_mode_upper_halfword_only(basePointer) \ argument
[all …]
|
| D | SI32_USART_A_Type.h | 102 #define SI32_USART_A_initialize(basePointer, config, mode, flowcn, control, ipdelay, baudrate, fifo… argument
124 #define SI32_USART_A_write_config(basePointer, config) \ argument
140 #define SI32_USART_A_read_config(basePointer) \ argument
153 #define SI32_USART_A_enable_rx_start_bit(basePointer) \ argument
166 #define SI32_USART_A_disable_rx_start_bit(basePointer) \ argument
179 #define SI32_USART_A_enable_rx_parity_bit(basePointer) \ argument
192 #define SI32_USART_A_disable_rx_parity_bit(basePointer) \ argument
205 #define SI32_USART_A_enable_rx_stop_bit(basePointer) \ argument
218 #define SI32_USART_A_disable_rx_stop_bit(basePointer) \ argument
241 #define SI32_USART_A_select_rx_stop_bits(basePointer, bits) do{ \ argument
[all …]
|
| D | SI32_USART_A_Type.c | 39 SI32_USART_A_Type * basePointer, in _SI32_USART_A_initialize()
73 SI32_USART_A_Type * basePointer, in _SI32_USART_A_write_config()
88 SI32_USART_A_Type * basePointer) in _SI32_USART_A_read_config()
101 SI32_USART_A_Type * basePointer) in _SI32_USART_A_enable_rx_start_bit()
114 SI32_USART_A_Type * basePointer) in _SI32_USART_A_disable_rx_start_bit()
127 SI32_USART_A_Type * basePointer) in _SI32_USART_A_enable_rx_parity_bit()
140 SI32_USART_A_Type * basePointer) in _SI32_USART_A_disable_rx_parity_bit()
153 SI32_USART_A_Type * basePointer) in _SI32_USART_A_enable_rx_stop_bit()
166 SI32_USART_A_Type * basePointer) in _SI32_USART_A_disable_rx_stop_bit()
181 SI32_USART_A_Type * basePointer, in _SI32_USART_A_select_rx_stop_bits()
[all …]
|
| D | SI32_USB_A_Type.c | 39 SI32_USB_A_Type * basePointer, in _SI32_USB_A_initialize()
88 SI32_USB_A_Type * basePointer, in _SI32_USB_A_write_faddr()
103 SI32_USB_A_Type * basePointer) in _SI32_USB_A_read_faddr()
118 SI32_USB_A_Type * basePointer) in _SI32_USB_A_is_function_address_updating()
132 SI32_USB_A_Type * basePointer, in _SI32_USB_A_write_power()
147 SI32_USB_A_Type * basePointer) in _SI32_USB_A_read_power()
160 SI32_USB_A_Type * basePointer) in _SI32_USB_A_enable_suspend_detection()
173 SI32_USB_A_Type * basePointer) in _SI32_USB_A_disable_suspend_detection()
187 SI32_USB_A_Type * basePointer) in _SI32_USB_A_is_suspend_detected()
202 SI32_USB_A_Type * basePointer) in _SI32_USB_A_generate_resume_signaling()
[all …]
|
| D | SI32_USB_A_Type.h | 136 #define SI32_USB_A_initialize(basePointer, faddr, power, ioint, cmint, iointe, cmintepe, crcontrol,… argument
170 #define SI32_USB_A_write_faddr(basePointer, faddr) \ argument
186 #define SI32_USB_A_read_faddr(basePointer) \ argument
203 #define SI32_USB_A_is_function_address_updating(basePointer) \ argument
225 #define SI32_USB_A_write_power(basePointer, power) \ argument
241 #define SI32_USB_A_read_power(basePointer) \ argument
254 #define SI32_USB_A_enable_suspend_detection(basePointer) \ argument
267 #define SI32_USB_A_disable_suspend_detection(basePointer) \ argument
283 #define SI32_USB_A_is_suspend_detected(basePointer) \ argument
300 #define SI32_USB_A_generate_resume_signaling(basePointer) \ argument
[all …]
|
| D | SI32_UART_A_Type.h | 102 #define SI32_UART_A_initialize(basePointer, config, mode, flowcn, control, ipdelay, baudrate, fifoc… argument
124 #define SI32_UART_A_write_config(basePointer, config) \ argument
140 #define SI32_UART_A_read_config(basePointer) \ argument
153 #define SI32_UART_A_enable_rx_start_bit(basePointer) \ argument
166 #define SI32_UART_A_disable_rx_start_bit(basePointer) \ argument
179 #define SI32_UART_A_enable_rx_parity_bit(basePointer) \ argument
192 #define SI32_UART_A_disable_rx_parity_bit(basePointer) \ argument
205 #define SI32_UART_A_enable_rx_stop_bit(basePointer) \ argument
218 #define SI32_UART_A_disable_rx_stop_bit(basePointer) \ argument
241 #define SI32_UART_A_select_rx_stop_bits(basePointer, bits) do{ \ argument
[all …]
|
| D | SI32_UART_A_Type.c | 39 SI32_UART_A_Type * basePointer, in _SI32_UART_A_initialize()
73 SI32_UART_A_Type * basePointer, in _SI32_UART_A_write_config()
88 SI32_UART_A_Type * basePointer) in _SI32_UART_A_read_config()
101 SI32_UART_A_Type * basePointer) in _SI32_UART_A_enable_rx_start_bit()
114 SI32_UART_A_Type * basePointer) in _SI32_UART_A_disable_rx_start_bit()
127 SI32_UART_A_Type * basePointer) in _SI32_UART_A_enable_rx_parity_bit()
140 SI32_UART_A_Type * basePointer) in _SI32_UART_A_disable_rx_parity_bit()
153 SI32_UART_A_Type * basePointer) in _SI32_UART_A_enable_rx_stop_bit()
166 SI32_UART_A_Type * basePointer) in _SI32_UART_A_disable_rx_stop_bit()
181 SI32_UART_A_Type * basePointer, in _SI32_UART_A_select_rx_stop_bits()
[all …]
|
| D | SI32_I2C_A_Type.c | 39 SI32_I2C_A_Type * basePointer, in _SI32_I2C_A_initialize()
76 SI32_I2C_A_Type * basePointer, in _SI32_I2C_A_write_control()
91 SI32_I2C_A_Type * basePointer) in _SI32_I2C_A_read_control()
104 SI32_I2C_A_Type * basePointer) in _SI32_I2C_A_is_busy()
119 SI32_I2C_A_Type * basePointer) in _SI32_I2C_A_is_ack_received()
132 SI32_I2C_A_Type * basePointer) in _SI32_I2C_A_send_ack()
145 SI32_I2C_A_Type * basePointer) in _SI32_I2C_A_send_nack()
158 SI32_I2C_A_Type * basePointer) in _SI32_I2C_A_has_arblost_error_occurred()
171 SI32_I2C_A_Type * basePointer) in _SI32_I2C_A_is_ack_requested()
184 SI32_I2C_A_Type * basePointer) in _SI32_I2C_A_set_stop()
[all …]
|
| D | SI32_I2C_A_Type.h | 108 #define SI32_I2C_A_initialize(basePointer, control, config, saddress, smask, timer, timerrl, sconfi… argument
138 #define SI32_I2C_A_write_control(basePointer, control) \ argument
154 #define SI32_I2C_A_read_control(basePointer) \ argument
167 #define SI32_I2C_A_is_busy(basePointer) \ argument
184 #define SI32_I2C_A_is_ack_received(basePointer) \ argument
197 #define SI32_I2C_A_send_ack(basePointer) \ argument
210 #define SI32_I2C_A_send_nack(basePointer) \ argument
223 #define SI32_I2C_A_has_arblost_error_occurred(basePointer) \ argument
236 #define SI32_I2C_A_is_ack_requested(basePointer) \ argument
249 #define SI32_I2C_A_set_stop(basePointer) \ argument
[all …]
|
| D | SI32_UART_B_Type.c | 39 SI32_UART_B_Type * basePointer, in _SI32_UART_B_initialize()
77 SI32_UART_B_Type * basePointer, in _SI32_UART_B_write_config()
92 SI32_UART_B_Type * basePointer) in _SI32_UART_B_read_config()
105 SI32_UART_B_Type * basePointer) in _SI32_UART_B_enable_rx_start_bit()
118 SI32_UART_B_Type * basePointer) in _SI32_UART_B_disable_rx_start_bit()
131 SI32_UART_B_Type * basePointer) in _SI32_UART_B_enable_rx_parity_bit()
144 SI32_UART_B_Type * basePointer) in _SI32_UART_B_disable_rx_parity_bit()
157 SI32_UART_B_Type * basePointer) in _SI32_UART_B_enable_rx_stop_bit()
170 SI32_UART_B_Type * basePointer) in _SI32_UART_B_disable_rx_stop_bit()
185 SI32_UART_B_Type * basePointer, in _SI32_UART_B_select_rx_stop_bits()
[all …]
|
| D | SI32_UART_B_Type.h | 109 #define SI32_UART_B_initialize(basePointer, config, mode, flowcn, control, ipdelay, baudrate, fifoc… argument
131 #define SI32_UART_B_write_config(basePointer, config) \ argument
147 #define SI32_UART_B_read_config(basePointer) \ argument
160 #define SI32_UART_B_enable_rx_start_bit(basePointer) \ argument
173 #define SI32_UART_B_disable_rx_start_bit(basePointer) \ argument
186 #define SI32_UART_B_enable_rx_parity_bit(basePointer) \ argument
199 #define SI32_UART_B_disable_rx_parity_bit(basePointer) \ argument
212 #define SI32_UART_B_enable_rx_stop_bit(basePointer) \ argument
225 #define SI32_UART_B_disable_rx_stop_bit(basePointer) \ argument
248 #define SI32_UART_B_select_rx_stop_bits(basePointer, bits) do{ \ argument
[all …]
|
| D | SI32_I2S_A_Type.c | 39 SI32_I2S_A_Type * basePointer, in _SI32_I2S_A_initialize()
82 SI32_I2S_A_Type * basePointer) in _SI32_I2S_A_read_txcontrol()
96 SI32_I2S_A_Type * basePointer, in _SI32_I2S_A_write_txcontrol()
110 SI32_I2S_A_Type * basePointer) in _SI32_I2S_A_enable_frame_sync()
123 SI32_I2S_A_Type * basePointer) in _SI32_I2S_A_disable_frame_sync()
137 SI32_I2S_A_Type * basePointer) in _SI32_I2S_A_select_tx_frame_sync_synchronize()
151 SI32_I2S_A_Type * basePointer) in _SI32_I2S_A_select_tx_frame_sync_immediate()
164 SI32_I2S_A_Type * basePointer) in _SI32_I2S_A_select_tx_data_first_rising_edge()
177 SI32_I2S_A_Type * basePointer, in _SI32_I2S_A_select_tx_data_nth_rising_edge()
196 SI32_I2S_A_Type * basePointer) in _SI32_I2S_A_select_tx_unused_data_fill_zeros()
[all …]
|
| D | SI32_I2S_A_Type.h | 121 #define SI32_I2S_A_initialize(basePointer, txcontrol, txmode, fsduty, rxcontrol, rxmode, clkcontrol… argument
137 #define SI32_I2S_A_read_txcontrol(basePointer) \ argument
158 #define SI32_I2S_A_write_txcontrol(basePointer, txcontrol) \ argument
171 #define SI32_I2S_A_enable_frame_sync(basePointer) \ argument
184 #define SI32_I2S_A_disable_frame_sync(basePointer) \ argument
200 #define SI32_I2S_A_select_tx_frame_sync_synchronize(basePointer) \ argument
216 #define SI32_I2S_A_select_tx_frame_sync_immediate(basePointer) \ argument
229 #define SI32_I2S_A_select_tx_data_first_rising_edge(basePointer) \ argument
249 #define SI32_I2S_A_select_tx_data_nth_rising_edge(basePointer, cycles_delay) do{ \ argument
266 #define SI32_I2S_A_select_tx_unused_data_fill_zeros(basePointer) \ argument
[all …]
|
| D | SI32_SPI_B_Type.c | 39 SI32_SPI_B_Type * basePointer, in _SI32_SPI_B_initialize()
62 SI32_SPI_B_Type * basePointer, in _SI32_SPI_B_write_tx_fifo_u32()
78 SI32_SPI_B_Type * basePointer, in _SI32_SPI_B_write_tx_fifo_u16()
95 SI32_SPI_B_Type * basePointer, in _SI32_SPI_B_write_tx_fifo_u8()
112 SI32_SPI_B_Type * basePointer) in _SI32_SPI_B_read_rx_fifo_u32()
126 SI32_SPI_B_Type * basePointer) in _SI32_SPI_B_read_rx_fifo_u16()
140 SI32_SPI_B_Type * basePointer) in _SI32_SPI_B_read_rx_fifo_u8()
154 SI32_SPI_B_Type * basePointer) in _SI32_SPI_B_read_control()
168 SI32_SPI_B_Type * basePointer, in _SI32_SPI_B_write_control()
182 SI32_SPI_B_Type * basePointer) in _SI32_SPI_B_is_rx_fifo_read_request_interrupt_pending()
[all …]
|
| D | SI32_SPI_B_Type.h | 76 #define SI32_SPI_B_initialize(basePointer, control, config, clkrate) do{ \ argument
102 #define SI32_SPI_B_write_tx_fifo_u32(basePointer, data_u32) \ argument
125 #define SI32_SPI_B_write_tx_fifo_u16(basePointer, data_u16) \ argument
148 #define SI32_SPI_B_write_tx_fifo_u8(basePointer, data_u8) \ argument
167 #define SI32_SPI_B_read_rx_fifo_u32(basePointer) \ argument
186 #define SI32_SPI_B_read_rx_fifo_u16(basePointer) \ argument
205 #define SI32_SPI_B_read_rx_fifo_u8(basePointer) \ argument
221 #define SI32_SPI_B_read_control(basePointer) \ argument
243 #define SI32_SPI_B_write_control(basePointer, control) \ argument
259 #define SI32_SPI_B_is_rx_fifo_read_request_interrupt_pending(basePointer) \ argument
[all …]
|
| D | SI32_LCD_A_Type.c | 39 SI32_LCD_A_Type * basePointer) in _SI32_LCD_A_reset_module()
64 SI32_LCD_A_Type * basePointer, in _SI32_LCD_A_initialize_module()
98 SI32_LCD_A_Type * basePointer) in _SI32_LCD_A_enable_module()
112 SI32_LCD_A_Type * basePointer) in _SI32_LCD_A_disable_module()
126 SI32_LCD_A_Type * basePointer) in _SI32_LCD_A_is_module_enabled()
141 SI32_LCD_A_Type * basePointer) in _SI32_LCD_A_select_static_mode()
164 SI32_LCD_A_Type * basePointer) in _SI32_LCD_A_select_2_mux_mode()
189 SI32_LCD_A_Type * basePointer) in _SI32_LCD_A_select_3_mux_mode()
214 SI32_LCD_A_Type * basePointer) in _SI32_LCD_A_select_4_mux_mode()
239 SI32_LCD_A_Type * basePointer) in _SI32_LCD_A_select_auto_contrast_bypass_mode()
[all …]
|
| D | SI32_LCD_A_Type.h | 52 #define SI32_LCD_A_reset_module(basePointer) do{ \ argument
126 #define SI32_LCD_A_initialize_module(basePointer, config0, clock_control, write_blink_control, segm… argument
152 #define SI32_LCD_A_enable_module(basePointer) do{ \ argument
167 #define SI32_LCD_A_disable_module(basePointer) do{ \ argument
182 #define SI32_LCD_A_is_module_enabled(basePointer) \ argument
199 #define SI32_LCD_A_select_static_mode(basePointer) do{ \ argument
222 #define SI32_LCD_A_select_2_mux_mode(basePointer) do{ \ argument
247 #define SI32_LCD_A_select_3_mux_mode(basePointer) do{ \ argument
272 #define SI32_LCD_A_select_4_mux_mode(basePointer) do{ \ argument
297 #define SI32_LCD_A_select_auto_contrast_bypass_mode(basePointer) do{ \ argument
[all …]
|
| D | SI32_SPI_A_Type.c | 39 SI32_SPI_A_Type * basePointer, in _SI32_SPI_A_initialize()
61 SI32_SPI_A_Type * basePointer, in _SI32_SPI_A_write_tx_fifo_u32()
77 SI32_SPI_A_Type * basePointer, in _SI32_SPI_A_write_tx_fifo_u16()
93 SI32_SPI_A_Type * basePointer, in _SI32_SPI_A_write_tx_fifo_u8()
109 SI32_SPI_A_Type * basePointer) in _SI32_SPI_A_read_rx_fifo_u32()
123 SI32_SPI_A_Type * basePointer) in _SI32_SPI_A_read_rx_fifo_u16()
137 SI32_SPI_A_Type * basePointer) in _SI32_SPI_A_read_rx_fifo_u8()
151 SI32_SPI_A_Type * basePointer) in _SI32_SPI_A_read_control()
165 SI32_SPI_A_Type * basePointer, in _SI32_SPI_A_write_control()
179 SI32_SPI_A_Type * basePointer) in _SI32_SPI_A_is_rx_fifo_read_request_interrupt_pending()
[all …]
|
| D | SI32_SPI_A_Type.h | 74 #define SI32_SPI_A_initialize(basePointer, control, config, clkrate) do{ \ argument
100 #define SI32_SPI_A_write_tx_fifo_u32(basePointer, data_u32) \ argument
123 #define SI32_SPI_A_write_tx_fifo_u16(basePointer, data_u16) \ argument
146 #define SI32_SPI_A_write_tx_fifo_u8(basePointer, data_u8) \ argument
165 #define SI32_SPI_A_read_rx_fifo_u32(basePointer) \ argument
184 #define SI32_SPI_A_read_rx_fifo_u16(basePointer) \ argument
203 #define SI32_SPI_A_read_rx_fifo_u8(basePointer) \ argument
219 #define SI32_SPI_A_read_control(basePointer) \ argument
241 #define SI32_SPI_A_write_control(basePointer, control) \ argument
257 #define SI32_SPI_A_is_rx_fifo_read_request_interrupt_pending(basePointer) \ argument
[all …]
|
| D | SI32_TIMER_A_Type.c | 39 SI32_TIMER_A_Type * basePointer, in _SI32_TIMER_A_initialize()
64 SI32_TIMER_A_Type * basePointer, in _SI32_TIMER_A_write_config()
79 SI32_TIMER_A_Type * basePointer) in _SI32_TIMER_A_read_config()
92 SI32_TIMER_A_Type * basePointer) in _SI32_TIMER_A_select_low_clock_source_apb_clock()
106 SI32_TIMER_A_Type * basePointer) in _SI32_TIMER_A_select_low_clock_source_external_oscillator()
120 SI32_TIMER_A_Type * basePointer) in _SI32_TIMER_A_select_low_clock_source_timer_clock_divider()
134 SI32_TIMER_A_Type * basePointer) in _SI32_TIMER_A_select_low_clock_source_external_ct_pin()
148 SI32_TIMER_A_Type * basePointer) in _SI32_TIMER_A_enable_low_clock_master_synchronization()
161 SI32_TIMER_A_Type * basePointer) in _SI32_TIMER_A_disable_low_clock_master_synchronization()
174 SI32_TIMER_A_Type * basePointer) in _SI32_TIMER_A_select_split_timer_mode()
[all …]
|
