/trusted-firmware-a-3.4.0/drivers/arm/gic/v2/ |
D | gicv2_private.h | 30 static inline unsigned int gicd_read_pidr2(uintptr_t base) in gicd_read_pidr2() 38 static inline unsigned int gicd_get_itargetsr(uintptr_t base, unsigned int id) in gicd_get_itargetsr() 43 static inline void gicd_set_itargetsr(uintptr_t base, unsigned int id, in gicd_set_itargetsr() 51 static inline void gicd_write_sgir(uintptr_t base, unsigned int val) in gicd_write_sgir() 60 static inline unsigned int gicc_read_ctlr(uintptr_t base) in gicc_read_ctlr() 65 static inline unsigned int gicc_read_pmr(uintptr_t base) in gicc_read_pmr() 70 static inline unsigned int gicc_read_BPR(uintptr_t base) in gicc_read_BPR() 75 static inline unsigned int gicc_read_IAR(uintptr_t base) in gicc_read_IAR() 80 static inline unsigned int gicc_read_EOIR(uintptr_t base) in gicc_read_EOIR() 85 static inline unsigned int gicc_read_hppir(uintptr_t base) in gicc_read_hppir() [all …]
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D | gicdv2_helpers.c | 21 unsigned int gicd_read_igroupr(uintptr_t base, unsigned int id) in gicd_read_igroupr() 32 unsigned int gicd_read_isenabler(uintptr_t base, unsigned int id) in gicd_read_isenabler() 43 unsigned int gicd_read_icenabler(uintptr_t base, unsigned int id) in gicd_read_icenabler() 54 unsigned int gicd_read_ispendr(uintptr_t base, unsigned int id) in gicd_read_ispendr() 65 unsigned int gicd_read_icpendr(uintptr_t base, unsigned int id) in gicd_read_icpendr() 76 unsigned int gicd_read_isactiver(uintptr_t base, unsigned int id) in gicd_read_isactiver() 87 unsigned int gicd_read_icactiver(uintptr_t base, unsigned int id) in gicd_read_icactiver() 98 unsigned int gicd_read_ipriorityr(uintptr_t base, unsigned int id) in gicd_read_ipriorityr() 109 unsigned int gicd_read_icfgr(uintptr_t base, unsigned int id) in gicd_read_icfgr() 120 unsigned int gicd_read_nsacr(uintptr_t base, unsigned int id) in gicd_read_nsacr() [all …]
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D | gicv2_helpers.c | 22 unsigned int gicd_read_itargetsr(uintptr_t base, unsigned int id) in gicd_read_itargetsr() 32 unsigned int gicd_read_cpendsgir(uintptr_t base, unsigned int id) in gicd_read_cpendsgir() 42 unsigned int gicd_read_spendsgir(uintptr_t base, unsigned int id) in gicd_read_spendsgir() 52 void gicd_write_itargetsr(uintptr_t base, unsigned int id, unsigned int val) in gicd_write_itargetsr() 62 void gicd_write_cpendsgir(uintptr_t base, unsigned int id, unsigned int val) in gicd_write_cpendsgir() 72 void gicd_write_spendsgir(uintptr_t base, unsigned int id, unsigned int val) in gicd_write_spendsgir() 81 unsigned int gicv2_get_cpuif_id(uintptr_t base) in gicv2_get_cpuif_id()
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/trusted-firmware-a-3.4.0/plat/hisilicon/hikey960/drivers/pwrc/ |
D | hisi_pwrc.h | 16 #define SOC_CRGPERIPH_A53_PDCEN_ADDR(base) ((base) + (0x260)) argument 17 #define SOC_CRGPERIPH_MAIA_PDCEN_ADDR(base) ((base) + (0x300)) argument 19 #define SOC_PCTRL_RESOURCE0_LOCK_ADDR(base) ((base) + (0x400)) argument 20 #define SOC_PCTRL_RESOURCE0_UNLOCK_ADDR(base) ((base) + (0x404)) argument 21 #define SOC_PCTRL_RESOURCE0_LOCK_ST_ADDR(base) ((base) + (0x408)) argument 22 #define SOC_PCTRL_RESOURCE1_LOCK_ADDR(base) ((base) + (0x40C)) argument 23 #define SOC_PCTRL_RESOURCE1_UNLOCK_ADDR(base) ((base) + (0x410)) argument 24 #define SOC_PCTRL_RESOURCE1_LOCK_ST_ADDR(base) ((base) + (0x414)) argument 25 #define SOC_PCTRL_RESOURCE2_LOCK_ADDR(base) ((base) + (0x418)) argument 27 #define SOC_SCTRL_SCBAKDATA3_ADDR(base) ((base) + (0x418)) argument [all …]
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/trusted-firmware-a-3.4.0/drivers/arm/gic/v3/ |
D | gicdv3_helpers.c | 22 void gicd_set_icfgr(uintptr_t base, unsigned int id, unsigned int cfg) in gicd_set_icfgr() 37 unsigned int gicd_get_igroupr(uintptr_t base, unsigned int id) in gicd_get_igroupr() 42 void gicd_set_igroupr(uintptr_t base, unsigned int id) in gicd_set_igroupr() 47 void gicd_clr_igroupr(uintptr_t base, unsigned int id) in gicd_clr_igroupr() 56 unsigned int gicd_get_igrpmodr(uintptr_t base, unsigned int id) in gicd_get_igrpmodr() 61 void gicd_set_igrpmodr(uintptr_t base, unsigned int id) in gicd_set_igrpmodr() 66 void gicd_clr_igrpmodr(uintptr_t base, unsigned int id) in gicd_clr_igrpmodr() 75 void gicd_set_icenabler(uintptr_t base, unsigned int id) in gicd_set_icenabler() 84 void gicd_set_icpendr(uintptr_t base, unsigned int id) in gicd_set_icpendr() 93 unsigned int gicd_get_isactiver(uintptr_t base, unsigned int id) in gicd_get_isactiver() [all …]
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D | gicv3_private.h | 69 #define GICD_READ(REG, base, id) \ argument 72 #define GICD_READ_64(REG, base, id) \ argument 75 #define GICD_WRITE_8(REG, base, id, val) \ argument 78 #define GICD_WRITE(REG, base, id, val) \ argument 81 #define GICD_WRITE_64(REG, base, id, val) \ argument 89 #define GICD_GET_BIT(REG, base, id) \ argument 94 #define GICD_SET_BIT(REG, base, id) \ argument 99 #define GICD_CLR_BIT(REG, base, id) \ argument 104 #define GICD_WRITE_BIT(REG, base, id) \ argument 133 #define GICR_READ(REG, base, id) \ argument [all …]
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D | gic600ae_fmu_helpers.c | 19 #define GIC_FMU_WRITE_32(base, reg, val) \ argument 31 #define GIC_FMU_WRITE_64(base, reg, n, val) \ argument 47 static void wait_until_fmu_is_idle(uintptr_t base) in wait_until_fmu_is_idle() 66 #define GIC_FMU_WRITE_ON_IDLE_32(base, reg, val) \ argument 76 #define GIC_FMU_WRITE_ON_IDLE_64(base, reg, n, val) \ argument 94 uint64_t gic_fmu_read_errfr(uintptr_t base, unsigned int n) in gic_fmu_read_errfr() 110 uint64_t gic_fmu_read_errctlr(uintptr_t base, unsigned int n) in gic_fmu_read_errctlr() 126 uint64_t gic_fmu_read_errstatus(uintptr_t base, unsigned int n) in gic_fmu_read_errstatus() 141 uint64_t gic_fmu_read_errgsr(uintptr_t base) in gic_fmu_read_errgsr() 156 uint32_t gic_fmu_read_pingctlr(uintptr_t base) in gic_fmu_read_pingctlr() [all …]
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D | gicrv3_helpers.c | 24 unsigned int gicr_read_ipriorityr(uintptr_t base, unsigned int id) in gicr_read_ipriorityr() 29 void gicr_write_ipriorityr(uintptr_t base, unsigned int id, unsigned int val) in gicr_write_ipriorityr() 38 void gicr_set_ipriorityr(uintptr_t base, unsigned int id, unsigned int pri) in gicr_set_ipriorityr() 47 unsigned int gicr_get_igroupr(uintptr_t base, unsigned int id) in gicr_get_igroupr() 52 void gicr_set_igroupr(uintptr_t base, unsigned int id) in gicr_set_igroupr() 57 void gicr_clr_igroupr(uintptr_t base, unsigned int id) in gicr_clr_igroupr() 66 unsigned int gicr_get_igrpmodr(uintptr_t base, unsigned int id) in gicr_get_igrpmodr() 71 void gicr_set_igrpmodr(uintptr_t base, unsigned int id) in gicr_set_igrpmodr() 76 void gicr_clr_igrpmodr(uintptr_t base, unsigned int id) in gicr_clr_igrpmodr() 85 void gicr_set_isenabler(uintptr_t base, unsigned int id) in gicr_set_isenabler() [all …]
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D | gic600ae_fmu.c | 161 int gic600_fmu_probe(uint64_t base, int *probe_data) in gic600_fmu_probe() 187 int gic600_fmu_ras_handler(uint64_t base, int probe_data) in gic600_fmu_ras_handler() 254 void gic600_fmu_init(uint64_t base, uint64_t blk_present_mask, in gic600_fmu_init() 350 void gic600_fmu_enable_ping(uint64_t base, uint64_t blk_present_mask, in gic600_fmu_enable_ping() 363 void gic600_fmu_print_sm_info(uint64_t base, unsigned int blk, unsigned int smid) in gic600_fmu_print_sm_info()
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D | gic-x00.c | 50 static void gicr_write_pwrr(uintptr_t base, unsigned int val) in gicr_write_pwrr() 55 static uint32_t gicr_read_pwrr(uintptr_t base) in gicr_read_pwrr() 60 static void gicr_wait_group_not_in_transit(uintptr_t base) in gicr_wait_group_not_in_transit() 72 static void gic600_pwr_on(uintptr_t base) in gic600_pwr_on() 87 static void gic600_pwr_off(uintptr_t base) in gic600_pwr_off()
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/trusted-firmware-a-3.4.0/drivers/arm/gic/common/ |
D | gic_common.c | 23 unsigned int gicd_read_igroupr(uintptr_t base, unsigned int id) in gicd_read_igroupr() 34 unsigned int gicd_read_isenabler(uintptr_t base, unsigned int id) in gicd_read_isenabler() 45 unsigned int gicd_read_icenabler(uintptr_t base, unsigned int id) in gicd_read_icenabler() 56 unsigned int gicd_read_ispendr(uintptr_t base, unsigned int id) in gicd_read_ispendr() 67 unsigned int gicd_read_icpendr(uintptr_t base, unsigned int id) in gicd_read_icpendr() 78 unsigned int gicd_read_isactiver(uintptr_t base, unsigned int id) in gicd_read_isactiver() 89 unsigned int gicd_read_icactiver(uintptr_t base, unsigned int id) in gicd_read_icactiver() 100 unsigned int gicd_read_ipriorityr(uintptr_t base, unsigned int id) in gicd_read_ipriorityr() 111 unsigned int gicd_read_icfgr(uintptr_t base, unsigned int id) in gicd_read_icfgr() 122 unsigned int gicd_read_nsacr(uintptr_t base, unsigned int id) in gicd_read_nsacr() [all …]
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D | gic_common_private.h | 18 static inline unsigned int gicd_read_ctlr(uintptr_t base) in gicd_read_ctlr() 23 static inline unsigned int gicd_read_typer(uintptr_t base) in gicd_read_typer() 28 static inline unsigned int gicd_read_iidr(uintptr_t base) in gicd_read_iidr() 33 static inline void gicd_write_ctlr(uintptr_t base, unsigned int val) in gicd_write_ctlr()
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/trusted-firmware-a-3.4.0/drivers/arm/sp805/ |
D | sp805.c | 14 static inline void sp805_write_wdog_load(uintptr_t base, uint32_t value) in sp805_write_wdog_load() 19 static inline void sp805_write_wdog_ctrl(uintptr_t base, uint32_t value) in sp805_write_wdog_ctrl() 24 static inline void sp805_write_wdog_lock(uintptr_t base, uint32_t value) in sp805_write_wdog_lock() 32 void sp805_start(uintptr_t base, unsigned int ticks) in sp805_start() 40 void sp805_stop(uintptr_t base) in sp805_stop() 46 void sp805_refresh(uintptr_t base, unsigned int ticks) in sp805_refresh()
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/trusted-firmware-a-3.4.0/plat/imx/common/sci/ |
D | imx8_mu.c | 11 void MU_Resume(uint32_t base) in MU_Resume() 26 void MU_EnableRxFullInt(uint32_t base, uint32_t index) in MU_EnableRxFullInt() 35 void MU_EnableGeneralInt(uint32_t base, uint32_t index) in MU_EnableGeneralInt() 44 void MU_SendMessage(uint32_t base, uint32_t regIndex, uint32_t msg) in MU_SendMessage() 54 void MU_ReceiveMsg(uint32_t base, uint32_t regIndex, uint32_t *msg) in MU_ReceiveMsg() 64 void MU_Init(uint32_t base) in MU_Init()
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D | ipc.c | 36 uint32_t base = id; in sc_ipc_open() local 61 uint32_t base = ipc; in sc_ipc_close() local 69 uint32_t base = ipc; in sc_ipc_read() local 98 uint32_t base = ipc; in sc_ipc_write() local
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/trusted-firmware-a-3.4.0/drivers/arm/tzc/ |
D | tzc380.c | 15 uintptr_t base; member 22 static unsigned int tzc380_read_build_config(uintptr_t base) in tzc380_read_build_config() 27 static void tzc380_write_action(uintptr_t base, unsigned int action) in tzc380_write_action() 32 static void tzc380_write_region_base_low(uintptr_t base, unsigned int region, in tzc380_write_region_base_low() 38 static void tzc380_write_region_base_high(uintptr_t base, unsigned int region, in tzc380_write_region_base_high() 44 static void tzc380_write_region_attributes(uintptr_t base, unsigned int region, in tzc380_write_region_attributes() 50 void tzc380_init(uintptr_t base) in tzc380_init()
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D | tzc400.c | 34 uintptr_t base; member 42 static inline unsigned int _tzc400_read_build_config(uintptr_t base) in _tzc400_read_build_config() 47 static inline unsigned int _tzc400_read_gate_keeper(uintptr_t base) in _tzc400_read_gate_keeper() 52 static inline void _tzc400_write_gate_keeper(uintptr_t base, unsigned int val) in _tzc400_write_gate_keeper() 75 static void _tzc400_clear_it(uintptr_t base, uint32_t filter) in _tzc400_clear_it() 80 static uint32_t _tzc400_get_int_by_filter(uintptr_t base, uint32_t filter) in _tzc400_get_int_by_filter() 86 static unsigned long _tzc400_get_fail_address(uintptr_t base, uint32_t filter) in _tzc400_get_fail_address() 100 static uint32_t _tzc400_get_fail_id(uintptr_t base, uint32_t filter) in _tzc400_get_fail_id() 105 static uint32_t _tzc400_get_fail_control(uintptr_t base, uint32_t filter) in _tzc400_get_fail_control() 110 static void _tzc400_dump_fail_filter(uintptr_t base, uint32_t filter) in _tzc400_dump_fail_filter() [all …]
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/trusted-firmware-a-3.4.0/drivers/arm/sbsa/ |
D | sbsa.c | 13 void sbsa_watchdog_offset_reg_write(uintptr_t base, uint64_t value) in sbsa_watchdog_offset_reg_write() 26 void sbsa_wdog_start(uintptr_t base, uint64_t ms) in sbsa_wdog_start() 39 void sbsa_wdog_stop(uintptr_t base) in sbsa_wdog_stop()
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/trusted-firmware-a-3.4.0/plat/marvell/armada/a8k/common/mss/ |
D | mss_defs.h | 11 #define MSS_DMA_SRCBR(base) (base + 0xC0) argument 12 #define MSS_DMA_DSTBR(base) (base + 0xC4) argument 13 #define MSS_DMA_CTRLR(base) (base + 0xC8) argument 14 #define MSS_M3_RSTCR(base) (base + 0xFC) argument
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/trusted-firmware-a-3.4.0/plat/socionext/uniphier/ |
D | uniphier_console_setup.c | 49 uintptr_t base, end; in uniphier_console_get_base() local 66 static void uniphier_console_init(uintptr_t base) in uniphier_console_init() 75 uintptr_t base; in uniphier_console_setup() local
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/trusted-firmware-a-3.4.0/drivers/arm/scu/ |
D | scu.c | 17 void enable_snoop_ctrl_unit(uintptr_t base) in enable_snoop_ctrl_unit() 46 uint32_t read_snoop_ctrl_unit_cfg(uintptr_t base) in read_snoop_ctrl_unit_cfg()
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/trusted-firmware-a-3.4.0/drivers/brcm/ |
D | ocotp.c | 59 uint32_t base; member 69 uint32_t base; member 77 static inline void set_command(uint32_t base, uint32_t command) in set_command() 82 static inline void set_cpu_address(uint32_t base, uint32_t addr) in set_cpu_address() 87 static inline void set_start_bit(uint32_t base) in set_start_bit() 92 static inline void reset_start_bit(uint32_t base) in reset_start_bit() 97 static inline void write_cpu_data(uint32_t base, uint32_t value) in write_cpu_data() 102 static int poll_cpu_status(uint32_t base, uint32_t value) in poll_cpu_status()
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/trusted-firmware-a-3.4.0/plat/mediatek/mt8183/drivers/devapc/ |
D | devapc.c | 15 uintptr_t base; in set_master_transaction() local 34 uintptr_t base; in set_master_domain() local 52 uintptr_t base; in set_master_domain_remap_infra() local 82 uintptr_t base; in set_master_domain_remap_mm() local 97 uintptr_t base; in set_module_apc() local
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/trusted-firmware-a-3.4.0/plat/marvell/armada/common/ |
D | marvell_ddr_info.c | 15 #define DRAM_CH0_MMAP_LOW_REG(iface, cs, base) \ argument 17 #define DRAM_CH0_MMAP_HIGH_REG(iface, cs, base) \ argument 29 #define DRAM_CS_ENABLED(iface, cs, base) \ argument 32 #define GET_DRAM_REGION_SIZE_CODE(iface, cs, base) \ argument
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/trusted-firmware-a-3.4.0/plat/marvell/armada/a3k/common/ |
D | io_addr_dec.c | 14 #define MVEBU_DEC_WIN_CTRL_REG(base, win, off) (MVEBU_REGS_BASE + (base) + \ argument 16 #define MVEBU_DEC_WIN_BASE_REG(base, win, off) (MVEBU_REGS_BASE + (base) + \ argument 18 #define MVEBU_DEC_WIN_REMAP_REG(base, win, off) (MVEBU_REGS_BASE + (base) + \ argument 41 uint32_t base = 0; in set_io_addr_dec_win() local
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