1 /**
2 ******************************************************************************
3 * @file asm330lhh_reg.c
4 * @author Sensors Software Solution Team
5 * @brief ASM330LHH driver file
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>© Copyright (c) 2021 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19
20 #include "asm330lhh_reg.h"
21
22 /**
23 * @defgroup ASM330LHH
24 * @brief This file provides a set of functions needed to drive the
25 * asm330lhh enhanced inertial module.
26 * @{
27 *
28 */
29
30 /**
31 * @defgroup ASM330LHH_Interfaces_Functions
32 * @brief This section provide a set of functions used to read and
33 * write a generic register of the device.
34 * MANDATORY: return 0 -> no Error.
35 * @{
36 *
37 */
38
39 /**
40 * @brief Read generic device register
41 *
42 * @param ctx read / write interface definitions(ptr)
43 * @param reg register to read
44 * @param data pointer to buffer that store the data read(ptr)
45 * @param len number of consecutive register to read
46 * @retval interface status (MANDATORY: return 0 -> no Error)
47 *
48 */
asm330lhh_read_reg(stmdev_ctx_t * ctx,uint8_t reg,uint8_t * data,uint16_t len)49 int32_t __weak asm330lhh_read_reg(stmdev_ctx_t *ctx, uint8_t reg,
50 uint8_t *data,
51 uint16_t len)
52 {
53 int32_t ret;
54
55 ret = ctx->read_reg(ctx->handle, reg, data, len);
56
57 return ret;
58 }
59
60 /**
61 * @brief Write generic device register
62 *
63 * @param ctx read / write interface definitions(ptr)
64 * @param reg register to write
65 * @param data pointer to data to write in register reg(ptr)
66 * @param len number of consecutive register to write
67 * @retval interface status (MANDATORY: return 0 -> no Error)
68 *
69 */
asm330lhh_write_reg(stmdev_ctx_t * ctx,uint8_t reg,uint8_t * data,uint16_t len)70 int32_t __weak asm330lhh_write_reg(stmdev_ctx_t *ctx, uint8_t reg,
71 uint8_t *data,
72 uint16_t len)
73 {
74 int32_t ret;
75
76 ret = ctx->write_reg(ctx->handle, reg, data, len);
77
78 return ret;
79 }
80
81 /**
82 * @}
83 *
84 */
85
86 /**
87 * @defgroup ASM330LHH_Sensitivity
88 * @brief These functions convert raw-data into engineering units.
89 * @{
90 *
91 */
92
asm330lhh_from_fs2g_to_mg(int16_t lsb)93 float_t asm330lhh_from_fs2g_to_mg(int16_t lsb)
94 {
95 return ((float_t)lsb * 0.061f);
96 }
97
asm330lhh_from_fs4g_to_mg(int16_t lsb)98 float_t asm330lhh_from_fs4g_to_mg(int16_t lsb)
99 {
100 return ((float_t)lsb * 0.122f);
101 }
102
asm330lhh_from_fs8g_to_mg(int16_t lsb)103 float_t asm330lhh_from_fs8g_to_mg(int16_t lsb)
104 {
105 return ((float_t)lsb * 0.244f);
106 }
107
asm330lhh_from_fs16g_to_mg(int16_t lsb)108 float_t asm330lhh_from_fs16g_to_mg(int16_t lsb)
109 {
110 return ((float_t)lsb * 0.488f);
111 }
112
asm330lhh_from_fs125dps_to_mdps(int16_t lsb)113 float_t asm330lhh_from_fs125dps_to_mdps(int16_t lsb)
114 {
115 return ((float_t)lsb * 4.375f);
116 }
117
asm330lhh_from_fs250dps_to_mdps(int16_t lsb)118 float_t asm330lhh_from_fs250dps_to_mdps(int16_t lsb)
119 {
120 return ((float_t)lsb * 8.75f);
121 }
122
asm330lhh_from_fs500dps_to_mdps(int16_t lsb)123 float_t asm330lhh_from_fs500dps_to_mdps(int16_t lsb)
124 {
125 return ((float_t)lsb * 17.50f);
126 }
127
asm330lhh_from_fs1000dps_to_mdps(int16_t lsb)128 float_t asm330lhh_from_fs1000dps_to_mdps(int16_t lsb)
129 {
130 return ((float_t)lsb * 35.0f);
131 }
132
asm330lhh_from_fs2000dps_to_mdps(int16_t lsb)133 float_t asm330lhh_from_fs2000dps_to_mdps(int16_t lsb)
134 {
135 return ((float_t)lsb * 70.0f);
136 }
137
asm330lhh_from_fs4000dps_to_mdps(int16_t lsb)138 float_t asm330lhh_from_fs4000dps_to_mdps(int16_t lsb)
139 {
140 return ((float_t)lsb * 140.0f);
141 }
142
asm330lhh_from_lsb_to_celsius(int16_t lsb)143 float_t asm330lhh_from_lsb_to_celsius(int16_t lsb)
144 {
145 return (((float_t)lsb / 256.0f) + 25.0f);
146 }
147
asm330lhh_from_lsb_to_nsec(int32_t lsb)148 float_t asm330lhh_from_lsb_to_nsec(int32_t lsb)
149 {
150 return ((float_t)lsb * 25000.0f);
151 }
152
153 /**
154 * @}
155 *
156 */
157
158 /**
159 * @defgroup LSM9DS1_Data_generation
160 * @brief This section groups all the functions concerning data
161 * generation
162 * @{
163 *
164 */
165
166 /**
167 * @brief Accelerometer full-scale selection[set]
168 *
169 * @param ctx Read / write interface definitions.(ptr)
170 * @param val Change the values of fs_xl in reg CTRL1_XL
171 * @retval Interface status (MANDATORY: return 0 -> no Error).
172 *
173 */
asm330lhh_xl_full_scale_set(stmdev_ctx_t * ctx,asm330lhh_fs_xl_t val)174 int32_t asm330lhh_xl_full_scale_set(stmdev_ctx_t *ctx,
175 asm330lhh_fs_xl_t val)
176 {
177 asm330lhh_ctrl1_xl_t ctrl1_xl;
178 int32_t ret;
179
180 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL1_XL,
181 (uint8_t *)&ctrl1_xl, 1);
182
183 if (ret == 0)
184 {
185 ctrl1_xl.fs_xl = (uint8_t)val;
186 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL1_XL,
187 (uint8_t *)&ctrl1_xl, 1);
188 }
189
190 return ret;
191 }
192
193 /**
194 * @brief Accelerometer full-scale selection.[get]
195 *
196 * @param ctx Read / write interface definitions.(ptr)
197 * @param val Get the values of fs_xl in reg CTRL1_XL
198 * @retval Interface status (MANDATORY: return 0 -> no Error).
199 *
200 */
asm330lhh_xl_full_scale_get(stmdev_ctx_t * ctx,asm330lhh_fs_xl_t * val)201 int32_t asm330lhh_xl_full_scale_get(stmdev_ctx_t *ctx,
202 asm330lhh_fs_xl_t *val)
203 {
204 asm330lhh_ctrl1_xl_t ctrl1_xl;
205 int32_t ret;
206
207 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL1_XL,
208 (uint8_t *)&ctrl1_xl, 1);
209
210 switch (ctrl1_xl.fs_xl)
211 {
212 case ASM330LHH_2g:
213 *val = ASM330LHH_2g;
214 break;
215
216 case ASM330LHH_16g:
217 *val = ASM330LHH_16g;
218 break;
219
220 case ASM330LHH_4g:
221 *val = ASM330LHH_4g;
222 break;
223
224 case ASM330LHH_8g:
225 *val = ASM330LHH_8g;
226 break;
227
228 default:
229 *val = ASM330LHH_2g;
230 break;
231 }
232
233 return ret;
234 }
235
236 /**
237 * @brief Accelerometer UI data rate selection.[set]
238 *
239 * @param ctx Read / write interface definitions.(ptr)
240 * @param val Change the values of odr_xl in reg CTRL1_XL
241 * @retval Interface status (MANDATORY: return 0 -> no Error).
242 *
243 */
asm330lhh_xl_data_rate_set(stmdev_ctx_t * ctx,asm330lhh_odr_xl_t val)244 int32_t asm330lhh_xl_data_rate_set(stmdev_ctx_t *ctx,
245 asm330lhh_odr_xl_t val)
246 {
247 asm330lhh_ctrl1_xl_t ctrl1_xl;
248 int32_t ret;
249
250 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL1_XL,
251 (uint8_t *)&ctrl1_xl, 1);
252
253 if (ret == 0)
254 {
255 ctrl1_xl.odr_xl = (uint8_t)val;
256 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL1_XL,
257 (uint8_t *)&ctrl1_xl, 1);
258 }
259
260 return ret;
261 }
262
263 /**
264 * @brief Accelerometer UI data rate selection.[get]
265 *
266 * @param ctx Read / write interface definitions.(ptr)
267 * @param val Get the values of odr_xl in reg CTRL1_XL
268 * @retval Interface status (MANDATORY: return 0 -> no Error).
269 *
270 */
asm330lhh_xl_data_rate_get(stmdev_ctx_t * ctx,asm330lhh_odr_xl_t * val)271 int32_t asm330lhh_xl_data_rate_get(stmdev_ctx_t *ctx,
272 asm330lhh_odr_xl_t *val)
273 {
274 asm330lhh_ctrl1_xl_t ctrl1_xl;
275 int32_t ret;
276
277 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL1_XL,
278 (uint8_t *)&ctrl1_xl, 1);
279
280 switch (ctrl1_xl.odr_xl)
281 {
282 case ASM330LHH_XL_ODR_OFF:
283 *val = ASM330LHH_XL_ODR_OFF;
284 break;
285
286 case ASM330LHH_XL_ODR_12Hz5:
287 *val = ASM330LHH_XL_ODR_12Hz5;
288 break;
289
290 case ASM330LHH_XL_ODR_26Hz:
291 *val = ASM330LHH_XL_ODR_26Hz;
292 break;
293
294 case ASM330LHH_XL_ODR_52Hz:
295 *val = ASM330LHH_XL_ODR_52Hz;
296 break;
297
298 case ASM330LHH_XL_ODR_104Hz:
299 *val = ASM330LHH_XL_ODR_104Hz;
300 break;
301
302 case ASM330LHH_XL_ODR_208Hz:
303 *val = ASM330LHH_XL_ODR_208Hz;
304 break;
305
306 case ASM330LHH_XL_ODR_417Hz:
307 *val = ASM330LHH_XL_ODR_417Hz;
308 break;
309
310 case ASM330LHH_XL_ODR_833Hz:
311 *val = ASM330LHH_XL_ODR_833Hz;
312 break;
313
314 case ASM330LHH_XL_ODR_1667Hz:
315 *val = ASM330LHH_XL_ODR_1667Hz;
316 break;
317
318 case ASM330LHH_XL_ODR_3333Hz:
319 *val = ASM330LHH_XL_ODR_3333Hz;
320 break;
321
322 case ASM330LHH_XL_ODR_6667Hz:
323 *val = ASM330LHH_XL_ODR_6667Hz;
324 break;
325
326 default:
327 *val = ASM330LHH_XL_ODR_OFF;
328 break;
329 }
330
331 return ret;
332 }
333
334 /**
335 * @brief Gyroscope UI chain full-scale selection.[set]
336 *
337 * @param ctx Read / write interface definitions.(ptr)
338 * @param val Change the values of fs_g in reg CTRL2_G
339 * @retval Interface status (MANDATORY: return 0 -> no Error).
340 *
341 */
asm330lhh_gy_full_scale_set(stmdev_ctx_t * ctx,asm330lhh_fs_g_t val)342 int32_t asm330lhh_gy_full_scale_set(stmdev_ctx_t *ctx,
343 asm330lhh_fs_g_t val)
344 {
345 asm330lhh_ctrl2_g_t ctrl2_g;
346 int32_t ret;
347
348 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL2_G, (uint8_t *)&ctrl2_g, 1);
349
350 if (ret == 0)
351 {
352 ctrl2_g.fs_g = (uint8_t)val;
353 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL2_G, (uint8_t *)&ctrl2_g, 1);
354 }
355
356 return ret;
357 }
358
359 /**
360 * @brief Gyroscope UI chain full-scale selection.[get]
361 *
362 * @param ctx Read / write interface definitions.(ptr)
363 * @param val Get the values of fs_g in reg CTRL2_G
364 * @retval Interface status (MANDATORY: return 0 -> no Error).
365 *
366 */
asm330lhh_gy_full_scale_get(stmdev_ctx_t * ctx,asm330lhh_fs_g_t * val)367 int32_t asm330lhh_gy_full_scale_get(stmdev_ctx_t *ctx,
368 asm330lhh_fs_g_t *val)
369 {
370 asm330lhh_ctrl2_g_t ctrl2_g;
371 int32_t ret;
372
373 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL2_G, (uint8_t *)&ctrl2_g, 1);
374
375 switch (ctrl2_g.fs_g)
376 {
377 case ASM330LHH_125dps:
378 *val = ASM330LHH_125dps;
379 break;
380
381 case ASM330LHH_250dps:
382 *val = ASM330LHH_250dps;
383 break;
384
385 case ASM330LHH_500dps:
386 *val = ASM330LHH_500dps;
387 break;
388
389 case ASM330LHH_1000dps:
390 *val = ASM330LHH_1000dps;
391 break;
392
393 case ASM330LHH_2000dps:
394 *val = ASM330LHH_2000dps;
395 break;
396
397 case ASM330LHH_4000dps:
398 *val = ASM330LHH_4000dps;
399 break;
400
401 default:
402 *val = ASM330LHH_125dps;
403 break;
404 }
405
406 return ret;
407 }
408
409 /**
410 * @brief Gyroscope data rate.[set]
411 *
412 * @param ctx Read / write interface definitions.(ptr)
413 * @param val Change the values of odr_g in reg CTRL2_G
414 * @retval Interface status (MANDATORY: return 0 -> no Error).
415 *
416 */
asm330lhh_gy_data_rate_set(stmdev_ctx_t * ctx,asm330lhh_odr_g_t val)417 int32_t asm330lhh_gy_data_rate_set(stmdev_ctx_t *ctx,
418 asm330lhh_odr_g_t val)
419 {
420 asm330lhh_ctrl2_g_t ctrl2_g;
421 int32_t ret;
422
423 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL2_G, (uint8_t *)&ctrl2_g, 1);
424
425 if (ret == 0)
426 {
427 ctrl2_g.odr_g = (uint8_t)val;
428 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL2_G, (uint8_t *)&ctrl2_g, 1);
429 }
430
431 return ret;
432 }
433
434 /**
435 * @brief Gyroscope data rate.[get]
436 *
437 * @param ctx Read / write interface definitions.(ptr)
438 * @param val Get the values of odr_g in reg CTRL2_G
439 * @retval Interface status (MANDATORY: return 0 -> no Error).
440 *
441 */
asm330lhh_gy_data_rate_get(stmdev_ctx_t * ctx,asm330lhh_odr_g_t * val)442 int32_t asm330lhh_gy_data_rate_get(stmdev_ctx_t *ctx,
443 asm330lhh_odr_g_t *val)
444 {
445 asm330lhh_ctrl2_g_t ctrl2_g;
446 int32_t ret;
447
448 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL2_G, (uint8_t *)&ctrl2_g, 1);
449
450 switch (ctrl2_g.odr_g)
451 {
452 case ASM330LHH_GY_ODR_OFF:
453 *val = ASM330LHH_GY_ODR_OFF;
454 break;
455
456 case ASM330LHH_GY_ODR_12Hz5:
457 *val = ASM330LHH_GY_ODR_12Hz5;
458 break;
459
460 case ASM330LHH_GY_ODR_26Hz:
461 *val = ASM330LHH_GY_ODR_26Hz;
462 break;
463
464 case ASM330LHH_GY_ODR_52Hz:
465 *val = ASM330LHH_GY_ODR_52Hz;
466 break;
467
468 case ASM330LHH_GY_ODR_104Hz:
469 *val = ASM330LHH_GY_ODR_104Hz;
470 break;
471
472 case ASM330LHH_GY_ODR_208Hz:
473 *val = ASM330LHH_GY_ODR_208Hz;
474 break;
475
476 case ASM330LHH_GY_ODR_417Hz:
477 *val = ASM330LHH_GY_ODR_417Hz;
478 break;
479
480 case ASM330LHH_GY_ODR_833Hz:
481 *val = ASM330LHH_GY_ODR_833Hz;
482 break;
483
484 case ASM330LHH_GY_ODR_1667Hz:
485 *val = ASM330LHH_GY_ODR_1667Hz;
486 break;
487
488 case ASM330LHH_GY_ODR_3333Hz:
489 *val = ASM330LHH_GY_ODR_3333Hz;
490 break;
491
492 case ASM330LHH_GY_ODR_6667Hz:
493 *val = ASM330LHH_GY_ODR_6667Hz;
494 break;
495
496 default:
497 *val = ASM330LHH_GY_ODR_OFF;
498 break;
499 }
500
501 return ret;
502 }
503
504 /**
505 * @brief Block data update.[set]
506 *
507 * @param ctx Read / write interface definitions.(ptr)
508 * @param val Change the values of bdu in reg CTRL3_C
509 * @retval Interface status (MANDATORY: return 0 -> no Error).
510 *
511 */
asm330lhh_block_data_update_set(stmdev_ctx_t * ctx,uint8_t val)512 int32_t asm330lhh_block_data_update_set(stmdev_ctx_t *ctx,
513 uint8_t val)
514 {
515 asm330lhh_ctrl3_c_t ctrl3_c;
516 int32_t ret;
517
518 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
519
520 if (ret == 0)
521 {
522 ctrl3_c.bdu = (uint8_t)val;
523 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
524 }
525
526 return ret;
527 }
528
529 /**
530 * @brief Block data update.[get]
531 *
532 * @param ctx Read / write interface definitions.(ptr)
533 * @param val Change the values of bdu in reg CTRL3_C
534 * @retval Interface status (MANDATORY: return 0 -> no Error).
535 *
536 */
asm330lhh_block_data_update_get(stmdev_ctx_t * ctx,uint8_t * val)537 int32_t asm330lhh_block_data_update_get(stmdev_ctx_t *ctx,
538 uint8_t *val)
539 {
540 asm330lhh_ctrl3_c_t ctrl3_c;
541 int32_t ret;
542
543 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
544 *val = ctrl3_c.bdu;
545
546 return ret;
547 }
548
549 /**
550 * @brief Weight of XL user offset bits of registers X_OFS_USR (73h),
551 * Y_OFS_USR (74h), Z_OFS_USR (75h).[set]
552 *
553 * @param ctx Read / write interface definitions.(ptr)
554 * @param val Change the values of usr_off_w in reg CTRL6_C
555 * @retval Interface status (MANDATORY: return 0 -> no Error).
556 *
557 */
asm330lhh_xl_offset_weight_set(stmdev_ctx_t * ctx,asm330lhh_usr_off_w_t val)558 int32_t asm330lhh_xl_offset_weight_set(stmdev_ctx_t *ctx,
559 asm330lhh_usr_off_w_t val)
560 {
561 asm330lhh_ctrl6_c_t ctrl6_c;
562 int32_t ret;
563
564 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL6_C, (uint8_t *)&ctrl6_c, 1);
565
566 if (ret == 0)
567 {
568 ctrl6_c.usr_off_w = (uint8_t)val;
569 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL6_C, (uint8_t *)&ctrl6_c, 1);
570 }
571
572 return ret;
573 }
574
575 /**
576 * @brief Weight of XL user offset bits of registers X_OFS_USR (73h),
577 * Y_OFS_USR (74h), Z_OFS_USR (75h).[get]
578 *
579 * @param ctx Read / write interface definitions.(ptr)
580 * @param val Get the values of usr_off_w in reg CTRL6_C
581 * @retval Interface status (MANDATORY: return 0 -> no Error).
582 *
583 */
asm330lhh_xl_offset_weight_get(stmdev_ctx_t * ctx,asm330lhh_usr_off_w_t * val)584 int32_t asm330lhh_xl_offset_weight_get(stmdev_ctx_t *ctx,
585 asm330lhh_usr_off_w_t *val)
586 {
587 asm330lhh_ctrl6_c_t ctrl6_c;
588 int32_t ret;
589
590 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL6_C, (uint8_t *)&ctrl6_c, 1);
591
592 switch (ctrl6_c.usr_off_w)
593 {
594 case ASM330LHH_LSb_1mg:
595 *val = ASM330LHH_LSb_1mg;
596 break;
597
598 case ASM330LHH_LSb_16mg:
599 *val = ASM330LHH_LSb_16mg;
600 break;
601
602 default:
603 *val = ASM330LHH_LSb_1mg;
604 break;
605 }
606
607 return ret;
608 }
609
610 /**
611 * @brief Read all the interrupt flag of the device.
612 *[get]
613 * @param ctx Read / write interface definitions.(ptr)
614 * @param val Get registers ALL_INT_SRC; WAKE_UP_SRC;
615 * D6D_SRC; STATUS_REG;
616 * EMB_FUNC_STATUS; FSM_STATUS_A/B
617 * @retval Interface status (MANDATORY: return 0 -> no Error).
618 *
619 */
asm330lhh_all_sources_get(stmdev_ctx_t * ctx,asm330lhh_all_sources_t * val)620 int32_t asm330lhh_all_sources_get(stmdev_ctx_t *ctx,
621 asm330lhh_all_sources_t *val)
622 {
623 int32_t ret;
624
625 ret = asm330lhh_read_reg(ctx, ASM330LHH_ALL_INT_SRC,
626 (uint8_t *)&val->all_int_src, 1);
627
628 if (ret == 0)
629 {
630 ret = asm330lhh_read_reg(ctx, ASM330LHH_WAKE_UP_SRC,
631 (uint8_t *)&val->wake_up_src, 1);
632 }
633
634 if (ret == 0)
635 {
636 ret = asm330lhh_read_reg(ctx, ASM330LHH_D6D_SRC,
637 (uint8_t *)&val->d6d_src, 1);
638 }
639
640 if (ret == 0)
641 {
642 ret = asm330lhh_read_reg(ctx, ASM330LHH_STATUS_REG,
643 (uint8_t *)&val->status_reg, 1);
644 }
645
646 return ret;
647 }
648
649 /**
650 * @brief The STATUS_REG register is read by the primary interface.[get]
651 *
652 * @param ctx Read / write interface definitions.(ptr)
653 * @param val Get register STATUS_REG
654 * @retval Interface status (MANDATORY: return 0 -> no Error).
655 *
656 */
asm330lhh_status_reg_get(stmdev_ctx_t * ctx,asm330lhh_status_reg_t * val)657 int32_t asm330lhh_status_reg_get(stmdev_ctx_t *ctx,
658 asm330lhh_status_reg_t *val)
659 {
660 int32_t ret;
661
662 ret = asm330lhh_read_reg(ctx, ASM330LHH_STATUS_REG, (uint8_t *) val, 1);
663
664 return ret;
665 }
666
667 /**
668 * @brief Accelerometer new data available.[get]
669 *
670 * @param ctx Read / write interface definitions.(ptr)
671 * @param val Change the values of xlda in reg STATUS_REG
672 * @retval Interface status (MANDATORY: return 0 -> no Error).
673 *
674 */
asm330lhh_xl_flag_data_ready_get(stmdev_ctx_t * ctx,uint8_t * val)675 int32_t asm330lhh_xl_flag_data_ready_get(stmdev_ctx_t *ctx,
676 uint8_t *val)
677 {
678 asm330lhh_status_reg_t status_reg;
679 int32_t ret;
680
681 ret = asm330lhh_read_reg(ctx, ASM330LHH_STATUS_REG,
682 (uint8_t *)&status_reg, 1);
683 *val = status_reg.xlda;
684
685 return ret;
686 }
687
688 /**
689 * @brief Gyroscope new data available.[get]
690 *
691 * @param ctx Read / write interface definitions.(ptr)
692 * @param val Change the values of gda in reg STATUS_REG
693 * @retval Interface status (MANDATORY: return 0 -> no Error).
694 *
695 */
asm330lhh_gy_flag_data_ready_get(stmdev_ctx_t * ctx,uint8_t * val)696 int32_t asm330lhh_gy_flag_data_ready_get(stmdev_ctx_t *ctx,
697 uint8_t *val)
698 {
699 asm330lhh_status_reg_t status_reg;
700 int32_t ret;
701
702 ret = asm330lhh_read_reg(ctx, ASM330LHH_STATUS_REG,
703 (uint8_t *)&status_reg, 1);
704 *val = status_reg.gda;
705
706 return ret;
707 }
708
709 /**
710 * @brief Temperature new data available.[get]
711 *
712 * @param ctx Read / write interface definitions.(ptr)
713 * @param val Change the values of tda in reg STATUS_REG
714 * @retval Interface status (MANDATORY: return 0 -> no Error).
715 *
716 */
asm330lhh_temp_flag_data_ready_get(stmdev_ctx_t * ctx,uint8_t * val)717 int32_t asm330lhh_temp_flag_data_ready_get(stmdev_ctx_t *ctx,
718 uint8_t *val)
719 {
720 asm330lhh_status_reg_t status_reg;
721 int32_t ret;
722
723 ret = asm330lhh_read_reg(ctx, ASM330LHH_STATUS_REG,
724 (uint8_t *)&status_reg, 1);
725 *val = status_reg.tda;
726
727 return ret;
728 }
729
730 /**
731 * @brief Accelerometer X-axis user offset correction expressed in two’s
732 * complement, weight depends on USR_OFF_W in CTRL6_C (15h).
733 * The value must be in the range [-127 127].[set]
734 *
735 * @param ctx Read / write interface definitions.(ptr)
736 * @param buff Buffer that contains data to write
737 * @retval Interface status (MANDATORY: return 0 -> no Error).
738 *
739 */
asm330lhh_xl_usr_offset_x_set(stmdev_ctx_t * ctx,uint8_t * buff)740 int32_t asm330lhh_xl_usr_offset_x_set(stmdev_ctx_t *ctx,
741 uint8_t *buff)
742 {
743 int32_t ret;
744
745 ret = asm330lhh_write_reg(ctx, ASM330LHH_X_OFS_USR, buff, 1);
746
747 return ret;
748 }
749
750 /**
751 * @brief Accelerometer X-axis user offset correction expressed in two’s
752 * complement, weight depends on USR_OFF_W in CTRL6_C (15h).
753 * The value must be in the range [-127 127].[get]
754 *
755 * @param ctx Read / write interface definitions.(ptr)
756 * @param buff Buffer that stores data read
757 * @retval Interface status (MANDATORY: return 0 -> no Error).
758 *
759 */
asm330lhh_xl_usr_offset_x_get(stmdev_ctx_t * ctx,uint8_t * buff)760 int32_t asm330lhh_xl_usr_offset_x_get(stmdev_ctx_t *ctx,
761 uint8_t *buff)
762 {
763 int32_t ret;
764
765 ret = asm330lhh_read_reg(ctx, ASM330LHH_X_OFS_USR, buff, 1);
766
767 return ret;
768 }
769
770 /**
771 * @brief Accelerometer Y-axis user offset correction expressed in two’s
772 * complement, weight depends on USR_OFF_W in CTRL6_C (15h).
773 * The value must be in the range [-127 127].[set]
774 *
775 * @param ctx Read / write interface definitions.(ptr)
776 * @param buff Buffer that contains data to write
777 * @retval Interface status (MANDATORY: return 0 -> no Error).
778 *
779 */
asm330lhh_xl_usr_offset_y_set(stmdev_ctx_t * ctx,uint8_t * buff)780 int32_t asm330lhh_xl_usr_offset_y_set(stmdev_ctx_t *ctx,
781 uint8_t *buff)
782 {
783 int32_t ret;
784
785 ret = asm330lhh_write_reg(ctx, ASM330LHH_Y_OFS_USR, buff, 1);
786
787 return ret;
788 }
789
790 /**
791 * @brief Accelerometer Y-axis user offset correction expressed in two’s
792 * complement, weight depends on USR_OFF_W in CTRL6_C (15h).
793 * The value must be in the range [-127 127].[get]
794 *
795 * @param ctx Read / write interface definitions.(ptr)
796 * @param buff Buffer that stores data read
797 * @retval Interface status (MANDATORY: return 0 -> no Error).
798 *
799 */
asm330lhh_xl_usr_offset_y_get(stmdev_ctx_t * ctx,uint8_t * buff)800 int32_t asm330lhh_xl_usr_offset_y_get(stmdev_ctx_t *ctx,
801 uint8_t *buff)
802 {
803 int32_t ret;
804
805 ret = asm330lhh_read_reg(ctx, ASM330LHH_Y_OFS_USR, buff, 1);
806
807 return ret;
808 }
809
810 /**
811 * @brief Accelerometer Z-axis user offset correction expressed in two’s
812 * complement, weight depends on USR_OFF_W in CTRL6_C (15h).
813 * The value must be in the range [-127 127].[set]
814 *
815 * @param ctx Read / write interface definitions.(ptr)
816 * @param buff Buffer that contains data to write
817 * @retval Interface status (MANDATORY: return 0 -> no Error).
818 *
819 */
asm330lhh_xl_usr_offset_z_set(stmdev_ctx_t * ctx,uint8_t * buff)820 int32_t asm330lhh_xl_usr_offset_z_set(stmdev_ctx_t *ctx,
821 uint8_t *buff)
822 {
823 int32_t ret;
824
825 ret = asm330lhh_write_reg(ctx, ASM330LHH_Z_OFS_USR, buff, 1);
826
827 return ret;
828 }
829
830 /**
831 * @brief Accelerometer X-axis user offset correction expressed in two’s
832 * complement, weight depends on USR_OFF_W in CTRL6_C (15h).
833 * The value must be in the range [-127 127].[get]
834 *
835 * @param ctx Read / write interface definitions.(ptr)
836 * @param buff Buffer that stores data read
837 * @retval Interface status (MANDATORY: return 0 -> no Error).
838 *
839 */
asm330lhh_xl_usr_offset_z_get(stmdev_ctx_t * ctx,uint8_t * buff)840 int32_t asm330lhh_xl_usr_offset_z_get(stmdev_ctx_t *ctx,
841 uint8_t *buff)
842 {
843 int32_t ret;
844
845 ret = asm330lhh_read_reg(ctx, ASM330LHH_Z_OFS_USR, buff, 1);
846
847 return ret;
848 }
849
850 /**
851 * @brief Enables user offset on out.[set]
852 *
853 * @param ctx Read / write interface definitions.(ptr)
854 * @param val Change the values of usr_off_on_out in reg CTRL7_G
855 * @retval Interface status (MANDATORY: return 0 -> no Error).
856 *
857 */
asm330lhh_xl_usr_offset_set(stmdev_ctx_t * ctx,uint8_t val)858 int32_t asm330lhh_xl_usr_offset_set(stmdev_ctx_t *ctx, uint8_t val)
859 {
860 asm330lhh_ctrl7_g_t ctrl7_g;
861 int32_t ret;
862
863 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL7_G, (uint8_t *)&ctrl7_g, 1);
864
865 if (ret == 0)
866 {
867 ctrl7_g.usr_off_on_out = (uint8_t)val;
868 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL7_G, (uint8_t *)&ctrl7_g, 1);
869 }
870
871 return ret;
872 }
873
874 /**
875 * @brief Get user offset on out flag.[get]
876 *
877 * @param ctx Read / write interface definitions.(ptr)
878 * @param val Get values of usr_off_on_out in reg CTRL7_G
879 * @retval Interface status (MANDATORY: return 0 -> no Error).
880 *
881 */
asm330lhh_xl_usr_offset_get(stmdev_ctx_t * ctx,uint8_t * val)882 int32_t asm330lhh_xl_usr_offset_get(stmdev_ctx_t *ctx, uint8_t *val)
883 {
884 asm330lhh_ctrl7_g_t ctrl7_g;
885 int32_t ret;
886
887 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL7_G, (uint8_t *)&ctrl7_g, 1);
888 *val = ctrl7_g.usr_off_on_out;
889
890 return ret;
891 }
892
893 /**
894 * @}
895 *
896 */
897
898 /**
899 * @defgroup ASM330LHH_Timestamp
900 * @brief This section groups all the functions that manage the
901 * timestamp generation.
902 * @{
903 *
904 */
905
906 /**
907 * @brief Reset timestamp counter.[set]
908 *
909 * @param ctx Read / write interface definitions.(ptr)
910 * @retval Interface status (MANDATORY: return 0 -> no Error).
911 *
912 */
asm330lhh_timestamp_rst(stmdev_ctx_t * ctx)913 int32_t asm330lhh_timestamp_rst(stmdev_ctx_t *ctx)
914 {
915 uint8_t rst_val = 0xAA;
916 return asm330lhh_write_reg(ctx, ASM330LHH_TIMESTAMP2, &rst_val, 1);
917 }
918
919 /**
920 * @brief Enables timestamp counter.[set]
921 *
922 * @param ctx Read / write interface definitions.(ptr)
923 * @param val Change the values of timestamp_en in reg CTRL10_C
924 * @retval Interface status (MANDATORY: return 0 -> no Error).
925 *
926 */
asm330lhh_timestamp_set(stmdev_ctx_t * ctx,uint8_t val)927 int32_t asm330lhh_timestamp_set(stmdev_ctx_t *ctx, uint8_t val)
928 {
929 asm330lhh_ctrl10_c_t ctrl10_c;
930 int32_t ret;
931
932 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL10_C,
933 (uint8_t *)&ctrl10_c, 1);
934
935 if (ret == 0)
936 {
937 ctrl10_c.timestamp_en = (uint8_t)val;
938 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL10_C,
939 (uint8_t *)&ctrl10_c, 1);
940 }
941
942 return ret;
943 }
944
945 /**
946 * @brief Enables timestamp counter.[get]
947 *
948 * @param ctx Read / write interface definitions.(ptr)
949 * @param val Change the values of timestamp_en in reg CTRL10_C
950 * @retval Interface status (MANDATORY: return 0 -> no Error).
951 *
952 */
asm330lhh_timestamp_get(stmdev_ctx_t * ctx,uint8_t * val)953 int32_t asm330lhh_timestamp_get(stmdev_ctx_t *ctx, uint8_t *val)
954 {
955 asm330lhh_ctrl10_c_t ctrl10_c;
956 int32_t ret;
957
958 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL10_C,
959 (uint8_t *)&ctrl10_c, 1);
960 *val = ctrl10_c.timestamp_en;
961
962 return ret;
963 }
964
965 /**
966 * @brief Timestamp first data output register (r).
967 * The value is expressed as a 32-bit word and the bit resolution
968 * is 25 μs.[get]
969 *
970 * @param ctx Read / write interface definitions.(ptr)
971 * @param buff Buffer that stores data read
972 * @retval Interface status (MANDATORY: return 0 -> no Error).
973 *
974 */
asm330lhh_timestamp_raw_get(stmdev_ctx_t * ctx,uint32_t * val)975 int32_t asm330lhh_timestamp_raw_get(stmdev_ctx_t *ctx, uint32_t *val)
976 {
977 uint8_t buff[4];
978 int32_t ret;
979
980 ret = asm330lhh_read_reg(ctx, ASM330LHH_TIMESTAMP0, buff, 4);
981 *val = buff[3];
982 *val = (*val * 256U) + buff[2];
983 *val = (*val * 256U) + buff[1];
984 *val = (*val * 256U) + buff[0];
985
986 return ret;
987 }
988
989 /**
990 * @}
991 *
992 */
993
994 /**
995 * @defgroup ASM330LHH_Data output
996 * @brief This section groups all the data output functions.
997 * @{
998 *
999 */
1000
1001 /**
1002 * @brief Circular burst-mode (rounding) read of the output registers.[set]
1003 *
1004 * @param ctx Read / write interface definitions.(ptr)
1005 * @param val Change the values of rounding in reg CTRL5_C
1006 * @retval Interface status (MANDATORY: return 0 -> no Error).
1007 *
1008 */
asm330lhh_rounding_mode_set(stmdev_ctx_t * ctx,asm330lhh_rounding_t val)1009 int32_t asm330lhh_rounding_mode_set(stmdev_ctx_t *ctx,
1010 asm330lhh_rounding_t val)
1011 {
1012 asm330lhh_ctrl5_c_t ctrl5_c;
1013 int32_t ret;
1014
1015 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL5_C, (uint8_t *)&ctrl5_c, 1);
1016
1017 if (ret == 0)
1018 {
1019 ctrl5_c.rounding = (uint8_t)val;
1020 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL5_C, (uint8_t *)&ctrl5_c, 1);
1021 }
1022
1023 return ret;
1024 }
1025
1026 /**
1027 * @brief Gyroscope UI chain full-scale selection.[get]
1028 *
1029 * @param ctx Read / write interface definitions.(ptr)
1030 * @param val Get the values of rounding in reg CTRL5_C
1031 * @retval Interface status (MANDATORY: return 0 -> no Error).
1032 *
1033 */
asm330lhh_rounding_mode_get(stmdev_ctx_t * ctx,asm330lhh_rounding_t * val)1034 int32_t asm330lhh_rounding_mode_get(stmdev_ctx_t *ctx,
1035 asm330lhh_rounding_t *val)
1036 {
1037 asm330lhh_ctrl5_c_t ctrl5_c;
1038 int32_t ret;
1039
1040 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL5_C, (uint8_t *)&ctrl5_c, 1);
1041
1042 switch (ctrl5_c.rounding)
1043 {
1044 case ASM330LHH_NO_ROUND:
1045 *val = ASM330LHH_NO_ROUND;
1046 break;
1047
1048 case ASM330LHH_ROUND_XL:
1049 *val = ASM330LHH_ROUND_XL;
1050 break;
1051
1052 case ASM330LHH_ROUND_GY:
1053 *val = ASM330LHH_ROUND_GY;
1054 break;
1055
1056 case ASM330LHH_ROUND_GY_XL:
1057 *val = ASM330LHH_ROUND_GY_XL;
1058 break;
1059
1060 default:
1061 *val = ASM330LHH_NO_ROUND;
1062 break;
1063 }
1064
1065 return ret;
1066 }
1067
1068 /**
1069 * @brief Temperature data output register (r).
1070 * L and H registers together express a 16-bit word in two’s
1071 * complement.[get]
1072 *
1073 * @param ctx Read / write interface definitions.(ptr)
1074 * @param buff Buffer that stores data read
1075 * @retval Interface status (MANDATORY: return 0 -> no Error).
1076 *
1077 */
asm330lhh_temperature_raw_get(stmdev_ctx_t * ctx,int16_t * val)1078 int32_t asm330lhh_temperature_raw_get(stmdev_ctx_t *ctx, int16_t *val)
1079 {
1080 uint8_t buff[2];
1081 int32_t ret;
1082
1083 ret = asm330lhh_read_reg(ctx, ASM330LHH_OUT_TEMP_L, buff, 2);
1084 *val = (int16_t)buff[1];
1085 *val = (*val * 256) + (int16_t)buff[0];
1086
1087 return ret;
1088 }
1089
1090 /**
1091 * @brief Angular rate sensor. The value is expressed as a 16-bit
1092 * word in two’s complement.[get]
1093 *
1094 * @param ctx Read / write interface definitions.(ptr)
1095 * @param buff Buffer that stores data read
1096 * @retval Interface status (MANDATORY: return 0 -> no Error).
1097 *
1098 */
asm330lhh_angular_rate_raw_get(stmdev_ctx_t * ctx,int16_t * val)1099 int32_t asm330lhh_angular_rate_raw_get(stmdev_ctx_t *ctx,
1100 int16_t *val)
1101 {
1102 uint8_t buff[6];
1103 int32_t ret;
1104
1105 ret = asm330lhh_read_reg(ctx, ASM330LHH_OUTX_L_G, buff, 6);
1106 val[0] = (int16_t)buff[1];
1107 val[0] = (val[0] * 256) + (int16_t)buff[0];
1108 val[1] = (int16_t)buff[3];
1109 val[1] = (val[1] * 256) + (int16_t)buff[2];
1110 val[2] = (int16_t)buff[5];
1111 val[2] = (val[2] * 256) + (int16_t)buff[4];
1112
1113 return ret;
1114 }
1115
1116 /**
1117 * @brief Linear acceleration output register. The value is expressed as a
1118 * 16-bit word in two’s complement.[get]
1119 *
1120 * @param ctx Read / write interface definitions.(ptr)
1121 * @param buff Buffer that stores data read
1122 * @retval Interface status (MANDATORY: return 0 -> no Error).
1123 *
1124 */
asm330lhh_acceleration_raw_get(stmdev_ctx_t * ctx,int16_t * val)1125 int32_t asm330lhh_acceleration_raw_get(stmdev_ctx_t *ctx,
1126 int16_t *val)
1127 {
1128 uint8_t buff[6];
1129 int32_t ret;
1130
1131 ret = asm330lhh_read_reg(ctx, ASM330LHH_OUTX_L_A, buff, 6);
1132 val[0] = (int16_t)buff[1];
1133 val[0] = (val[0] * 256) + (int16_t)buff[0];
1134 val[1] = (int16_t)buff[3];
1135 val[1] = (val[1] * 256) + (int16_t)buff[2];
1136 val[2] = (int16_t)buff[5];
1137 val[2] = (val[2] * 256) + (int16_t)buff[4];
1138
1139 return ret;
1140 }
1141
1142 /**
1143 * @brief FIFO data output.[get]
1144 *
1145 * @param ctx Read / write interface definitions.(ptr)
1146 * @param buff Buffer that stores data read
1147 * @retval Interface status (MANDATORY: return 0 -> no Error).
1148 *
1149 */
asm330lhh_fifo_out_raw_get(stmdev_ctx_t * ctx,uint8_t * val)1150 int32_t asm330lhh_fifo_out_raw_get(stmdev_ctx_t *ctx, uint8_t *val)
1151 {
1152 int32_t ret;
1153
1154 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_DATA_OUT_X_L, val, 6);
1155
1156 return ret;
1157 }
1158
1159 /**
1160 * @}
1161 *
1162 */
1163
1164 /**
1165 * @defgroup ASM330LHH_common
1166 * @brief This section groups common useful functions.
1167 * @{
1168 *
1169 */
1170
1171 /**
1172 * @brief DEVICE_CONF bit configuration[set]
1173 *
1174 * @param ctx Read / write interface definitions.(ptr)
1175 * @param val Change the values of device_conf in reg CTRL9_XL
1176 * @retval Interface status (MANDATORY: return 0 -> no Error).
1177 *
1178 */
asm330lhh_device_conf_set(stmdev_ctx_t * ctx,uint8_t val)1179 int32_t asm330lhh_device_conf_set(stmdev_ctx_t *ctx, uint8_t val)
1180 {
1181 asm330lhh_ctrl9_xl_t ctrl9_xl;
1182 int32_t ret;
1183
1184 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL9_XL,
1185 (uint8_t *)&ctrl9_xl, 1);
1186
1187 if (ret == 0)
1188 {
1189 ctrl9_xl.device_conf = (uint8_t)val;
1190 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL9_XL,
1191 (uint8_t *)&ctrl9_xl, 1);
1192 }
1193
1194 return ret;
1195 }
1196
1197 /**
1198 * @brief DEVICE_CONF bit configuration[get]
1199 *
1200 * @param ctx Read / write interface definitions.(ptr)
1201 * @param val Get the values of device_conf in reg CTRL9_XL
1202 * @retval Interface status (MANDATORY: return 0 -> no Error).
1203 *
1204 */
asm330lhh_device_conf_get(stmdev_ctx_t * ctx,uint8_t * val)1205 int32_t asm330lhh_device_conf_get(stmdev_ctx_t *ctx, uint8_t *val)
1206 {
1207 asm330lhh_ctrl9_xl_t ctrl9_xl;
1208 int32_t ret;
1209
1210 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL9_XL,
1211 (uint8_t *)&ctrl9_xl, 1);
1212 *val = ctrl9_xl.device_conf;
1213
1214 return ret;
1215 }
1216
1217 /**
1218 * @brief Difference in percentage of the effective ODR (and timestamp rate)
1219 * with respect to the typical.[set]
1220 * Step: 0.15%. 8-bit format, 2's complement.
1221 *
1222 * @param ctx Read / write interface definitions.(ptr)
1223 * @param val Change the values of freq_fine in reg INTERNAL_FREQ_FINE
1224 * @retval Interface status (MANDATORY: return 0 -> no Error).
1225 *
1226 */
asm330lhh_odr_cal_reg_set(stmdev_ctx_t * ctx,uint8_t val)1227 int32_t asm330lhh_odr_cal_reg_set(stmdev_ctx_t *ctx, uint8_t val)
1228 {
1229 asm330lhh_internal_freq_fine_t internal_freq_fine;
1230 int32_t ret;
1231
1232 ret = asm330lhh_read_reg(ctx, ASM330LHH_INTERNAL_FREQ_FINE,
1233 (uint8_t *)&internal_freq_fine, 1);
1234
1235 if (ret == 0)
1236 {
1237 internal_freq_fine.freq_fine = (uint8_t)val;
1238 ret = asm330lhh_write_reg(ctx, ASM330LHH_INTERNAL_FREQ_FINE,
1239 (uint8_t *)&internal_freq_fine, 1);
1240 }
1241
1242 return ret;
1243 }
1244
1245 /**
1246 * @brief Difference in percentage of the effective ODR (and timestamp rate)
1247 * with respect to the typical.[get]
1248 * Step: 0.15%. 8-bit format, 2's complement.
1249 *
1250 * @param ctx Read / write interface definitions.(ptr)
1251 * @param val Change the values of freq_fine in reg INTERNAL_FREQ_FINE
1252 * @retval Interface status (MANDATORY: return 0 -> no Error).
1253 *
1254 */
asm330lhh_odr_cal_reg_get(stmdev_ctx_t * ctx,uint8_t * val)1255 int32_t asm330lhh_odr_cal_reg_get(stmdev_ctx_t *ctx, uint8_t *val)
1256 {
1257 asm330lhh_internal_freq_fine_t internal_freq_fine;
1258 int32_t ret;
1259
1260 ret = asm330lhh_read_reg(ctx, ASM330LHH_INTERNAL_FREQ_FINE,
1261 (uint8_t *)&internal_freq_fine, 1);
1262 *val = internal_freq_fine.freq_fine;
1263
1264 return ret;
1265 }
1266
1267 /**
1268 * @brief Data-ready pulsed / letched mode.[set]
1269 *
1270 * @param ctx Read / write interface definitions.(ptr)
1271 * @param val Change the values of dataready_pulsed in
1272 * reg COUNTER_BDR_REG1
1273 * @retval Interface status (MANDATORY: return 0 -> no Error).
1274 *
1275 */
asm330lhh_data_ready_mode_set(stmdev_ctx_t * ctx,asm330lhh_dataready_pulsed_t val)1276 int32_t asm330lhh_data_ready_mode_set(stmdev_ctx_t *ctx,
1277 asm330lhh_dataready_pulsed_t val)
1278 {
1279 asm330lhh_counter_bdr_reg1_t counter_bdr_reg1;
1280 int32_t ret;
1281
1282 ret = asm330lhh_read_reg(ctx, ASM330LHH_COUNTER_BDR_REG1,
1283 (uint8_t *)&counter_bdr_reg1, 1);
1284
1285 if (ret == 0)
1286 {
1287 counter_bdr_reg1.dataready_pulsed = (uint8_t)val;
1288 ret = asm330lhh_write_reg(ctx, ASM330LHH_COUNTER_BDR_REG1,
1289 (uint8_t *)&counter_bdr_reg1, 1);
1290 }
1291
1292 return ret;
1293 }
1294
1295 /**
1296 * @brief Data-ready pulsed / letched mode.[get]
1297 *
1298 * @param ctx Read / write interface definitions.(ptr)
1299 * @param val Get the values of dataready_pulsed in
1300 * reg COUNTER_BDR_REG1
1301 * @retval Interface status (MANDATORY: return 0 -> no Error).
1302 *
1303 */
asm330lhh_data_ready_mode_get(stmdev_ctx_t * ctx,asm330lhh_dataready_pulsed_t * val)1304 int32_t asm330lhh_data_ready_mode_get(stmdev_ctx_t *ctx,
1305 asm330lhh_dataready_pulsed_t *val)
1306 {
1307 asm330lhh_counter_bdr_reg1_t counter_bdr_reg1;
1308 int32_t ret;
1309
1310 ret = asm330lhh_read_reg(ctx, ASM330LHH_COUNTER_BDR_REG1,
1311 (uint8_t *)&counter_bdr_reg1, 1);
1312
1313 switch (counter_bdr_reg1.dataready_pulsed)
1314 {
1315 case ASM330LHH_DRDY_LATCHED:
1316 *val = ASM330LHH_DRDY_LATCHED;
1317 break;
1318
1319 case ASM330LHH_DRDY_PULSED:
1320 *val = ASM330LHH_DRDY_PULSED;
1321 break;
1322
1323 default:
1324 *val = ASM330LHH_DRDY_LATCHED;
1325 break;
1326 }
1327
1328 return ret;
1329 }
1330
1331 /**
1332 * @brief Device Who am I.[get]
1333 *
1334 * @param ctx Read / write interface definitions.(ptr)
1335 * @param buff Buffer that stores data read
1336 * @retval Interface status (MANDATORY: return 0 -> no Error).
1337 *
1338 */
asm330lhh_device_id_get(stmdev_ctx_t * ctx,uint8_t * buff)1339 int32_t asm330lhh_device_id_get(stmdev_ctx_t *ctx, uint8_t *buff)
1340 {
1341 int32_t ret;
1342
1343 ret = asm330lhh_read_reg(ctx, ASM330LHH_WHO_AM_I, buff, 1);
1344
1345 return ret;
1346 }
1347
1348 /**
1349 * @brief Software reset. Restore the default values in user registers.[set]
1350 *
1351 * @param ctx Read / write interface definitions.(ptr)
1352 * @param val Change the values of sw_reset in reg CTRL3_C
1353 * @retval Interface status (MANDATORY: return 0 -> no Error).
1354 *
1355 */
asm330lhh_reset_set(stmdev_ctx_t * ctx,uint8_t val)1356 int32_t asm330lhh_reset_set(stmdev_ctx_t *ctx, uint8_t val)
1357 {
1358 asm330lhh_ctrl3_c_t ctrl3_c;
1359 int32_t ret;
1360
1361 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
1362
1363 if (ret == 0)
1364 {
1365 ctrl3_c.sw_reset = (uint8_t)val;
1366 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
1367 }
1368
1369 return ret;
1370 }
1371
1372 /**
1373 * @brief Software reset. Restore the default values in user registers.[get]
1374 *
1375 * @param ctx Read / write interface definitions.(ptr)
1376 * @param val Change the values of sw_reset in reg CTRL3_C
1377 * @retval Interface status (MANDATORY: return 0 -> no Error).
1378 *
1379 */
asm330lhh_reset_get(stmdev_ctx_t * ctx,uint8_t * val)1380 int32_t asm330lhh_reset_get(stmdev_ctx_t *ctx, uint8_t *val)
1381 {
1382 asm330lhh_ctrl3_c_t ctrl3_c;
1383 int32_t ret;
1384
1385 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
1386 *val = ctrl3_c.sw_reset;
1387
1388 return ret;
1389 }
1390
1391 /**
1392 * @brief Register address automatically incremented during a multiple byte
1393 * access with a serial interface.[set]
1394 *
1395 * @param ctx Read / write interface definitions.(ptr)
1396 * @param val Change the values of if_inc in reg CTRL3_C
1397 * @retval Interface status (MANDATORY: return 0 -> no Error).
1398 *
1399 */
asm330lhh_auto_increment_set(stmdev_ctx_t * ctx,uint8_t val)1400 int32_t asm330lhh_auto_increment_set(stmdev_ctx_t *ctx, uint8_t val)
1401 {
1402 asm330lhh_ctrl3_c_t ctrl3_c;
1403 int32_t ret;
1404
1405 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
1406
1407 if (ret == 0)
1408 {
1409 ctrl3_c.if_inc = (uint8_t)val;
1410 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
1411 }
1412
1413 return ret;
1414 }
1415
1416 /**
1417 * @brief Register address automatically incremented during a multiple byte
1418 * access with a serial interface.[get]
1419 *
1420 * @param ctx Read / write interface definitions.(ptr)
1421 * @param val Change the values of if_inc in reg CTRL3_C
1422 * @retval Interface status (MANDATORY: return 0 -> no Error).
1423 *
1424 */
asm330lhh_auto_increment_get(stmdev_ctx_t * ctx,uint8_t * val)1425 int32_t asm330lhh_auto_increment_get(stmdev_ctx_t *ctx, uint8_t *val)
1426 {
1427 asm330lhh_ctrl3_c_t ctrl3_c;
1428 int32_t ret;
1429
1430 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
1431 *val = ctrl3_c.if_inc;
1432
1433 return ret;
1434 }
1435
1436 /**
1437 * @brief Reboot memory content. Reload the calibration parameters.[set]
1438 *
1439 * @param ctx Read / write interface definitions.(ptr)
1440 * @param val Change the values of boot in reg CTRL3_C
1441 * @retval Interface status (MANDATORY: return 0 -> no Error).
1442 *
1443 */
asm330lhh_boot_set(stmdev_ctx_t * ctx,uint8_t val)1444 int32_t asm330lhh_boot_set(stmdev_ctx_t *ctx, uint8_t val)
1445 {
1446 asm330lhh_ctrl3_c_t ctrl3_c;
1447 int32_t ret;
1448
1449 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
1450
1451 if (ret == 0)
1452 {
1453 ctrl3_c.boot = (uint8_t)val;
1454 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
1455 }
1456
1457 return ret;
1458 }
1459
1460 /**
1461 * @brief Reboot memory content. Reload the calibration parameters.[get]
1462 *
1463 * @param ctx Read / write interface definitions.(ptr)
1464 * @param val Change the values of boot in reg CTRL3_C
1465 * @retval Interface status (MANDATORY: return 0 -> no Error).
1466 *
1467 */
asm330lhh_boot_get(stmdev_ctx_t * ctx,uint8_t * val)1468 int32_t asm330lhh_boot_get(stmdev_ctx_t *ctx, uint8_t *val)
1469 {
1470 asm330lhh_ctrl3_c_t ctrl3_c;
1471 int32_t ret;
1472
1473 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
1474 *val = ctrl3_c.boot;
1475
1476 return ret;
1477 }
1478
1479
1480
1481 /**
1482 * @brief Linear acceleration sensor self-test enable.[set]
1483 *
1484 * @param ctx Read / write interface definitions.(ptr)
1485 * @param val Change the values of st_xl in reg CTRL5_C
1486 * @retval Interface status (MANDATORY: return 0 -> no Error).
1487 *
1488 */
asm330lhh_xl_self_test_set(stmdev_ctx_t * ctx,asm330lhh_st_xl_t val)1489 int32_t asm330lhh_xl_self_test_set(stmdev_ctx_t *ctx,
1490 asm330lhh_st_xl_t val)
1491 {
1492 asm330lhh_ctrl5_c_t ctrl5_c;
1493 int32_t ret;
1494
1495 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL5_C, (uint8_t *)&ctrl5_c, 1);
1496
1497 if (ret == 0)
1498 {
1499 ctrl5_c.st_xl = (uint8_t)val;
1500 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL5_C, (uint8_t *)&ctrl5_c, 1);
1501 }
1502
1503 return ret;
1504 }
1505
1506 /**
1507 * @brief Linear acceleration sensor self-test enable.[get]
1508 *
1509 * @param ctx Read / write interface definitions.(ptr)
1510 * @param val Get the values of st_xl in reg CTRL5_C
1511 * @retval Interface status (MANDATORY: return 0 -> no Error).
1512 *
1513 */
asm330lhh_xl_self_test_get(stmdev_ctx_t * ctx,asm330lhh_st_xl_t * val)1514 int32_t asm330lhh_xl_self_test_get(stmdev_ctx_t *ctx,
1515 asm330lhh_st_xl_t *val)
1516 {
1517 asm330lhh_ctrl5_c_t ctrl5_c;
1518 int32_t ret;
1519
1520 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL5_C, (uint8_t *)&ctrl5_c, 1);
1521
1522 switch (ctrl5_c.st_xl)
1523 {
1524 case ASM330LHH_XL_ST_DISABLE:
1525 *val = ASM330LHH_XL_ST_DISABLE;
1526 break;
1527
1528 case ASM330LHH_XL_ST_POSITIVE:
1529 *val = ASM330LHH_XL_ST_POSITIVE;
1530 break;
1531
1532 case ASM330LHH_XL_ST_NEGATIVE:
1533 *val = ASM330LHH_XL_ST_NEGATIVE;
1534 break;
1535
1536 default:
1537 *val = ASM330LHH_XL_ST_DISABLE;
1538 break;
1539 }
1540
1541 return ret;
1542 }
1543
1544 /**
1545 * @brief Angular rate sensor self-test enable.[set]
1546 *
1547 * @param ctx Read / write interface definitions.(ptr)
1548 * @param val Change the values of st_g in reg CTRL5_C
1549 * @retval Interface status (MANDATORY: return 0 -> no Error).
1550 *
1551 */
asm330lhh_gy_self_test_set(stmdev_ctx_t * ctx,asm330lhh_st_g_t val)1552 int32_t asm330lhh_gy_self_test_set(stmdev_ctx_t *ctx,
1553 asm330lhh_st_g_t val)
1554 {
1555 asm330lhh_ctrl5_c_t ctrl5_c;
1556 int32_t ret;
1557
1558 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL5_C, (uint8_t *)&ctrl5_c, 1);
1559
1560 if (ret == 0)
1561 {
1562 ctrl5_c.st_g = (uint8_t)val;
1563 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL5_C, (uint8_t *)&ctrl5_c, 1);
1564 }
1565
1566 return ret;
1567 }
1568
1569 /**
1570 * @brief Angular rate sensor self-test enable.[get]
1571 *
1572 * @param ctx Read / write interface definitions.(ptr)
1573 * @param val Get the values of st_g in reg CTRL5_C
1574 * @retval Interface status (MANDATORY: return 0 -> no Error).
1575 *
1576 */
asm330lhh_gy_self_test_get(stmdev_ctx_t * ctx,asm330lhh_st_g_t * val)1577 int32_t asm330lhh_gy_self_test_get(stmdev_ctx_t *ctx,
1578 asm330lhh_st_g_t *val)
1579 {
1580 asm330lhh_ctrl5_c_t ctrl5_c;
1581 int32_t ret;
1582
1583 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL5_C, (uint8_t *)&ctrl5_c, 1);
1584
1585 switch (ctrl5_c.st_g)
1586 {
1587 case ASM330LHH_GY_ST_DISABLE:
1588 *val = ASM330LHH_GY_ST_DISABLE;
1589 break;
1590
1591 case ASM330LHH_GY_ST_POSITIVE:
1592 *val = ASM330LHH_GY_ST_POSITIVE;
1593 break;
1594
1595 case ASM330LHH_GY_ST_NEGATIVE:
1596 *val = ASM330LHH_GY_ST_NEGATIVE;
1597 break;
1598
1599 default:
1600 *val = ASM330LHH_GY_ST_DISABLE;
1601 break;
1602 }
1603
1604 return ret;
1605 }
1606
1607 /**
1608 * @}
1609 *
1610 */
1611
1612 /**
1613 * @defgroup ASM330LHH_filters
1614 * @brief This section group all the functions concerning the
1615 * filters configuration
1616 * @{
1617 *
1618 */
1619
1620 /**
1621 * @brief Accelerometer output from LPF2 filtering stage selection.[set]
1622 *
1623 * @param ctx Read / write interface definitions.(ptr)
1624 * @param val Change the values of lpf2_xl_en in reg CTRL1_XL
1625 * @retval Interface status (MANDATORY: return 0 -> no Error).
1626 *
1627 */
asm330lhh_xl_filter_lp2_set(stmdev_ctx_t * ctx,uint8_t val)1628 int32_t asm330lhh_xl_filter_lp2_set(stmdev_ctx_t *ctx, uint8_t val)
1629 {
1630 asm330lhh_ctrl1_xl_t ctrl1_xl;
1631 int32_t ret;
1632
1633 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL1_XL,
1634 (uint8_t *)&ctrl1_xl, 1);
1635
1636 if (ret == 0)
1637 {
1638 ctrl1_xl.lpf2_xl_en = (uint8_t)val;
1639 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL1_XL,
1640 (uint8_t *)&ctrl1_xl, 1);
1641 }
1642
1643 return ret;
1644 }
1645
1646 /**
1647 * @brief Accelerometer output from LPF2 filtering stage selection.[get]
1648 *
1649 * @param ctx Read / write interface definitions.(ptr)
1650 * @param val Change the values of lpf2_xl_en in reg CTRL1_XL
1651 * @retval Interface status (MANDATORY: return 0 -> no Error).
1652 *
1653 */
asm330lhh_xl_filter_lp2_get(stmdev_ctx_t * ctx,uint8_t * val)1654 int32_t asm330lhh_xl_filter_lp2_get(stmdev_ctx_t *ctx, uint8_t *val)
1655 {
1656 asm330lhh_ctrl1_xl_t ctrl1_xl;
1657 int32_t ret;
1658
1659 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL1_XL,
1660 (uint8_t *)&ctrl1_xl, 1);
1661 *val = ctrl1_xl.lpf2_xl_en;
1662
1663 return ret;
1664 }
1665
1666 /**
1667 * @brief Enables gyroscope digital LPF1 if auxiliary SPI is disabled;
1668 * the bandwidth can be selected through FTYPE [2:0] in CTRL6_C.[set]
1669 *
1670 * @param ctx Read / write interface definitions.(ptr)
1671 * @param val Change the values of lpf1_sel_g in reg CTRL4_C
1672 * @retval Interface status (MANDATORY: return 0 -> no Error).
1673 *
1674 */
asm330lhh_gy_filter_lp1_set(stmdev_ctx_t * ctx,uint8_t val)1675 int32_t asm330lhh_gy_filter_lp1_set(stmdev_ctx_t *ctx, uint8_t val)
1676 {
1677 asm330lhh_ctrl4_c_t ctrl4_c;
1678 int32_t ret;
1679
1680 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
1681
1682 if (ret == 0)
1683 {
1684 ctrl4_c.lpf1_sel_g = (uint8_t)val;
1685 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
1686 }
1687
1688 return ret;
1689 }
1690
1691 /**
1692 * @brief Enables gyroscope digital LPF1 if auxiliary SPI is disabled;
1693 * the bandwidth can be selected through FTYPE [2:0] in CTRL6_C.[get]
1694 *
1695 * @param ctx Read / write interface definitions.(ptr)
1696 * @param val Change the values of lpf1_sel_g in reg CTRL4_C
1697 * @retval Interface status (MANDATORY: return 0 -> no Error).
1698 *
1699 */
asm330lhh_gy_filter_lp1_get(stmdev_ctx_t * ctx,uint8_t * val)1700 int32_t asm330lhh_gy_filter_lp1_get(stmdev_ctx_t *ctx, uint8_t *val)
1701 {
1702 asm330lhh_ctrl4_c_t ctrl4_c;
1703 int32_t ret;
1704
1705 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
1706 *val = ctrl4_c.lpf1_sel_g;
1707
1708 return ret;
1709 }
1710
1711 /**
1712 * @brief Mask DRDY on pin (both XL & Gyro) until filter settling ends
1713 * (XL and Gyro independently masked).[set]
1714 *
1715 * @param ctx Read / write interface definitions.(ptr)
1716 * @param val Change the values of drdy_mask in reg CTRL4_C
1717 * @retval Interface status (MANDATORY: return 0 -> no Error).
1718 *
1719 */
asm330lhh_filter_settling_mask_set(stmdev_ctx_t * ctx,uint8_t val)1720 int32_t asm330lhh_filter_settling_mask_set(stmdev_ctx_t *ctx,
1721 uint8_t val)
1722 {
1723 asm330lhh_ctrl4_c_t ctrl4_c;
1724 int32_t ret;
1725
1726 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
1727
1728 if (ret == 0)
1729 {
1730 ctrl4_c.drdy_mask = (uint8_t)val;
1731 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
1732 }
1733
1734 return ret;
1735 }
1736
1737 /**
1738 * @brief Mask DRDY on pin (both XL & Gyro) until filter settling ends
1739 * (XL and Gyro independently masked).[get]
1740 *
1741 * @param ctx Read / write interface definitions.(ptr)
1742 * @param val Change the values of drdy_mask in reg CTRL4_C
1743 * @retval Interface status (MANDATORY: return 0 -> no Error).
1744 *
1745 */
asm330lhh_filter_settling_mask_get(stmdev_ctx_t * ctx,uint8_t * val)1746 int32_t asm330lhh_filter_settling_mask_get(stmdev_ctx_t *ctx,
1747 uint8_t *val)
1748 {
1749 asm330lhh_ctrl4_c_t ctrl4_c;
1750 int32_t ret;
1751
1752 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
1753 *val = ctrl4_c.drdy_mask;
1754
1755 return ret;
1756 }
1757
1758 /**
1759 * @brief Gyroscope low pass filter 1 bandwidth.[set]
1760 *
1761 * @param ctx Read / write interface definitions.(ptr)
1762 * @param val Change the values of ftype in reg CTRL6_C
1763 * @retval Interface status (MANDATORY: return 0 -> no Error).
1764 *
1765 */
asm330lhh_gy_lp1_bandwidth_set(stmdev_ctx_t * ctx,asm330lhh_ftype_t val)1766 int32_t asm330lhh_gy_lp1_bandwidth_set(stmdev_ctx_t *ctx,
1767 asm330lhh_ftype_t val)
1768 {
1769 asm330lhh_ctrl6_c_t ctrl6_c;
1770 int32_t ret;
1771
1772 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL6_C, (uint8_t *)&ctrl6_c, 1);
1773
1774 if (ret == 0)
1775 {
1776 ctrl6_c.ftype = (uint8_t)val;
1777 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL6_C, (uint8_t *)&ctrl6_c, 1);
1778 }
1779
1780 return ret;
1781 }
1782
1783 /**
1784 * @brief Gyroscope low pass filter 1 bandwidth.[get]
1785 *
1786 * @param ctx Read / write interface definitions.(ptr)
1787 * @param val Get the values of ftype in reg CTRL6_C
1788 * @retval Interface status (MANDATORY: return 0 -> no Error).
1789 *
1790 */
asm330lhh_gy_lp1_bandwidth_get(stmdev_ctx_t * ctx,asm330lhh_ftype_t * val)1791 int32_t asm330lhh_gy_lp1_bandwidth_get(stmdev_ctx_t *ctx,
1792 asm330lhh_ftype_t *val)
1793 {
1794 asm330lhh_ctrl6_c_t ctrl6_c;
1795 int32_t ret;
1796
1797 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL6_C, (uint8_t *)&ctrl6_c, 1);
1798
1799 switch (ctrl6_c.ftype)
1800 {
1801 case ASM330LHH_ULTRA_LIGHT:
1802 *val = ASM330LHH_ULTRA_LIGHT;
1803 break;
1804
1805 case ASM330LHH_VERY_LIGHT:
1806 *val = ASM330LHH_VERY_LIGHT;
1807 break;
1808
1809 case ASM330LHH_LIGHT:
1810 *val = ASM330LHH_LIGHT;
1811 break;
1812
1813 case ASM330LHH_MEDIUM:
1814 *val = ASM330LHH_MEDIUM;
1815 break;
1816
1817 case ASM330LHH_STRONG:
1818 *val = ASM330LHH_STRONG;
1819 break;
1820
1821 case ASM330LHH_VERY_STRONG:
1822 *val = ASM330LHH_VERY_STRONG;
1823 break;
1824
1825 case ASM330LHH_AGGRESSIVE:
1826 *val = ASM330LHH_AGGRESSIVE;
1827 break;
1828
1829 case ASM330LHH_XTREME:
1830 *val = ASM330LHH_XTREME;
1831 break;
1832
1833 default:
1834 *val = ASM330LHH_ULTRA_LIGHT;
1835 break;
1836 }
1837
1838 return ret;
1839 }
1840
1841 /**
1842 * @brief Low pass filter 2 on 6D function selection.[set]
1843 *
1844 * @param ctx Read / write interface definitions.(ptr)
1845 * @param val Change the values of low_pass_on_6d in reg CTRL8_XL
1846 * @retval Interface status (MANDATORY: return 0 -> no Error).
1847 *
1848 */
asm330lhh_xl_lp2_on_6d_set(stmdev_ctx_t * ctx,uint8_t val)1849 int32_t asm330lhh_xl_lp2_on_6d_set(stmdev_ctx_t *ctx, uint8_t val)
1850 {
1851 asm330lhh_ctrl8_xl_t ctrl8_xl;
1852 int32_t ret;
1853
1854 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL8_XL,
1855 (uint8_t *)&ctrl8_xl, 1);
1856
1857 if (ret == 0)
1858 {
1859 ctrl8_xl.low_pass_on_6d = (uint8_t)val;
1860 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL8_XL,
1861 (uint8_t *)&ctrl8_xl, 1);
1862 }
1863
1864 return ret;
1865 }
1866
1867 /**
1868 * @brief Low pass filter 2 on 6D function selection.[get]
1869 *
1870 * @param ctx Read / write interface definitions.(ptr)
1871 * @param val Change the values of low_pass_on_6d in reg CTRL8_XL
1872 * @retval Interface status (MANDATORY: return 0 -> no Error).
1873 *
1874 */
asm330lhh_xl_lp2_on_6d_get(stmdev_ctx_t * ctx,uint8_t * val)1875 int32_t asm330lhh_xl_lp2_on_6d_get(stmdev_ctx_t *ctx, uint8_t *val)
1876 {
1877 asm330lhh_ctrl8_xl_t ctrl8_xl;
1878 int32_t ret;
1879
1880 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL8_XL,
1881 (uint8_t *)&ctrl8_xl, 1);
1882 *val = ctrl8_xl.low_pass_on_6d;
1883
1884 return ret;
1885 }
1886
1887 /**
1888 * @brief Accelerometer slope filter / high-pass filter selection
1889 * on output.[set]
1890 *
1891 * @param ctx Read / write interface definitions.(ptr)
1892 * @param val Change the values of hp_slope_xl_en in reg CTRL8_XL
1893 * @retval Interface status (MANDATORY: return 0 -> no Error).
1894 *
1895 */
asm330lhh_xl_hp_path_on_out_set(stmdev_ctx_t * ctx,asm330lhh_hp_slope_xl_en_t val)1896 int32_t asm330lhh_xl_hp_path_on_out_set(stmdev_ctx_t *ctx,
1897 asm330lhh_hp_slope_xl_en_t val)
1898 {
1899 asm330lhh_ctrl8_xl_t ctrl8_xl;
1900 int32_t ret;
1901
1902 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL8_XL,
1903 (uint8_t *)&ctrl8_xl, 1);
1904
1905 if (ret == 0)
1906 {
1907 ctrl8_xl.hp_slope_xl_en = (((uint8_t)val & 0x10U) >> 4);
1908 ctrl8_xl.hp_ref_mode_xl = (((uint8_t)val & 0x20U) >> 5);
1909 ctrl8_xl.hpcf_xl = (uint8_t)val & 0x07U;
1910 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL8_XL,
1911 (uint8_t *)&ctrl8_xl, 1);
1912 }
1913
1914 return ret;
1915 }
1916
1917 /**
1918 * @brief Accelerometer slope filter / high-pass filter selection on
1919 * output.[get]
1920 *
1921 * @param ctx Read / write interface definitions.(ptr)
1922 * @param val Get the values of hp_slope_xl_en in reg CTRL8_XL
1923 * @retval Interface status (MANDATORY: return 0 -> no Error).
1924 *
1925 */
asm330lhh_xl_hp_path_on_out_get(stmdev_ctx_t * ctx,asm330lhh_hp_slope_xl_en_t * val)1926 int32_t asm330lhh_xl_hp_path_on_out_get(stmdev_ctx_t *ctx,
1927 asm330lhh_hp_slope_xl_en_t *val)
1928 {
1929 asm330lhh_ctrl8_xl_t ctrl8_xl;
1930 int32_t ret;
1931
1932 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL8_XL,
1933 (uint8_t *)&ctrl8_xl, 1);
1934
1935 switch (((ctrl8_xl.hp_ref_mode_xl << 5) + (ctrl8_xl.hp_slope_xl_en <<
1936 4) +
1937 ctrl8_xl.hpcf_xl))
1938 {
1939 case ASM330LHH_HP_PATH_DISABLE_ON_OUT:
1940 *val = ASM330LHH_HP_PATH_DISABLE_ON_OUT;
1941 break;
1942
1943 case ASM330LHH_SLOPE_ODR_DIV_4:
1944 *val = ASM330LHH_SLOPE_ODR_DIV_4;
1945 break;
1946
1947 case ASM330LHH_HP_ODR_DIV_10:
1948 *val = ASM330LHH_HP_ODR_DIV_10;
1949 break;
1950
1951 case ASM330LHH_HP_ODR_DIV_20:
1952 *val = ASM330LHH_HP_ODR_DIV_20;
1953 break;
1954
1955 case ASM330LHH_HP_ODR_DIV_45:
1956 *val = ASM330LHH_HP_ODR_DIV_45;
1957 break;
1958
1959 case ASM330LHH_HP_ODR_DIV_100:
1960 *val = ASM330LHH_HP_ODR_DIV_100;
1961 break;
1962
1963 case ASM330LHH_HP_ODR_DIV_200:
1964 *val = ASM330LHH_HP_ODR_DIV_200;
1965 break;
1966
1967 case ASM330LHH_HP_ODR_DIV_400:
1968 *val = ASM330LHH_HP_ODR_DIV_400;
1969 break;
1970
1971 case ASM330LHH_HP_ODR_DIV_800:
1972 *val = ASM330LHH_HP_ODR_DIV_800;
1973 break;
1974
1975 case ASM330LHH_HP_REF_MD_ODR_DIV_10:
1976 *val = ASM330LHH_HP_REF_MD_ODR_DIV_10;
1977 break;
1978
1979 case ASM330LHH_HP_REF_MD_ODR_DIV_20:
1980 *val = ASM330LHH_HP_REF_MD_ODR_DIV_20;
1981 break;
1982
1983 case ASM330LHH_HP_REF_MD_ODR_DIV_45:
1984 *val = ASM330LHH_HP_REF_MD_ODR_DIV_45;
1985 break;
1986
1987 case ASM330LHH_HP_REF_MD_ODR_DIV_100:
1988 *val = ASM330LHH_HP_REF_MD_ODR_DIV_100;
1989 break;
1990
1991 case ASM330LHH_HP_REF_MD_ODR_DIV_200:
1992 *val = ASM330LHH_HP_REF_MD_ODR_DIV_200;
1993 break;
1994
1995 case ASM330LHH_HP_REF_MD_ODR_DIV_400:
1996 *val = ASM330LHH_HP_REF_MD_ODR_DIV_400;
1997 break;
1998
1999 case ASM330LHH_HP_REF_MD_ODR_DIV_800:
2000 *val = ASM330LHH_HP_REF_MD_ODR_DIV_800;
2001 break;
2002
2003 case ASM330LHH_LP_ODR_DIV_10:
2004 *val = ASM330LHH_LP_ODR_DIV_10;
2005 break;
2006
2007 case ASM330LHH_LP_ODR_DIV_20:
2008 *val = ASM330LHH_LP_ODR_DIV_20;
2009 break;
2010
2011 case ASM330LHH_LP_ODR_DIV_45:
2012 *val = ASM330LHH_LP_ODR_DIV_45;
2013 break;
2014
2015 case ASM330LHH_LP_ODR_DIV_100:
2016 *val = ASM330LHH_LP_ODR_DIV_100;
2017 break;
2018
2019 case ASM330LHH_LP_ODR_DIV_200:
2020 *val = ASM330LHH_LP_ODR_DIV_200;
2021 break;
2022
2023 case ASM330LHH_LP_ODR_DIV_400:
2024 *val = ASM330LHH_LP_ODR_DIV_400;
2025 break;
2026
2027 case ASM330LHH_LP_ODR_DIV_800:
2028 *val = ASM330LHH_LP_ODR_DIV_800;
2029 break;
2030
2031 default:
2032 *val = ASM330LHH_HP_PATH_DISABLE_ON_OUT;
2033 break;
2034 }
2035
2036 return ret;
2037 }
2038
2039 /**
2040 * @brief Enables accelerometer LPF2 and HPF fast-settling mode.
2041 * The filter sets the second samples after writing this bit.
2042 * Active only during device exit from powerdown mode.[set]
2043 *
2044 * @param ctx Read / write interface definitions.(ptr)
2045 * @param val Change the values of fastsettl_mode_xl in reg CTRL8_XL
2046 * @retval Interface status (MANDATORY: return 0 -> no Error).
2047 *
2048 */
asm330lhh_xl_fast_settling_set(stmdev_ctx_t * ctx,uint8_t val)2049 int32_t asm330lhh_xl_fast_settling_set(stmdev_ctx_t *ctx, uint8_t val)
2050 {
2051 asm330lhh_ctrl8_xl_t ctrl8_xl;
2052 int32_t ret;
2053
2054 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL8_XL,
2055 (uint8_t *)&ctrl8_xl, 1);
2056
2057 if (ret == 0)
2058 {
2059 ctrl8_xl.fastsettl_mode_xl = (uint8_t)val;
2060 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL8_XL,
2061 (uint8_t *)&ctrl8_xl, 1);
2062 }
2063
2064 return ret;
2065 }
2066
2067 /**
2068 * @brief Enables accelerometer LPF2 and HPF fast-settling mode.
2069 * The filter sets the second samples after writing
2070 * this bit. Active only during device exit from powerdown mode.[get]
2071 *
2072 * @param ctx Read / write interface definitions.(ptr)
2073 * @param val Change the values of fastsettl_mode_xl in reg CTRL8_XL
2074 * @retval Interface status (MANDATORY: return 0 -> no Error).
2075 *
2076 */
asm330lhh_xl_fast_settling_get(stmdev_ctx_t * ctx,uint8_t * val)2077 int32_t asm330lhh_xl_fast_settling_get(stmdev_ctx_t *ctx,
2078 uint8_t *val)
2079 {
2080 asm330lhh_ctrl8_xl_t ctrl8_xl;
2081 int32_t ret;
2082
2083 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL8_XL,
2084 (uint8_t *)&ctrl8_xl, 1);
2085 *val = ctrl8_xl.fastsettl_mode_xl;
2086
2087 return ret;
2088 }
2089
2090 /**
2091 * @brief HPF or SLOPE filter selection on wake-up and Activity/Inactivity
2092 * functions.[set]
2093 *
2094 * @param ctx Read / write interface definitions.(ptr)
2095 * @param val Change the values of slope_fds in reg INT_CFG0
2096 * @retval Interface status (MANDATORY: return 0 -> no Error).
2097 *
2098 */
asm330lhh_xl_hp_path_internal_set(stmdev_ctx_t * ctx,asm330lhh_slope_fds_t val)2099 int32_t asm330lhh_xl_hp_path_internal_set(stmdev_ctx_t *ctx,
2100 asm330lhh_slope_fds_t val)
2101 {
2102 asm330lhh_int_cfg0_t int_cfg0;
2103 int32_t ret;
2104
2105 ret = asm330lhh_read_reg(ctx, ASM330LHH_INT_CFG0,
2106 (uint8_t *)&int_cfg0, 1);
2107
2108 if (ret == 0)
2109 {
2110 int_cfg0.slope_fds = (uint8_t)val;
2111 ret = asm330lhh_write_reg(ctx, ASM330LHH_INT_CFG0,
2112 (uint8_t *)&int_cfg0, 1);
2113 }
2114
2115 return ret;
2116 }
2117
2118 /**
2119 * @brief HPF or SLOPE filter selection on wake-up and Activity/Inactivity
2120 * functions.[get]
2121 *
2122 * @param ctx Read / write interface definitions.(ptr)
2123 * @param val Get the values of slope_fds in reg INT_CFG0
2124 * @retval Interface status (MANDATORY: return 0 -> no Error).
2125 *
2126 */
asm330lhh_xl_hp_path_internal_get(stmdev_ctx_t * ctx,asm330lhh_slope_fds_t * val)2127 int32_t asm330lhh_xl_hp_path_internal_get(stmdev_ctx_t *ctx,
2128 asm330lhh_slope_fds_t *val)
2129 {
2130 asm330lhh_int_cfg0_t int_cfg0;
2131 int32_t ret;
2132
2133 ret = asm330lhh_read_reg(ctx, ASM330LHH_INT_CFG0,
2134 (uint8_t *)&int_cfg0, 1);
2135
2136 switch (int_cfg0.slope_fds)
2137 {
2138 case ASM330LHH_USE_SLOPE:
2139 *val = ASM330LHH_USE_SLOPE;
2140 break;
2141
2142 case ASM330LHH_USE_HPF:
2143 *val = ASM330LHH_USE_HPF;
2144 break;
2145
2146 default:
2147 *val = ASM330LHH_USE_SLOPE;
2148 break;
2149 }
2150
2151 return ret;
2152 }
2153
2154 /**
2155 * @brief Enables gyroscope digital high-pass filter. The filter is enabled
2156 * only if the gyro is in HP mode.[set]
2157 *
2158 * @param ctx Read / write interface definitions.(ptr)
2159 * @param val Get the values of hp_en_g and hp_en_g in reg CTRL7_G
2160 * @retval Interface status (MANDATORY: return 0 -> no Error).
2161 *
2162 */
asm330lhh_gy_hp_path_internal_set(stmdev_ctx_t * ctx,asm330lhh_hpm_g_t val)2163 int32_t asm330lhh_gy_hp_path_internal_set(stmdev_ctx_t *ctx,
2164 asm330lhh_hpm_g_t val)
2165 {
2166 asm330lhh_ctrl7_g_t ctrl7_g;
2167 int32_t ret;
2168
2169 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL7_G, (uint8_t *)&ctrl7_g, 1);
2170
2171 if (ret == 0)
2172 {
2173 ctrl7_g.hp_en_g = (((uint8_t)val & 0x80U) >> 7);
2174 ctrl7_g.hpm_g = (uint8_t)val & 0x03U;
2175 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL7_G, (uint8_t *)&ctrl7_g, 1);
2176 }
2177
2178 return ret;
2179 }
2180
2181 /**
2182 * @brief Enables gyroscope digital high-pass filter. The filter is
2183 * enabled only if the gyro is in HP mode.[get]
2184 *
2185 * @param ctx Read / write interface definitions.(ptr)
2186 * @param val Get the values of hp_en_g and hp_en_g in reg CTRL7_G
2187 * @retval Interface status (MANDATORY: return 0 -> no Error).
2188 *
2189 */
asm330lhh_gy_hp_path_internal_get(stmdev_ctx_t * ctx,asm330lhh_hpm_g_t * val)2190 int32_t asm330lhh_gy_hp_path_internal_get(stmdev_ctx_t *ctx,
2191 asm330lhh_hpm_g_t *val)
2192 {
2193 asm330lhh_ctrl7_g_t ctrl7_g;
2194 int32_t ret;
2195
2196 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL7_G, (uint8_t *)&ctrl7_g, 1);
2197
2198 switch ((ctrl7_g.hp_en_g << 7) + ctrl7_g.hpm_g)
2199 {
2200 case ASM330LHH_HP_FILTER_NONE:
2201 *val = ASM330LHH_HP_FILTER_NONE;
2202 break;
2203
2204 case ASM330LHH_HP_FILTER_16mHz:
2205 *val = ASM330LHH_HP_FILTER_16mHz;
2206 break;
2207
2208 case ASM330LHH_HP_FILTER_65mHz:
2209 *val = ASM330LHH_HP_FILTER_65mHz;
2210 break;
2211
2212 case ASM330LHH_HP_FILTER_260mHz:
2213 *val = ASM330LHH_HP_FILTER_260mHz;
2214 break;
2215
2216 case ASM330LHH_HP_FILTER_1Hz04:
2217 *val = ASM330LHH_HP_FILTER_1Hz04;
2218 break;
2219
2220 default:
2221 *val = ASM330LHH_HP_FILTER_NONE;
2222 break;
2223 }
2224
2225 return ret;
2226 }
2227
2228 /**
2229 * @}
2230 *
2231 */
2232
2233 /**
2234 * @defgroup ASM330LHH_ serial_interface
2235 * @brief This section groups all the functions concerning main
2236 * serial interface management (not auxiliary)
2237 * @{
2238 *
2239 */
2240
2241 /**
2242 * @brief Connect/Disconnect SDO/SA0 internal pull-up.[set]
2243 *
2244 * @param ctx Read / write interface definitions.(ptr)
2245 * @param val Change the values of sdo_pu_en in reg PIN_CTRL
2246 * @retval Interface status (MANDATORY: return 0 -> no Error).
2247 *
2248 */
asm330lhh_sdo_sa0_mode_set(stmdev_ctx_t * ctx,asm330lhh_sdo_pu_en_t val)2249 int32_t asm330lhh_sdo_sa0_mode_set(stmdev_ctx_t *ctx,
2250 asm330lhh_sdo_pu_en_t val)
2251 {
2252 asm330lhh_pin_ctrl_t pin_ctrl;
2253 int32_t ret;
2254
2255 ret = asm330lhh_read_reg(ctx, ASM330LHH_PIN_CTRL,
2256 (uint8_t *)&pin_ctrl, 1);
2257
2258 if (ret == 0)
2259 {
2260 pin_ctrl.sdo_pu_en = (uint8_t)val;
2261 ret = asm330lhh_write_reg(ctx, ASM330LHH_PIN_CTRL,
2262 (uint8_t *)&pin_ctrl, 1);
2263 }
2264
2265 return ret;
2266 }
2267
2268 /**
2269 * @brief Connect/Disconnect SDO/SA0 internal pull-up.[get]
2270 *
2271 * @param ctx Read / write interface definitions.(ptr)
2272 * @param val Get the values of sdo_pu_en in reg PIN_CTRL
2273 * @retval Interface status (MANDATORY: return 0 -> no Error).
2274 *
2275 */
asm330lhh_sdo_sa0_mode_get(stmdev_ctx_t * ctx,asm330lhh_sdo_pu_en_t * val)2276 int32_t asm330lhh_sdo_sa0_mode_get(stmdev_ctx_t *ctx,
2277 asm330lhh_sdo_pu_en_t *val)
2278 {
2279 asm330lhh_pin_ctrl_t pin_ctrl;
2280 int32_t ret;
2281
2282 ret = asm330lhh_read_reg(ctx, ASM330LHH_PIN_CTRL,
2283 (uint8_t *)&pin_ctrl, 1);
2284
2285 switch (pin_ctrl.sdo_pu_en)
2286 {
2287 case ASM330LHH_PULL_UP_DISC:
2288 *val = ASM330LHH_PULL_UP_DISC;
2289 break;
2290
2291 case ASM330LHH_PULL_UP_CONNECT:
2292 *val = ASM330LHH_PULL_UP_CONNECT;
2293 break;
2294
2295 default:
2296 *val = ASM330LHH_PULL_UP_DISC;
2297 break;
2298 }
2299
2300 return ret;
2301 }
2302
2303 /**
2304 * @brief SPI Serial Interface Mode selection.[set]
2305 *
2306 * @param ctx Read / write interface definitions.(ptr)
2307 * @param val Change the values of sim in reg CTRL3_C
2308 * @retval Interface status (MANDATORY: return 0 -> no Error).
2309 *
2310 */
asm330lhh_spi_mode_set(stmdev_ctx_t * ctx,asm330lhh_sim_t val)2311 int32_t asm330lhh_spi_mode_set(stmdev_ctx_t *ctx, asm330lhh_sim_t val)
2312 {
2313 asm330lhh_ctrl3_c_t ctrl3_c;
2314 int32_t ret;
2315
2316 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
2317
2318 if (ret == 0)
2319 {
2320 ctrl3_c.sim = (uint8_t)val;
2321 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
2322 }
2323
2324 return ret;
2325 }
2326
2327 /**
2328 * @brief SPI Serial Interface Mode selection.[get]
2329 *
2330 * @param ctx Read / write interface definitions.(ptr)
2331 * @param val Get the values of sim in reg CTRL3_C
2332 * @retval Interface status (MANDATORY: return 0 -> no Error).
2333 *
2334 */
asm330lhh_spi_mode_get(stmdev_ctx_t * ctx,asm330lhh_sim_t * val)2335 int32_t asm330lhh_spi_mode_get(stmdev_ctx_t *ctx,
2336 asm330lhh_sim_t *val)
2337 {
2338 asm330lhh_ctrl3_c_t ctrl3_c;
2339 int32_t ret;
2340
2341 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
2342
2343 switch (ctrl3_c.sim)
2344 {
2345 case ASM330LHH_SPI_4_WIRE:
2346 *val = ASM330LHH_SPI_4_WIRE;
2347 break;
2348
2349 case ASM330LHH_SPI_3_WIRE:
2350 *val = ASM330LHH_SPI_3_WIRE;
2351 break;
2352
2353 default:
2354 *val = ASM330LHH_SPI_4_WIRE;
2355 break;
2356 }
2357
2358 return ret;
2359 }
2360
2361 /**
2362 * @brief Disable / Enable I2C interface.[set]
2363 *
2364 * @param ctx Read / write interface definitions.(ptr)
2365 * @param val Change the values of i2c_disable in reg CTRL4_C
2366 * @retval Interface status (MANDATORY: return 0 -> no Error).
2367 *
2368 */
asm330lhh_i2c_interface_set(stmdev_ctx_t * ctx,asm330lhh_i2c_disable_t val)2369 int32_t asm330lhh_i2c_interface_set(stmdev_ctx_t *ctx,
2370 asm330lhh_i2c_disable_t val)
2371 {
2372 asm330lhh_ctrl4_c_t ctrl4_c;
2373 int32_t ret;
2374
2375 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
2376
2377 if (ret == 0)
2378 {
2379 ctrl4_c.i2c_disable = (uint8_t)val;
2380 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
2381 }
2382
2383 return ret;
2384 }
2385
2386 /**
2387 * @brief Disable / Enable I2C interface.[get]
2388 *
2389 * @param ctx Read / write interface definitions.(ptr)
2390 * @param val Get the values of i2c reg CTRL4_C
2391 * @retval Interface status (MANDATORY: return 0 -> no Error).
2392 *
2393 */
asm330lhh_i2c_interface_get(stmdev_ctx_t * ctx,asm330lhh_i2c_disable_t * val)2394 int32_t asm330lhh_i2c_interface_get(stmdev_ctx_t *ctx,
2395 asm330lhh_i2c_disable_t *val)
2396 {
2397 asm330lhh_ctrl4_c_t ctrl4_c;
2398 int32_t ret;
2399
2400 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
2401
2402 switch (ctrl4_c.i2c_disable)
2403 {
2404 case ASM330LHH_I2C_ENABLE:
2405 *val = ASM330LHH_I2C_ENABLE;
2406 break;
2407
2408 case ASM330LHH_I2C_DISABLE:
2409 *val = ASM330LHH_I2C_DISABLE;
2410 break;
2411
2412 default:
2413 *val = ASM330LHH_I2C_ENABLE;
2414 break;
2415 }
2416
2417 return ret;
2418 }
2419
2420 /**
2421 * @}
2422 *
2423 */
2424
2425 /**
2426 * @defgroup ASM330LHH_interrupt_pins
2427 * @brief This section groups all the functions that manage
2428 * interrupt pins
2429 * @{
2430 *
2431 */
2432
2433 /**
2434 * @brief Select the signal that need to route on int1 pad.[set]
2435 *
2436 * @param ctx Read / write interface definitions.(ptr)
2437 * @param val Structure of registers: INT1_CTRL,MD1_CFG,
2438 * EMB_FUNC_INT1, FSM_INT1_A, FSM_INT1_B
2439 * @retval Interface status (MANDATORY: return 0 -> no Error).
2440 *
2441 */
asm330lhh_pin_int1_route_set(stmdev_ctx_t * ctx,asm330lhh_pin_int1_route_t * val)2442 int32_t asm330lhh_pin_int1_route_set(stmdev_ctx_t *ctx,
2443 asm330lhh_pin_int1_route_t *val)
2444 {
2445 asm330lhh_int_cfg1_t tap_cfg2;
2446 int32_t ret;
2447
2448 ret = asm330lhh_write_reg(ctx, ASM330LHH_INT1_CTRL,
2449 (uint8_t *)&val->int1_ctrl, 1);
2450
2451 if (ret == 0)
2452 {
2453 ret = asm330lhh_write_reg(ctx, ASM330LHH_MD1_CFG,
2454 (uint8_t *)&val->md1_cfg, 1);
2455 }
2456
2457 if (ret == 0)
2458 {
2459 ret = asm330lhh_read_reg(ctx, ASM330LHH_INT_CFG1,
2460 (uint8_t *)&tap_cfg2, 1);
2461
2462 if ((val->int1_ctrl.den_drdy_flag |
2463 val->int1_ctrl.int1_boot |
2464 val->int1_ctrl.int1_cnt_bdr |
2465 val->int1_ctrl.int1_drdy_g |
2466 val->int1_ctrl.int1_drdy_xl |
2467 val->int1_ctrl.int1_fifo_full |
2468 val->int1_ctrl.int1_fifo_ovr |
2469 val->int1_ctrl.int1_fifo_th |
2470 val->md1_cfg.int1_6d |
2471 val->md1_cfg.int1_ff |
2472 val->md1_cfg.int1_wu |
2473 val->md1_cfg.int1_sleep_change) != PROPERTY_DISABLE)
2474 {
2475 tap_cfg2.interrupts_enable = PROPERTY_ENABLE;
2476 }
2477
2478 else
2479 {
2480 tap_cfg2.interrupts_enable = PROPERTY_DISABLE;
2481 }
2482 }
2483
2484 if (ret == 0)
2485 {
2486 ret = asm330lhh_write_reg(ctx, ASM330LHH_INT_CFG1,
2487 (uint8_t *)&tap_cfg2, 1);
2488 }
2489
2490 return ret;
2491 }
2492
2493 /**
2494 * @brief Select the signal that need to route on int1 pad.[get]
2495 *
2496 * @param ctx Read / write interface definitions.(ptr)
2497 * @param val Structure of registers: INT1_CTRL, MD1_CFG,
2498 * EMB_FUNC_INT1, FSM_INT1_A, FSM_INT1_B.(ptr)
2499 * @retval Interface status (MANDATORY: return 0 -> no Error).
2500 *
2501 */
asm330lhh_pin_int1_route_get(stmdev_ctx_t * ctx,asm330lhh_pin_int1_route_t * val)2502 int32_t asm330lhh_pin_int1_route_get(stmdev_ctx_t *ctx,
2503 asm330lhh_pin_int1_route_t *val)
2504 {
2505 int32_t ret;
2506
2507 ret = asm330lhh_read_reg(ctx, ASM330LHH_INT1_CTRL,
2508 (uint8_t *)&val->int1_ctrl, 1);
2509
2510 if (ret == 0)
2511 {
2512 ret = asm330lhh_read_reg(ctx, ASM330LHH_MD1_CFG,
2513 (uint8_t *)&val->md1_cfg, 1);
2514 }
2515
2516 return ret;
2517 }
2518
2519 /**
2520 * @brief Select the signal that need to route on int2 pad[set]
2521 *
2522 * @param ctx Read / write interface definitions.(ptr)
2523 * @param val Structure of registers INT2_CTRL, MD2_CFG,
2524 * EMB_FUNC_INT2, FSM_INT2_A, FSM_INT2_B
2525 * @retval Interface status (MANDATORY: return 0 -> no Error).
2526 *
2527 */
asm330lhh_pin_int2_route_set(stmdev_ctx_t * ctx,asm330lhh_pin_int2_route_t * val)2528 int32_t asm330lhh_pin_int2_route_set(stmdev_ctx_t *ctx,
2529 asm330lhh_pin_int2_route_t *val)
2530 {
2531 asm330lhh_int_cfg1_t tap_cfg2;
2532 int32_t ret;
2533
2534 ret = asm330lhh_write_reg(ctx, ASM330LHH_INT2_CTRL,
2535 (uint8_t *)&val->int2_ctrl, 1);
2536
2537 if (ret == 0)
2538 {
2539 ret = asm330lhh_write_reg(ctx, ASM330LHH_MD2_CFG,
2540 (uint8_t *)&val->md2_cfg, 1);
2541 }
2542
2543 if (ret == 0)
2544 {
2545 ret = asm330lhh_read_reg(ctx, ASM330LHH_INT_CFG1,
2546 (uint8_t *)&tap_cfg2, 1);
2547 }
2548
2549 if (ret == 0)
2550 {
2551 if ((val->int2_ctrl.int2_drdy_xl |
2552 val->int2_ctrl.int2_drdy_g |
2553 val->int2_ctrl.int2_drdy_temp |
2554 val->int2_ctrl.int2_fifo_th |
2555 val->int2_ctrl.int2_fifo_ovr |
2556 val->int2_ctrl.int2_fifo_full |
2557 val->int2_ctrl.int2_cnt_bdr |
2558 val->md2_cfg.int2_6d |
2559 val->md2_cfg.int2_ff |
2560 val->md2_cfg.int2_wu |
2561 val->md2_cfg.int2_sleep_change) != PROPERTY_DISABLE)
2562 {
2563 tap_cfg2.interrupts_enable = PROPERTY_ENABLE;
2564 }
2565
2566 else
2567 {
2568 tap_cfg2.interrupts_enable = PROPERTY_DISABLE;
2569 }
2570
2571 ret = asm330lhh_write_reg(ctx, ASM330LHH_INT_CFG1,
2572 (uint8_t *)&tap_cfg2, 1);
2573 }
2574
2575 return ret;
2576 }
2577
2578 /**
2579 * @brief Select the signal that need to route on int2 pad.[get]
2580 *
2581 * @param ctx Read / write interface definitions.(ptr)
2582 * @param val Structure of registers INT2_CTRL, MD2_CFG,
2583 * EMB_FUNC_INT2, FSM_INT2_A, FSM_INT2_B.[get]
2584 * @retval Interface status (MANDATORY: return 0 -> no Error).
2585 *
2586 */
asm330lhh_pin_int2_route_get(stmdev_ctx_t * ctx,asm330lhh_pin_int2_route_t * val)2587 int32_t asm330lhh_pin_int2_route_get(stmdev_ctx_t *ctx,
2588 asm330lhh_pin_int2_route_t *val)
2589 {
2590 int32_t ret;
2591
2592 ret = asm330lhh_read_reg(ctx, ASM330LHH_INT2_CTRL,
2593 (uint8_t *)&val->int2_ctrl, 1);
2594
2595 if (ret == 0)
2596 {
2597 ret = asm330lhh_read_reg(ctx, ASM330LHH_MD2_CFG,
2598 (uint8_t *)&val->md2_cfg, 1);
2599 }
2600
2601 return ret;
2602 }
2603
2604 /**
2605 * @brief Push-pull/open drain selection on interrupt pads.[set]
2606 *
2607 * @param ctx Read / write interface definitions.(ptr)
2608 * @param val Change the values of pp_od in reg CTRL3_C
2609 * @retval Interface status (MANDATORY: return 0 -> no Error).
2610 *
2611 */
asm330lhh_pin_mode_set(stmdev_ctx_t * ctx,asm330lhh_pp_od_t val)2612 int32_t asm330lhh_pin_mode_set(stmdev_ctx_t *ctx,
2613 asm330lhh_pp_od_t val)
2614 {
2615 asm330lhh_ctrl3_c_t ctrl3_c;
2616 int32_t ret;
2617
2618 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
2619
2620 if (ret == 0)
2621 {
2622 ctrl3_c.pp_od = (uint8_t)val;
2623 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
2624 }
2625
2626 return ret;
2627 }
2628
2629 /**
2630 * @brief Push-pull/open drain selection on interrupt pads.[get]
2631 *
2632 * @param ctx Read / write interface definitions.(ptr)
2633 * @param val Get the values of pp_od in reg CTRL3_C
2634 * @retval Interface status (MANDATORY: return 0 -> no Error).
2635 *
2636 */
asm330lhh_pin_mode_get(stmdev_ctx_t * ctx,asm330lhh_pp_od_t * val)2637 int32_t asm330lhh_pin_mode_get(stmdev_ctx_t *ctx,
2638 asm330lhh_pp_od_t *val)
2639 {
2640 asm330lhh_ctrl3_c_t ctrl3_c;
2641 int32_t ret;
2642
2643 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
2644
2645 switch (ctrl3_c.pp_od)
2646 {
2647 case ASM330LHH_PUSH_PULL:
2648 *val = ASM330LHH_PUSH_PULL;
2649 break;
2650
2651 case ASM330LHH_OPEN_DRAIN:
2652 *val = ASM330LHH_OPEN_DRAIN;
2653 break;
2654
2655 default:
2656 *val = ASM330LHH_PUSH_PULL;
2657 break;
2658 }
2659
2660 return ret;
2661 }
2662
2663 /**
2664 * @brief Interrupt active-high/low.[set]
2665 *
2666 * @param ctx Read / write interface definitions.(ptr)
2667 * @param val Change the values of h_lactive in reg CTRL3_C
2668 * @retval Interface status (MANDATORY: return 0 -> no Error).
2669 *
2670 */
asm330lhh_pin_polarity_set(stmdev_ctx_t * ctx,asm330lhh_h_lactive_t val)2671 int32_t asm330lhh_pin_polarity_set(stmdev_ctx_t *ctx,
2672 asm330lhh_h_lactive_t val)
2673 {
2674 asm330lhh_ctrl3_c_t ctrl3_c;
2675 int32_t ret;
2676
2677 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
2678
2679 if (ret == 0)
2680 {
2681 ctrl3_c.h_lactive = (uint8_t)val;
2682 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
2683 }
2684
2685 return ret;
2686 }
2687
2688 /**
2689 * @brief Interrupt active-high/low.[get]
2690 *
2691 * @param ctx Read / write interface definitions.(ptr)
2692 * @param val Get the values of h_lactive in reg CTRL3_C
2693 * @retval Interface status (MANDATORY: return 0 -> no Error).
2694 *
2695 */
asm330lhh_pin_polarity_get(stmdev_ctx_t * ctx,asm330lhh_h_lactive_t * val)2696 int32_t asm330lhh_pin_polarity_get(stmdev_ctx_t *ctx,
2697 asm330lhh_h_lactive_t *val)
2698 {
2699 asm330lhh_ctrl3_c_t ctrl3_c;
2700 int32_t ret;
2701
2702 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
2703
2704 switch (ctrl3_c.h_lactive)
2705 {
2706 case ASM330LHH_ACTIVE_HIGH:
2707 *val = ASM330LHH_ACTIVE_HIGH;
2708 break;
2709
2710 case ASM330LHH_ACTIVE_LOW:
2711 *val = ASM330LHH_ACTIVE_LOW;
2712 break;
2713
2714 default:
2715 *val = ASM330LHH_ACTIVE_HIGH;
2716 break;
2717 }
2718
2719 return ret;
2720 }
2721
2722 /**
2723 * @brief All interrupt signals become available on INT1 pin.[set]
2724 *
2725 * @param ctx Read / write interface definitions.(ptr)
2726 * @param val Change the values of int2_on_int1 in reg CTRL4_C
2727 * @retval Interface status (MANDATORY: return 0 -> no Error).
2728 *
2729 */
asm330lhh_all_on_int1_set(stmdev_ctx_t * ctx,uint8_t val)2730 int32_t asm330lhh_all_on_int1_set(stmdev_ctx_t *ctx, uint8_t val)
2731 {
2732 asm330lhh_ctrl4_c_t ctrl4_c;
2733 int32_t ret;
2734
2735 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
2736
2737 if (ret == 0)
2738 {
2739 ctrl4_c.int2_on_int1 = (uint8_t)val;
2740 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
2741 }
2742
2743 return ret;
2744 }
2745
2746 /**
2747 * @brief All interrupt signals become available on INT1 pin.[get]
2748 *
2749 * @param ctx Read / write interface definitions.(ptr)
2750 * @param val Change the values of int2_on_int1 in reg CTRL4_C
2751 * @retval Interface status (MANDATORY: return 0 -> no Error).
2752 *
2753 */
asm330lhh_all_on_int1_get(stmdev_ctx_t * ctx,uint8_t * val)2754 int32_t asm330lhh_all_on_int1_get(stmdev_ctx_t *ctx, uint8_t *val)
2755 {
2756 asm330lhh_ctrl4_c_t ctrl4_c;
2757 int32_t ret;
2758
2759 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
2760 *val = ctrl4_c.int2_on_int1;
2761
2762 return ret;
2763 }
2764
2765 /**
2766 * @brief All interrupt signals notification mode.[set]
2767 *
2768 * @param ctx Read / write interface definitions.(ptr)
2769 * @param val Change the values of lir in reg INT_CFG0
2770 * @retval Interface status (MANDATORY: return 0 -> no Error).
2771 *
2772 */
asm330lhh_int_notification_set(stmdev_ctx_t * ctx,asm330lhh_lir_t val)2773 int32_t asm330lhh_int_notification_set(stmdev_ctx_t *ctx,
2774 asm330lhh_lir_t val)
2775 {
2776 asm330lhh_int_cfg0_t int_cfg0;
2777 int32_t ret;
2778
2779 ret = asm330lhh_read_reg(ctx, ASM330LHH_INT_CFG0,
2780 (uint8_t *)&int_cfg0, 1);
2781
2782 if (ret == 0)
2783 {
2784 int_cfg0.lir = (uint8_t)val & 0x01U;
2785 int_cfg0.int_clr_on_read = (uint8_t)val & 0x01U;
2786 ret = asm330lhh_write_reg(ctx, ASM330LHH_INT_CFG0,
2787 (uint8_t *)&int_cfg0, 1);
2788 }
2789
2790 return ret;
2791 }
2792
2793 /**
2794 * @brief All interrupt signals notification mode.[get]
2795 *
2796 * @param ctx Read / write interface definitions.(ptr)
2797 * @param val Get the values of lir in reg INT_CFG0
2798 * @retval Interface status (MANDATORY: return 0 -> no Error).
2799 *
2800 */
asm330lhh_int_notification_get(stmdev_ctx_t * ctx,asm330lhh_lir_t * val)2801 int32_t asm330lhh_int_notification_get(stmdev_ctx_t *ctx,
2802 asm330lhh_lir_t *val)
2803 {
2804 asm330lhh_int_cfg0_t int_cfg0;
2805 int32_t ret;
2806
2807 *val = ASM330LHH_ALL_INT_PULSED;
2808 ret = asm330lhh_read_reg(ctx, ASM330LHH_INT_CFG0,
2809 (uint8_t *)&int_cfg0, 1);
2810
2811 switch ((int_cfg0.lir << 1) + int_cfg0.int_clr_on_read)
2812 {
2813 case ASM330LHH_ALL_INT_PULSED:
2814 *val = ASM330LHH_ALL_INT_PULSED;
2815 break;
2816
2817 case ASM330LHH_ALL_INT_LATCHED:
2818 *val = ASM330LHH_ALL_INT_LATCHED;
2819 break;
2820
2821 default:
2822 *val = ASM330LHH_ALL_INT_PULSED;
2823 break;
2824 }
2825
2826 return ret;
2827 }
2828
2829 /**
2830 * @}
2831 *
2832 */
2833
2834 /**
2835 * @defgroup ASM330LHH_Wake_Up_event
2836 * @brief This section groups all the functions that manage the
2837 * Wake Up event generation.
2838 * @{
2839 *
2840 */
2841
2842 /**
2843 * @brief Weight of 1 LSB of wakeup threshold.[set]
2844 * 0: 1 LSB =FS_XL / 64
2845 * 1: 1 LSB = FS_XL / 256
2846 *
2847 * @param ctx Read / write interface definitions.(ptr)
2848 * @param val Change the values of wake_ths_w in reg WAKE_UP_DUR
2849 * @retval Interface status (MANDATORY: return 0 -> no Error).
2850 *
2851 */
asm330lhh_wkup_ths_weight_set(stmdev_ctx_t * ctx,asm330lhh_wake_ths_w_t val)2852 int32_t asm330lhh_wkup_ths_weight_set(stmdev_ctx_t *ctx,
2853 asm330lhh_wake_ths_w_t val)
2854 {
2855 asm330lhh_wake_up_dur_t wake_up_dur;
2856 int32_t ret;
2857
2858 ret = asm330lhh_read_reg(ctx, ASM330LHH_WAKE_UP_DUR,
2859 (uint8_t *)&wake_up_dur, 1);
2860
2861 if (ret == 0)
2862 {
2863 wake_up_dur.wake_ths_w = (uint8_t)val;
2864 ret = asm330lhh_write_reg(ctx, ASM330LHH_WAKE_UP_DUR,
2865 (uint8_t *)&wake_up_dur, 1);
2866 }
2867
2868 return ret;
2869 }
2870
2871 /**
2872 * @brief Weight of 1 LSB of wakeup threshold.[get]
2873 * 0: 1 LSB =FS_XL / 64
2874 * 1: 1 LSB = FS_XL / 256
2875 *
2876 * @param ctx Read / write interface definitions.(ptr)
2877 * @param val Get the values of wake_ths_w in reg WAKE_UP_DUR
2878 * @retval Interface status (MANDATORY: return 0 -> no Error).
2879 *
2880 */
asm330lhh_wkup_ths_weight_get(stmdev_ctx_t * ctx,asm330lhh_wake_ths_w_t * val)2881 int32_t asm330lhh_wkup_ths_weight_get(stmdev_ctx_t *ctx,
2882 asm330lhh_wake_ths_w_t *val)
2883 {
2884 asm330lhh_wake_up_dur_t wake_up_dur;
2885 int32_t ret;
2886
2887 ret = asm330lhh_read_reg(ctx, ASM330LHH_WAKE_UP_DUR,
2888 (uint8_t *)&wake_up_dur, 1);
2889
2890 switch (wake_up_dur.wake_ths_w)
2891 {
2892 case ASM330LHH_LSb_FS_DIV_64:
2893 *val = ASM330LHH_LSb_FS_DIV_64;
2894 break;
2895
2896 case ASM330LHH_LSb_FS_DIV_256:
2897 *val = ASM330LHH_LSb_FS_DIV_256;
2898 break;
2899
2900 default:
2901 *val = ASM330LHH_LSb_FS_DIV_64;
2902 break;
2903 }
2904
2905 return ret;
2906 }
2907
2908 /**
2909 * @brief Threshold for wakeup: 1 LSB weight depends on WAKE_THS_W in
2910 * WAKE_UP_DUR.[set]
2911 *
2912 * @param ctx Read / write interface definitions.(ptr)
2913 * @param val Change the values of wk_ths in reg WAKE_UP_THS
2914 * @retval Interface status (MANDATORY: return 0 -> no Error).
2915 *
2916 */
asm330lhh_wkup_threshold_set(stmdev_ctx_t * ctx,uint8_t val)2917 int32_t asm330lhh_wkup_threshold_set(stmdev_ctx_t *ctx, uint8_t val)
2918 {
2919 asm330lhh_wake_up_ths_t wake_up_ths;
2920 int32_t ret;
2921
2922 ret = asm330lhh_read_reg(ctx, ASM330LHH_WAKE_UP_THS,
2923 (uint8_t *)&wake_up_ths, 1);
2924
2925 if (ret == 0)
2926 {
2927 wake_up_ths.wk_ths = (uint8_t)val;
2928 ret = asm330lhh_write_reg(ctx, ASM330LHH_WAKE_UP_THS,
2929 (uint8_t *)&wake_up_ths, 1);
2930 }
2931
2932 return ret;
2933 }
2934
2935 /**
2936 * @brief Threshold for wakeup: 1 LSB weight depends on WAKE_THS_W in
2937 * WAKE_UP_DUR.[get]
2938 *
2939 * @param ctx Read / write interface definitions.(ptr)
2940 * @param val Change the values of wk_ths in reg WAKE_UP_THS
2941 * @retval Interface status (MANDATORY: return 0 -> no Error).
2942 *
2943 */
asm330lhh_wkup_threshold_get(stmdev_ctx_t * ctx,uint8_t * val)2944 int32_t asm330lhh_wkup_threshold_get(stmdev_ctx_t *ctx, uint8_t *val)
2945 {
2946 asm330lhh_wake_up_ths_t wake_up_ths;
2947 int32_t ret;
2948
2949 ret = asm330lhh_read_reg(ctx, ASM330LHH_WAKE_UP_THS,
2950 (uint8_t *)&wake_up_ths, 1);
2951 *val = wake_up_ths.wk_ths;
2952
2953 return ret;
2954 }
2955
2956 /**
2957 * @brief Wake up duration event( 1LSb = 1 / ODR ).[set]
2958 *
2959 * @param ctx Read / write interface definitions.(ptr)
2960 * @param val Change the values of usr_off_on_wu in reg WAKE_UP_THS
2961 * @retval Interface status (MANDATORY: return 0 -> no Error).
2962 *
2963 */
asm330lhh_xl_usr_offset_on_wkup_set(stmdev_ctx_t * ctx,uint8_t val)2964 int32_t asm330lhh_xl_usr_offset_on_wkup_set(stmdev_ctx_t *ctx,
2965 uint8_t val)
2966 {
2967 asm330lhh_wake_up_ths_t wake_up_ths;
2968 int32_t ret;
2969
2970 ret = asm330lhh_read_reg(ctx, ASM330LHH_WAKE_UP_THS,
2971 (uint8_t *)&wake_up_ths, 1);
2972
2973 if (ret == 0)
2974 {
2975 wake_up_ths.usr_off_on_wu = (uint8_t)val;
2976 ret = asm330lhh_write_reg(ctx, ASM330LHH_WAKE_UP_THS,
2977 (uint8_t *)&wake_up_ths, 1);
2978 }
2979
2980 return ret;
2981 }
2982
2983 /**
2984 * @brief Wake up duration event( 1LSb = 1 / ODR ).[get]
2985 *
2986 * @param ctx Read / write interface definitions.(ptr)
2987 * @param val Change the values of usr_off_on_wu in reg WAKE_UP_THS
2988 * @retval Interface status (MANDATORY: return 0 -> no Error).
2989 *
2990 */
asm330lhh_xl_usr_offset_on_wkup_get(stmdev_ctx_t * ctx,uint8_t * val)2991 int32_t asm330lhh_xl_usr_offset_on_wkup_get(stmdev_ctx_t *ctx,
2992 uint8_t *val)
2993 {
2994 asm330lhh_wake_up_ths_t wake_up_ths;
2995 int32_t ret;
2996
2997 ret = asm330lhh_read_reg(ctx, ASM330LHH_WAKE_UP_THS,
2998 (uint8_t *)&wake_up_ths, 1);
2999 *val = wake_up_ths.usr_off_on_wu;
3000
3001 return ret;
3002 }
3003
3004 /**
3005 * @brief Wake up duration event(1LSb = 1 / ODR).[set]
3006 *
3007 * @param ctx Read / write interface definitions.(ptr)
3008 * @param val Change the values of wake_dur in reg WAKE_UP_DUR
3009 * @retval Interface status (MANDATORY: return 0 -> no Error).
3010 *
3011 */
asm330lhh_wkup_dur_set(stmdev_ctx_t * ctx,uint8_t val)3012 int32_t asm330lhh_wkup_dur_set(stmdev_ctx_t *ctx, uint8_t val)
3013 {
3014 asm330lhh_wake_up_dur_t wake_up_dur;
3015 int32_t ret;
3016
3017 ret = asm330lhh_read_reg(ctx, ASM330LHH_WAKE_UP_DUR,
3018 (uint8_t *)&wake_up_dur, 1);
3019
3020 if (ret == 0)
3021 {
3022 wake_up_dur.wake_dur = (uint8_t)val;
3023 ret = asm330lhh_write_reg(ctx, ASM330LHH_WAKE_UP_DUR,
3024 (uint8_t *)&wake_up_dur, 1);
3025 }
3026
3027 return ret;
3028 }
3029
3030 /**
3031 * @brief Wake up duration event(1LSb = 1 / ODR).[get]
3032 *
3033 * @param ctx Read / write interface definitions.(ptr)
3034 * @param val Change the values of wake_dur in reg WAKE_UP_DUR
3035 * @retval Interface status (MANDATORY: return 0 -> no Error).
3036 *
3037 */
asm330lhh_wkup_dur_get(stmdev_ctx_t * ctx,uint8_t * val)3038 int32_t asm330lhh_wkup_dur_get(stmdev_ctx_t *ctx, uint8_t *val)
3039 {
3040 asm330lhh_wake_up_dur_t wake_up_dur;
3041 int32_t ret;
3042
3043 ret = asm330lhh_read_reg(ctx, ASM330LHH_WAKE_UP_DUR,
3044 (uint8_t *)&wake_up_dur, 1);
3045 *val = wake_up_dur.wake_dur;
3046
3047 return ret;
3048 }
3049
3050 /**
3051 * @}
3052 *
3053 */
3054
3055 /**
3056 * @defgroup ASM330LHH_ Activity/Inactivity_detection
3057 * @brief This section groups all the functions concerning
3058 * activity/inactivity detection.
3059 * @{
3060 *
3061 */
3062
3063 /**
3064 * @brief Enables gyroscope Sleep mode.[set]
3065 *
3066 * @param ctx Read / write interface definitions.(ptr)
3067 * @param val Change the values of sleep_g in reg CTRL4_C
3068 * @retval Interface status (MANDATORY: return 0 -> no Error).
3069 *
3070 */
asm330lhh_gy_sleep_mode_set(stmdev_ctx_t * ctx,uint8_t val)3071 int32_t asm330lhh_gy_sleep_mode_set(stmdev_ctx_t *ctx, uint8_t val)
3072 {
3073 asm330lhh_ctrl4_c_t ctrl4_c;
3074 int32_t ret;
3075
3076 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
3077
3078 if (ret == 0)
3079 {
3080 ctrl4_c.sleep_g = (uint8_t)val;
3081 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
3082 }
3083
3084 return ret;
3085 }
3086
3087 /**
3088 * @brief Enables gyroscope Sleep mode.[get]
3089 *
3090 * @param ctx Read / write interface definitions.(ptr)
3091 * @param val Change the values of sleep_g in reg CTRL4_C
3092 * @retval Interface status (MANDATORY: return 0 -> no Error).
3093 *
3094 */
asm330lhh_gy_sleep_mode_get(stmdev_ctx_t * ctx,uint8_t * val)3095 int32_t asm330lhh_gy_sleep_mode_get(stmdev_ctx_t *ctx, uint8_t *val)
3096 {
3097 asm330lhh_ctrl4_c_t ctrl4_c;
3098 int32_t ret;
3099
3100 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
3101 *val = ctrl4_c.sleep_g;
3102
3103 return ret;
3104 }
3105
3106 /**
3107 * @brief Drives the sleep status instead of sleep change on INT pins
3108 * (only if INT1_SLEEP_CHANGE or INT2_SLEEP_CHANGE bits
3109 * are enabled).[set]
3110 *
3111 * @param ctx Read / write interface definitions.(ptr)
3112 * @param val Change the values of sleep_status_on_int in reg INT_CFG0
3113 * @retval Interface status (MANDATORY: return 0 -> no Error).
3114 *
3115 */
asm330lhh_act_pin_notification_set(stmdev_ctx_t * ctx,asm330lhh_sleep_status_on_int_t val)3116 int32_t asm330lhh_act_pin_notification_set(stmdev_ctx_t *ctx,
3117 asm330lhh_sleep_status_on_int_t val)
3118 {
3119 asm330lhh_int_cfg0_t int_cfg0;
3120 int32_t ret;
3121
3122 ret = asm330lhh_read_reg(ctx, ASM330LHH_INT_CFG0,
3123 (uint8_t *)&int_cfg0, 1);
3124
3125 if (ret == 0)
3126 {
3127 int_cfg0. sleep_status_on_int = (uint8_t)val;
3128 ret = asm330lhh_write_reg(ctx, ASM330LHH_INT_CFG0,
3129 (uint8_t *)&int_cfg0, 1);
3130 }
3131
3132 return ret;
3133 }
3134
3135 /**
3136 * @brief Drives the sleep status instead of sleep change on INT pins
3137 * (only if INT1_SLEEP_CHANGE or INT2_SLEEP_CHANGE bits
3138 * are enabled).[get]
3139 *
3140 * @param ctx Read / write interface definitions.(ptr)
3141 * @param val Get the values of sleep_status_on_int in reg INT_CFG0
3142 * @retval Interface status (MANDATORY: return 0 -> no Error).
3143 *
3144 */
asm330lhh_act_pin_notification_get(stmdev_ctx_t * ctx,asm330lhh_sleep_status_on_int_t * val)3145 int32_t asm330lhh_act_pin_notification_get(stmdev_ctx_t *ctx,
3146 asm330lhh_sleep_status_on_int_t *val)
3147 {
3148 asm330lhh_int_cfg0_t int_cfg0;
3149 int32_t ret;
3150
3151 ret = asm330lhh_read_reg(ctx, ASM330LHH_INT_CFG0,
3152 (uint8_t *)&int_cfg0, 1);
3153
3154 switch (int_cfg0. sleep_status_on_int)
3155 {
3156 case ASM330LHH_DRIVE_SLEEP_CHG_EVENT:
3157 *val = ASM330LHH_DRIVE_SLEEP_CHG_EVENT;
3158 break;
3159
3160 case ASM330LHH_DRIVE_SLEEP_STATUS:
3161 *val = ASM330LHH_DRIVE_SLEEP_STATUS;
3162 break;
3163
3164 default:
3165 *val = ASM330LHH_DRIVE_SLEEP_CHG_EVENT;
3166 break;
3167 }
3168
3169 return ret;
3170 }
3171
3172 /**
3173 * @brief Enable inactivity function.[set]
3174 *
3175 * @param ctx Read / write interface definitions.(ptr)
3176 * @param val Change the values of inact_en in reg INT_CFG1
3177 * @retval Interface status (MANDATORY: return 0 -> no Error).
3178 *
3179 */
asm330lhh_act_mode_set(stmdev_ctx_t * ctx,asm330lhh_inact_en_t val)3180 int32_t asm330lhh_act_mode_set(stmdev_ctx_t *ctx,
3181 asm330lhh_inact_en_t val)
3182 {
3183 asm330lhh_int_cfg1_t int_cfg1;
3184 int32_t ret;
3185
3186 ret = asm330lhh_read_reg(ctx, ASM330LHH_INT_CFG1,
3187 (uint8_t *)&int_cfg1, 1);
3188
3189 if (ret == 0)
3190 {
3191 int_cfg1.inact_en = (uint8_t)val;
3192 ret = asm330lhh_write_reg(ctx, ASM330LHH_INT_CFG1,
3193 (uint8_t *)&int_cfg1, 1);
3194 }
3195
3196 return ret;
3197 }
3198
3199 /**
3200 * @brief Enable inactivity function.[get]
3201 *
3202 * @param ctx Read / write interface definitions.(ptr)
3203 * @param val Get the values of inact_en in reg INT_CFG1
3204 * @retval Interface status (MANDATORY: return 0 -> no Error).
3205 *
3206 */
asm330lhh_act_mode_get(stmdev_ctx_t * ctx,asm330lhh_inact_en_t * val)3207 int32_t asm330lhh_act_mode_get(stmdev_ctx_t *ctx,
3208 asm330lhh_inact_en_t *val)
3209 {
3210 asm330lhh_int_cfg1_t int_cfg1;
3211 int32_t ret;
3212
3213 ret = asm330lhh_read_reg(ctx, ASM330LHH_INT_CFG1,
3214 (uint8_t *)&int_cfg1, 1);
3215
3216 switch (int_cfg1.inact_en)
3217 {
3218 case ASM330LHH_XL_AND_GY_NOT_AFFECTED:
3219 *val = ASM330LHH_XL_AND_GY_NOT_AFFECTED;
3220 break;
3221
3222 case ASM330LHH_XL_12Hz5_GY_NOT_AFFECTED:
3223 *val = ASM330LHH_XL_12Hz5_GY_NOT_AFFECTED;
3224 break;
3225
3226 case ASM330LHH_XL_12Hz5_GY_SLEEP:
3227 *val = ASM330LHH_XL_12Hz5_GY_SLEEP;
3228 break;
3229
3230 case ASM330LHH_XL_12Hz5_GY_PD:
3231 *val = ASM330LHH_XL_12Hz5_GY_PD;
3232 break;
3233
3234 default:
3235 *val = ASM330LHH_XL_AND_GY_NOT_AFFECTED;
3236 break;
3237 }
3238
3239 return ret;
3240 }
3241
3242 /**
3243 * @brief Duration to go in sleep mode (1 LSb = 512 / ODR).[set]
3244 *
3245 * @param ctx Read / write interface definitions.(ptr)
3246 * @param val Change the values of sleep_dur in reg WAKE_UP_DUR
3247 * @retval Interface status (MANDATORY: return 0 -> no Error).
3248 *
3249 */
asm330lhh_act_sleep_dur_set(stmdev_ctx_t * ctx,uint8_t val)3250 int32_t asm330lhh_act_sleep_dur_set(stmdev_ctx_t *ctx, uint8_t val)
3251 {
3252 asm330lhh_wake_up_dur_t wake_up_dur;
3253 int32_t ret;
3254
3255 ret = asm330lhh_read_reg(ctx, ASM330LHH_WAKE_UP_DUR,
3256 (uint8_t *)&wake_up_dur, 1);
3257
3258 if (ret == 0)
3259 {
3260 wake_up_dur.sleep_dur = (uint8_t)val;
3261 ret = asm330lhh_write_reg(ctx, ASM330LHH_WAKE_UP_DUR,
3262 (uint8_t *)&wake_up_dur, 1);
3263 }
3264
3265 return ret;
3266 }
3267
3268 /**
3269 * @brief Duration to go in sleep mode.(1 LSb = 512 / ODR).[get]
3270 *
3271 * @param ctx Read / write interface definitions.(ptr)
3272 * @param val Change the values of sleep_dur in reg WAKE_UP_DUR
3273 * @retval Interface status (MANDATORY: return 0 -> no Error).
3274 *
3275 */
asm330lhh_act_sleep_dur_get(stmdev_ctx_t * ctx,uint8_t * val)3276 int32_t asm330lhh_act_sleep_dur_get(stmdev_ctx_t *ctx, uint8_t *val)
3277 {
3278 asm330lhh_wake_up_dur_t wake_up_dur;
3279 int32_t ret;
3280
3281 ret = asm330lhh_read_reg(ctx, ASM330LHH_WAKE_UP_DUR,
3282 (uint8_t *)&wake_up_dur, 1);
3283 *val = wake_up_dur.sleep_dur;
3284
3285 return ret;
3286 }
3287
3288 /**
3289 * @}
3290 *
3291 */
3292
3293 /**
3294 * @defgroup ASM330LHH_ Six_position_detection(6D/4D)
3295 * @brief This section groups all the functions concerning six
3296 * position detection (6D).
3297 * @{
3298 *
3299 */
3300
3301 /**
3302 * @brief Threshold for 4D/6D function.[set]
3303 *
3304 * @param ctx Read / write interface definitions.(ptr)
3305 * @param val Change the values of sixd_ths in reg TAP_THS_6D
3306 * @retval Interface status (MANDATORY: return 0 -> no Error).
3307 *
3308 */
asm330lhh_6d_threshold_set(stmdev_ctx_t * ctx,asm330lhh_sixd_ths_t val)3309 int32_t asm330lhh_6d_threshold_set(stmdev_ctx_t *ctx,
3310 asm330lhh_sixd_ths_t val)
3311 {
3312 asm330lhh_ths_6d_t ths_6d;
3313 int32_t ret;
3314
3315 ret = asm330lhh_read_reg(ctx, ASM330LHH_THS_6D,
3316 (uint8_t *)&ths_6d, 1);
3317
3318 if (ret == 0)
3319 {
3320 ths_6d.sixd_ths = (uint8_t)val;
3321 ret = asm330lhh_write_reg(ctx, ASM330LHH_THS_6D,
3322 (uint8_t *)&ths_6d, 1);
3323 }
3324
3325 return ret;
3326 }
3327
3328 /**
3329 * @brief Threshold for 4D/6D function.[get]
3330 *
3331 * @param ctx Read / write interface definitions.(ptr)
3332 * @param val Get the values of sixd_ths in reg TAP_THS_6D
3333 * @retval Interface status (MANDATORY: return 0 -> no Error).
3334 *
3335 */
asm330lhh_6d_threshold_get(stmdev_ctx_t * ctx,asm330lhh_sixd_ths_t * val)3336 int32_t asm330lhh_6d_threshold_get(stmdev_ctx_t *ctx,
3337 asm330lhh_sixd_ths_t *val)
3338 {
3339 asm330lhh_ths_6d_t ths_6d;
3340 int32_t ret;
3341
3342 ret = asm330lhh_read_reg(ctx, ASM330LHH_THS_6D,
3343 (uint8_t *)&ths_6d, 1);
3344
3345 switch (ths_6d.sixd_ths)
3346 {
3347 case ASM330LHH_DEG_80:
3348 *val = ASM330LHH_DEG_80;
3349 break;
3350
3351 case ASM330LHH_DEG_70:
3352 *val = ASM330LHH_DEG_70;
3353 break;
3354
3355 case ASM330LHH_DEG_60:
3356 *val = ASM330LHH_DEG_60;
3357 break;
3358
3359 case ASM330LHH_DEG_50:
3360 *val = ASM330LHH_DEG_50;
3361 break;
3362
3363 default:
3364 *val = ASM330LHH_DEG_80;
3365 break;
3366 }
3367
3368 return ret;
3369 }
3370
3371 /**
3372 * @brief 4D orientation detection enable.[set]
3373 *
3374 * @param ctx Read / write interface definitions.(ptr)
3375 * @param val Change the values of d4d_en in reg TAP_THS_6D
3376 * @retval Interface status (MANDATORY: return 0 -> no Error).
3377 *
3378 */
asm330lhh_4d_mode_set(stmdev_ctx_t * ctx,uint8_t val)3379 int32_t asm330lhh_4d_mode_set(stmdev_ctx_t *ctx, uint8_t val)
3380 {
3381 asm330lhh_ths_6d_t ths_6d;
3382 int32_t ret;
3383
3384 ret = asm330lhh_read_reg(ctx, ASM330LHH_THS_6D,
3385 (uint8_t *)&ths_6d, 1);
3386
3387 if (ret == 0)
3388 {
3389 ths_6d.d4d_en = (uint8_t)val;
3390 ret = asm330lhh_write_reg(ctx, ASM330LHH_THS_6D,
3391 (uint8_t *)&ths_6d, 1);
3392 }
3393
3394 return ret;
3395 }
3396
3397 /**
3398 * @brief 4D orientation detection enable.[get]
3399 *
3400 * @param ctx Read / write interface definitions.(ptr)
3401 * @param val Change the values of d4d_en in reg TAP_THS_6D
3402 * @retval Interface status (MANDATORY: return 0 -> no Error).
3403 *
3404 */
asm330lhh_4d_mode_get(stmdev_ctx_t * ctx,uint8_t * val)3405 int32_t asm330lhh_4d_mode_get(stmdev_ctx_t *ctx, uint8_t *val)
3406 {
3407 asm330lhh_ths_6d_t ths_6d;
3408 int32_t ret;
3409
3410 ret = asm330lhh_read_reg(ctx, ASM330LHH_THS_6D,
3411 (uint8_t *)&ths_6d, 1);
3412 *val = ths_6d.d4d_en;
3413
3414 return ret;
3415 }
3416
3417 /**
3418 * @}
3419 *
3420 */
3421
3422 /**
3423 * @defgroup ASM330LHH_free_fall
3424 * @brief This section group all the functions concerning the free
3425 * fall detection.
3426 * @{
3427 *
3428 */
3429
3430 /**
3431 * @brief Free fall threshold setting.[set]
3432 *
3433 * @param ctx Read / write interface definitions.(ptr)
3434 * @param val Change the values of ff_ths in reg FREE_FALL
3435 * @retval Interface status (MANDATORY: return 0 -> no Error).
3436 *
3437 */
asm330lhh_ff_threshold_set(stmdev_ctx_t * ctx,asm330lhh_ff_ths_t val)3438 int32_t asm330lhh_ff_threshold_set(stmdev_ctx_t *ctx,
3439 asm330lhh_ff_ths_t val)
3440 {
3441 asm330lhh_free_fall_t free_fall;
3442 int32_t ret;
3443
3444 ret = asm330lhh_read_reg(ctx, ASM330LHH_FREE_FALL,
3445 (uint8_t *)&free_fall, 1);
3446
3447 if (ret == 0)
3448 {
3449 free_fall.ff_ths = (uint8_t)val;
3450 ret = asm330lhh_write_reg(ctx, ASM330LHH_FREE_FALL,
3451 (uint8_t *)&free_fall, 1);
3452 }
3453
3454 return ret;
3455 }
3456
3457 /**
3458 * @brief Free fall threshold setting.[get]
3459 *
3460 * @param ctx Read / write interface definitions.(ptr)
3461 * @param val Get the values of ff_ths in reg FREE_FALL
3462 * @retval Interface status (MANDATORY: return 0 -> no Error).
3463 *
3464 */
asm330lhh_ff_threshold_get(stmdev_ctx_t * ctx,asm330lhh_ff_ths_t * val)3465 int32_t asm330lhh_ff_threshold_get(stmdev_ctx_t *ctx,
3466 asm330lhh_ff_ths_t *val)
3467 {
3468 asm330lhh_free_fall_t free_fall;
3469 int32_t ret;
3470
3471 ret = asm330lhh_read_reg(ctx, ASM330LHH_FREE_FALL,
3472 (uint8_t *)&free_fall, 1);
3473
3474 switch (free_fall.ff_ths)
3475 {
3476 case ASM330LHH_FF_TSH_156mg:
3477 *val = ASM330LHH_FF_TSH_156mg;
3478 break;
3479
3480 case ASM330LHH_FF_TSH_219mg:
3481 *val = ASM330LHH_FF_TSH_219mg;
3482 break;
3483
3484 case ASM330LHH_FF_TSH_250mg:
3485 *val = ASM330LHH_FF_TSH_250mg;
3486 break;
3487
3488 case ASM330LHH_FF_TSH_312mg:
3489 *val = ASM330LHH_FF_TSH_312mg;
3490 break;
3491
3492 case ASM330LHH_FF_TSH_344mg:
3493 *val = ASM330LHH_FF_TSH_344mg;
3494 break;
3495
3496 case ASM330LHH_FF_TSH_406mg:
3497 *val = ASM330LHH_FF_TSH_406mg;
3498 break;
3499
3500 case ASM330LHH_FF_TSH_469mg:
3501 *val = ASM330LHH_FF_TSH_469mg;
3502 break;
3503
3504 case ASM330LHH_FF_TSH_500mg:
3505 *val = ASM330LHH_FF_TSH_500mg;
3506 break;
3507
3508 default:
3509 *val = ASM330LHH_FF_TSH_156mg;
3510 break;
3511 }
3512
3513 return ret;
3514 }
3515
3516 /**
3517 * @brief Free-fall duration event(1LSb = 1 / ODR).[set]
3518 *
3519 * @param ctx Read / write interface definitions.(ptr)
3520 * @param val Change the values of ff_dur in reg FREE_FALL
3521 * @retval Interface status (MANDATORY: return 0 -> no Error).
3522 *
3523 */
asm330lhh_ff_dur_set(stmdev_ctx_t * ctx,uint8_t val)3524 int32_t asm330lhh_ff_dur_set(stmdev_ctx_t *ctx, uint8_t val)
3525 {
3526 asm330lhh_wake_up_dur_t wake_up_dur;
3527 asm330lhh_free_fall_t free_fall;
3528 int32_t ret;
3529
3530 ret = asm330lhh_read_reg(ctx, ASM330LHH_WAKE_UP_DUR,
3531 (uint8_t *)&wake_up_dur, 1);
3532
3533 if (ret == 0)
3534 {
3535 wake_up_dur.ff_dur = (val & 0x20U) >> 5;
3536 ret = asm330lhh_write_reg(ctx, ASM330LHH_WAKE_UP_DUR,
3537 (uint8_t *)&wake_up_dur, 1);
3538 }
3539
3540 if (ret == 0)
3541 {
3542 ret = asm330lhh_read_reg(ctx, ASM330LHH_FREE_FALL,
3543 (uint8_t *)&free_fall, 1);
3544 }
3545
3546 if (ret == 0)
3547 {
3548 free_fall.ff_dur = val & 0x1FU;
3549 ret = asm330lhh_write_reg(ctx, ASM330LHH_FREE_FALL,
3550 (uint8_t *)&free_fall, 1);
3551 }
3552
3553 return ret;
3554 }
3555
3556 /**
3557 * @brief Free-fall duration event(1LSb = 1 / ODR).[get]
3558 *
3559 * @param ctx Read / write interface definitions.(ptr)
3560 * @param val Change the values of ff_dur in reg FREE_FALL
3561 * @retval Interface status (MANDATORY: return 0 -> no Error).
3562 *
3563 */
asm330lhh_ff_dur_get(stmdev_ctx_t * ctx,uint8_t * val)3564 int32_t asm330lhh_ff_dur_get(stmdev_ctx_t *ctx, uint8_t *val)
3565 {
3566 asm330lhh_wake_up_dur_t wake_up_dur;
3567 asm330lhh_free_fall_t free_fall;
3568 int32_t ret;
3569
3570 ret = asm330lhh_read_reg(ctx, ASM330LHH_WAKE_UP_DUR,
3571 (uint8_t *)&wake_up_dur, 1);
3572
3573 if (ret == 0)
3574 {
3575 ret = asm330lhh_read_reg(ctx, ASM330LHH_FREE_FALL,
3576 (uint8_t *)&free_fall, 1);
3577 }
3578
3579 *val = (wake_up_dur.ff_dur << 5) + free_fall.ff_dur;
3580
3581 return ret;
3582 }
3583
3584 /**
3585 * @}
3586 *
3587 */
3588
3589 /**
3590 * @defgroup ASM330LHH_fifo
3591 * @brief This section group all the functions concerning
3592 * the fifo usage
3593 * @{
3594 *
3595 */
3596
3597 /**
3598 * @brief FIFO watermark level selection.[set]
3599 *
3600 * @param ctx Read / write interface definitions.(ptr)
3601 * @param val Change the values of wtm in reg FIFO_CTRL1
3602 * @retval Interface status (MANDATORY: return 0 -> no Error).
3603 *
3604 */
asm330lhh_fifo_watermark_set(stmdev_ctx_t * ctx,uint16_t val)3605 int32_t asm330lhh_fifo_watermark_set(stmdev_ctx_t *ctx, uint16_t val)
3606 {
3607 asm330lhh_fifo_ctrl1_t fifo_ctrl1;
3608 asm330lhh_fifo_ctrl2_t fifo_ctrl2;
3609 int32_t ret;
3610
3611 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL2,
3612 (uint8_t *)&fifo_ctrl2, 1);
3613
3614 if (ret == 0)
3615 {
3616 fifo_ctrl2.wtm = (uint8_t)((val / 256U) & 0x01U);
3617 ret = asm330lhh_write_reg(ctx, ASM330LHH_FIFO_CTRL2,
3618 (uint8_t *)&fifo_ctrl2, 1);
3619 }
3620
3621 if (ret == 0)
3622 {
3623 fifo_ctrl1.wtm = (uint8_t)(val - (fifo_ctrl2.wtm * 256U));
3624 ret = asm330lhh_write_reg(ctx, ASM330LHH_FIFO_CTRL1,
3625 (uint8_t *)&fifo_ctrl1, 1);
3626 }
3627
3628 return ret;
3629 }
3630
3631 /**
3632 * @brief FIFO watermark level selection.[get]
3633 *
3634 * @param ctx Read / write interface definitions.(ptr)
3635 * @param val Change the values of wtm in reg FIFO_CTRL1
3636 * @retval Interface status (MANDATORY: return 0 -> no Error).
3637 *
3638 */
asm330lhh_fifo_watermark_get(stmdev_ctx_t * ctx,uint16_t * val)3639 int32_t asm330lhh_fifo_watermark_get(stmdev_ctx_t *ctx, uint16_t *val)
3640 {
3641 asm330lhh_fifo_ctrl1_t fifo_ctrl1;
3642 asm330lhh_fifo_ctrl2_t fifo_ctrl2;
3643 int32_t ret;
3644
3645 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL2,
3646 (uint8_t *)&fifo_ctrl2, 1);
3647
3648 if (ret == 0)
3649 {
3650 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL1,
3651 (uint8_t *)&fifo_ctrl1, 1);
3652 }
3653
3654 *val = fifo_ctrl2.wtm;
3655 *val = (*val * 256U) + fifo_ctrl1.wtm;
3656
3657 return ret;
3658 }
3659 /**
3660 * @brief Enables ODR CHANGE virtual sensor to be batched in FIFO.[set]
3661 *
3662 * @param ctx Read / write interface definitions.(ptr)
3663 * @param val Change the values of odrchg_en in reg FIFO_CTRL2
3664 * @retval Interface status (MANDATORY: return 0 -> no Error).
3665 *
3666 */
asm330lhh_fifo_virtual_sens_odr_chg_set(stmdev_ctx_t * ctx,uint8_t val)3667 int32_t asm330lhh_fifo_virtual_sens_odr_chg_set(stmdev_ctx_t *ctx,
3668 uint8_t val)
3669 {
3670 asm330lhh_fifo_ctrl2_t fifo_ctrl2;
3671 int32_t ret;
3672
3673 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL2,
3674 (uint8_t *)&fifo_ctrl2, 1);
3675
3676 if (ret == 0)
3677 {
3678 fifo_ctrl2.odrchg_en = (uint8_t)val;
3679 ret = asm330lhh_write_reg(ctx, ASM330LHH_FIFO_CTRL2,
3680 (uint8_t *)&fifo_ctrl2, 1);
3681 }
3682
3683 return ret;
3684 }
3685
3686 /**
3687 * @brief Enables ODR CHANGE virtual sensor to be batched in FIFO.[get]
3688 *
3689 * @param ctx Read / write interface definitions.(ptr)
3690 * @param val Change the values of odrchg_en in reg FIFO_CTRL2
3691 * @retval Interface status (MANDATORY: return 0 -> no Error).
3692 *
3693 */
asm330lhh_fifo_virtual_sens_odr_chg_get(stmdev_ctx_t * ctx,uint8_t * val)3694 int32_t asm330lhh_fifo_virtual_sens_odr_chg_get(stmdev_ctx_t *ctx,
3695 uint8_t *val)
3696 {
3697 asm330lhh_fifo_ctrl2_t fifo_ctrl2;
3698 int32_t ret;
3699
3700 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL2,
3701 (uint8_t *)&fifo_ctrl2, 1);
3702 *val = fifo_ctrl2.odrchg_en;
3703
3704 return ret;
3705 }
3706
3707 /**
3708 * @brief Sensing chain FIFO stop values memorization at threshold
3709 * level.[set]
3710 *
3711 * @param ctx Read / write interface definitions.(ptr)
3712 * @param val Change the values of stop_on_wtm in reg FIFO_CTRL2
3713 * @retval Interface status (MANDATORY: return 0 -> no Error).
3714 *
3715 */
asm330lhh_fifo_stop_on_wtm_set(stmdev_ctx_t * ctx,uint8_t val)3716 int32_t asm330lhh_fifo_stop_on_wtm_set(stmdev_ctx_t *ctx, uint8_t val)
3717 {
3718 asm330lhh_fifo_ctrl2_t fifo_ctrl2;
3719 int32_t ret;
3720
3721 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL2,
3722 (uint8_t *)&fifo_ctrl2, 1);
3723
3724 if (ret == 0)
3725 {
3726 fifo_ctrl2.stop_on_wtm = (uint8_t)val;
3727 ret = asm330lhh_write_reg(ctx, ASM330LHH_FIFO_CTRL2,
3728 (uint8_t *)&fifo_ctrl2, 1);
3729 }
3730
3731 return ret;
3732 }
3733
3734 /**
3735 * @brief Sensing chain FIFO stop values memorization at threshold
3736 * level.[get]
3737 *
3738 * @param ctx Read / write interface definitions.(ptr)
3739 * @param val Change the values of stop_on_wtm in reg FIFO_CTRL2
3740 * @retval Interface status (MANDATORY: return 0 -> no Error).
3741 *
3742 */
asm330lhh_fifo_stop_on_wtm_get(stmdev_ctx_t * ctx,uint8_t * val)3743 int32_t asm330lhh_fifo_stop_on_wtm_get(stmdev_ctx_t *ctx,
3744 uint8_t *val)
3745 {
3746 asm330lhh_fifo_ctrl2_t fifo_ctrl2;
3747 int32_t ret;
3748
3749 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL2,
3750 (uint8_t *)&fifo_ctrl2, 1);
3751 *val = fifo_ctrl2.stop_on_wtm;
3752
3753 return ret;
3754 }
3755
3756 /**
3757 * @brief Selects Batching Data Rate (writing frequency in FIFO)
3758 * for accelerometer data.[set]
3759 *
3760 * @param ctx Read / write interface definitions.(ptr)
3761 * @param val Change the values of bdr_xl in reg FIFO_CTRL3
3762 * @retval Interface status (MANDATORY: return 0 -> no Error).
3763 *
3764 */
asm330lhh_fifo_xl_batch_set(stmdev_ctx_t * ctx,asm330lhh_bdr_xl_t val)3765 int32_t asm330lhh_fifo_xl_batch_set(stmdev_ctx_t *ctx,
3766 asm330lhh_bdr_xl_t val)
3767 {
3768 asm330lhh_fifo_ctrl3_t fifo_ctrl3;
3769 int32_t ret;
3770
3771 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL3,
3772 (uint8_t *)&fifo_ctrl3, 1);
3773
3774 if (ret == 0)
3775 {
3776 fifo_ctrl3.bdr_xl = (uint8_t)val;
3777 ret = asm330lhh_write_reg(ctx, ASM330LHH_FIFO_CTRL3,
3778 (uint8_t *)&fifo_ctrl3, 1);
3779 }
3780
3781 return ret;
3782 }
3783
3784 /**
3785 * @brief Selects Batching Data Rate (writing frequency in FIFO)
3786 * for accelerometer data.[get]
3787 *
3788 * @param ctx Read / write interface definitions.(ptr)
3789 * @param val Get the values of bdr_xl in reg FIFO_CTRL3
3790 * @retval Interface status (MANDATORY: return 0 -> no Error).
3791 *
3792 */
asm330lhh_fifo_xl_batch_get(stmdev_ctx_t * ctx,asm330lhh_bdr_xl_t * val)3793 int32_t asm330lhh_fifo_xl_batch_get(stmdev_ctx_t *ctx,
3794 asm330lhh_bdr_xl_t *val)
3795 {
3796 asm330lhh_fifo_ctrl3_t fifo_ctrl3;
3797 int32_t ret;
3798
3799 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL3,
3800 (uint8_t *)&fifo_ctrl3, 1);
3801
3802 switch (fifo_ctrl3.bdr_xl)
3803 {
3804 case ASM330LHH_XL_NOT_BATCHED:
3805 *val = ASM330LHH_XL_NOT_BATCHED;
3806 break;
3807
3808 case ASM330LHH_XL_BATCHED_AT_12Hz5:
3809 *val = ASM330LHH_XL_BATCHED_AT_12Hz5;
3810 break;
3811
3812 case ASM330LHH_XL_BATCHED_AT_26Hz:
3813 *val = ASM330LHH_XL_BATCHED_AT_26Hz;
3814 break;
3815
3816 case ASM330LHH_XL_BATCHED_AT_52Hz:
3817 *val = ASM330LHH_XL_BATCHED_AT_52Hz;
3818 break;
3819
3820 case ASM330LHH_XL_BATCHED_AT_104Hz:
3821 *val = ASM330LHH_XL_BATCHED_AT_104Hz;
3822 break;
3823
3824 case ASM330LHH_XL_BATCHED_AT_208Hz:
3825 *val = ASM330LHH_XL_BATCHED_AT_208Hz;
3826 break;
3827
3828 case ASM330LHH_XL_BATCHED_AT_417Hz:
3829 *val = ASM330LHH_XL_BATCHED_AT_417Hz;
3830 break;
3831
3832 case ASM330LHH_XL_BATCHED_AT_833Hz:
3833 *val = ASM330LHH_XL_BATCHED_AT_833Hz;
3834 break;
3835
3836 case ASM330LHH_XL_BATCHED_AT_1667Hz:
3837 *val = ASM330LHH_XL_BATCHED_AT_1667Hz;
3838 break;
3839
3840 case ASM330LHH_XL_BATCHED_AT_3333Hz:
3841 *val = ASM330LHH_XL_BATCHED_AT_3333Hz;
3842 break;
3843
3844 case ASM330LHH_XL_BATCHED_AT_6667Hz:
3845 *val = ASM330LHH_XL_BATCHED_AT_6667Hz;
3846 break;
3847
3848 case ASM330LHH_XL_BATCHED_AT_6Hz5:
3849 *val = ASM330LHH_XL_BATCHED_AT_6Hz5;
3850 break;
3851
3852 default:
3853 *val = ASM330LHH_XL_NOT_BATCHED;
3854 break;
3855 }
3856
3857 return ret;
3858 }
3859
3860 /**
3861 * @brief Selects Batching Data Rate (writing frequency in FIFO)
3862 * for gyroscope data.[set]
3863 *
3864 * @param ctx Read / write interface definitions.(ptr)
3865 * @param val Change the values of bdr_gy in reg FIFO_CTRL3
3866 * @retval Interface status (MANDATORY: return 0 -> no Error).
3867 *
3868 */
asm330lhh_fifo_gy_batch_set(stmdev_ctx_t * ctx,asm330lhh_bdr_gy_t val)3869 int32_t asm330lhh_fifo_gy_batch_set(stmdev_ctx_t *ctx,
3870 asm330lhh_bdr_gy_t val)
3871 {
3872 asm330lhh_fifo_ctrl3_t fifo_ctrl3;
3873 int32_t ret;
3874
3875 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL3,
3876 (uint8_t *)&fifo_ctrl3, 1);
3877
3878 if (ret == 0)
3879 {
3880 fifo_ctrl3.bdr_gy = (uint8_t)val;
3881 ret = asm330lhh_write_reg(ctx, ASM330LHH_FIFO_CTRL3,
3882 (uint8_t *)&fifo_ctrl3, 1);
3883 }
3884
3885 return ret;
3886 }
3887
3888 /**
3889 * @brief Selects Batching Data Rate (writing frequency in FIFO)
3890 * for gyroscope data.[get]
3891 *
3892 * @param ctx Read / write interface definitions.(ptr)
3893 * @param val Get the values of bdr_gy in reg FIFO_CTRL3
3894 * @retval Interface status (MANDATORY: return 0 -> no Error).
3895 *
3896 */
asm330lhh_fifo_gy_batch_get(stmdev_ctx_t * ctx,asm330lhh_bdr_gy_t * val)3897 int32_t asm330lhh_fifo_gy_batch_get(stmdev_ctx_t *ctx,
3898 asm330lhh_bdr_gy_t *val)
3899 {
3900 asm330lhh_fifo_ctrl3_t fifo_ctrl3;
3901 int32_t ret;
3902
3903 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL3,
3904 (uint8_t *)&fifo_ctrl3, 1);
3905
3906 switch (fifo_ctrl3.bdr_gy)
3907 {
3908 case ASM330LHH_GY_NOT_BATCHED:
3909 *val = ASM330LHH_GY_NOT_BATCHED;
3910 break;
3911
3912 case ASM330LHH_GY_BATCHED_AT_12Hz5:
3913 *val = ASM330LHH_GY_BATCHED_AT_12Hz5;
3914 break;
3915
3916 case ASM330LHH_GY_BATCHED_AT_26Hz:
3917 *val = ASM330LHH_GY_BATCHED_AT_26Hz;
3918 break;
3919
3920 case ASM330LHH_GY_BATCHED_AT_52Hz:
3921 *val = ASM330LHH_GY_BATCHED_AT_52Hz;
3922 break;
3923
3924 case ASM330LHH_GY_BATCHED_AT_104Hz:
3925 *val = ASM330LHH_GY_BATCHED_AT_104Hz;
3926 break;
3927
3928 case ASM330LHH_GY_BATCHED_AT_208Hz:
3929 *val = ASM330LHH_GY_BATCHED_AT_208Hz;
3930 break;
3931
3932 case ASM330LHH_GY_BATCHED_AT_417Hz:
3933 *val = ASM330LHH_GY_BATCHED_AT_417Hz;
3934 break;
3935
3936 case ASM330LHH_GY_BATCHED_AT_833Hz:
3937 *val = ASM330LHH_GY_BATCHED_AT_833Hz;
3938 break;
3939
3940 case ASM330LHH_GY_BATCHED_AT_1667Hz:
3941 *val = ASM330LHH_GY_BATCHED_AT_1667Hz;
3942 break;
3943
3944 case ASM330LHH_GY_BATCHED_AT_3333Hz:
3945 *val = ASM330LHH_GY_BATCHED_AT_3333Hz;
3946 break;
3947
3948 case ASM330LHH_GY_BATCHED_AT_6667Hz:
3949 *val = ASM330LHH_GY_BATCHED_AT_6667Hz;
3950 break;
3951
3952 case ASM330LHH_GY_BATCHED_AT_6Hz5:
3953 *val = ASM330LHH_GY_BATCHED_AT_6Hz5;
3954 break;
3955
3956 default:
3957 *val = ASM330LHH_GY_NOT_BATCHED;
3958 break;
3959 }
3960
3961 return ret;
3962 }
3963
3964 /**
3965 * @brief FIFO mode selection.[set]
3966 *
3967 * @param ctx Read / write interface definitions.(ptr)
3968 * @param val Change the values of fifo_mode in reg FIFO_CTRL4
3969 * @retval Interface status (MANDATORY: return 0 -> no Error).
3970 *
3971 */
asm330lhh_fifo_mode_set(stmdev_ctx_t * ctx,asm330lhh_fifo_mode_t val)3972 int32_t asm330lhh_fifo_mode_set(stmdev_ctx_t *ctx,
3973 asm330lhh_fifo_mode_t val)
3974 {
3975 asm330lhh_fifo_ctrl4_t fifo_ctrl4;
3976 int32_t ret;
3977
3978 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL4,
3979 (uint8_t *)&fifo_ctrl4, 1);
3980
3981 if (ret == 0)
3982 {
3983 fifo_ctrl4.fifo_mode = (uint8_t)val;
3984 ret = asm330lhh_write_reg(ctx, ASM330LHH_FIFO_CTRL4,
3985 (uint8_t *)&fifo_ctrl4, 1);
3986 }
3987
3988 return ret;
3989 }
3990
3991 /**
3992 * @brief FIFO mode selection.[get]
3993 *
3994 * @param ctx Read / write interface definitions.(ptr)
3995 * @param val Get the values of fifo_mode in reg FIFO_CTRL4
3996 * @retval Interface status (MANDATORY: return 0 -> no Error).
3997 *
3998 */
asm330lhh_fifo_mode_get(stmdev_ctx_t * ctx,asm330lhh_fifo_mode_t * val)3999 int32_t asm330lhh_fifo_mode_get(stmdev_ctx_t *ctx,
4000 asm330lhh_fifo_mode_t *val)
4001 {
4002 asm330lhh_fifo_ctrl4_t fifo_ctrl4;
4003 int32_t ret;
4004
4005 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL4,
4006 (uint8_t *)&fifo_ctrl4, 1);
4007
4008 switch (fifo_ctrl4.fifo_mode)
4009 {
4010 case ASM330LHH_BYPASS_MODE:
4011 *val = ASM330LHH_BYPASS_MODE;
4012 break;
4013
4014 case ASM330LHH_FIFO_MODE:
4015 *val = ASM330LHH_FIFO_MODE;
4016 break;
4017
4018 case ASM330LHH_STREAM_TO_FIFO_MODE:
4019 *val = ASM330LHH_STREAM_TO_FIFO_MODE;
4020 break;
4021
4022 case ASM330LHH_BYPASS_TO_STREAM_MODE:
4023 *val = ASM330LHH_BYPASS_TO_STREAM_MODE;
4024 break;
4025
4026 case ASM330LHH_STREAM_MODE:
4027 *val = ASM330LHH_STREAM_MODE;
4028 break;
4029
4030 case ASM330LHH_BYPASS_TO_FIFO_MODE:
4031 *val = ASM330LHH_BYPASS_TO_FIFO_MODE;
4032 break;
4033
4034 default:
4035 *val = ASM330LHH_BYPASS_MODE;
4036 break;
4037 }
4038
4039 return ret;
4040 }
4041
4042 /**
4043 * @brief Selects Batching Data Rate (writing frequency in FIFO)
4044 * for temperature data.[set]
4045 *
4046 * @param ctx Read / write interface definitions.(ptr)
4047 * @param val Change the values of odr_t_batch in reg FIFO_CTRL4
4048 * @retval Interface status (MANDATORY: return 0 -> no Error).
4049 *
4050 */
asm330lhh_fifo_temp_batch_set(stmdev_ctx_t * ctx,asm330lhh_odr_t_batch_t val)4051 int32_t asm330lhh_fifo_temp_batch_set(stmdev_ctx_t *ctx,
4052 asm330lhh_odr_t_batch_t val)
4053 {
4054 asm330lhh_fifo_ctrl4_t fifo_ctrl4;
4055 int32_t ret;
4056
4057 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL4,
4058 (uint8_t *)&fifo_ctrl4, 1);
4059
4060 if (ret == 0)
4061 {
4062 fifo_ctrl4.odr_t_batch = (uint8_t)val;
4063 ret = asm330lhh_write_reg(ctx, ASM330LHH_FIFO_CTRL4,
4064 (uint8_t *)&fifo_ctrl4, 1);
4065 }
4066
4067 return ret;
4068 }
4069
4070 /**
4071 * @brief Selects Batching Data Rate (writing frequency in FIFO)
4072 * for temperature data.[get]
4073 *
4074 * @param ctx Read / write interface definitions.(ptr)
4075 * @param val Get the values of odr_t_batch in reg FIFO_CTRL4
4076 * @retval Interface status (MANDATORY: return 0 -> no Error).
4077 *
4078 */
asm330lhh_fifo_temp_batch_get(stmdev_ctx_t * ctx,asm330lhh_odr_t_batch_t * val)4079 int32_t asm330lhh_fifo_temp_batch_get(stmdev_ctx_t *ctx,
4080 asm330lhh_odr_t_batch_t *val)
4081 {
4082 asm330lhh_fifo_ctrl4_t fifo_ctrl4;
4083 int32_t ret;
4084
4085 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL4,
4086 (uint8_t *)&fifo_ctrl4, 1);
4087
4088 switch (fifo_ctrl4.odr_t_batch)
4089 {
4090 case ASM330LHH_TEMP_NOT_BATCHED:
4091 *val = ASM330LHH_TEMP_NOT_BATCHED;
4092 break;
4093
4094 case ASM330LHH_TEMP_BATCHED_AT_52Hz:
4095 *val = ASM330LHH_TEMP_BATCHED_AT_52Hz;
4096 break;
4097
4098 case ASM330LHH_TEMP_BATCHED_AT_12Hz5:
4099 *val = ASM330LHH_TEMP_BATCHED_AT_12Hz5;
4100 break;
4101
4102 case ASM330LHH_TEMP_BATCHED_AT_1Hz6:
4103 *val = ASM330LHH_TEMP_BATCHED_AT_1Hz6;
4104 break;
4105
4106 default:
4107 *val = ASM330LHH_TEMP_NOT_BATCHED;
4108 break;
4109 }
4110
4111 return ret;
4112 }
4113
4114 /**
4115 * @brief Selects decimation for timestamp batching in FIFO.
4116 * Writing rate will be the maximum rate between XL and
4117 * GYRO BDR divided by decimation decoder.[set]
4118 *
4119 * @param ctx Read / write interface definitions.(ptr)
4120 * @param val Change the values of odr_ts_batch in reg FIFO_CTRL4
4121 * @retval Interface status (MANDATORY: return 0 -> no Error).
4122 *
4123 */
asm330lhh_fifo_timestamp_decimation_set(stmdev_ctx_t * ctx,asm330lhh_odr_ts_batch_t val)4124 int32_t asm330lhh_fifo_timestamp_decimation_set(stmdev_ctx_t *ctx,
4125 asm330lhh_odr_ts_batch_t val)
4126 {
4127 asm330lhh_fifo_ctrl4_t fifo_ctrl4;
4128 int32_t ret;
4129
4130 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL4,
4131 (uint8_t *)&fifo_ctrl4, 1);
4132
4133 if (ret == 0)
4134 {
4135 fifo_ctrl4.dec_ts_batch = (uint8_t)val;
4136 ret = asm330lhh_write_reg(ctx, ASM330LHH_FIFO_CTRL4,
4137 (uint8_t *)&fifo_ctrl4, 1);
4138 }
4139
4140 return ret;
4141 }
4142
4143 /**
4144 * @brief Selects decimation for timestamp batching in FIFO.
4145 * Writing rate will be the maximum rate between XL and
4146 * GYRO BDR divided by decimation decoder.[get]
4147 *
4148 * @param ctx Read / write interface definitions.(ptr)
4149 * @param val Get the values of odr_ts_batch in reg
4150 * FIFO_CTRL4
4151 * @retval Interface status (MANDATORY: return 0 -> no Error).
4152 *
4153 */
asm330lhh_fifo_timestamp_decimation_get(stmdev_ctx_t * ctx,asm330lhh_odr_ts_batch_t * val)4154 int32_t asm330lhh_fifo_timestamp_decimation_get(stmdev_ctx_t *ctx,
4155 asm330lhh_odr_ts_batch_t *val)
4156 {
4157 asm330lhh_fifo_ctrl4_t fifo_ctrl4;
4158 int32_t ret;
4159
4160 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL4,
4161 (uint8_t *)&fifo_ctrl4, 1);
4162
4163 switch (fifo_ctrl4.dec_ts_batch)
4164 {
4165 case ASM330LHH_NO_DECIMATION:
4166 *val = ASM330LHH_NO_DECIMATION;
4167 break;
4168
4169 case ASM330LHH_DEC_1:
4170 *val = ASM330LHH_DEC_1;
4171 break;
4172
4173 case ASM330LHH_DEC_8:
4174 *val = ASM330LHH_DEC_8;
4175 break;
4176
4177 case ASM330LHH_DEC_32:
4178 *val = ASM330LHH_DEC_32;
4179 break;
4180
4181 default:
4182 *val = ASM330LHH_NO_DECIMATION;
4183 break;
4184 }
4185
4186 return ret;
4187 }
4188
4189 /**
4190 * @brief Selects the trigger for the internal counter of batching events
4191 * between XL and gyro.[set]
4192 *
4193 * @param ctx Read / write interface definitions.(ptr)
4194 * @param val Change the values of trig_counter_bdr in
4195 * reg COUNTER_BDR_REG1
4196 * @retval Interface status (MANDATORY: return 0 -> no Error).
4197 *
4198 */
asm330lhh_fifo_cnt_event_batch_set(stmdev_ctx_t * ctx,asm330lhh_trig_counter_bdr_t val)4199 int32_t asm330lhh_fifo_cnt_event_batch_set(stmdev_ctx_t *ctx,
4200 asm330lhh_trig_counter_bdr_t val)
4201 {
4202 asm330lhh_counter_bdr_reg1_t counter_bdr_reg1;
4203 int32_t ret;
4204
4205 ret = asm330lhh_read_reg(ctx, ASM330LHH_COUNTER_BDR_REG1,
4206 (uint8_t *)&counter_bdr_reg1, 1);
4207
4208 if (ret == 0)
4209 {
4210 counter_bdr_reg1.trig_counter_bdr = (uint8_t)val;
4211 ret = asm330lhh_write_reg(ctx, ASM330LHH_COUNTER_BDR_REG1,
4212 (uint8_t *)&counter_bdr_reg1, 1);
4213 }
4214
4215 return ret;
4216 }
4217
4218 /**
4219 * @brief Selects the trigger for the internal counter of batching events
4220 * between XL and gyro.[get]
4221 *
4222 * @param ctx Read / write interface definitions.(ptr)
4223 * @param val Get the values of trig_counter_bdr
4224 * in reg COUNTER_BDR_REG1
4225 * @retval Interface status (MANDATORY: return 0 -> no Error).
4226 *
4227 */
asm330lhh_fifo_cnt_event_batch_get(stmdev_ctx_t * ctx,asm330lhh_trig_counter_bdr_t * val)4228 int32_t asm330lhh_fifo_cnt_event_batch_get(stmdev_ctx_t *ctx,
4229 asm330lhh_trig_counter_bdr_t *val)
4230 {
4231 asm330lhh_counter_bdr_reg1_t counter_bdr_reg1;
4232 int32_t ret;
4233
4234 ret = asm330lhh_read_reg(ctx, ASM330LHH_COUNTER_BDR_REG1,
4235 (uint8_t *)&counter_bdr_reg1, 1);
4236
4237 switch (counter_bdr_reg1.trig_counter_bdr)
4238 {
4239 case ASM330LHH_XL_BATCH_EVENT:
4240 *val = ASM330LHH_XL_BATCH_EVENT;
4241 break;
4242
4243 case ASM330LHH_GYRO_BATCH_EVENT:
4244 *val = ASM330LHH_GYRO_BATCH_EVENT;
4245 break;
4246
4247 default:
4248 *val = ASM330LHH_XL_BATCH_EVENT;
4249 break;
4250 }
4251
4252 return ret;
4253 }
4254
4255 /**
4256 * @brief Resets the internal counter of batching events for a single sensor.
4257 * This bit is automatically reset to zero if it was set to ‘1’.[set]
4258 *
4259 * @param ctx Read / write interface definitions.(ptr)
4260 * @param val Change the values of rst_counter_bdr in reg COUNTER_BDR_REG1
4261 * @retval Interface status (MANDATORY: return 0 -> no Error).
4262 *
4263 */
asm330lhh_rst_batch_counter_set(stmdev_ctx_t * ctx,uint8_t val)4264 int32_t asm330lhh_rst_batch_counter_set(stmdev_ctx_t *ctx,
4265 uint8_t val)
4266 {
4267 asm330lhh_counter_bdr_reg1_t counter_bdr_reg1;
4268 int32_t ret;
4269
4270 ret = asm330lhh_read_reg(ctx, ASM330LHH_COUNTER_BDR_REG1,
4271 (uint8_t *)&counter_bdr_reg1, 1);
4272
4273 if (ret == 0)
4274 {
4275 counter_bdr_reg1.rst_counter_bdr = (uint8_t)val;
4276 ret = asm330lhh_write_reg(ctx, ASM330LHH_COUNTER_BDR_REG1,
4277 (uint8_t *)&counter_bdr_reg1, 1);
4278 }
4279
4280 return ret;
4281 }
4282
4283 /**
4284 * @brief Resets the internal counter of batching events for a single sensor.
4285 * This bit is automatically reset to zero if it was set to ‘1’.[get]
4286 *
4287 * @param ctx Read / write interface definitions.(ptr)
4288 * @param val Change the values of rst_counter_bdr in reg COUNTER_BDR_REG1
4289 * @retval Interface status (MANDATORY: return 0 -> no Error).
4290 *
4291 */
asm330lhh_rst_batch_counter_get(stmdev_ctx_t * ctx,uint8_t * val)4292 int32_t asm330lhh_rst_batch_counter_get(stmdev_ctx_t *ctx,
4293 uint8_t *val)
4294 {
4295 asm330lhh_counter_bdr_reg1_t counter_bdr_reg1;
4296 int32_t ret;
4297
4298 ret = asm330lhh_read_reg(ctx, ASM330LHH_COUNTER_BDR_REG1,
4299 (uint8_t *)&counter_bdr_reg1, 1);
4300 *val = counter_bdr_reg1.rst_counter_bdr;
4301
4302 return ret;
4303 }
4304
4305 /**
4306 * @brief Batch data rate counter.[set]
4307 *
4308 * @param ctx Read / write interface definitions.(ptr)
4309 * @param val Change the values of cnt_bdr_th in reg COUNTER_BDR_REG2
4310 * and COUNTER_BDR_REG1.
4311 * @retval Interface status (MANDATORY: return 0 -> no Error).
4312 *
4313 */
asm330lhh_batch_counter_threshold_set(stmdev_ctx_t * ctx,uint16_t val)4314 int32_t asm330lhh_batch_counter_threshold_set(stmdev_ctx_t *ctx,
4315 uint16_t val)
4316 {
4317 asm330lhh_counter_bdr_reg2_t counter_bdr_reg1;
4318 asm330lhh_counter_bdr_reg2_t counter_bdr_reg2;
4319 int32_t ret;
4320
4321 ret = asm330lhh_read_reg(ctx, ASM330LHH_COUNTER_BDR_REG1,
4322 (uint8_t *)&counter_bdr_reg1, 1);
4323
4324 if (ret == 0)
4325 {
4326 counter_bdr_reg1.cnt_bdr_th = (uint8_t)((val / 256U) & 0x03U);
4327 ret = asm330lhh_write_reg(ctx, ASM330LHH_COUNTER_BDR_REG1,
4328 (uint8_t *)&counter_bdr_reg1, 1);
4329 }
4330
4331 if (ret == 0)
4332 {
4333 counter_bdr_reg2.cnt_bdr_th = (uint8_t)(val -
4334 (counter_bdr_reg1.cnt_bdr_th * 256U));
4335 ret = asm330lhh_write_reg(ctx, ASM330LHH_COUNTER_BDR_REG2,
4336 (uint8_t *)&counter_bdr_reg2, 1);
4337 }
4338
4339 return ret;
4340 }
4341
4342 /**
4343 * @brief Batch data rate counter.[get]
4344 *
4345 * @param ctx Read / write interface definitions.(ptr)
4346 * @param val Change the values of cnt_bdr_th in reg COUNTER_BDR_REG2
4347 * and COUNTER_BDR_REG1.
4348 * @retval Interface status (MANDATORY: return 0 -> no Error).
4349 *
4350 */
asm330lhh_batch_counter_threshold_get(stmdev_ctx_t * ctx,uint16_t * val)4351 int32_t asm330lhh_batch_counter_threshold_get(stmdev_ctx_t *ctx,
4352 uint16_t *val)
4353 {
4354 asm330lhh_counter_bdr_reg1_t counter_bdr_reg1;
4355 asm330lhh_counter_bdr_reg2_t counter_bdr_reg2;
4356 int32_t ret;
4357
4358 ret = asm330lhh_read_reg(ctx, ASM330LHH_COUNTER_BDR_REG1,
4359 (uint8_t *)&counter_bdr_reg1, 1);
4360
4361 if (ret == 0)
4362 {
4363 ret = asm330lhh_read_reg(ctx, ASM330LHH_COUNTER_BDR_REG2,
4364 (uint8_t *)&counter_bdr_reg2, 1);
4365 }
4366
4367 *val = counter_bdr_reg1.cnt_bdr_th;
4368 *val = (*val * 256U) + counter_bdr_reg2.cnt_bdr_th;
4369
4370 return ret;
4371 }
4372
4373 /**
4374 * @brief Number of unread sensor data (TAG + 6 bytes) stored in FIFO.[get]
4375 *
4376 * @param ctx Read / write interface definitions.(ptr)
4377 * @param val Change the values of diff_fifo in reg FIFO_STATUS1
4378 * @retval Interface status (MANDATORY: return 0 -> no Error).
4379 *
4380 */
asm330lhh_fifo_data_level_get(stmdev_ctx_t * ctx,uint16_t * val)4381 int32_t asm330lhh_fifo_data_level_get(stmdev_ctx_t *ctx,
4382 uint16_t *val)
4383 {
4384 asm330lhh_fifo_status1_t fifo_status1;
4385 asm330lhh_fifo_status2_t fifo_status2;
4386 int32_t ret;
4387
4388 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_STATUS1,
4389 (uint8_t *)&fifo_status1, 1);
4390
4391 if (ret == 0)
4392 {
4393 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_STATUS2,
4394 (uint8_t *)&fifo_status2, 1);
4395 *val = fifo_status2.diff_fifo;
4396 *val = (*val * 256U) + fifo_status1.diff_fifo;
4397 }
4398
4399 return ret;
4400 }
4401
4402 /**
4403 * @brief Smart FIFO status.[get]
4404 *
4405 * @param ctx Read / write interface definitions.(ptr)
4406 * @param val Registers FIFO_STATUS2
4407 * @retval Interface status (MANDATORY: return 0 -> no Error).
4408 *
4409 */
asm330lhh_fifo_status_get(stmdev_ctx_t * ctx,asm330lhh_fifo_status2_t * val)4410 int32_t asm330lhh_fifo_status_get(stmdev_ctx_t *ctx,
4411 asm330lhh_fifo_status2_t *val)
4412 {
4413 int32_t ret;
4414
4415 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_STATUS2, (uint8_t *)val, 1);
4416
4417 return ret;
4418 }
4419
4420 /**
4421 * @brief Smart FIFO full status.[get]
4422 *
4423 * @param ctx Read / write interface definitions.(ptr)
4424 * @param val Change the values of fifo_full_ia in reg FIFO_STATUS2
4425 * @retval Interface status (MANDATORY: return 0 -> no Error).
4426 *
4427 */
asm330lhh_fifo_full_flag_get(stmdev_ctx_t * ctx,uint8_t * val)4428 int32_t asm330lhh_fifo_full_flag_get(stmdev_ctx_t *ctx, uint8_t *val)
4429 {
4430 asm330lhh_fifo_status2_t fifo_status2;
4431 int32_t ret;
4432
4433 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_STATUS2,
4434 (uint8_t *)&fifo_status2, 1);
4435 *val = fifo_status2.fifo_full_ia;
4436
4437 return ret;
4438 }
4439
4440 /**
4441 * @brief FIFO overrun status.[get]
4442 *
4443 * @param ctx Read / write interface definitions.(ptr)
4444 * @param val Change the values of fifo_over_run_latched in
4445 * reg FIFO_STATUS2
4446 * @retval Interface status (MANDATORY: return 0 -> no Error).
4447 *
4448 */
asm330lhh_fifo_ovr_flag_get(stmdev_ctx_t * ctx,uint8_t * val)4449 int32_t asm330lhh_fifo_ovr_flag_get(stmdev_ctx_t *ctx, uint8_t *val)
4450 {
4451 asm330lhh_fifo_status2_t fifo_status2;
4452 int32_t ret;
4453
4454 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_STATUS2,
4455 (uint8_t *)&fifo_status2, 1);
4456 *val = fifo_status2. fifo_ovr_ia;
4457
4458 return ret;
4459 }
4460
4461 /**
4462 * @brief FIFO watermark status.[get]
4463 *
4464 * @param ctx Read / write interface definitions.(ptr)
4465 * @param val Change the values of fifo_wtm_ia in reg FIFO_STATUS2
4466 * @retval Interface status (MANDATORY: return 0 -> no Error).
4467 *
4468 */
asm330lhh_fifo_wtm_flag_get(stmdev_ctx_t * ctx,uint8_t * val)4469 int32_t asm330lhh_fifo_wtm_flag_get(stmdev_ctx_t *ctx, uint8_t *val)
4470 {
4471 asm330lhh_fifo_status2_t fifo_status2;
4472 int32_t ret;
4473
4474 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_STATUS2,
4475 (uint8_t *)&fifo_status2, 1);
4476 *val = fifo_status2.fifo_wtm_ia;
4477
4478 return ret;
4479 }
4480
4481 /**
4482 * @brief Identifies the sensor in FIFO_DATA_OUT.[get]
4483 *
4484 * @param ctx Read / write interface definitions.(ptr)
4485 * @param val Change the values of tag_sensor in reg FIFO_DATA_OUT_TAG
4486 * @retval Interface status (MANDATORY: return 0 -> no Error).
4487 *
4488 */
asm330lhh_fifo_sensor_tag_get(stmdev_ctx_t * ctx,asm330lhh_fifo_tag_t * val)4489 int32_t asm330lhh_fifo_sensor_tag_get(stmdev_ctx_t *ctx,
4490 asm330lhh_fifo_tag_t *val)
4491 {
4492 asm330lhh_fifo_data_out_tag_t fifo_data_out_tag;
4493 int32_t ret;
4494
4495 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_DATA_OUT_TAG,
4496 (uint8_t *)&fifo_data_out_tag, 1);
4497
4498 switch (fifo_data_out_tag.tag_sensor)
4499 {
4500 case ASM330LHH_GYRO_NC_TAG:
4501 *val = ASM330LHH_GYRO_NC_TAG;
4502 break;
4503
4504 case ASM330LHH_XL_NC_TAG:
4505 *val = ASM330LHH_XL_NC_TAG;
4506 break;
4507
4508 case ASM330LHH_TEMPERATURE_TAG:
4509 *val = ASM330LHH_TEMPERATURE_TAG;
4510 break;
4511
4512 case ASM330LHH_TIMESTAMP_TAG:
4513 *val = ASM330LHH_TIMESTAMP_TAG;
4514 break;
4515
4516 case ASM330LHH_CFG_CHANGE_TAG:
4517 *val = ASM330LHH_CFG_CHANGE_TAG;
4518 break;
4519
4520 default:
4521 *val = ASM330LHH_CFG_CHANGE_TAG;
4522 break;
4523 }
4524
4525 return ret;
4526 }
4527
4528 /**
4529 * @}
4530 *
4531 */
4532
4533 /**
4534 * @defgroup ASM330LHH_DEN_functionality
4535 * @brief This section groups all the functions concerning
4536 * DEN functionality.
4537 * @{
4538 *
4539 */
4540
4541 /**
4542 * @brief DEN functionality marking mode.[set]
4543 *
4544 * @param ctx Read / write interface definitions.(ptr)
4545 * @param val Change the values of den_mode in reg CTRL6_C
4546 * @retval Interface status (MANDATORY: return 0 -> no Error).
4547 *
4548 */
asm330lhh_den_mode_set(stmdev_ctx_t * ctx,asm330lhh_den_mode_t val)4549 int32_t asm330lhh_den_mode_set(stmdev_ctx_t *ctx,
4550 asm330lhh_den_mode_t val)
4551 {
4552 asm330lhh_ctrl6_c_t ctrl6_c;
4553 int32_t ret;
4554
4555 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL6_C, (uint8_t *)&ctrl6_c, 1);
4556
4557 if (ret == 0)
4558 {
4559 ctrl6_c.den_mode = (uint8_t)val;
4560 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL6_C, (uint8_t *)&ctrl6_c, 1);
4561 }
4562
4563 return ret;
4564 }
4565
4566 /**
4567 * @brief DEN functionality marking mode.[get]
4568 *
4569 * @param ctx Read / write interface definitions.(ptr)
4570 * @param val Get the values of den_mode in reg CTRL6_C
4571 * @retval Interface status (MANDATORY: return 0 -> no Error).
4572 *
4573 */
asm330lhh_den_mode_get(stmdev_ctx_t * ctx,asm330lhh_den_mode_t * val)4574 int32_t asm330lhh_den_mode_get(stmdev_ctx_t *ctx,
4575 asm330lhh_den_mode_t *val)
4576 {
4577 asm330lhh_ctrl6_c_t ctrl6_c;
4578 int32_t ret;
4579
4580 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL6_C, (uint8_t *)&ctrl6_c, 1);
4581
4582 switch (ctrl6_c.den_mode)
4583 {
4584 case ASM330LHH_DEN_DISABLE:
4585 *val = ASM330LHH_DEN_DISABLE;
4586 break;
4587
4588 case ASM330LHH_LEVEL_FIFO:
4589 *val = ASM330LHH_LEVEL_FIFO;
4590 break;
4591
4592 case ASM330LHH_LEVEL_LETCHED:
4593 *val = ASM330LHH_LEVEL_LETCHED;
4594 break;
4595
4596 case ASM330LHH_LEVEL_TRIGGER:
4597 *val = ASM330LHH_LEVEL_TRIGGER;
4598 break;
4599
4600 case ASM330LHH_EDGE_TRIGGER:
4601 *val = ASM330LHH_EDGE_TRIGGER;
4602 break;
4603
4604 default:
4605 *val = ASM330LHH_DEN_DISABLE;
4606 break;
4607 }
4608
4609 return ret;
4610 }
4611
4612 /**
4613 * @brief DEN active level configuration.[set]
4614 *
4615 * @param ctx Read / write interface definitions.(ptr)
4616 * @param val Change the values of den_lh in reg CTRL9_XL
4617 * @retval Interface status (MANDATORY: return 0 -> no Error).
4618 *
4619 */
asm330lhh_den_polarity_set(stmdev_ctx_t * ctx,asm330lhh_den_lh_t val)4620 int32_t asm330lhh_den_polarity_set(stmdev_ctx_t *ctx,
4621 asm330lhh_den_lh_t val)
4622 {
4623 asm330lhh_ctrl9_xl_t ctrl9_xl;
4624 int32_t ret;
4625
4626 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL9_XL,
4627 (uint8_t *)&ctrl9_xl, 1);
4628
4629 if (ret == 0)
4630 {
4631 ctrl9_xl.den_lh = (uint8_t)val;
4632 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL9_XL,
4633 (uint8_t *)&ctrl9_xl, 1);
4634 }
4635
4636 return ret;
4637 }
4638
4639 /**
4640 * @brief DEN active level configuration.[get]
4641 *
4642 * @param ctx Read / write interface definitions.(ptr)
4643 * @param val Get the values of den_lh in reg CTRL9_XL
4644 * @retval Interface status (MANDATORY: return 0 -> no Error).
4645 *
4646 */
asm330lhh_den_polarity_get(stmdev_ctx_t * ctx,asm330lhh_den_lh_t * val)4647 int32_t asm330lhh_den_polarity_get(stmdev_ctx_t *ctx,
4648 asm330lhh_den_lh_t *val)
4649 {
4650 asm330lhh_ctrl9_xl_t ctrl9_xl;
4651 int32_t ret;
4652
4653 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL9_XL,
4654 (uint8_t *)&ctrl9_xl, 1);
4655
4656 switch (ctrl9_xl.den_lh)
4657 {
4658 case ASM330LHH_DEN_ACT_LOW:
4659 *val = ASM330LHH_DEN_ACT_LOW;
4660 break;
4661
4662 case ASM330LHH_DEN_ACT_HIGH:
4663 *val = ASM330LHH_DEN_ACT_HIGH;
4664 break;
4665
4666 default:
4667 *val = ASM330LHH_DEN_ACT_LOW;
4668 break;
4669 }
4670
4671 return ret;
4672 }
4673
4674 /**
4675 * @brief DEN configuration.[set]
4676 *
4677 * @param ctx Read / write interface definitions.(ptr)
4678 * @param val Change the values of den_xl_g in reg CTRL9_XL
4679 * @retval Interface status (MANDATORY: return 0 -> no Error).
4680 *
4681 */
asm330lhh_den_enable_set(stmdev_ctx_t * ctx,asm330lhh_den_xl_g_t val)4682 int32_t asm330lhh_den_enable_set(stmdev_ctx_t *ctx,
4683 asm330lhh_den_xl_g_t val)
4684 {
4685 asm330lhh_ctrl9_xl_t ctrl9_xl;
4686 int32_t ret;
4687
4688 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL9_XL,
4689 (uint8_t *)&ctrl9_xl, 1);
4690
4691 if (ret == 0)
4692 {
4693 ctrl9_xl.den_xl_g = (uint8_t)val;
4694 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL9_XL,
4695 (uint8_t *)&ctrl9_xl, 1);
4696 }
4697
4698 return ret;
4699 }
4700
4701 /**
4702 * @brief DEN configuration.[get]
4703 *
4704 * @param ctx Read / write interface definitions.(ptr)
4705 * @param val Get the values of den_xl_g in reg CTRL9_XL
4706 * @retval Interface status (MANDATORY: return 0 -> no Error).
4707 *
4708 */
asm330lhh_den_enable_get(stmdev_ctx_t * ctx,asm330lhh_den_xl_g_t * val)4709 int32_t asm330lhh_den_enable_get(stmdev_ctx_t *ctx,
4710 asm330lhh_den_xl_g_t *val)
4711 {
4712 asm330lhh_ctrl9_xl_t ctrl9_xl;
4713 int32_t ret;
4714
4715 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL9_XL,
4716 (uint8_t *)&ctrl9_xl, 1);
4717
4718 switch (ctrl9_xl.den_xl_g)
4719 {
4720 case ASM330LHH_STAMP_IN_GY_DATA:
4721 *val = ASM330LHH_STAMP_IN_GY_DATA;
4722 break;
4723
4724 case ASM330LHH_STAMP_IN_XL_DATA:
4725 *val = ASM330LHH_STAMP_IN_XL_DATA;
4726 break;
4727
4728 case ASM330LHH_STAMP_IN_GY_XL_DATA:
4729 *val = ASM330LHH_STAMP_IN_GY_XL_DATA;
4730 break;
4731
4732 default:
4733 *val = ASM330LHH_STAMP_IN_GY_DATA;
4734 break;
4735 }
4736
4737 return ret;
4738 }
4739
4740 /**
4741 * @brief DEN value stored in LSB of X-axis.[set]
4742 *
4743 * @param ctx Read / write interface definitions.(ptr)
4744 * @param val Change the values of den_z in reg CTRL9_XL
4745 * @retval Interface status (MANDATORY: return 0 -> no Error).
4746 *
4747 */
asm330lhh_den_mark_axis_x_set(stmdev_ctx_t * ctx,uint8_t val)4748 int32_t asm330lhh_den_mark_axis_x_set(stmdev_ctx_t *ctx, uint8_t val)
4749 {
4750 asm330lhh_ctrl9_xl_t ctrl9_xl;
4751 int32_t ret;
4752
4753 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL9_XL,
4754 (uint8_t *)&ctrl9_xl, 1);
4755
4756 if (ret == 0)
4757 {
4758 ctrl9_xl.den_z = (uint8_t)val;
4759 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL9_XL,
4760 (uint8_t *)&ctrl9_xl, 1);
4761 }
4762
4763 return ret;
4764 }
4765
4766 /**
4767 * @brief DEN value stored in LSB of X-axis.[get]
4768 *
4769 * @param ctx Read / write interface definitions.(ptr)
4770 * @param val Change the values of den_z in reg CTRL9_XL
4771 * @retval Interface status (MANDATORY: return 0 -> no Error).
4772 *
4773 */
asm330lhh_den_mark_axis_x_get(stmdev_ctx_t * ctx,uint8_t * val)4774 int32_t asm330lhh_den_mark_axis_x_get(stmdev_ctx_t *ctx, uint8_t *val)
4775 {
4776 asm330lhh_ctrl9_xl_t ctrl9_xl;
4777 int32_t ret;
4778
4779 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL9_XL,
4780 (uint8_t *)&ctrl9_xl, 1);
4781 *val = ctrl9_xl.den_z;
4782
4783 return ret;
4784 }
4785
4786 /**
4787 * @brief DEN value stored in LSB of Y-axis.[set]
4788 *
4789 * @param ctx Read / write interface definitions.(ptr)
4790 * @param val Change the values of den_y in reg CTRL9_XL
4791 * @retval Interface status (MANDATORY: return 0 -> no Error).
4792 *
4793 */
asm330lhh_den_mark_axis_y_set(stmdev_ctx_t * ctx,uint8_t val)4794 int32_t asm330lhh_den_mark_axis_y_set(stmdev_ctx_t *ctx, uint8_t val)
4795 {
4796 asm330lhh_ctrl9_xl_t ctrl9_xl;
4797 int32_t ret;
4798
4799 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL9_XL,
4800 (uint8_t *)&ctrl9_xl, 1);
4801
4802 if (ret == 0)
4803 {
4804 ctrl9_xl.den_y = (uint8_t)val;
4805 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL9_XL,
4806 (uint8_t *)&ctrl9_xl, 1);
4807 }
4808
4809 return ret;
4810 }
4811
4812 /**
4813 * @brief DEN value stored in LSB of Y-axis.[get]
4814 *
4815 * @param ctx Read / write interface definitions.(ptr)
4816 * @param val Change the values of den_y in reg CTRL9_XL
4817 * @retval Interface status (MANDATORY: return 0 -> no Error).
4818 *
4819 */
asm330lhh_den_mark_axis_y_get(stmdev_ctx_t * ctx,uint8_t * val)4820 int32_t asm330lhh_den_mark_axis_y_get(stmdev_ctx_t *ctx, uint8_t *val)
4821 {
4822 asm330lhh_ctrl9_xl_t ctrl9_xl;
4823 int32_t ret;
4824
4825 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL9_XL,
4826 (uint8_t *)&ctrl9_xl, 1);
4827 *val = ctrl9_xl.den_y;
4828
4829 return ret;
4830 }
4831
4832 /**
4833 * @brief DEN value stored in LSB of Z-axis.[set]
4834 *
4835 * @param ctx Read / write interface definitions.(ptr)
4836 * @param val Change the values of den_x in reg CTRL9_XL
4837 * @retval Interface status (MANDATORY: return 0 -> no Error).
4838 *
4839 */
asm330lhh_den_mark_axis_z_set(stmdev_ctx_t * ctx,uint8_t val)4840 int32_t asm330lhh_den_mark_axis_z_set(stmdev_ctx_t *ctx, uint8_t val)
4841 {
4842 asm330lhh_ctrl9_xl_t ctrl9_xl;
4843 int32_t ret;
4844
4845 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL9_XL,
4846 (uint8_t *)&ctrl9_xl, 1);
4847
4848 if (ret == 0)
4849 {
4850 ctrl9_xl.den_x = (uint8_t)val;
4851 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL9_XL,
4852 (uint8_t *)&ctrl9_xl, 1);
4853 }
4854
4855 return ret;
4856 }
4857
4858 /**
4859 * @brief DEN value stored in LSB of Z-axis.[get]
4860 *
4861 * @param ctx Read / write interface definitions.(ptr)
4862 * @param val Change the values of den_x in reg CTRL9_XL
4863 * @retval Interface status (MANDATORY: return 0 -> no Error).
4864 *
4865 */
asm330lhh_den_mark_axis_z_get(stmdev_ctx_t * ctx,uint8_t * val)4866 int32_t asm330lhh_den_mark_axis_z_get(stmdev_ctx_t *ctx, uint8_t *val)
4867 {
4868 asm330lhh_ctrl9_xl_t ctrl9_xl;
4869 int32_t ret;
4870
4871 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL9_XL,
4872 (uint8_t *)&ctrl9_xl, 1);
4873 *val = ctrl9_xl.den_x;
4874
4875 return ret;
4876 }
4877
4878 /**
4879 * @}
4880 *
4881 */
4882
4883 /**
4884 * @}
4885 *
4886 */
4887
4888 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
4889
