1 /*
2 ******************************************************************************
3 * @file asm330lhh_reg.c
4 * @author Sensors Software Solution Team
5 * @brief ASM330LHH driver file
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>© Copyright (c) 2023 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19
20 #include "asm330lhh_reg.h"
21
22 /**
23 * @defgroup ASM330LHH
24 * @brief This file provides a set of functions needed to drive the
25 * asm330lhh enhanced inertial module.
26 * @{
27 *
28 */
29
30 /**
31 * @defgroup ASM330LHH_Interfaces_Functions
32 * @brief This section provide a set of functions used to read and
33 * write a generic register of the device.
34 * MANDATORY: return 0 -> no Error.
35 * @{
36 *
37 */
38
39 /**
40 * @brief Read generic device register
41 *
42 * @param ctx read / write interface definitions(ptr)
43 * @param reg register to read
44 * @param data pointer to buffer that store the data read(ptr)
45 * @param len number of consecutive register to read
46 * @retval interface status (MANDATORY: return 0 -> no Error)
47 *
48 */
asm330lhh_read_reg(const stmdev_ctx_t * ctx,uint8_t reg,uint8_t * data,uint16_t len)49 int32_t __weak asm330lhh_read_reg(const stmdev_ctx_t *ctx, uint8_t reg, uint8_t *data,
50 uint16_t len)
51 {
52 int32_t ret;
53
54 if (ctx == NULL)
55 {
56 return -1;
57 }
58
59 ret = ctx->read_reg(ctx->handle, reg, data, len);
60
61 return ret;
62 }
63
64 /**
65 * @brief Write generic device register
66 *
67 * @param ctx read / write interface definitions(ptr)
68 * @param reg register to write
69 * @param data pointer to data to write in register reg(ptr)
70 * @param len number of consecutive register to write
71 * @retval interface status (MANDATORY: return 0 -> no Error)
72 *
73 */
asm330lhh_write_reg(const stmdev_ctx_t * ctx,uint8_t reg,uint8_t * data,uint16_t len)74 int32_t __weak asm330lhh_write_reg(const stmdev_ctx_t *ctx, uint8_t reg, uint8_t *data,
75 uint16_t len)
76 {
77 int32_t ret;
78
79 if (ctx == NULL)
80 {
81 return -1;
82 }
83
84 ret = ctx->write_reg(ctx->handle, reg, data, len);
85
86 return ret;
87 }
88
89 /**
90 * @}
91 *
92 */
93
94 /**
95 * @defgroup ASM330LHH_Sensitivity
96 * @brief These functions convert raw-data into engineering units.
97 * @{
98 *
99 */
100
asm330lhh_from_fs2g_to_mg(int16_t lsb)101 float_t asm330lhh_from_fs2g_to_mg(int16_t lsb)
102 {
103 return ((float_t)lsb * 0.061f);
104 }
105
asm330lhh_from_fs4g_to_mg(int16_t lsb)106 float_t asm330lhh_from_fs4g_to_mg(int16_t lsb)
107 {
108 return ((float_t)lsb * 0.122f);
109 }
110
asm330lhh_from_fs8g_to_mg(int16_t lsb)111 float_t asm330lhh_from_fs8g_to_mg(int16_t lsb)
112 {
113 return ((float_t)lsb * 0.244f);
114 }
115
asm330lhh_from_fs16g_to_mg(int16_t lsb)116 float_t asm330lhh_from_fs16g_to_mg(int16_t lsb)
117 {
118 return ((float_t)lsb * 0.488f);
119 }
120
asm330lhh_from_fs125dps_to_mdps(int16_t lsb)121 float_t asm330lhh_from_fs125dps_to_mdps(int16_t lsb)
122 {
123 return ((float_t)lsb * 4.375f);
124 }
125
asm330lhh_from_fs250dps_to_mdps(int16_t lsb)126 float_t asm330lhh_from_fs250dps_to_mdps(int16_t lsb)
127 {
128 return ((float_t)lsb * 8.75f);
129 }
130
asm330lhh_from_fs500dps_to_mdps(int16_t lsb)131 float_t asm330lhh_from_fs500dps_to_mdps(int16_t lsb)
132 {
133 return ((float_t)lsb * 17.50f);
134 }
135
asm330lhh_from_fs1000dps_to_mdps(int16_t lsb)136 float_t asm330lhh_from_fs1000dps_to_mdps(int16_t lsb)
137 {
138 return ((float_t)lsb * 35.0f);
139 }
140
asm330lhh_from_fs2000dps_to_mdps(int16_t lsb)141 float_t asm330lhh_from_fs2000dps_to_mdps(int16_t lsb)
142 {
143 return ((float_t)lsb * 70.0f);
144 }
145
asm330lhh_from_fs4000dps_to_mdps(int16_t lsb)146 float_t asm330lhh_from_fs4000dps_to_mdps(int16_t lsb)
147 {
148 return ((float_t)lsb * 140.0f);
149 }
150
asm330lhh_from_lsb_to_celsius(int16_t lsb)151 float_t asm330lhh_from_lsb_to_celsius(int16_t lsb)
152 {
153 return (((float_t)lsb / 256.0f) + 25.0f);
154 }
155
asm330lhh_from_lsb_to_nsec(int32_t lsb)156 float_t asm330lhh_from_lsb_to_nsec(int32_t lsb)
157 {
158 return ((float_t)lsb * 25000.0f);
159 }
160
161 /**
162 * @}
163 *
164 */
165
166 /**
167 * @defgroup LSM9DS1_Data_generation
168 * @brief This section groups all the functions concerning data
169 * generation
170 * @{
171 *
172 */
173
174 /**
175 * @brief Accelerometer full-scale selection[set]
176 *
177 * @param ctx Read / write interface definitions.(ptr)
178 * @param val Change the values of fs_xl in reg CTRL1_XL
179 * @retval Interface status (MANDATORY: return 0 -> no Error).
180 *
181 */
asm330lhh_xl_full_scale_set(const stmdev_ctx_t * ctx,asm330lhh_fs_xl_t val)182 int32_t asm330lhh_xl_full_scale_set(const stmdev_ctx_t *ctx,
183 asm330lhh_fs_xl_t val)
184 {
185 asm330lhh_ctrl1_xl_t ctrl1_xl;
186 int32_t ret;
187
188 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL1_XL, (uint8_t *)&ctrl1_xl, 1);
189 if (ret == 0)
190 {
191 ctrl1_xl.fs_xl = (uint8_t)val;
192 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL1_XL,
193 (uint8_t *)&ctrl1_xl, 1);
194 }
195 return ret;
196 }
197
198 /**
199 * @brief Accelerometer full-scale selection.[get]
200 *
201 * @param ctx Read / write interface definitions.(ptr)
202 * @param val Get the values of fs_xl in reg CTRL1_XL
203 * @retval Interface status (MANDATORY: return 0 -> no Error).
204 *
205 */
asm330lhh_xl_full_scale_get(const stmdev_ctx_t * ctx,asm330lhh_fs_xl_t * val)206 int32_t asm330lhh_xl_full_scale_get(const stmdev_ctx_t *ctx,
207 asm330lhh_fs_xl_t *val)
208 {
209 asm330lhh_ctrl1_xl_t ctrl1_xl;
210 int32_t ret;
211
212 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL1_XL, (uint8_t *)&ctrl1_xl, 1);
213 switch (ctrl1_xl.fs_xl)
214 {
215 case ASM330LHH_2g:
216 *val = ASM330LHH_2g;
217 break;
218 case ASM330LHH_16g:
219 *val = ASM330LHH_16g;
220 break;
221 case ASM330LHH_4g:
222 *val = ASM330LHH_4g;
223 break;
224 case ASM330LHH_8g:
225 *val = ASM330LHH_8g;
226 break;
227 default:
228 *val = ASM330LHH_2g;
229 break;
230 }
231 return ret;
232 }
233
234 /**
235 * @brief Accelerometer UI data rate selection.[set]
236 *
237 * @param ctx Read / write interface definitions.(ptr)
238 * @param val Change the values of odr_xl in reg CTRL1_XL
239 * @retval Interface status (MANDATORY: return 0 -> no Error).
240 *
241 */
asm330lhh_xl_data_rate_set(const stmdev_ctx_t * ctx,asm330lhh_odr_xl_t val)242 int32_t asm330lhh_xl_data_rate_set(const stmdev_ctx_t *ctx,
243 asm330lhh_odr_xl_t val)
244 {
245 asm330lhh_odr_xl_t odr_xl = val;
246 asm330lhh_ctrl1_xl_t ctrl1_xl;
247 int32_t ret = 0;
248
249 if (ret == 0)
250 {
251 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL1_XL, (uint8_t *)&ctrl1_xl, 1);
252 }
253 if (ret == 0)
254 {
255 ctrl1_xl.odr_xl = (uint8_t)odr_xl;
256 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL1_XL,
257 (uint8_t *)&ctrl1_xl, 1);
258 }
259 return ret;
260 }
261
262 /**
263 * @brief Accelerometer UI data rate selection.[get]
264 *
265 * @param ctx Read / write interface definitions.(ptr)
266 * @param val Get the values of odr_xl in reg CTRL1_XL
267 * @retval Interface status (MANDATORY: return 0 -> no Error).
268 *
269 */
asm330lhh_xl_data_rate_get(const stmdev_ctx_t * ctx,asm330lhh_odr_xl_t * val)270 int32_t asm330lhh_xl_data_rate_get(const stmdev_ctx_t *ctx,
271 asm330lhh_odr_xl_t *val)
272 {
273 asm330lhh_ctrl1_xl_t ctrl1_xl;
274 int32_t ret;
275
276 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL1_XL, (uint8_t *)&ctrl1_xl, 1);
277 switch (ctrl1_xl.odr_xl)
278 {
279 case ASM330LHH_XL_ODR_OFF:
280 *val = ASM330LHH_XL_ODR_OFF;
281 break;
282 case ASM330LHH_XL_ODR_12Hz5:
283 *val = ASM330LHH_XL_ODR_12Hz5;
284 break;
285 case ASM330LHH_XL_ODR_26Hz:
286 *val = ASM330LHH_XL_ODR_26Hz;
287 break;
288 case ASM330LHH_XL_ODR_52Hz:
289 *val = ASM330LHH_XL_ODR_52Hz;
290 break;
291 case ASM330LHH_XL_ODR_104Hz:
292 *val = ASM330LHH_XL_ODR_104Hz;
293 break;
294 case ASM330LHH_XL_ODR_208Hz:
295 *val = ASM330LHH_XL_ODR_208Hz;
296 break;
297 case ASM330LHH_XL_ODR_417Hz:
298 *val = ASM330LHH_XL_ODR_417Hz;
299 break;
300 case ASM330LHH_XL_ODR_833Hz:
301 *val = ASM330LHH_XL_ODR_833Hz;
302 break;
303 case ASM330LHH_XL_ODR_1667Hz:
304 *val = ASM330LHH_XL_ODR_1667Hz;
305 break;
306 case ASM330LHH_XL_ODR_3333Hz:
307 *val = ASM330LHH_XL_ODR_3333Hz;
308 break;
309 case ASM330LHH_XL_ODR_6667Hz:
310 *val = ASM330LHH_XL_ODR_6667Hz;
311 break;
312 default:
313 *val = ASM330LHH_XL_ODR_OFF;
314 break;
315 }
316 return ret;
317 }
318
319 /**
320 * @brief Gyroscope UI chain full-scale selection.[set]
321 *
322 * @param ctx Read / write interface definitions.(ptr)
323 * @param val Change the values of fs_g in reg CTRL2_G
324 * @retval Interface status (MANDATORY: return 0 -> no Error).
325 *
326 */
asm330lhh_gy_full_scale_set(const stmdev_ctx_t * ctx,asm330lhh_fs_g_t val)327 int32_t asm330lhh_gy_full_scale_set(const stmdev_ctx_t *ctx,
328 asm330lhh_fs_g_t val)
329 {
330 asm330lhh_ctrl2_g_t ctrl2_g;
331 int32_t ret;
332
333 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL2_G, (uint8_t *)&ctrl2_g, 1);
334 if (ret == 0)
335 {
336 ctrl2_g.fs_g = (uint8_t)val;
337 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL2_G, (uint8_t *)&ctrl2_g, 1);
338 }
339 return ret;
340 }
341
342 /**
343 * @brief Gyroscope UI chain full-scale selection.[get]
344 *
345 * @param ctx Read / write interface definitions.(ptr)
346 * @param val Get the values of fs_g in reg CTRL2_G
347 * @retval Interface status (MANDATORY: return 0 -> no Error).
348 *
349 */
asm330lhh_gy_full_scale_get(const stmdev_ctx_t * ctx,asm330lhh_fs_g_t * val)350 int32_t asm330lhh_gy_full_scale_get(const stmdev_ctx_t *ctx,
351 asm330lhh_fs_g_t *val)
352 {
353 asm330lhh_ctrl2_g_t ctrl2_g;
354 int32_t ret;
355
356 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL2_G, (uint8_t *)&ctrl2_g, 1);
357 switch (ctrl2_g.fs_g)
358 {
359 case ASM330LHH_125dps:
360 *val = ASM330LHH_125dps;
361 break;
362 case ASM330LHH_250dps:
363 *val = ASM330LHH_250dps;
364 break;
365 case ASM330LHH_500dps:
366 *val = ASM330LHH_500dps;
367 break;
368 case ASM330LHH_1000dps:
369 *val = ASM330LHH_1000dps;
370 break;
371 case ASM330LHH_2000dps:
372 *val = ASM330LHH_2000dps;
373 break;
374 case ASM330LHH_4000dps:
375 *val = ASM330LHH_4000dps;
376 break;
377 default:
378 *val = ASM330LHH_125dps;
379 break;
380 }
381 return ret;
382 }
383
384 /**
385 * @brief Gyroscope data rate.[set]
386 *
387 * @param ctx Read / write interface definitions.(ptr)
388 * @param val Change the values of odr_g in reg CTRL2_G
389 * @retval Interface status (MANDATORY: return 0 -> no Error).
390 *
391 */
asm330lhh_gy_data_rate_set(const stmdev_ctx_t * ctx,asm330lhh_odr_g_t val)392 int32_t asm330lhh_gy_data_rate_set(const stmdev_ctx_t *ctx,
393 asm330lhh_odr_g_t val)
394 {
395 asm330lhh_odr_g_t odr_gy = val;
396 asm330lhh_ctrl2_g_t ctrl2_g;
397 int32_t ret = 0;
398
399 if (ret == 0)
400 {
401 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL2_G, (uint8_t *)&ctrl2_g, 1);
402 }
403 if (ret == 0)
404 {
405 ctrl2_g.odr_g = (uint8_t)odr_gy;
406 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL2_G, (uint8_t *)&ctrl2_g, 1);
407 }
408 return ret;
409 }
410
411 /**
412 * @brief Gyroscope data rate.[get]
413 *
414 * @param ctx Read / write interface definitions.(ptr)
415 * @param val Get the values of odr_g in reg CTRL2_G
416 * @retval Interface status (MANDATORY: return 0 -> no Error).
417 *
418 */
asm330lhh_gy_data_rate_get(const stmdev_ctx_t * ctx,asm330lhh_odr_g_t * val)419 int32_t asm330lhh_gy_data_rate_get(const stmdev_ctx_t *ctx,
420 asm330lhh_odr_g_t *val)
421 {
422 asm330lhh_ctrl2_g_t ctrl2_g;
423 int32_t ret;
424
425 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL2_G, (uint8_t *)&ctrl2_g, 1);
426 switch (ctrl2_g.odr_g)
427 {
428 case ASM330LHH_GY_ODR_OFF:
429 *val = ASM330LHH_GY_ODR_OFF;
430 break;
431 case ASM330LHH_GY_ODR_12Hz5:
432 *val = ASM330LHH_GY_ODR_12Hz5;
433 break;
434 case ASM330LHH_GY_ODR_26Hz:
435 *val = ASM330LHH_GY_ODR_26Hz;
436 break;
437 case ASM330LHH_GY_ODR_52Hz:
438 *val = ASM330LHH_GY_ODR_52Hz;
439 break;
440 case ASM330LHH_GY_ODR_104Hz:
441 *val = ASM330LHH_GY_ODR_104Hz;
442 break;
443 case ASM330LHH_GY_ODR_208Hz:
444 *val = ASM330LHH_GY_ODR_208Hz;
445 break;
446 case ASM330LHH_GY_ODR_417Hz:
447 *val = ASM330LHH_GY_ODR_417Hz;
448 break;
449 case ASM330LHH_GY_ODR_833Hz:
450 *val = ASM330LHH_GY_ODR_833Hz;
451 break;
452 case ASM330LHH_GY_ODR_1667Hz:
453 *val = ASM330LHH_GY_ODR_1667Hz;
454 break;
455 case ASM330LHH_GY_ODR_3333Hz:
456 *val = ASM330LHH_GY_ODR_3333Hz;
457 break;
458 case ASM330LHH_GY_ODR_6667Hz:
459 *val = ASM330LHH_GY_ODR_6667Hz;
460 break;
461 default:
462 *val = ASM330LHH_GY_ODR_OFF;
463 break;
464 }
465 return ret;
466 }
467
468 /**
469 * @brief Block data update.[set]
470 *
471 * @param ctx Read / write interface definitions.(ptr)
472 * @param val Change the values of bdu in reg CTRL3_C
473 * @retval Interface status (MANDATORY: return 0 -> no Error).
474 *
475 */
asm330lhh_block_data_update_set(const stmdev_ctx_t * ctx,uint8_t val)476 int32_t asm330lhh_block_data_update_set(const stmdev_ctx_t *ctx, uint8_t val)
477 {
478 asm330lhh_ctrl3_c_t ctrl3_c;
479 int32_t ret;
480
481 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
482 if (ret == 0)
483 {
484 ctrl3_c.bdu = (uint8_t)val;
485 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
486 }
487 return ret;
488 }
489
490 /**
491 * @brief Block data update.[get]
492 *
493 * @param ctx Read / write interface definitions.(ptr)
494 * @param val Change the values of bdu in reg CTRL3_C
495 * @retval Interface status (MANDATORY: return 0 -> no Error).
496 *
497 */
asm330lhh_block_data_update_get(const stmdev_ctx_t * ctx,uint8_t * val)498 int32_t asm330lhh_block_data_update_get(const stmdev_ctx_t *ctx, uint8_t *val)
499 {
500 asm330lhh_ctrl3_c_t ctrl3_c;
501 int32_t ret;
502
503 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
504 *val = ctrl3_c.bdu;
505
506 return ret;
507 }
508
509 /**
510 * @brief Weight of XL user offset bits of registers X_OFS_USR (73h),
511 * Y_OFS_USR (74h), Z_OFS_USR (75h).[set]
512 *
513 * @param ctx Read / write interface definitions.(ptr)
514 * @param val Change the values of usr_off_w in reg CTRL6_C
515 * @retval Interface status (MANDATORY: return 0 -> no Error).
516 *
517 */
asm330lhh_xl_offset_weight_set(const stmdev_ctx_t * ctx,asm330lhh_usr_off_w_t val)518 int32_t asm330lhh_xl_offset_weight_set(const stmdev_ctx_t *ctx,
519 asm330lhh_usr_off_w_t val)
520 {
521 asm330lhh_ctrl6_c_t ctrl6_c;
522 int32_t ret;
523
524 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL6_C, (uint8_t *)&ctrl6_c, 1);
525 if (ret == 0)
526 {
527 ctrl6_c.usr_off_w = (uint8_t)val;
528 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL6_C, (uint8_t *)&ctrl6_c, 1);
529 }
530 return ret;
531 }
532
533 /**
534 * @brief Weight of XL user offset bits of registers X_OFS_USR (73h),
535 * Y_OFS_USR (74h), Z_OFS_USR (75h).[get]
536 *
537 * @param ctx Read / write interface definitions.(ptr)
538 * @param val Get the values of usr_off_w in reg CTRL6_C
539 * @retval Interface status (MANDATORY: return 0 -> no Error).
540 *
541 */
asm330lhh_xl_offset_weight_get(const stmdev_ctx_t * ctx,asm330lhh_usr_off_w_t * val)542 int32_t asm330lhh_xl_offset_weight_get(const stmdev_ctx_t *ctx,
543 asm330lhh_usr_off_w_t *val)
544 {
545 asm330lhh_ctrl6_c_t ctrl6_c;
546 int32_t ret;
547
548 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL6_C, (uint8_t *)&ctrl6_c, 1);
549
550 switch (ctrl6_c.usr_off_w)
551 {
552 case ASM330LHH_LSb_1mg:
553 *val = ASM330LHH_LSb_1mg;
554 break;
555 case ASM330LHH_LSb_16mg:
556 *val = ASM330LHH_LSb_16mg;
557 break;
558 default:
559 *val = ASM330LHH_LSb_1mg;
560 break;
561 }
562 return ret;
563 }
564
565 /**
566 * @brief Read all the interrupt flag of the device.
567 *[get]
568 * @param ctx Read / write interface definitions.(ptr)
569 * @param val Get registers ALL_INT_SRC; WAKE_UP_SRC;
570 * TAP_SRC; D6D_SRC; STATUS_REG;
571 * EMB_FUNC_STATUS; FSM_STATUS_A/B
572 * @retval Interface status (MANDATORY: return 0 -> no Error).
573 *
574 */
asm330lhh_all_sources_get(const stmdev_ctx_t * ctx,asm330lhh_all_sources_t * val)575 int32_t asm330lhh_all_sources_get(const stmdev_ctx_t *ctx,
576 asm330lhh_all_sources_t *val)
577 {
578 int32_t ret;
579
580 ret = asm330lhh_read_reg(ctx, ASM330LHH_ALL_INT_SRC,
581 (uint8_t *)&val->all_int_src, 1);
582 if (ret == 0)
583 {
584 ret = asm330lhh_read_reg(ctx, ASM330LHH_WAKE_UP_SRC,
585 (uint8_t *)&val->wake_up_src, 1);
586 }
587 if (ret == 0)
588 {
589 ret = asm330lhh_read_reg(ctx, ASM330LHH_D6D_SRC,
590 (uint8_t *)&val->d6d_src, 1);
591 }
592 if (ret == 0)
593 {
594 ret = asm330lhh_read_reg(ctx, ASM330LHH_STATUS_REG,
595 (uint8_t *)&val->status_reg, 1);
596 }
597
598 return ret;
599 }
600
601 /**
602 * @brief The STATUS_REG register is read by the primary interface.[get]
603 *
604 * @param ctx Read / write interface definitions.(ptr)
605 * @param val Get register STATUS_REG
606 * @retval Interface status (MANDATORY: return 0 -> no Error).
607 *
608 */
asm330lhh_status_reg_get(const stmdev_ctx_t * ctx,asm330lhh_status_reg_t * val)609 int32_t asm330lhh_status_reg_get(const stmdev_ctx_t *ctx,
610 asm330lhh_status_reg_t *val)
611 {
612 int32_t ret;
613 ret = asm330lhh_read_reg(ctx, ASM330LHH_STATUS_REG, (uint8_t *) val, 1);
614 return ret;
615 }
616
617 /**
618 * @brief Accelerometer new data available.[get]
619 *
620 * @param ctx Read / write interface definitions.(ptr)
621 * @param val Get the values of xlda in reg STATUS_REG
622 * @retval Interface status (MANDATORY: return 0 -> no Error).
623 *
624 */
asm330lhh_xl_flag_data_ready_get(const stmdev_ctx_t * ctx,uint8_t * val)625 int32_t asm330lhh_xl_flag_data_ready_get(const stmdev_ctx_t *ctx, uint8_t *val)
626 {
627 asm330lhh_status_reg_t status_reg;
628 int32_t ret;
629
630 ret = asm330lhh_read_reg(ctx, ASM330LHH_STATUS_REG,
631 (uint8_t *)&status_reg, 1);
632 *val = status_reg.xlda;
633
634 return ret;
635 }
636
637 /**
638 * @brief Gyroscope new data available.[get]
639 *
640 * @param ctx Read / write interface definitions.(ptr)
641 * @param val Get the values of gda in reg STATUS_REG
642 * @retval Interface status (MANDATORY: return 0 -> no Error).
643 *
644 */
asm330lhh_gy_flag_data_ready_get(const stmdev_ctx_t * ctx,uint8_t * val)645 int32_t asm330lhh_gy_flag_data_ready_get(const stmdev_ctx_t *ctx, uint8_t *val)
646 {
647 asm330lhh_status_reg_t status_reg;
648 int32_t ret;
649
650 ret = asm330lhh_read_reg(ctx, ASM330LHH_STATUS_REG,
651 (uint8_t *)&status_reg, 1);
652 *val = status_reg.gda;
653
654 return ret;
655 }
656
657 /**
658 * @brief Temperature new data available.[get]
659 *
660 * @param ctx Read / write interface definitions.(ptr)
661 * @param val Get the values of tda in reg STATUS_REG
662 * @retval Interface status (MANDATORY: return 0 -> no Error).
663 *
664 */
asm330lhh_temp_flag_data_ready_get(const stmdev_ctx_t * ctx,uint8_t * val)665 int32_t asm330lhh_temp_flag_data_ready_get(const stmdev_ctx_t *ctx, uint8_t *val)
666 {
667 asm330lhh_status_reg_t status_reg;
668 int32_t ret;
669
670 ret = asm330lhh_read_reg(ctx, ASM330LHH_STATUS_REG,
671 (uint8_t *)&status_reg, 1);
672 *val = status_reg.tda;
673
674 return ret;
675 }
676
677 /**
678 * @brief Accelerometer X-axis user offset correction expressed in two’s
679 * complement, weight depends on USR_OFF_W in CTRL6_C (15h).
680 * The value must be in the range [-127 127].[set]
681 *
682 * @param ctx Read / write interface definitions.(ptr)
683 * @param buff Buffer that contains data to write
684 * @retval Interface status (MANDATORY: return 0 -> no Error).
685 *
686 */
asm330lhh_xl_usr_offset_x_set(const stmdev_ctx_t * ctx,uint8_t * buff)687 int32_t asm330lhh_xl_usr_offset_x_set(const stmdev_ctx_t *ctx, uint8_t *buff)
688 {
689 int32_t ret;
690 ret = asm330lhh_write_reg(ctx, ASM330LHH_X_OFS_USR, buff, 1);
691 return ret;
692 }
693
694 /**
695 * @brief Accelerometer X-axis user offset correction expressed in two’s
696 * complement, weight depends on USR_OFF_W in CTRL6_C (15h).
697 * The value must be in the range [-127 127].[get]
698 *
699 * @param ctx Read / write interface definitions.(ptr)
700 * @param buff Buffer that stores data read
701 * @retval Interface status (MANDATORY: return 0 -> no Error).
702 *
703 */
asm330lhh_xl_usr_offset_x_get(const stmdev_ctx_t * ctx,uint8_t * buff)704 int32_t asm330lhh_xl_usr_offset_x_get(const stmdev_ctx_t *ctx, uint8_t *buff)
705 {
706 int32_t ret;
707 ret = asm330lhh_read_reg(ctx, ASM330LHH_X_OFS_USR, buff, 1);
708 return ret;
709 }
710
711 /**
712 * @brief Accelerometer Y-axis user offset correction expressed in two’s
713 * complement, weight depends on USR_OFF_W in CTRL6_C (15h).
714 * The value must be in the range [-127 127].[set]
715 *
716 * @param ctx Read / write interface definitions.(ptr)
717 * @param buff Buffer that contains data to write
718 * @retval Interface status (MANDATORY: return 0 -> no Error).
719 *
720 */
asm330lhh_xl_usr_offset_y_set(const stmdev_ctx_t * ctx,uint8_t * buff)721 int32_t asm330lhh_xl_usr_offset_y_set(const stmdev_ctx_t *ctx, uint8_t *buff)
722 {
723 int32_t ret;
724 ret = asm330lhh_write_reg(ctx, ASM330LHH_Y_OFS_USR, buff, 1);
725 return ret;
726 }
727
728 /**
729 * @brief Accelerometer Y-axis user offset correction expressed in two’s
730 * complement, weight depends on USR_OFF_W in CTRL6_C (15h).
731 * The value must be in the range [-127 127].[get]
732 *
733 * @param ctx Read / write interface definitions.(ptr)
734 * @param buff Buffer that stores data read
735 * @retval Interface status (MANDATORY: return 0 -> no Error).
736 *
737 */
asm330lhh_xl_usr_offset_y_get(const stmdev_ctx_t * ctx,uint8_t * buff)738 int32_t asm330lhh_xl_usr_offset_y_get(const stmdev_ctx_t *ctx, uint8_t *buff)
739 {
740 int32_t ret;
741 ret = asm330lhh_read_reg(ctx, ASM330LHH_Y_OFS_USR, buff, 1);
742 return ret;
743 }
744
745 /**
746 * @brief Accelerometer Z-axis user offset correction expressed in two’s
747 * complement, weight depends on USR_OFF_W in CTRL6_C (15h).
748 * The value must be in the range [-127 127].[set]
749 *
750 * @param ctx Read / write interface definitions.(ptr)
751 * @param buff Buffer that contains data to write
752 * @retval Interface status (MANDATORY: return 0 -> no Error).
753 *
754 */
asm330lhh_xl_usr_offset_z_set(const stmdev_ctx_t * ctx,uint8_t * buff)755 int32_t asm330lhh_xl_usr_offset_z_set(const stmdev_ctx_t *ctx, uint8_t *buff)
756 {
757 int32_t ret;
758 ret = asm330lhh_write_reg(ctx, ASM330LHH_Z_OFS_USR, buff, 1);
759 return ret;
760 }
761
762 /**
763 * @brief Accelerometer X-axis user offset correction expressed in two’s
764 * complement, weight depends on USR_OFF_W in CTRL6_C (15h).
765 * The value must be in the range [-127 127].[get]
766 *
767 * @param ctx Read / write interface definitions.(ptr)
768 * @param buff Buffer that stores data read
769 * @retval Interface status (MANDATORY: return 0 -> no Error).
770 *
771 */
asm330lhh_xl_usr_offset_z_get(const stmdev_ctx_t * ctx,uint8_t * buff)772 int32_t asm330lhh_xl_usr_offset_z_get(const stmdev_ctx_t *ctx, uint8_t *buff)
773 {
774 int32_t ret;
775 ret = asm330lhh_read_reg(ctx, ASM330LHH_Z_OFS_USR, buff, 1);
776 return ret;
777 }
778
779 /**
780 * @brief Enables user offset on out.[set]
781 *
782 * @param ctx Read / write interface definitions.(ptr)
783 * @param val Change the values of usr_off_on_out in reg CTRL7_G
784 * @retval Interface status (MANDATORY: return 0 -> no Error).
785 *
786 */
asm330lhh_xl_usr_offset_set(const stmdev_ctx_t * ctx,uint8_t val)787 int32_t asm330lhh_xl_usr_offset_set(const stmdev_ctx_t *ctx, uint8_t val)
788 {
789 asm330lhh_ctrl7_g_t ctrl7_g;
790 int32_t ret;
791
792 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL7_G, (uint8_t *)&ctrl7_g, 1);
793 if (ret == 0)
794 {
795 ctrl7_g.usr_off_on_out = (uint8_t)val;
796 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL7_G, (uint8_t *)&ctrl7_g, 1);
797 }
798 return ret;
799 }
800
801 /**
802 * @brief Get user offset on out flag.[get]
803 *
804 * @param ctx Read / write interface definitions.(ptr)
805 * @param val Get values of usr_off_on_out in reg CTRL7_G
806 * @retval Interface status (MANDATORY: return 0 -> no Error).
807 *
808 */
asm330lhh_xl_usr_offset_get(const stmdev_ctx_t * ctx,uint8_t * val)809 int32_t asm330lhh_xl_usr_offset_get(const stmdev_ctx_t *ctx, uint8_t *val)
810 {
811 asm330lhh_ctrl7_g_t ctrl7_g;
812 int32_t ret;
813
814 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL7_G, (uint8_t *)&ctrl7_g, 1);
815 *val = ctrl7_g.usr_off_on_out;
816
817 return ret;
818 }
819
820 /**
821 * @}
822 *
823 */
824
825 /**
826 * @defgroup ASM330LHH_Timestamp
827 * @brief This section groups all the functions that manage the
828 * timestamp generation.
829 * @{
830 *
831 */
832
833 /**
834 * @brief Reset timestamp counter.[set]
835 *
836 * @param ctx Read / write interface definitions.(ptr)
837 * @retval Interface status (MANDATORY: return 0 -> no Error).
838 *
839 */
asm330lhh_timestamp_rst(const stmdev_ctx_t * ctx)840 int32_t asm330lhh_timestamp_rst(const stmdev_ctx_t *ctx)
841 {
842 uint8_t rst_val = 0xAA;
843
844 return asm330lhh_write_reg(ctx, ASM330LHH_TIMESTAMP2, &rst_val, 1);
845 }
846
847 /**
848 * @brief Enables timestamp counter.[set]
849 *
850 * @param ctx Read / write interface definitions.(ptr)
851 * @param val Change the values of timestamp_en in reg CTRL10_C
852 * @retval Interface status (MANDATORY: return 0 -> no Error).
853 *
854 */
asm330lhh_timestamp_set(const stmdev_ctx_t * ctx,uint8_t val)855 int32_t asm330lhh_timestamp_set(const stmdev_ctx_t *ctx, uint8_t val)
856 {
857 asm330lhh_ctrl10_c_t ctrl10_c;
858 int32_t ret;
859
860 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL10_C, (uint8_t *)&ctrl10_c, 1);
861 if (ret == 0)
862 {
863 ctrl10_c.timestamp_en = (uint8_t)val;
864 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL10_C,
865 (uint8_t *)&ctrl10_c, 1);
866 }
867 return ret;
868 }
869
870 /**
871 * @brief Enables timestamp counter.[get]
872 *
873 * @param ctx Read / write interface definitions.(ptr)
874 * @param val Change the values of timestamp_en in reg CTRL10_C
875 * @retval Interface status (MANDATORY: return 0 -> no Error).
876 *
877 */
asm330lhh_timestamp_get(const stmdev_ctx_t * ctx,uint8_t * val)878 int32_t asm330lhh_timestamp_get(const stmdev_ctx_t *ctx, uint8_t *val)
879 {
880 asm330lhh_ctrl10_c_t ctrl10_c;
881 int32_t ret;
882
883 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL10_C, (uint8_t *)&ctrl10_c, 1);
884 *val = ctrl10_c.timestamp_en;
885
886 return ret;
887 }
888
889 /**
890 * @brief Timestamp first data output register (r).
891 * The value is expressed as a 32-bit word and the bit resolution
892 * is 25 μs.[get]
893 *
894 * @param ctx Read / write interface definitions.(ptr)
895 * @param buff Buffer that stores data read
896 * @retval Interface status (MANDATORY: return 0 -> no Error).
897 *
898 */
asm330lhh_timestamp_raw_get(const stmdev_ctx_t * ctx,uint32_t * val)899 int32_t asm330lhh_timestamp_raw_get(const stmdev_ctx_t *ctx, uint32_t *val)
900 {
901 uint8_t buff[4];
902 int32_t ret;
903
904 ret = asm330lhh_read_reg(ctx, ASM330LHH_TIMESTAMP0, buff, 4);
905 *val = buff[3];
906 *val = (*val * 256U) + buff[2];
907 *val = (*val * 256U) + buff[1];
908 *val = (*val * 256U) + buff[0];
909
910 return ret;
911 }
912
913 /**
914 * @}
915 *
916 */
917
918 /**
919 * @defgroup ASM330LHH_Data output
920 * @brief This section groups all the data output functions.
921 * @{
922 *
923 */
924
925 /**
926 * @brief Circular burst-mode (rounding) read of the output registers.[set]
927 *
928 * @param ctx Read / write interface definitions.(ptr)
929 * @param val Change the values of rounding in reg CTRL5_C
930 * @retval Interface status (MANDATORY: return 0 -> no Error).
931 *
932 */
asm330lhh_rounding_mode_set(const stmdev_ctx_t * ctx,asm330lhh_rounding_t val)933 int32_t asm330lhh_rounding_mode_set(const stmdev_ctx_t *ctx,
934 asm330lhh_rounding_t val)
935 {
936 asm330lhh_ctrl5_c_t ctrl5_c;
937 int32_t ret;
938
939 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL5_C, (uint8_t *)&ctrl5_c, 1);
940 if (ret == 0)
941 {
942 ctrl5_c.rounding = (uint8_t)val;
943 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL5_C, (uint8_t *)&ctrl5_c, 1);
944 }
945 return ret;
946 }
947
948 /**
949 * @brief Gyroscope UI chain full-scale selection.[get]
950 *
951 * @param ctx Read / write interface definitions.(ptr)
952 * @param val Get the values of rounding in reg CTRL5_C
953 * @retval Interface status (MANDATORY: return 0 -> no Error).
954 *
955 */
asm330lhh_rounding_mode_get(const stmdev_ctx_t * ctx,asm330lhh_rounding_t * val)956 int32_t asm330lhh_rounding_mode_get(const stmdev_ctx_t *ctx,
957 asm330lhh_rounding_t *val)
958 {
959 asm330lhh_ctrl5_c_t ctrl5_c;
960 int32_t ret;
961
962 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL5_C, (uint8_t *)&ctrl5_c, 1);
963 switch (ctrl5_c.rounding)
964 {
965 case ASM330LHH_NO_ROUND:
966 *val = ASM330LHH_NO_ROUND;
967 break;
968 case ASM330LHH_ROUND_XL:
969 *val = ASM330LHH_ROUND_XL;
970 break;
971 case ASM330LHH_ROUND_GY:
972 *val = ASM330LHH_ROUND_GY;
973 break;
974 case ASM330LHH_ROUND_GY_XL:
975 *val = ASM330LHH_ROUND_GY_XL;
976 break;
977 default:
978 *val = ASM330LHH_NO_ROUND;
979 break;
980 }
981 return ret;
982 }
983
984 /**
985 * @brief Temperature data output register (r).
986 * L and H registers together express a 16-bit word in two’s
987 * complement.[get]
988 *
989 * @param ctx Read / write interface definitions.(ptr)
990 * @param buff Buffer that stores data read
991 * @retval Interface status (MANDATORY: return 0 -> no Error).
992 *
993 */
asm330lhh_temperature_raw_get(const stmdev_ctx_t * ctx,int16_t * val)994 int32_t asm330lhh_temperature_raw_get(const stmdev_ctx_t *ctx, int16_t *val)
995 {
996 uint8_t buff[2];
997 int32_t ret;
998
999 ret = asm330lhh_read_reg(ctx, ASM330LHH_OUT_TEMP_L, buff, 2);
1000 *val = (int16_t)buff[1];
1001 *val = (*val * 256) + (int16_t)buff[0];
1002
1003 return ret;
1004 }
1005
1006 /**
1007 * @brief Angular rate sensor. The value is expressed as a 16-bit
1008 * word in two’s complement.[get]
1009 *
1010 * @param ctx Read / write interface definitions.(ptr)
1011 * @param buff Buffer that stores data read
1012 * @retval Interface status (MANDATORY: return 0 -> no Error).
1013 *
1014 */
asm330lhh_angular_rate_raw_get(const stmdev_ctx_t * ctx,int16_t * val)1015 int32_t asm330lhh_angular_rate_raw_get(const stmdev_ctx_t *ctx, int16_t *val)
1016 {
1017 uint8_t buff[6];
1018 int32_t ret;
1019 ret = asm330lhh_read_reg(ctx, ASM330LHH_OUTX_L_G, buff, 6);
1020
1021 val[0] = (int16_t)buff[1];
1022 val[0] = (val[0] * 256) + (int16_t)buff[0];
1023 val[1] = (int16_t)buff[3];
1024 val[1] = (val[1] * 256) + (int16_t)buff[2];
1025 val[2] = (int16_t)buff[5];
1026 val[2] = (val[2] * 256) + (int16_t)buff[4];
1027
1028 return ret;
1029 }
1030
1031 /**
1032 * @brief Linear acceleration output register. The value is expressed as a
1033 * 16-bit word in two’s complement.[get]
1034 *
1035 * @param ctx Read / write interface definitions.(ptr)
1036 * @param buff Buffer that stores data read
1037 * @retval Interface status (MANDATORY: return 0 -> no Error).
1038 *
1039 */
asm330lhh_acceleration_raw_get(const stmdev_ctx_t * ctx,int16_t * val)1040 int32_t asm330lhh_acceleration_raw_get(const stmdev_ctx_t *ctx, int16_t *val)
1041 {
1042 uint8_t buff[6];
1043 int32_t ret;
1044 ret = asm330lhh_read_reg(ctx, ASM330LHH_OUTX_L_A, buff, 6);
1045
1046 val[0] = (int16_t)buff[1];
1047 val[0] = (val[0] * 256) + (int16_t)buff[0];
1048 val[1] = (int16_t)buff[3];
1049 val[1] = (val[1] * 256) + (int16_t)buff[2];
1050 val[2] = (int16_t)buff[5];
1051 val[2] = (val[2] * 256) + (int16_t)buff[4];
1052
1053 return ret;
1054 }
1055
1056 /**
1057 * @brief FIFO data output.[get]
1058 *
1059 * @param ctx Read / write interface definitions.(ptr)
1060 * @param buff Buffer that stores data read
1061 * @retval Interface status (MANDATORY: return 0 -> no Error).
1062 *
1063 */
asm330lhh_fifo_out_raw_get(const stmdev_ctx_t * ctx,uint8_t * val)1064 int32_t asm330lhh_fifo_out_raw_get(const stmdev_ctx_t *ctx, uint8_t *val)
1065 {
1066 int32_t ret;
1067 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_DATA_OUT_X_L, val, 6);
1068 return ret;
1069 }
1070
1071 /**
1072 * @}
1073 *
1074 */
1075
1076 /**
1077 * @defgroup ASM330LHH_common
1078 * @brief This section groups common useful functions.
1079 * @{
1080 *
1081 */
1082
1083 /**
1084 * @brief DEVICE_CONF bit configuration[set]
1085 *
1086 * @param ctx Read / write interface definitions.(ptr)
1087 * @param val Change the values of device_conf in reg CTRL9_XL
1088 * @retval Interface status (MANDATORY: return 0 -> no Error).
1089 *
1090 */
asm330lhh_device_conf_set(const stmdev_ctx_t * ctx,uint8_t val)1091 int32_t asm330lhh_device_conf_set(const stmdev_ctx_t *ctx, uint8_t val)
1092 {
1093 asm330lhh_ctrl9_xl_t ctrl9_xl;
1094 int32_t ret;
1095
1096 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL9_XL,
1097 (uint8_t *)&ctrl9_xl, 1);
1098
1099 if (ret == 0)
1100 {
1101 ctrl9_xl.device_conf = (uint8_t)val;
1102 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL9_XL,
1103 (uint8_t *)&ctrl9_xl, 1);
1104 }
1105
1106 return ret;
1107 }
1108
1109 /**
1110 * @brief DEVICE_CONF bit configuration[get]
1111 *
1112 * @param ctx Read / write interface definitions.(ptr)
1113 * @param val Get the values of device_conf in reg CTRL9_XL
1114 * @retval Interface status (MANDATORY: return 0 -> no Error).
1115 *
1116 */
asm330lhh_device_conf_get(const stmdev_ctx_t * ctx,uint8_t * val)1117 int32_t asm330lhh_device_conf_get(const stmdev_ctx_t *ctx, uint8_t *val)
1118 {
1119 asm330lhh_ctrl9_xl_t ctrl9_xl;
1120 int32_t ret;
1121
1122 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL9_XL,
1123 (uint8_t *)&ctrl9_xl, 1);
1124 *val = ctrl9_xl.device_conf;
1125
1126 return ret;
1127 }
1128
1129 /**
1130 * @brief Difference in percentage of the effective ODR (and timestamp rate)
1131 * with respect to the typical.[set]
1132 * Step: 0.15%. 8-bit format, 2's complement.
1133 *
1134 * @param ctx Read / write interface definitions.(ptr)
1135 * @param val Change the values of freq_fine in reg INTERNAL_FREQ_FINE
1136 * @retval Interface status (MANDATORY: return 0 -> no Error).
1137 *
1138 */
asm330lhh_odr_cal_reg_set(const stmdev_ctx_t * ctx,uint8_t val)1139 int32_t asm330lhh_odr_cal_reg_set(const stmdev_ctx_t *ctx, uint8_t val)
1140 {
1141 asm330lhh_internal_freq_fine_t internal_freq_fine;
1142 int32_t ret;
1143
1144 ret = asm330lhh_read_reg(ctx, ASM330LHH_INTERNAL_FREQ_FINE,
1145 (uint8_t *)&internal_freq_fine, 1);
1146 if (ret == 0)
1147 {
1148 internal_freq_fine.freq_fine = (uint8_t)val;
1149 ret = asm330lhh_write_reg(ctx, ASM330LHH_INTERNAL_FREQ_FINE,
1150 (uint8_t *)&internal_freq_fine, 1);
1151 }
1152 return ret;
1153 }
1154
1155 /**
1156 * @brief Difference in percentage of the effective ODR (and timestamp rate)
1157 * with respect to the typical.[get]
1158 * Step: 0.15%. 8-bit format, 2's complement.
1159 *
1160 * @param ctx Read / write interface definitions.(ptr)
1161 * @param val Change the values of freq_fine in reg INTERNAL_FREQ_FINE
1162 * @retval Interface status (MANDATORY: return 0 -> no Error).
1163 *
1164 */
asm330lhh_odr_cal_reg_get(const stmdev_ctx_t * ctx,uint8_t * val)1165 int32_t asm330lhh_odr_cal_reg_get(const stmdev_ctx_t *ctx, uint8_t *val)
1166 {
1167 asm330lhh_internal_freq_fine_t internal_freq_fine;
1168 int32_t ret;
1169
1170 ret = asm330lhh_read_reg(ctx, ASM330LHH_INTERNAL_FREQ_FINE,
1171 (uint8_t *)&internal_freq_fine, 1);
1172 *val = internal_freq_fine.freq_fine;
1173
1174 return ret;
1175 }
1176
1177 /**
1178 * @brief Data-ready pulsed / letched mode.[set]
1179 *
1180 * @param ctx Read / write interface definitions.(ptr)
1181 * @param val Change the values of dataready_pulsed in
1182 * reg COUNTER_BDR_REG1
1183 * @retval Interface status (MANDATORY: return 0 -> no Error).
1184 *
1185 */
asm330lhh_data_ready_mode_set(const stmdev_ctx_t * ctx,asm330lhh_dataready_pulsed_t val)1186 int32_t asm330lhh_data_ready_mode_set(const stmdev_ctx_t *ctx,
1187 asm330lhh_dataready_pulsed_t val)
1188 {
1189 asm330lhh_counter_bdr_reg1_t counter_bdr_reg1;
1190 int32_t ret;
1191
1192 ret = asm330lhh_read_reg(ctx, ASM330LHH_COUNTER_BDR_REG1,
1193 (uint8_t *)&counter_bdr_reg1, 1);
1194 if (ret == 0)
1195 {
1196 counter_bdr_reg1.dataready_pulsed = (uint8_t)val;
1197 ret = asm330lhh_write_reg(ctx, ASM330LHH_COUNTER_BDR_REG1,
1198 (uint8_t *)&counter_bdr_reg1, 1);
1199 }
1200 return ret;
1201 }
1202
1203 /**
1204 * @brief Data-ready pulsed / letched mode.[get]
1205 *
1206 * @param ctx Read / write interface definitions.(ptr)
1207 * @param val Get the values of dataready_pulsed in
1208 * reg COUNTER_BDR_REG1
1209 * @retval Interface status (MANDATORY: return 0 -> no Error).
1210 *
1211 */
asm330lhh_data_ready_mode_get(const stmdev_ctx_t * ctx,asm330lhh_dataready_pulsed_t * val)1212 int32_t asm330lhh_data_ready_mode_get(const stmdev_ctx_t *ctx,
1213 asm330lhh_dataready_pulsed_t *val)
1214 {
1215 asm330lhh_counter_bdr_reg1_t counter_bdr_reg1;
1216 int32_t ret;
1217
1218 ret = asm330lhh_read_reg(ctx, ASM330LHH_COUNTER_BDR_REG1,
1219 (uint8_t *)&counter_bdr_reg1, 1);
1220 switch (counter_bdr_reg1.dataready_pulsed)
1221 {
1222 case ASM330LHH_DRDY_LATCHED:
1223 *val = ASM330LHH_DRDY_LATCHED;
1224 break;
1225 case ASM330LHH_DRDY_PULSED:
1226 *val = ASM330LHH_DRDY_PULSED;
1227 break;
1228 default:
1229 *val = ASM330LHH_DRDY_LATCHED;
1230 break;
1231 }
1232 return ret;
1233 }
1234
1235 /**
1236 * @brief Device Who am I.[get]
1237 *
1238 * @param ctx Read / write interface definitions.(ptr)
1239 * @param buff Buffer that stores data read
1240 * @retval Interface status (MANDATORY: return 0 -> no Error).
1241 *
1242 */
asm330lhh_device_id_get(const stmdev_ctx_t * ctx,uint8_t * buff)1243 int32_t asm330lhh_device_id_get(const stmdev_ctx_t *ctx, uint8_t *buff)
1244 {
1245 int32_t ret;
1246 ret = asm330lhh_read_reg(ctx, ASM330LHH_WHO_AM_I, buff, 1);
1247 return ret;
1248 }
1249
1250 /**
1251 * @brief Software reset. Restore the default values in user registers.[set]
1252 *
1253 * @param ctx Read / write interface definitions.(ptr)
1254 * @param val Change the values of sw_reset in reg CTRL3_C
1255 * @retval Interface status (MANDATORY: return 0 -> no Error).
1256 *
1257 */
asm330lhh_reset_set(const stmdev_ctx_t * ctx,uint8_t val)1258 int32_t asm330lhh_reset_set(const stmdev_ctx_t *ctx, uint8_t val)
1259 {
1260 asm330lhh_ctrl3_c_t ctrl3_c;
1261 int32_t ret;
1262
1263 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
1264 if (ret == 0)
1265 {
1266 ctrl3_c.sw_reset = (uint8_t)val;
1267 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
1268 }
1269 return ret;
1270 }
1271
1272 /**
1273 * @brief Software reset. Restore the default values in user registers.[get]
1274 *
1275 * @param ctx Read / write interface definitions.(ptr)
1276 * @param val Change the values of sw_reset in reg CTRL3_C
1277 * @retval Interface status (MANDATORY: return 0 -> no Error).
1278 *
1279 */
asm330lhh_reset_get(const stmdev_ctx_t * ctx,uint8_t * val)1280 int32_t asm330lhh_reset_get(const stmdev_ctx_t *ctx, uint8_t *val)
1281 {
1282 asm330lhh_ctrl3_c_t ctrl3_c;
1283 int32_t ret;
1284
1285 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
1286 *val = ctrl3_c.sw_reset;
1287
1288 return ret;
1289 }
1290
1291 /**
1292 * @brief Register address automatically incremented during a multiple byte
1293 * access with a serial interface.[set]
1294 *
1295 * @param ctx Read / write interface definitions.(ptr)
1296 * @param val Change the values of if_inc in reg CTRL3_C
1297 * @retval Interface status (MANDATORY: return 0 -> no Error).
1298 *
1299 */
asm330lhh_auto_increment_set(const stmdev_ctx_t * ctx,uint8_t val)1300 int32_t asm330lhh_auto_increment_set(const stmdev_ctx_t *ctx, uint8_t val)
1301 {
1302 asm330lhh_ctrl3_c_t ctrl3_c;
1303 int32_t ret;
1304
1305 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
1306 if (ret == 0)
1307 {
1308 ctrl3_c.if_inc = (uint8_t)val;
1309 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
1310 }
1311 return ret;
1312 }
1313
1314 /**
1315 * @brief Register address automatically incremented during a multiple byte
1316 * access with a serial interface.[get]
1317 *
1318 * @param ctx Read / write interface definitions.(ptr)
1319 * @param val Change the values of if_inc in reg CTRL3_C
1320 * @retval Interface status (MANDATORY: return 0 -> no Error).
1321 *
1322 */
asm330lhh_auto_increment_get(const stmdev_ctx_t * ctx,uint8_t * val)1323 int32_t asm330lhh_auto_increment_get(const stmdev_ctx_t *ctx, uint8_t *val)
1324 {
1325 asm330lhh_ctrl3_c_t ctrl3_c;
1326 int32_t ret;
1327
1328 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
1329 *val = ctrl3_c.if_inc;
1330
1331 return ret;
1332 }
1333
1334 /**
1335 * @brief Reboot memory content. Reload the calibration parameters.[set]
1336 *
1337 * @param ctx Read / write interface definitions.(ptr)
1338 * @param val Change the values of boot in reg CTRL3_C
1339 * @retval Interface status (MANDATORY: return 0 -> no Error).
1340 *
1341 */
asm330lhh_boot_set(const stmdev_ctx_t * ctx,uint8_t val)1342 int32_t asm330lhh_boot_set(const stmdev_ctx_t *ctx, uint8_t val)
1343 {
1344 asm330lhh_ctrl3_c_t ctrl3_c;
1345 int32_t ret;
1346
1347 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
1348 if (ret == 0)
1349 {
1350 ctrl3_c.boot = (uint8_t)val;
1351 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
1352 }
1353 return ret;
1354 }
1355
1356 /**
1357 * @brief Reboot memory content. Reload the calibration parameters.[get]
1358 *
1359 * @param ctx Read / write interface definitions.(ptr)
1360 * @param val Change the values of boot in reg CTRL3_C
1361 * @retval Interface status (MANDATORY: return 0 -> no Error).
1362 *
1363 */
asm330lhh_boot_get(const stmdev_ctx_t * ctx,uint8_t * val)1364 int32_t asm330lhh_boot_get(const stmdev_ctx_t *ctx, uint8_t *val)
1365 {
1366 asm330lhh_ctrl3_c_t ctrl3_c;
1367 int32_t ret;
1368
1369 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
1370 *val = ctrl3_c.boot;
1371
1372 return ret;
1373 }
1374
1375
1376
1377 /**
1378 * @brief Linear acceleration sensor self-test enable.[set]
1379 *
1380 * @param ctx Read / write interface definitions.(ptr)
1381 * @param val Change the values of st_xl in reg CTRL5_C
1382 * @retval Interface status (MANDATORY: return 0 -> no Error).
1383 *
1384 */
asm330lhh_xl_self_test_set(const stmdev_ctx_t * ctx,asm330lhh_st_xl_t val)1385 int32_t asm330lhh_xl_self_test_set(const stmdev_ctx_t *ctx,
1386 asm330lhh_st_xl_t val)
1387 {
1388 asm330lhh_ctrl5_c_t ctrl5_c;
1389 int32_t ret;
1390
1391 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL5_C, (uint8_t *)&ctrl5_c, 1);
1392 if (ret == 0)
1393 {
1394 ctrl5_c.st_xl = (uint8_t)val;
1395 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL5_C, (uint8_t *)&ctrl5_c, 1);
1396 }
1397 return ret;
1398 }
1399
1400 /**
1401 * @brief Linear acceleration sensor self-test enable.[get]
1402 *
1403 * @param ctx Read / write interface definitions.(ptr)
1404 * @param val Get the values of st_xl in reg CTRL5_C
1405 * @retval Interface status (MANDATORY: return 0 -> no Error).
1406 *
1407 */
asm330lhh_xl_self_test_get(const stmdev_ctx_t * ctx,asm330lhh_st_xl_t * val)1408 int32_t asm330lhh_xl_self_test_get(const stmdev_ctx_t *ctx,
1409 asm330lhh_st_xl_t *val)
1410 {
1411 asm330lhh_ctrl5_c_t ctrl5_c;
1412 int32_t ret;
1413
1414 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL5_C, (uint8_t *)&ctrl5_c, 1);
1415
1416 switch (ctrl5_c.st_xl)
1417 {
1418 case ASM330LHH_XL_ST_DISABLE:
1419 *val = ASM330LHH_XL_ST_DISABLE;
1420 break;
1421 case ASM330LHH_XL_ST_POSITIVE:
1422 *val = ASM330LHH_XL_ST_POSITIVE;
1423 break;
1424 case ASM330LHH_XL_ST_NEGATIVE:
1425 *val = ASM330LHH_XL_ST_NEGATIVE;
1426 break;
1427 default:
1428 *val = ASM330LHH_XL_ST_DISABLE;
1429 break;
1430 }
1431 return ret;
1432 }
1433
1434 /**
1435 * @brief Angular rate sensor self-test enable.[set]
1436 *
1437 * @param ctx Read / write interface definitions.(ptr)
1438 * @param val Change the values of st_g in reg CTRL5_C
1439 * @retval Interface status (MANDATORY: return 0 -> no Error).
1440 *
1441 */
asm330lhh_gy_self_test_set(const stmdev_ctx_t * ctx,asm330lhh_st_g_t val)1442 int32_t asm330lhh_gy_self_test_set(const stmdev_ctx_t *ctx,
1443 asm330lhh_st_g_t val)
1444 {
1445 asm330lhh_ctrl5_c_t ctrl5_c;
1446 int32_t ret;
1447
1448 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL5_C, (uint8_t *)&ctrl5_c, 1);
1449 if (ret == 0)
1450 {
1451 ctrl5_c.st_g = (uint8_t)val;
1452 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL5_C, (uint8_t *)&ctrl5_c, 1);
1453 }
1454 return ret;
1455 }
1456
1457 /**
1458 * @brief Angular rate sensor self-test enable.[get]
1459 *
1460 * @param ctx Read / write interface definitions.(ptr)
1461 * @param val Get the values of st_g in reg CTRL5_C
1462 * @retval Interface status (MANDATORY: return 0 -> no Error).
1463 *
1464 */
asm330lhh_gy_self_test_get(const stmdev_ctx_t * ctx,asm330lhh_st_g_t * val)1465 int32_t asm330lhh_gy_self_test_get(const stmdev_ctx_t *ctx,
1466 asm330lhh_st_g_t *val)
1467 {
1468 asm330lhh_ctrl5_c_t ctrl5_c;
1469 int32_t ret;
1470
1471 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL5_C, (uint8_t *)&ctrl5_c, 1);
1472
1473 switch (ctrl5_c.st_g)
1474 {
1475 case ASM330LHH_GY_ST_DISABLE:
1476 *val = ASM330LHH_GY_ST_DISABLE;
1477 break;
1478 case ASM330LHH_GY_ST_POSITIVE:
1479 *val = ASM330LHH_GY_ST_POSITIVE;
1480 break;
1481 case ASM330LHH_GY_ST_NEGATIVE:
1482 *val = ASM330LHH_GY_ST_NEGATIVE;
1483 break;
1484 default:
1485 *val = ASM330LHH_GY_ST_DISABLE;
1486 break;
1487 }
1488 return ret;
1489 }
1490
1491 /**
1492 * @}
1493 *
1494 */
1495
1496 /**
1497 * @defgroup ASM330LHH_filters
1498 * @brief This section group all the functions concerning the
1499 * filters configuration
1500 * @{
1501 *
1502 */
1503
1504 /**
1505 * @brief Accelerometer output from LPF2 filtering stage selection.[set]
1506 *
1507 * @param ctx Read / write interface definitions.(ptr)
1508 * @param val Change the values of lpf2_xl_en in reg CTRL1_XL
1509 * @retval Interface status (MANDATORY: return 0 -> no Error).
1510 *
1511 */
asm330lhh_xl_filter_lp2_set(const stmdev_ctx_t * ctx,uint8_t val)1512 int32_t asm330lhh_xl_filter_lp2_set(const stmdev_ctx_t *ctx, uint8_t val)
1513 {
1514 asm330lhh_ctrl1_xl_t ctrl1_xl;
1515 int32_t ret;
1516
1517 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL1_XL, (uint8_t *)&ctrl1_xl, 1);
1518 if (ret == 0)
1519 {
1520 ctrl1_xl.lpf2_xl_en = (uint8_t)val;
1521 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL1_XL,
1522 (uint8_t *)&ctrl1_xl, 1);
1523 }
1524 return ret;
1525 }
1526
1527 /**
1528 * @brief Accelerometer output from LPF2 filtering stage selection.[get]
1529 *
1530 * @param ctx Read / write interface definitions.(ptr)
1531 * @param val Change the values of lpf2_xl_en in reg CTRL1_XL
1532 * @retval Interface status (MANDATORY: return 0 -> no Error).
1533 *
1534 */
asm330lhh_xl_filter_lp2_get(const stmdev_ctx_t * ctx,uint8_t * val)1535 int32_t asm330lhh_xl_filter_lp2_get(const stmdev_ctx_t *ctx, uint8_t *val)
1536 {
1537 asm330lhh_ctrl1_xl_t ctrl1_xl;
1538 int32_t ret;
1539
1540 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL1_XL, (uint8_t *)&ctrl1_xl, 1);
1541 *val = ctrl1_xl.lpf2_xl_en;
1542
1543 return ret;
1544 }
1545
1546 /**
1547 * @brief Enables gyroscope digital LPF1 if auxiliary SPI is disabled;
1548 * the bandwidth can be selected through FTYPE [2:0] in CTRL6_C.[set]
1549 *
1550 * @param ctx Read / write interface definitions.(ptr)
1551 * @param val Change the values of lpf1_sel_g in reg CTRL4_C
1552 * @retval Interface status (MANDATORY: return 0 -> no Error).
1553 *
1554 */
asm330lhh_gy_filter_lp1_set(const stmdev_ctx_t * ctx,uint8_t val)1555 int32_t asm330lhh_gy_filter_lp1_set(const stmdev_ctx_t *ctx, uint8_t val)
1556 {
1557 asm330lhh_ctrl4_c_t ctrl4_c;
1558 int32_t ret;
1559
1560 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
1561 if (ret == 0)
1562 {
1563 ctrl4_c.lpf1_sel_g = (uint8_t)val;
1564 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
1565 }
1566 return ret;
1567 }
1568
1569 /**
1570 * @brief Enables gyroscope digital LPF1 if auxiliary SPI is disabled;
1571 * the bandwidth can be selected through FTYPE [2:0] in CTRL6_C.[get]
1572 *
1573 * @param ctx Read / write interface definitions.(ptr)
1574 * @param val Change the values of lpf1_sel_g in reg CTRL4_C
1575 * @retval Interface status (MANDATORY: return 0 -> no Error).
1576 *
1577 */
asm330lhh_gy_filter_lp1_get(const stmdev_ctx_t * ctx,uint8_t * val)1578 int32_t asm330lhh_gy_filter_lp1_get(const stmdev_ctx_t *ctx, uint8_t *val)
1579 {
1580 asm330lhh_ctrl4_c_t ctrl4_c;
1581 int32_t ret;
1582
1583 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
1584 *val = ctrl4_c.lpf1_sel_g;
1585
1586 return ret;
1587 }
1588
1589 /**
1590 * @brief Mask DRDY on pin (both XL & Gyro) until filter settling ends
1591 * (XL and Gyro independently masked).[set]
1592 *
1593 * @param ctx Read / write interface definitions.(ptr)
1594 * @param val Change the values of drdy_mask in reg CTRL4_C
1595 * @retval Interface status (MANDATORY: return 0 -> no Error).
1596 *
1597 */
asm330lhh_filter_settling_mask_set(const stmdev_ctx_t * ctx,uint8_t val)1598 int32_t asm330lhh_filter_settling_mask_set(const stmdev_ctx_t *ctx, uint8_t val)
1599 {
1600 asm330lhh_ctrl4_c_t ctrl4_c;
1601 int32_t ret;
1602
1603 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
1604 if (ret == 0)
1605 {
1606 ctrl4_c.drdy_mask = (uint8_t)val;
1607 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
1608 }
1609 return ret;
1610 }
1611
1612 /**
1613 * @brief Mask DRDY on pin (both XL & Gyro) until filter settling ends
1614 * (XL and Gyro independently masked).[get]
1615 *
1616 * @param ctx Read / write interface definitions.(ptr)
1617 * @param val Change the values of drdy_mask in reg CTRL4_C
1618 * @retval Interface status (MANDATORY: return 0 -> no Error).
1619 *
1620 */
asm330lhh_filter_settling_mask_get(const stmdev_ctx_t * ctx,uint8_t * val)1621 int32_t asm330lhh_filter_settling_mask_get(const stmdev_ctx_t *ctx,
1622 uint8_t *val)
1623 {
1624 asm330lhh_ctrl4_c_t ctrl4_c;
1625 int32_t ret;
1626
1627 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
1628 *val = ctrl4_c.drdy_mask;
1629
1630 return ret;
1631 }
1632
1633 /**
1634 * @brief Gyroscope low pass filter 1 bandwidth.[set]
1635 *
1636 * @param ctx Read / write interface definitions.(ptr)
1637 * @param val Change the values of ftype in reg CTRL6_C
1638 * @retval Interface status (MANDATORY: return 0 -> no Error).
1639 *
1640 */
asm330lhh_gy_lp1_bandwidth_set(const stmdev_ctx_t * ctx,asm330lhh_ftype_t val)1641 int32_t asm330lhh_gy_lp1_bandwidth_set(const stmdev_ctx_t *ctx,
1642 asm330lhh_ftype_t val)
1643 {
1644 asm330lhh_ctrl6_c_t ctrl6_c;
1645 int32_t ret;
1646
1647 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL6_C, (uint8_t *)&ctrl6_c, 1);
1648 if (ret == 0)
1649 {
1650 ctrl6_c.ftype = (uint8_t)val;
1651 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL6_C, (uint8_t *)&ctrl6_c, 1);
1652 }
1653 return ret;
1654 }
1655
1656 /**
1657 * @brief Gyroscope low pass filter 1 bandwidth.[get]
1658 *
1659 * @param ctx Read / write interface definitions.(ptr)
1660 * @param val Get the values of ftype in reg CTRL6_C
1661 * @retval Interface status (MANDATORY: return 0 -> no Error).
1662 *
1663 */
asm330lhh_gy_lp1_bandwidth_get(const stmdev_ctx_t * ctx,asm330lhh_ftype_t * val)1664 int32_t asm330lhh_gy_lp1_bandwidth_get(const stmdev_ctx_t *ctx,
1665 asm330lhh_ftype_t *val)
1666 {
1667 asm330lhh_ctrl6_c_t ctrl6_c;
1668 int32_t ret;
1669
1670 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL6_C, (uint8_t *)&ctrl6_c, 1);
1671
1672 switch (ctrl6_c.ftype)
1673 {
1674 case ASM330LHH_ULTRA_LIGHT:
1675 *val = ASM330LHH_ULTRA_LIGHT;
1676 break;
1677 case ASM330LHH_VERY_LIGHT:
1678 *val = ASM330LHH_VERY_LIGHT;
1679 break;
1680 case ASM330LHH_LIGHT:
1681 *val = ASM330LHH_LIGHT;
1682 break;
1683 case ASM330LHH_MEDIUM:
1684 *val = ASM330LHH_MEDIUM;
1685 break;
1686 case ASM330LHH_STRONG:
1687 *val = ASM330LHH_STRONG;
1688 break;
1689 case ASM330LHH_VERY_STRONG:
1690 *val = ASM330LHH_VERY_STRONG;
1691 break;
1692 case ASM330LHH_AGGRESSIVE:
1693 *val = ASM330LHH_AGGRESSIVE;
1694 break;
1695 case ASM330LHH_XTREME:
1696 *val = ASM330LHH_XTREME;
1697 break;
1698 default:
1699 *val = ASM330LHH_ULTRA_LIGHT;
1700 break;
1701 }
1702 return ret;
1703 }
1704
1705 /**
1706 * @brief Low pass filter 2 on 6D function selection.[set]
1707 *
1708 * @param ctx Read / write interface definitions.(ptr)
1709 * @param val Change the values of low_pass_on_6d in reg CTRL8_XL
1710 * @retval Interface status (MANDATORY: return 0 -> no Error).
1711 *
1712 */
asm330lhh_xl_lp2_on_6d_set(const stmdev_ctx_t * ctx,uint8_t val)1713 int32_t asm330lhh_xl_lp2_on_6d_set(const stmdev_ctx_t *ctx, uint8_t val)
1714 {
1715 asm330lhh_ctrl8_xl_t ctrl8_xl;
1716 int32_t ret;
1717
1718 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL8_XL, (uint8_t *)&ctrl8_xl, 1);
1719 if (ret == 0)
1720 {
1721 ctrl8_xl.low_pass_on_6d = (uint8_t)val;
1722 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL8_XL,
1723 (uint8_t *)&ctrl8_xl, 1);
1724 }
1725 return ret;
1726 }
1727
1728 /**
1729 * @brief Low pass filter 2 on 6D function selection.[get]
1730 *
1731 * @param ctx Read / write interface definitions.(ptr)
1732 * @param val Change the values of low_pass_on_6d in reg CTRL8_XL
1733 * @retval Interface status (MANDATORY: return 0 -> no Error).
1734 *
1735 */
asm330lhh_xl_lp2_on_6d_get(const stmdev_ctx_t * ctx,uint8_t * val)1736 int32_t asm330lhh_xl_lp2_on_6d_get(const stmdev_ctx_t *ctx, uint8_t *val)
1737 {
1738 asm330lhh_ctrl8_xl_t ctrl8_xl;
1739 int32_t ret;
1740
1741 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL8_XL, (uint8_t *)&ctrl8_xl, 1);
1742 *val = ctrl8_xl.low_pass_on_6d;
1743
1744 return ret;
1745 }
1746
1747 /**
1748 * @brief Accelerometer slope filter / high-pass filter selection
1749 * on output.[set]
1750 *
1751 * @param ctx Read / write interface definitions.(ptr)
1752 * @param val Change the values of hp_slope_xl_en in reg CTRL8_XL
1753 * @retval Interface status (MANDATORY: return 0 -> no Error).
1754 *
1755 */
asm330lhh_xl_hp_path_on_out_set(const stmdev_ctx_t * ctx,asm330lhh_hp_slope_xl_en_t val)1756 int32_t asm330lhh_xl_hp_path_on_out_set(const stmdev_ctx_t *ctx,
1757 asm330lhh_hp_slope_xl_en_t val)
1758 {
1759 asm330lhh_ctrl8_xl_t ctrl8_xl;
1760 int32_t ret;
1761
1762 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL8_XL, (uint8_t *)&ctrl8_xl, 1);
1763 if (ret == 0)
1764 {
1765 ctrl8_xl.hp_slope_xl_en = (((uint8_t)val & 0x10U) >> 4);
1766 ctrl8_xl.hp_ref_mode_xl = (((uint8_t)val & 0x20U) >> 5);
1767 ctrl8_xl.hpcf_xl = (uint8_t)val & 0x07U;
1768 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL8_XL,
1769 (uint8_t *)&ctrl8_xl, 1);
1770 }
1771 return ret;
1772 }
1773
1774 /**
1775 * @brief Accelerometer slope filter / high-pass filter selection on
1776 * output.[get]
1777 *
1778 * @param ctx Read / write interface definitions.(ptr)
1779 * @param val Get the values of hp_slope_xl_en in reg CTRL8_XL
1780 * @retval Interface status (MANDATORY: return 0 -> no Error).
1781 *
1782 */
asm330lhh_xl_hp_path_on_out_get(const stmdev_ctx_t * ctx,asm330lhh_hp_slope_xl_en_t * val)1783 int32_t asm330lhh_xl_hp_path_on_out_get(const stmdev_ctx_t *ctx,
1784 asm330lhh_hp_slope_xl_en_t *val)
1785 {
1786 asm330lhh_ctrl8_xl_t ctrl8_xl;
1787 int32_t ret;
1788
1789 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL8_XL, (uint8_t *)&ctrl8_xl, 1);
1790 switch (((ctrl8_xl.hp_ref_mode_xl << 5) + (ctrl8_xl.hp_slope_xl_en << 4) +
1791 ctrl8_xl.hpcf_xl))
1792 {
1793 case ASM330LHH_HP_PATH_DISABLE_ON_OUT:
1794 *val = ASM330LHH_HP_PATH_DISABLE_ON_OUT;
1795 break;
1796 case ASM330LHH_SLOPE_ODR_DIV_4:
1797 *val = ASM330LHH_SLOPE_ODR_DIV_4;
1798 break;
1799 case ASM330LHH_HP_ODR_DIV_10:
1800 *val = ASM330LHH_HP_ODR_DIV_10;
1801 break;
1802 case ASM330LHH_HP_ODR_DIV_20:
1803 *val = ASM330LHH_HP_ODR_DIV_20;
1804 break;
1805 case ASM330LHH_HP_ODR_DIV_45:
1806 *val = ASM330LHH_HP_ODR_DIV_45;
1807 break;
1808 case ASM330LHH_HP_ODR_DIV_100:
1809 *val = ASM330LHH_HP_ODR_DIV_100;
1810 break;
1811 case ASM330LHH_HP_ODR_DIV_200:
1812 *val = ASM330LHH_HP_ODR_DIV_200;
1813 break;
1814 case ASM330LHH_HP_ODR_DIV_400:
1815 *val = ASM330LHH_HP_ODR_DIV_400;
1816 break;
1817 case ASM330LHH_HP_ODR_DIV_800:
1818 *val = ASM330LHH_HP_ODR_DIV_800;
1819 break;
1820 case ASM330LHH_HP_REF_MD_ODR_DIV_10:
1821 *val = ASM330LHH_HP_REF_MD_ODR_DIV_10;
1822 break;
1823 case ASM330LHH_HP_REF_MD_ODR_DIV_20:
1824 *val = ASM330LHH_HP_REF_MD_ODR_DIV_20;
1825 break;
1826 case ASM330LHH_HP_REF_MD_ODR_DIV_45:
1827 *val = ASM330LHH_HP_REF_MD_ODR_DIV_45;
1828 break;
1829 case ASM330LHH_HP_REF_MD_ODR_DIV_100:
1830 *val = ASM330LHH_HP_REF_MD_ODR_DIV_100;
1831 break;
1832 case ASM330LHH_HP_REF_MD_ODR_DIV_200:
1833 *val = ASM330LHH_HP_REF_MD_ODR_DIV_200;
1834 break;
1835 case ASM330LHH_HP_REF_MD_ODR_DIV_400:
1836 *val = ASM330LHH_HP_REF_MD_ODR_DIV_400;
1837 break;
1838 case ASM330LHH_HP_REF_MD_ODR_DIV_800:
1839 *val = ASM330LHH_HP_REF_MD_ODR_DIV_800;
1840 break;
1841 case ASM330LHH_LP_ODR_DIV_10:
1842 *val = ASM330LHH_LP_ODR_DIV_10;
1843 break;
1844 case ASM330LHH_LP_ODR_DIV_20:
1845 *val = ASM330LHH_LP_ODR_DIV_20;
1846 break;
1847 case ASM330LHH_LP_ODR_DIV_45:
1848 *val = ASM330LHH_LP_ODR_DIV_45;
1849 break;
1850 case ASM330LHH_LP_ODR_DIV_100:
1851 *val = ASM330LHH_LP_ODR_DIV_100;
1852 break;
1853 case ASM330LHH_LP_ODR_DIV_200:
1854 *val = ASM330LHH_LP_ODR_DIV_200;
1855 break;
1856 case ASM330LHH_LP_ODR_DIV_400:
1857 *val = ASM330LHH_LP_ODR_DIV_400;
1858 break;
1859 case ASM330LHH_LP_ODR_DIV_800:
1860 *val = ASM330LHH_LP_ODR_DIV_800;
1861 break;
1862 default:
1863 *val = ASM330LHH_HP_PATH_DISABLE_ON_OUT;
1864 break;
1865 }
1866 return ret;
1867 }
1868
1869 /**
1870 * @brief Enables accelerometer LPF2 and HPF fast-settling mode.
1871 * The filter sets the second samples after writing this bit.
1872 * Active only during device exit from powerdown mode.[set]
1873 *
1874 * @param ctx Read / write interface definitions.(ptr)
1875 * @param val Change the values of fastsettl_mode_xl in reg CTRL8_XL
1876 * @retval Interface status (MANDATORY: return 0 -> no Error).
1877 *
1878 */
asm330lhh_xl_fast_settling_set(const stmdev_ctx_t * ctx,uint8_t val)1879 int32_t asm330lhh_xl_fast_settling_set(const stmdev_ctx_t *ctx, uint8_t val)
1880 {
1881 asm330lhh_ctrl8_xl_t ctrl8_xl;
1882 int32_t ret;
1883
1884 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL8_XL, (uint8_t *)&ctrl8_xl, 1);
1885 if (ret == 0)
1886 {
1887 ctrl8_xl.fastsettl_mode_xl = (uint8_t)val;
1888 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL8_XL,
1889 (uint8_t *)&ctrl8_xl, 1);
1890 }
1891 return ret;
1892 }
1893
1894 /**
1895 * @brief Enables accelerometer LPF2 and HPF fast-settling mode.
1896 * The filter sets the second samples after writing
1897 * this bit. Active only during device exit from powerdown mode.[get]
1898 *
1899 * @param ctx Read / write interface definitions.(ptr)
1900 * @param val Change the values of fastsettl_mode_xl in reg CTRL8_XL
1901 * @retval Interface status (MANDATORY: return 0 -> no Error).
1902 *
1903 */
asm330lhh_xl_fast_settling_get(const stmdev_ctx_t * ctx,uint8_t * val)1904 int32_t asm330lhh_xl_fast_settling_get(const stmdev_ctx_t *ctx, uint8_t *val)
1905 {
1906 asm330lhh_ctrl8_xl_t ctrl8_xl;
1907 int32_t ret;
1908
1909 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL8_XL, (uint8_t *)&ctrl8_xl, 1);
1910 *val = ctrl8_xl.fastsettl_mode_xl;
1911
1912 return ret;
1913 }
1914
1915 /**
1916 * @brief HPF or SLOPE filter selection on wake-up and Activity/Inactivity
1917 * functions.[set]
1918 *
1919 * @param ctx Read / write interface definitions.(ptr)
1920 * @param val Change the values of slope_fds in reg INT_CFG0
1921 * @retval Interface status (MANDATORY: return 0 -> no Error).
1922 *
1923 */
asm330lhh_xl_hp_path_internal_set(const stmdev_ctx_t * ctx,asm330lhh_slope_fds_t val)1924 int32_t asm330lhh_xl_hp_path_internal_set(const stmdev_ctx_t *ctx,
1925 asm330lhh_slope_fds_t val)
1926 {
1927 asm330lhh_int_cfg0_t int_cfg0;
1928 int32_t ret;
1929
1930 ret = asm330lhh_read_reg(ctx, ASM330LHH_INT_CFG0, (uint8_t *)&int_cfg0, 1);
1931 if (ret == 0)
1932 {
1933 int_cfg0.slope_fds = (uint8_t)val;
1934 ret = asm330lhh_write_reg(ctx, ASM330LHH_INT_CFG0,
1935 (uint8_t *)&int_cfg0, 1);
1936 }
1937 return ret;
1938 }
1939
1940 /**
1941 * @brief HPF or SLOPE filter selection on wake-up and Activity/Inactivity
1942 * functions.[get]
1943 *
1944 * @param ctx Read / write interface definitions.(ptr)
1945 * @param val Get the values of slope_fds in reg INT_CFG0
1946 * @retval Interface status (MANDATORY: return 0 -> no Error).
1947 *
1948 */
asm330lhh_xl_hp_path_internal_get(const stmdev_ctx_t * ctx,asm330lhh_slope_fds_t * val)1949 int32_t asm330lhh_xl_hp_path_internal_get(const stmdev_ctx_t *ctx,
1950 asm330lhh_slope_fds_t *val)
1951 {
1952 asm330lhh_int_cfg0_t int_cfg0;
1953 int32_t ret;
1954
1955 ret = asm330lhh_read_reg(ctx, ASM330LHH_INT_CFG0, (uint8_t *)&int_cfg0, 1);
1956 switch (int_cfg0.slope_fds)
1957 {
1958 case ASM330LHH_USE_SLOPE:
1959 *val = ASM330LHH_USE_SLOPE;
1960 break;
1961 case ASM330LHH_USE_HPF:
1962 *val = ASM330LHH_USE_HPF;
1963 break;
1964 default:
1965 *val = ASM330LHH_USE_SLOPE;
1966 break;
1967 }
1968 return ret;
1969 }
1970
1971 /**
1972 * @brief Enables gyroscope digital high-pass filter. The filter is enabled
1973 * only if the gyro is in HP mode.[set]
1974 *
1975 * @param ctx Read / write interface definitions.(ptr)
1976 * @param val Get the values of hp_en_g and hp_en_g in reg CTRL7_G
1977 * @retval Interface status (MANDATORY: return 0 -> no Error).
1978 *
1979 */
asm330lhh_gy_hp_path_internal_set(const stmdev_ctx_t * ctx,asm330lhh_hpm_g_t val)1980 int32_t asm330lhh_gy_hp_path_internal_set(const stmdev_ctx_t *ctx,
1981 asm330lhh_hpm_g_t val)
1982 {
1983 asm330lhh_ctrl7_g_t ctrl7_g;
1984 int32_t ret;
1985
1986 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL7_G, (uint8_t *)&ctrl7_g, 1);
1987 if (ret == 0)
1988 {
1989 ctrl7_g.hp_en_g = (((uint8_t)val & 0x80U) >> 7);
1990 ctrl7_g.hpm_g = (uint8_t)val & 0x03U;
1991 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL7_G, (uint8_t *)&ctrl7_g, 1);
1992 }
1993 return ret;
1994 }
1995
1996 /**
1997 * @brief Enables gyroscope digital high-pass filter. The filter is
1998 * enabled only if the gyro is in HP mode.[get]
1999 *
2000 * @param ctx Read / write interface definitions.(ptr)
2001 * @param val Get the values of hp_en_g and hp_en_g in reg CTRL7_G
2002 * @retval Interface status (MANDATORY: return 0 -> no Error).
2003 *
2004 */
asm330lhh_gy_hp_path_internal_get(const stmdev_ctx_t * ctx,asm330lhh_hpm_g_t * val)2005 int32_t asm330lhh_gy_hp_path_internal_get(const stmdev_ctx_t *ctx,
2006 asm330lhh_hpm_g_t *val)
2007 {
2008 asm330lhh_ctrl7_g_t ctrl7_g;
2009 int32_t ret;
2010
2011 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL7_G, (uint8_t *)&ctrl7_g, 1);
2012
2013 switch ((ctrl7_g.hp_en_g << 7) + ctrl7_g.hpm_g)
2014 {
2015 case ASM330LHH_HP_FILTER_NONE:
2016 *val = ASM330LHH_HP_FILTER_NONE;
2017 break;
2018 case ASM330LHH_HP_FILTER_16mHz:
2019 *val = ASM330LHH_HP_FILTER_16mHz;
2020 break;
2021 case ASM330LHH_HP_FILTER_65mHz:
2022 *val = ASM330LHH_HP_FILTER_65mHz;
2023 break;
2024 case ASM330LHH_HP_FILTER_260mHz:
2025 *val = ASM330LHH_HP_FILTER_260mHz;
2026 break;
2027 case ASM330LHH_HP_FILTER_1Hz04:
2028 *val = ASM330LHH_HP_FILTER_1Hz04;
2029 break;
2030 default:
2031 *val = ASM330LHH_HP_FILTER_NONE;
2032 break;
2033 }
2034 return ret;
2035 }
2036
2037 /**
2038 * @}
2039 *
2040 */
2041
2042 /**
2043 * @defgroup ASM330LHH_ serial_interface
2044 * @brief This section groups all the functions concerning main
2045 * serial interface management (not auxiliary)
2046 * @{
2047 *
2048 */
2049
2050 /**
2051 * @brief Connect/Disconnect SDO/SA0 internal pull-up.[set]
2052 *
2053 * @param ctx Read / write interface definitions.(ptr)
2054 * @param val Change the values of sdo_pu_en in reg PIN_CTRL
2055 * @retval Interface status (MANDATORY: return 0 -> no Error).
2056 *
2057 */
asm330lhh_sdo_sa0_mode_set(const stmdev_ctx_t * ctx,asm330lhh_sdo_pu_en_t val)2058 int32_t asm330lhh_sdo_sa0_mode_set(const stmdev_ctx_t *ctx,
2059 asm330lhh_sdo_pu_en_t val)
2060 {
2061 asm330lhh_pin_ctrl_t pin_ctrl;
2062 int32_t ret;
2063
2064 ret = asm330lhh_read_reg(ctx, ASM330LHH_PIN_CTRL, (uint8_t *)&pin_ctrl, 1);
2065 if (ret == 0)
2066 {
2067 pin_ctrl.sdo_pu_en = (uint8_t)val;
2068 ret = asm330lhh_write_reg(ctx, ASM330LHH_PIN_CTRL, (uint8_t *)&pin_ctrl, 1);
2069 }
2070 return ret;
2071 }
2072
2073 /**
2074 * @brief Connect/Disconnect SDO/SA0 internal pull-up.[get]
2075 *
2076 * @param ctx Read / write interface definitions.(ptr)
2077 * @param val Get the values of sdo_pu_en in reg PIN_CTRL
2078 * @retval Interface status (MANDATORY: return 0 -> no Error).
2079 *
2080 */
asm330lhh_sdo_sa0_mode_get(const stmdev_ctx_t * ctx,asm330lhh_sdo_pu_en_t * val)2081 int32_t asm330lhh_sdo_sa0_mode_get(const stmdev_ctx_t *ctx,
2082 asm330lhh_sdo_pu_en_t *val)
2083 {
2084 asm330lhh_pin_ctrl_t pin_ctrl;
2085 int32_t ret;
2086
2087 ret = asm330lhh_read_reg(ctx, ASM330LHH_PIN_CTRL, (uint8_t *)&pin_ctrl, 1);
2088
2089 switch (pin_ctrl.sdo_pu_en)
2090 {
2091 case ASM330LHH_PULL_UP_DISC:
2092 *val = ASM330LHH_PULL_UP_DISC;
2093 break;
2094 case ASM330LHH_PULL_UP_CONNECT:
2095 *val = ASM330LHH_PULL_UP_CONNECT;
2096 break;
2097 default:
2098 *val = ASM330LHH_PULL_UP_DISC;
2099 break;
2100 }
2101 return ret;
2102 }
2103
2104 /**
2105 * @brief SPI Serial Interface Mode selection.[set]
2106 *
2107 * @param ctx Read / write interface definitions.(ptr)
2108 * @param val Change the values of sim in reg CTRL3_C
2109 * @retval Interface status (MANDATORY: return 0 -> no Error).
2110 *
2111 */
asm330lhh_spi_mode_set(const stmdev_ctx_t * ctx,asm330lhh_sim_t val)2112 int32_t asm330lhh_spi_mode_set(const stmdev_ctx_t *ctx, asm330lhh_sim_t val)
2113 {
2114 asm330lhh_ctrl3_c_t ctrl3_c;
2115 int32_t ret;
2116
2117 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
2118 if (ret == 0)
2119 {
2120 ctrl3_c.sim = (uint8_t)val;
2121 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
2122 }
2123 return ret;
2124 }
2125
2126 /**
2127 * @brief SPI Serial Interface Mode selection.[get]
2128 *
2129 * @param ctx Read / write interface definitions.(ptr)
2130 * @param val Get the values of sim in reg CTRL3_C
2131 * @retval Interface status (MANDATORY: return 0 -> no Error).
2132 *
2133 */
asm330lhh_spi_mode_get(const stmdev_ctx_t * ctx,asm330lhh_sim_t * val)2134 int32_t asm330lhh_spi_mode_get(const stmdev_ctx_t *ctx, asm330lhh_sim_t *val)
2135 {
2136 asm330lhh_ctrl3_c_t ctrl3_c;
2137 int32_t ret;
2138
2139 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
2140
2141 switch (ctrl3_c.sim)
2142 {
2143 case ASM330LHH_SPI_4_WIRE:
2144 *val = ASM330LHH_SPI_4_WIRE;
2145 break;
2146 case ASM330LHH_SPI_3_WIRE:
2147 *val = ASM330LHH_SPI_3_WIRE;
2148 break;
2149 default:
2150 *val = ASM330LHH_SPI_4_WIRE;
2151 break;
2152 }
2153 return ret;
2154 }
2155
2156 /**
2157 * @brief Disable / Enable I2C interface.[set]
2158 *
2159 * @param ctx Read / write interface definitions.(ptr)
2160 * @param val Change the values of i2c_disable in reg CTRL4_C
2161 * @retval Interface status (MANDATORY: return 0 -> no Error).
2162 *
2163 */
asm330lhh_i2c_interface_set(const stmdev_ctx_t * ctx,asm330lhh_i2c_disable_t val)2164 int32_t asm330lhh_i2c_interface_set(const stmdev_ctx_t *ctx,
2165 asm330lhh_i2c_disable_t val)
2166 {
2167 asm330lhh_ctrl4_c_t ctrl4_c;
2168 int32_t ret;
2169
2170 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
2171 if (ret == 0)
2172 {
2173 ctrl4_c.i2c_disable = (uint8_t)val;
2174 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
2175 }
2176 return ret;
2177 }
2178
2179 /**
2180 * @brief Disable / Enable I2C interface.[get]
2181 *
2182 * @param ctx Read / write interface definitions.(ptr)
2183 * @param val Get the values of i2c reg CTRL4_C
2184 * @retval Interface status (MANDATORY: return 0 -> no Error).
2185 *
2186 */
asm330lhh_i2c_interface_get(const stmdev_ctx_t * ctx,asm330lhh_i2c_disable_t * val)2187 int32_t asm330lhh_i2c_interface_get(const stmdev_ctx_t *ctx,
2188 asm330lhh_i2c_disable_t *val)
2189 {
2190 asm330lhh_ctrl4_c_t ctrl4_c;
2191 int32_t ret;
2192
2193 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
2194
2195 switch (ctrl4_c.i2c_disable)
2196 {
2197 case ASM330LHH_I2C_ENABLE:
2198 *val = ASM330LHH_I2C_ENABLE;
2199 break;
2200 case ASM330LHH_I2C_DISABLE:
2201 *val = ASM330LHH_I2C_DISABLE;
2202 break;
2203 default:
2204 *val = ASM330LHH_I2C_ENABLE;
2205 break;
2206 }
2207 return ret;
2208 }
2209
2210 /**
2211 * @}
2212 *
2213 */
2214
2215 /**
2216 * @defgroup ASM330LHH_interrupt_pins
2217 * @brief This section groups all the functions that manage
2218 * interrupt pins
2219 * @{
2220 *
2221 */
2222
2223 /**
2224 * @brief Select the signal that need to route on int1 pad.[set]
2225 *
2226 * @param ctx read / write interface definitions
2227 * @param val struct of registers: INT1_CTRL,
2228 * MD1_CFG, EMB_FUNC_INT1, FSM_INT1_A,
2229 * FSM_INT1_B
2230 *
2231 */
asm330lhh_pin_int1_route_set(const stmdev_ctx_t * ctx,asm330lhh_pin_int1_route_t * val)2232 int32_t asm330lhh_pin_int1_route_set(const stmdev_ctx_t *ctx,
2233 asm330lhh_pin_int1_route_t *val)
2234 {
2235 asm330lhh_int_cfg1_t int_cfg1;
2236 int32_t ret;
2237
2238 ret = asm330lhh_write_reg(ctx, ASM330LHH_MD1_CFG, (uint8_t *)&val->md1_cfg, 1);
2239
2240 if (ret == 0)
2241 {
2242 ret = asm330lhh_read_reg(ctx, ASM330LHH_INT_CFG1, (uint8_t *) &int_cfg1, 1);
2243 }
2244
2245 if (ret == 0)
2246 {
2247 if ((val->int1_ctrl.den_drdy_flag
2248 | val->int1_ctrl.int1_boot
2249 | val->int1_ctrl.int1_cnt_bdr
2250 | val->int1_ctrl.int1_drdy_g
2251 | val->int1_ctrl.int1_drdy_xl
2252 | val->int1_ctrl.int1_fifo_full
2253 | val->int1_ctrl.int1_fifo_ovr
2254 | val->int1_ctrl.int1_fifo_th
2255 | val->md1_cfg.int1_6d
2256 | val->md1_cfg.int1_ff
2257 | val->md1_cfg.int1_wu
2258 | val->md1_cfg.int1_sleep_change) != PROPERTY_DISABLE)
2259 {
2260 int_cfg1.interrupts_enable = PROPERTY_ENABLE;
2261 }
2262 else
2263 {
2264 int_cfg1.interrupts_enable = PROPERTY_DISABLE;
2265 }
2266 ret = asm330lhh_write_reg(ctx, ASM330LHH_INT_CFG1, (uint8_t *) &int_cfg1, 1);
2267 }
2268 return ret;
2269 }
2270
2271 /**
2272 * @brief Select the signal that need to route on int1 pad.[get]
2273 *
2274 * @param ctx read / write interface definitions
2275 * @param val struct of registers: INT1_CTRL, MD1_CFG,
2276 * EMB_FUNC_INT1, FSM_INT1_A, FSM_INT1_B
2277 *
2278 */
asm330lhh_pin_int1_route_get(const stmdev_ctx_t * ctx,asm330lhh_pin_int1_route_t * val)2279 int32_t asm330lhh_pin_int1_route_get(const stmdev_ctx_t *ctx,
2280 asm330lhh_pin_int1_route_t *val)
2281 {
2282 int32_t ret;
2283
2284 ret = asm330lhh_read_reg(ctx, ASM330LHH_INT1_CTRL,
2285 (uint8_t *)&val->int1_ctrl, 1);
2286 if (ret == 0)
2287 {
2288 ret = asm330lhh_read_reg(ctx, ASM330LHH_MD1_CFG, (uint8_t *)&val->md1_cfg, 1);
2289 }
2290
2291 return ret;
2292 }
2293
2294 /**
2295 * @brief Select the signal that need to route on int2 pad.[set]
2296 *
2297 * @param ctx read / write interface definitions
2298 * @param val union of registers INT2_CTRL, MD2_CFG,
2299 * EMB_FUNC_INT2, FSM_INT2_A, FSM_INT2_B
2300 *
2301 */
asm330lhh_pin_int2_route_set(const stmdev_ctx_t * ctx,asm330lhh_pin_int2_route_t * val)2302 int32_t asm330lhh_pin_int2_route_set(const stmdev_ctx_t *ctx,
2303 asm330lhh_pin_int2_route_t *val)
2304 {
2305 asm330lhh_pin_int1_route_t pin_int1_route;
2306 asm330lhh_int_cfg1_t int_cfg1;
2307 int32_t ret;
2308
2309 ret = asm330lhh_write_reg(ctx, ASM330LHH_INT2_CTRL,
2310 (uint8_t *)&val->int2_ctrl, 1);
2311 if (ret == 0)
2312 {
2313 ret = asm330lhh_write_reg(ctx, ASM330LHH_MD2_CFG, (uint8_t *)&val->md2_cfg, 1);
2314 }
2315 if (ret == 0)
2316 {
2317 ret = asm330lhh_read_reg(ctx, ASM330LHH_INT_CFG1, (uint8_t *) &int_cfg1, 1);
2318 }
2319
2320 if (ret == 0)
2321 {
2322 ret = asm330lhh_pin_int1_route_get(ctx, &pin_int1_route);
2323 }
2324
2325 if (ret == 0)
2326 {
2327 if ((val->int2_ctrl.int2_cnt_bdr
2328 | val->int2_ctrl.int2_drdy_g
2329 | val->int2_ctrl.int2_drdy_temp
2330 | val->int2_ctrl.int2_drdy_xl
2331 | val->int2_ctrl.int2_fifo_full
2332 | val->int2_ctrl.int2_fifo_ovr
2333 | val->int2_ctrl.int2_fifo_th
2334 | val->md2_cfg.int2_6d
2335 | val->md2_cfg.int2_ff
2336 | val->md2_cfg.int2_wu
2337 | val->md2_cfg.int2_sleep_change
2338 | pin_int1_route.int1_ctrl.den_drdy_flag
2339 | pin_int1_route.int1_ctrl.int1_boot
2340 | pin_int1_route.int1_ctrl.int1_cnt_bdr
2341 | pin_int1_route.int1_ctrl.int1_drdy_g
2342 | pin_int1_route.int1_ctrl.int1_drdy_xl
2343 | pin_int1_route.int1_ctrl.int1_fifo_full
2344 | pin_int1_route.int1_ctrl.int1_fifo_ovr
2345 | pin_int1_route.int1_ctrl.int1_fifo_th
2346 | pin_int1_route.md1_cfg.int1_6d
2347 | pin_int1_route.md1_cfg.int1_ff
2348 | pin_int1_route.md1_cfg.int1_wu
2349 | pin_int1_route.md1_cfg.int1_sleep_change) != PROPERTY_DISABLE)
2350 {
2351 int_cfg1.interrupts_enable = PROPERTY_ENABLE;
2352 }
2353 else
2354 {
2355 int_cfg1.interrupts_enable = PROPERTY_DISABLE;
2356 }
2357 ret = asm330lhh_write_reg(ctx, ASM330LHH_INT_CFG1, (uint8_t *) &int_cfg1, 1);
2358 }
2359 return ret;
2360 }
2361
2362 /**
2363 * @brief Select the signal that need to route on int2 pad.[get]
2364 *
2365 * @param ctx read / write interface definitions
2366 * @param val union of registers INT2_CTRL, MD2_CFG,
2367 * EMB_FUNC_INT2, FSM_INT2_A, FSM_INT2_B
2368 *
2369 */
asm330lhh_pin_int2_route_get(const stmdev_ctx_t * ctx,asm330lhh_pin_int2_route_t * val)2370 int32_t asm330lhh_pin_int2_route_get(const stmdev_ctx_t *ctx,
2371 asm330lhh_pin_int2_route_t *val)
2372 {
2373 int32_t ret;
2374
2375 ret = asm330lhh_read_reg(ctx, ASM330LHH_INT2_CTRL,
2376 (uint8_t *)&val->int2_ctrl, 1);
2377 if (ret == 0)
2378 {
2379 ret = asm330lhh_read_reg(ctx, ASM330LHH_MD2_CFG, (uint8_t *)&val->md2_cfg, 1);
2380 }
2381 return ret;
2382 }
2383
2384 /**
2385 * @brief Push-pull/open drain selection on interrupt pads.[set]
2386 *
2387 * @param ctx Read / write interface definitions.(ptr)
2388 * @param val Change the values of pp_od in reg CTRL3_C
2389 * @retval Interface status (MANDATORY: return 0 -> no Error).
2390 *
2391 */
asm330lhh_pin_mode_set(const stmdev_ctx_t * ctx,asm330lhh_pp_od_t val)2392 int32_t asm330lhh_pin_mode_set(const stmdev_ctx_t *ctx, asm330lhh_pp_od_t val)
2393 {
2394 asm330lhh_ctrl3_c_t ctrl3_c;
2395 int32_t ret;
2396
2397 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
2398 if (ret == 0)
2399 {
2400 ctrl3_c.pp_od = (uint8_t)val;
2401 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
2402 }
2403 return ret;
2404 }
2405
2406 /**
2407 * @brief Push-pull/open drain selection on interrupt pads.[get]
2408 *
2409 * @param ctx Read / write interface definitions.(ptr)
2410 * @param val Get the values of pp_od in reg CTRL3_C
2411 * @retval Interface status (MANDATORY: return 0 -> no Error).
2412 *
2413 */
asm330lhh_pin_mode_get(const stmdev_ctx_t * ctx,asm330lhh_pp_od_t * val)2414 int32_t asm330lhh_pin_mode_get(const stmdev_ctx_t *ctx, asm330lhh_pp_od_t *val)
2415 {
2416 asm330lhh_ctrl3_c_t ctrl3_c;
2417 int32_t ret;
2418
2419 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
2420
2421 switch (ctrl3_c.pp_od)
2422 {
2423 case ASM330LHH_PUSH_PULL:
2424 *val = ASM330LHH_PUSH_PULL;
2425 break;
2426 case ASM330LHH_OPEN_DRAIN:
2427 *val = ASM330LHH_OPEN_DRAIN;
2428 break;
2429 default:
2430 *val = ASM330LHH_PUSH_PULL;
2431 break;
2432 }
2433 return ret;
2434 }
2435
2436 /**
2437 * @brief Interrupt active-high/low.[set]
2438 *
2439 * @param ctx Read / write interface definitions.(ptr)
2440 * @param val Change the values of h_lactive in reg CTRL3_C
2441 * @retval Interface status (MANDATORY: return 0 -> no Error).
2442 *
2443 */
asm330lhh_pin_polarity_set(const stmdev_ctx_t * ctx,asm330lhh_h_lactive_t val)2444 int32_t asm330lhh_pin_polarity_set(const stmdev_ctx_t *ctx,
2445 asm330lhh_h_lactive_t val)
2446 {
2447 asm330lhh_ctrl3_c_t ctrl3_c;
2448 int32_t ret;
2449
2450 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
2451 if (ret == 0)
2452 {
2453 ctrl3_c.h_lactive = (uint8_t)val;
2454 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
2455 }
2456 return ret;
2457 }
2458
2459 /**
2460 * @brief Interrupt active-high/low.[get]
2461 *
2462 * @param ctx Read / write interface definitions.(ptr)
2463 * @param val Get the values of h_lactive in reg CTRL3_C
2464 * @retval Interface status (MANDATORY: return 0 -> no Error).
2465 *
2466 */
asm330lhh_pin_polarity_get(const stmdev_ctx_t * ctx,asm330lhh_h_lactive_t * val)2467 int32_t asm330lhh_pin_polarity_get(const stmdev_ctx_t *ctx,
2468 asm330lhh_h_lactive_t *val)
2469 {
2470 asm330lhh_ctrl3_c_t ctrl3_c;
2471 int32_t ret;
2472
2473 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
2474
2475 switch (ctrl3_c.h_lactive)
2476 {
2477 case ASM330LHH_ACTIVE_HIGH:
2478 *val = ASM330LHH_ACTIVE_HIGH;
2479 break;
2480 case ASM330LHH_ACTIVE_LOW:
2481 *val = ASM330LHH_ACTIVE_LOW;
2482 break;
2483 default:
2484 *val = ASM330LHH_ACTIVE_HIGH;
2485 break;
2486 }
2487 return ret;
2488 }
2489
2490 /**
2491 * @brief All interrupt signals become available on INT1 pin.[set]
2492 *
2493 * @param ctx Read / write interface definitions.(ptr)
2494 * @param val Change the values of int2_on_int1 in reg CTRL4_C
2495 * @retval Interface status (MANDATORY: return 0 -> no Error).
2496 *
2497 */
asm330lhh_all_on_int1_set(const stmdev_ctx_t * ctx,uint8_t val)2498 int32_t asm330lhh_all_on_int1_set(const stmdev_ctx_t *ctx, uint8_t val)
2499 {
2500 asm330lhh_ctrl4_c_t ctrl4_c;
2501 int32_t ret;
2502
2503 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
2504 if (ret == 0)
2505 {
2506 ctrl4_c.int2_on_int1 = (uint8_t)val;
2507 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
2508 }
2509 return ret;
2510 }
2511
2512 /**
2513 * @brief All interrupt signals become available on INT1 pin.[get]
2514 *
2515 * @param ctx Read / write interface definitions.(ptr)
2516 * @param val Change the values of int2_on_int1 in reg CTRL4_C
2517 * @retval Interface status (MANDATORY: return 0 -> no Error).
2518 *
2519 */
asm330lhh_all_on_int1_get(const stmdev_ctx_t * ctx,uint8_t * val)2520 int32_t asm330lhh_all_on_int1_get(const stmdev_ctx_t *ctx, uint8_t *val)
2521 {
2522 asm330lhh_ctrl4_c_t ctrl4_c;
2523 int32_t ret;
2524
2525 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
2526 *val = ctrl4_c.int2_on_int1;
2527
2528 return ret;
2529 }
2530
2531 /**
2532 * @brief All interrupt signals notification mode.[set]
2533 *
2534 * @param ctx Read / write interface definitions.(ptr)
2535 * @param val Change the values of lir in reg INT_CFG0
2536 * @retval Interface status (MANDATORY: return 0 -> no Error).
2537 *
2538 */
asm330lhh_int_notification_set(const stmdev_ctx_t * ctx,asm330lhh_lir_t val)2539 int32_t asm330lhh_int_notification_set(const stmdev_ctx_t *ctx,
2540 asm330lhh_lir_t val)
2541 {
2542 asm330lhh_int_cfg0_t int_cfg0;
2543 int32_t ret;
2544
2545 ret = asm330lhh_read_reg(ctx, ASM330LHH_INT_CFG0, (uint8_t *)&int_cfg0, 1);
2546 if (ret == 0)
2547 {
2548 int_cfg0.lir = (uint8_t)val & 0x01U;
2549 int_cfg0.int_clr_on_read = (uint8_t)val & 0x01U;
2550 ret = asm330lhh_write_reg(ctx, ASM330LHH_INT_CFG0,
2551 (uint8_t *)&int_cfg0, 1);
2552 }
2553 return ret;
2554 }
2555
2556 /**
2557 * @brief All interrupt signals notification mode.[get]
2558 *
2559 * @param ctx Read / write interface definitions.(ptr)
2560 * @param val Get the values of lir in reg INT_CFG0
2561 * @retval Interface status (MANDATORY: return 0 -> no Error).
2562 *
2563 */
asm330lhh_int_notification_get(const stmdev_ctx_t * ctx,asm330lhh_lir_t * val)2564 int32_t asm330lhh_int_notification_get(const stmdev_ctx_t *ctx,
2565 asm330lhh_lir_t *val)
2566 {
2567 asm330lhh_int_cfg0_t int_cfg0;
2568 int32_t ret;
2569
2570 *val = ASM330LHH_ALL_INT_PULSED;
2571 ret = asm330lhh_read_reg(ctx, ASM330LHH_INT_CFG0, (uint8_t *)&int_cfg0, 1);
2572
2573 switch ((int_cfg0.lir << 1) + int_cfg0.int_clr_on_read)
2574 {
2575 case ASM330LHH_ALL_INT_PULSED:
2576 *val = ASM330LHH_ALL_INT_PULSED;
2577 break;
2578 case ASM330LHH_BASE_LATCHED_EMB_PULSED:
2579 *val = ASM330LHH_BASE_LATCHED_EMB_PULSED;
2580 break;
2581 case ASM330LHH_BASE_PULSED_EMB_LATCHED:
2582 *val = ASM330LHH_BASE_PULSED_EMB_LATCHED;
2583 break;
2584 case ASM330LHH_ALL_INT_LATCHED:
2585 *val = ASM330LHH_ALL_INT_LATCHED;
2586 break;
2587 default:
2588 *val = ASM330LHH_ALL_INT_PULSED;
2589 break;
2590 }
2591 return ret;
2592 }
2593
2594 /**
2595 * @}
2596 *
2597 */
2598
2599 /**
2600 * @defgroup ASM330LHH_Wake_Up_event
2601 * @brief This section groups all the functions that manage the
2602 * Wake Up event generation.
2603 * @{
2604 *
2605 */
2606
2607 /**
2608 * @brief Weight of 1 LSB of wakeup threshold.[set]
2609 * 0: 1 LSB =FS_XL / 64
2610 * 1: 1 LSB = FS_XL / 256
2611 *
2612 * @param ctx Read / write interface definitions.(ptr)
2613 * @param val Change the values of wake_ths_w in reg WAKE_UP_DUR
2614 * @retval Interface status (MANDATORY: return 0 -> no Error).
2615 *
2616 */
asm330lhh_wkup_ths_weight_set(const stmdev_ctx_t * ctx,asm330lhh_wake_ths_w_t val)2617 int32_t asm330lhh_wkup_ths_weight_set(const stmdev_ctx_t *ctx,
2618 asm330lhh_wake_ths_w_t val)
2619 {
2620 asm330lhh_wake_up_dur_t wake_up_dur;
2621 int32_t ret;
2622
2623 ret = asm330lhh_read_reg(ctx, ASM330LHH_WAKE_UP_DUR,
2624 (uint8_t *)&wake_up_dur, 1);
2625 if (ret == 0)
2626 {
2627 wake_up_dur.wake_ths_w = (uint8_t)val;
2628 ret = asm330lhh_write_reg(ctx, ASM330LHH_WAKE_UP_DUR,
2629 (uint8_t *)&wake_up_dur, 1);
2630 }
2631 return ret;
2632 }
2633
2634 /**
2635 * @brief Weight of 1 LSB of wakeup threshold.[get]
2636 * 0: 1 LSB =FS_XL / 64
2637 * 1: 1 LSB = FS_XL / 256
2638 *
2639 * @param ctx Read / write interface definitions.(ptr)
2640 * @param val Get the values of wake_ths_w in reg WAKE_UP_DUR
2641 * @retval Interface status (MANDATORY: return 0 -> no Error).
2642 *
2643 */
asm330lhh_wkup_ths_weight_get(const stmdev_ctx_t * ctx,asm330lhh_wake_ths_w_t * val)2644 int32_t asm330lhh_wkup_ths_weight_get(const stmdev_ctx_t *ctx,
2645 asm330lhh_wake_ths_w_t *val)
2646 {
2647 asm330lhh_wake_up_dur_t wake_up_dur;
2648 int32_t ret;
2649
2650 ret = asm330lhh_read_reg(ctx, ASM330LHH_WAKE_UP_DUR,
2651 (uint8_t *)&wake_up_dur, 1);
2652
2653 switch (wake_up_dur.wake_ths_w)
2654 {
2655 case ASM330LHH_LSb_FS_DIV_64:
2656 *val = ASM330LHH_LSb_FS_DIV_64;
2657 break;
2658 case ASM330LHH_LSb_FS_DIV_256:
2659 *val = ASM330LHH_LSb_FS_DIV_256;
2660 break;
2661 default:
2662 *val = ASM330LHH_LSb_FS_DIV_64;
2663 break;
2664 }
2665 return ret;
2666 }
2667
2668 /**
2669 * @brief Threshold for wakeup: 1 LSB weight depends on WAKE_THS_W in
2670 * WAKE_UP_DUR.[set]
2671 *
2672 * @param ctx Read / write interface definitions.(ptr)
2673 * @param val Change the values of wk_ths in reg WAKE_UP_THS
2674 * @retval Interface status (MANDATORY: return 0 -> no Error).
2675 *
2676 */
asm330lhh_wkup_threshold_set(const stmdev_ctx_t * ctx,uint8_t val)2677 int32_t asm330lhh_wkup_threshold_set(const stmdev_ctx_t *ctx, uint8_t val)
2678 {
2679 asm330lhh_wake_up_ths_t wake_up_ths;
2680 int32_t ret;
2681
2682 ret = asm330lhh_read_reg(ctx, ASM330LHH_WAKE_UP_THS,
2683 (uint8_t *)&wake_up_ths, 1);
2684 if (ret == 0)
2685 {
2686 wake_up_ths.wk_ths = (uint8_t)val;
2687 ret = asm330lhh_write_reg(ctx, ASM330LHH_WAKE_UP_THS,
2688 (uint8_t *)&wake_up_ths, 1);
2689 }
2690 return ret;
2691 }
2692
2693 /**
2694 * @brief Threshold for wakeup: 1 LSB weight depends on WAKE_THS_W in
2695 * WAKE_UP_DUR.[get]
2696 *
2697 * @param ctx Read / write interface definitions.(ptr)
2698 * @param val Change the values of wk_ths in reg WAKE_UP_THS
2699 * @retval Interface status (MANDATORY: return 0 -> no Error).
2700 *
2701 */
asm330lhh_wkup_threshold_get(const stmdev_ctx_t * ctx,uint8_t * val)2702 int32_t asm330lhh_wkup_threshold_get(const stmdev_ctx_t *ctx, uint8_t *val)
2703 {
2704 asm330lhh_wake_up_ths_t wake_up_ths;
2705 int32_t ret;
2706
2707 ret = asm330lhh_read_reg(ctx, ASM330LHH_WAKE_UP_THS,
2708 (uint8_t *)&wake_up_ths, 1);
2709 *val = wake_up_ths.wk_ths;
2710
2711 return ret;
2712 }
2713
2714 /**
2715 * @brief Wake up duration event( 1LSb = 1 / ODR ).[set]
2716 *
2717 * @param ctx Read / write interface definitions.(ptr)
2718 * @param val Change the values of usr_off_on_wu in reg WAKE_UP_THS
2719 * @retval Interface status (MANDATORY: return 0 -> no Error).
2720 *
2721 */
asm330lhh_xl_usr_offset_on_wkup_set(const stmdev_ctx_t * ctx,uint8_t val)2722 int32_t asm330lhh_xl_usr_offset_on_wkup_set(const stmdev_ctx_t *ctx, uint8_t val)
2723 {
2724 asm330lhh_wake_up_ths_t wake_up_ths;
2725 int32_t ret;
2726
2727 ret = asm330lhh_read_reg(ctx, ASM330LHH_WAKE_UP_THS,
2728 (uint8_t *)&wake_up_ths, 1);
2729 if (ret == 0)
2730 {
2731 wake_up_ths.usr_off_on_wu = (uint8_t)val;
2732 ret = asm330lhh_write_reg(ctx, ASM330LHH_WAKE_UP_THS,
2733 (uint8_t *)&wake_up_ths, 1);
2734 }
2735 return ret;
2736 }
2737
2738 /**
2739 * @brief Wake up duration event( 1LSb = 1 / ODR ).[get]
2740 *
2741 * @param ctx Read / write interface definitions.(ptr)
2742 * @param val Change the values of usr_off_on_wu in reg WAKE_UP_THS
2743 * @retval Interface status (MANDATORY: return 0 -> no Error).
2744 *
2745 */
asm330lhh_xl_usr_offset_on_wkup_get(const stmdev_ctx_t * ctx,uint8_t * val)2746 int32_t asm330lhh_xl_usr_offset_on_wkup_get(const stmdev_ctx_t *ctx,
2747 uint8_t *val)
2748 {
2749 asm330lhh_wake_up_ths_t wake_up_ths;
2750 int32_t ret;
2751
2752 ret = asm330lhh_read_reg(ctx, ASM330LHH_WAKE_UP_THS,
2753 (uint8_t *)&wake_up_ths, 1);
2754 *val = wake_up_ths.usr_off_on_wu;
2755
2756 return ret;
2757 }
2758
2759 /**
2760 * @brief Wake up duration event(1LSb = 1 / ODR).[set]
2761 *
2762 * @param ctx Read / write interface definitions.(ptr)
2763 * @param val Change the values of wake_dur in reg WAKE_UP_DUR
2764 * @retval Interface status (MANDATORY: return 0 -> no Error).
2765 *
2766 */
asm330lhh_wkup_dur_set(const stmdev_ctx_t * ctx,uint8_t val)2767 int32_t asm330lhh_wkup_dur_set(const stmdev_ctx_t *ctx, uint8_t val)
2768 {
2769 asm330lhh_wake_up_dur_t wake_up_dur;
2770 int32_t ret;
2771
2772 ret = asm330lhh_read_reg(ctx, ASM330LHH_WAKE_UP_DUR,
2773 (uint8_t *)&wake_up_dur, 1);
2774 if (ret == 0)
2775 {
2776 wake_up_dur.wake_dur = (uint8_t)val;
2777 ret = asm330lhh_write_reg(ctx, ASM330LHH_WAKE_UP_DUR,
2778 (uint8_t *)&wake_up_dur, 1);
2779 }
2780 return ret;
2781 }
2782
2783 /**
2784 * @brief Wake up duration event(1LSb = 1 / ODR).[get]
2785 *
2786 * @param ctx Read / write interface definitions.(ptr)
2787 * @param val Change the values of wake_dur in reg WAKE_UP_DUR
2788 * @retval Interface status (MANDATORY: return 0 -> no Error).
2789 *
2790 */
asm330lhh_wkup_dur_get(const stmdev_ctx_t * ctx,uint8_t * val)2791 int32_t asm330lhh_wkup_dur_get(const stmdev_ctx_t *ctx, uint8_t *val)
2792 {
2793 asm330lhh_wake_up_dur_t wake_up_dur;
2794 int32_t ret;
2795
2796 ret = asm330lhh_read_reg(ctx, ASM330LHH_WAKE_UP_DUR,
2797 (uint8_t *)&wake_up_dur, 1);
2798 *val = wake_up_dur.wake_dur;
2799
2800 return ret;
2801 }
2802
2803 /**
2804 * @}
2805 *
2806 */
2807
2808 /**
2809 * @defgroup ASM330LHH_ Activity/Inactivity_detection
2810 * @brief This section groups all the functions concerning
2811 * activity/inactivity detection.
2812 * @{
2813 *
2814 */
2815
2816 /**
2817 * @brief Enables gyroscope Sleep mode.[set]
2818 *
2819 * @param ctx Read / write interface definitions.(ptr)
2820 * @param val Change the values of sleep_g in reg CTRL4_C
2821 * @retval Interface status (MANDATORY: return 0 -> no Error).
2822 *
2823 */
asm330lhh_gy_sleep_mode_set(const stmdev_ctx_t * ctx,uint8_t val)2824 int32_t asm330lhh_gy_sleep_mode_set(const stmdev_ctx_t *ctx, uint8_t val)
2825 {
2826 asm330lhh_ctrl4_c_t ctrl4_c;
2827 int32_t ret;
2828
2829 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
2830 if (ret == 0)
2831 {
2832 ctrl4_c.sleep_g = (uint8_t)val;
2833 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
2834 }
2835 return ret;
2836 }
2837
2838 /**
2839 * @brief Enables gyroscope Sleep mode.[get]
2840 *
2841 * @param ctx Read / write interface definitions.(ptr)
2842 * @param val Change the values of sleep_g in reg CTRL4_C
2843 * @retval Interface status (MANDATORY: return 0 -> no Error).
2844 *
2845 */
asm330lhh_gy_sleep_mode_get(const stmdev_ctx_t * ctx,uint8_t * val)2846 int32_t asm330lhh_gy_sleep_mode_get(const stmdev_ctx_t *ctx, uint8_t *val)
2847 {
2848 asm330lhh_ctrl4_c_t ctrl4_c;
2849 int32_t ret;
2850
2851 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
2852 *val = ctrl4_c.sleep_g;
2853
2854 return ret;
2855 }
2856
2857 /**
2858 * @brief Drives the sleep status instead of sleep change on INT pins
2859 * (only if INT1_SLEEP_CHANGE or INT2_SLEEP_CHANGE bits
2860 * are enabled).[set]
2861 *
2862 * @param ctx Read / write interface definitions.(ptr)
2863 * @param val Change the values of sleep_status_on_int in reg INT_CFG0
2864 * @retval Interface status (MANDATORY: return 0 -> no Error).
2865 *
2866 */
asm330lhh_act_pin_notification_set(const stmdev_ctx_t * ctx,asm330lhh_sleep_status_on_int_t val)2867 int32_t asm330lhh_act_pin_notification_set(const stmdev_ctx_t *ctx,
2868 asm330lhh_sleep_status_on_int_t val)
2869 {
2870 asm330lhh_int_cfg0_t int_cfg0;
2871 int32_t ret;
2872
2873 ret = asm330lhh_read_reg(ctx, ASM330LHH_INT_CFG0, (uint8_t *)&int_cfg0, 1);
2874 if (ret == 0)
2875 {
2876 int_cfg0. sleep_status_on_int = (uint8_t)val;
2877 ret = asm330lhh_write_reg(ctx, ASM330LHH_INT_CFG0,
2878 (uint8_t *)&int_cfg0, 1);
2879 }
2880 return ret;
2881 }
2882
2883 /**
2884 * @brief Drives the sleep status instead of sleep change on INT pins
2885 * (only if INT1_SLEEP_CHANGE or INT2_SLEEP_CHANGE bits
2886 * are enabled).[get]
2887 *
2888 * @param ctx Read / write interface definitions.(ptr)
2889 * @param val Get the values of sleep_status_on_int in reg INT_CFG0
2890 * @retval Interface status (MANDATORY: return 0 -> no Error).
2891 *
2892 */
asm330lhh_act_pin_notification_get(const stmdev_ctx_t * ctx,asm330lhh_sleep_status_on_int_t * val)2893 int32_t asm330lhh_act_pin_notification_get(const stmdev_ctx_t *ctx,
2894 asm330lhh_sleep_status_on_int_t *val)
2895 {
2896 asm330lhh_int_cfg0_t int_cfg0;
2897 int32_t ret;
2898
2899 ret = asm330lhh_read_reg(ctx, ASM330LHH_INT_CFG0, (uint8_t *)&int_cfg0, 1);
2900 switch (int_cfg0. sleep_status_on_int)
2901 {
2902 case ASM330LHH_DRIVE_SLEEP_CHG_EVENT:
2903 *val = ASM330LHH_DRIVE_SLEEP_CHG_EVENT;
2904 break;
2905 case ASM330LHH_DRIVE_SLEEP_STATUS:
2906 *val = ASM330LHH_DRIVE_SLEEP_STATUS;
2907 break;
2908 default:
2909 *val = ASM330LHH_DRIVE_SLEEP_CHG_EVENT;
2910 break;
2911 }
2912 return ret;
2913 }
2914
2915 /**
2916 * @brief Enable inactivity function.[set]
2917 *
2918 * @param ctx Read / write interface definitions.(ptr)
2919 * @param val Change the values of inact_en in reg INT_CFG1
2920 * @retval Interface status (MANDATORY: return 0 -> no Error).
2921 *
2922 */
asm330lhh_act_mode_set(const stmdev_ctx_t * ctx,asm330lhh_inact_en_t val)2923 int32_t asm330lhh_act_mode_set(const stmdev_ctx_t *ctx, asm330lhh_inact_en_t val)
2924 {
2925 asm330lhh_int_cfg1_t int_cfg1;
2926 int32_t ret;
2927
2928 ret = asm330lhh_read_reg(ctx, ASM330LHH_INT_CFG1, (uint8_t *)&int_cfg1, 1);
2929 if (ret == 0)
2930 {
2931 int_cfg1.inact_en = (uint8_t)val;
2932 ret = asm330lhh_write_reg(ctx, ASM330LHH_INT_CFG1, (uint8_t *)&int_cfg1, 1);
2933 }
2934 return ret;
2935 }
2936
2937 /**
2938 * @brief Enable inactivity function.[get]
2939 *
2940 * @param ctx Read / write interface definitions.(ptr)
2941 * @param val Get the values of inact_en in reg INT_CFG1
2942 * @retval Interface status (MANDATORY: return 0 -> no Error).
2943 *
2944 */
asm330lhh_act_mode_get(const stmdev_ctx_t * ctx,asm330lhh_inact_en_t * val)2945 int32_t asm330lhh_act_mode_get(const stmdev_ctx_t *ctx,
2946 asm330lhh_inact_en_t *val)
2947 {
2948 asm330lhh_int_cfg1_t int_cfg1;
2949 int32_t ret;
2950
2951 ret = asm330lhh_read_reg(ctx, ASM330LHH_INT_CFG1, (uint8_t *)&int_cfg1, 1);
2952
2953 switch (int_cfg1.inact_en)
2954 {
2955 case ASM330LHH_XL_AND_GY_NOT_AFFECTED:
2956 *val = ASM330LHH_XL_AND_GY_NOT_AFFECTED;
2957 break;
2958 case ASM330LHH_XL_12Hz5_GY_NOT_AFFECTED:
2959 *val = ASM330LHH_XL_12Hz5_GY_NOT_AFFECTED;
2960 break;
2961 case ASM330LHH_XL_12Hz5_GY_SLEEP:
2962 *val = ASM330LHH_XL_12Hz5_GY_SLEEP;
2963 break;
2964 case ASM330LHH_XL_12Hz5_GY_PD:
2965 *val = ASM330LHH_XL_12Hz5_GY_PD;
2966 break;
2967 default:
2968 *val = ASM330LHH_XL_AND_GY_NOT_AFFECTED;
2969 break;
2970 }
2971 return ret;
2972 }
2973
2974 /**
2975 * @brief Duration to go in sleep mode (1 LSb = 512 / ODR).[set]
2976 *
2977 * @param ctx Read / write interface definitions.(ptr)
2978 * @param val Change the values of sleep_dur in reg WAKE_UP_DUR
2979 * @retval Interface status (MANDATORY: return 0 -> no Error).
2980 *
2981 */
asm330lhh_act_sleep_dur_set(const stmdev_ctx_t * ctx,uint8_t val)2982 int32_t asm330lhh_act_sleep_dur_set(const stmdev_ctx_t *ctx, uint8_t val)
2983 {
2984 asm330lhh_wake_up_dur_t wake_up_dur;
2985 int32_t ret;
2986
2987 ret = asm330lhh_read_reg(ctx, ASM330LHH_WAKE_UP_DUR,
2988 (uint8_t *)&wake_up_dur, 1);
2989 if (ret == 0)
2990 {
2991 wake_up_dur.sleep_dur = (uint8_t)val;
2992 ret = asm330lhh_write_reg(ctx, ASM330LHH_WAKE_UP_DUR,
2993 (uint8_t *)&wake_up_dur, 1);
2994 }
2995 return ret;
2996 }
2997
2998 /**
2999 * @brief Duration to go in sleep mode.(1 LSb = 512 / ODR).[get]
3000 *
3001 * @param ctx Read / write interface definitions.(ptr)
3002 * @param val Change the values of sleep_dur in reg WAKE_UP_DUR
3003 * @retval Interface status (MANDATORY: return 0 -> no Error).
3004 *
3005 */
asm330lhh_act_sleep_dur_get(const stmdev_ctx_t * ctx,uint8_t * val)3006 int32_t asm330lhh_act_sleep_dur_get(const stmdev_ctx_t *ctx, uint8_t *val)
3007 {
3008 asm330lhh_wake_up_dur_t wake_up_dur;
3009 int32_t ret;
3010
3011 ret = asm330lhh_read_reg(ctx, ASM330LHH_WAKE_UP_DUR,
3012 (uint8_t *)&wake_up_dur, 1);
3013 *val = wake_up_dur.sleep_dur;
3014
3015 return ret;
3016 }
3017
3018 /**
3019 * @}
3020 *
3021 */
3022
3023 /**
3024 * @defgroup ASM330LHH_ Six_position_detection(6D/4D)
3025 * @brief This section groups all the functions concerning six
3026 * position detection (6D).
3027 * @{
3028 *
3029 */
3030
3031 /**
3032 * @brief Threshold for 4D/6D function.[set]
3033 *
3034 * @param ctx Read / write interface definitions.(ptr)
3035 * @param val Change the values of sixd_ths in reg TAP_THS_6D
3036 * @retval Interface status (MANDATORY: return 0 -> no Error).
3037 *
3038 */
asm330lhh_6d_threshold_set(const stmdev_ctx_t * ctx,asm330lhh_sixd_ths_t val)3039 int32_t asm330lhh_6d_threshold_set(const stmdev_ctx_t *ctx,
3040 asm330lhh_sixd_ths_t val)
3041 {
3042 asm330lhh_ths_6d_t ths_6d;
3043 int32_t ret;
3044
3045 ret = asm330lhh_read_reg(ctx, ASM330LHH_THS_6D,
3046 (uint8_t *)&ths_6d, 1);
3047 if (ret == 0)
3048 {
3049 ths_6d.sixd_ths = (uint8_t)val;
3050 ret = asm330lhh_write_reg(ctx, ASM330LHH_THS_6D,
3051 (uint8_t *)&ths_6d, 1);
3052 }
3053 return ret;
3054 }
3055
3056 /**
3057 * @brief Threshold for 4D/6D function.[get]
3058 *
3059 * @param ctx Read / write interface definitions.(ptr)
3060 * @param val Get the values of sixd_ths in reg TAP_THS_6D
3061 * @retval Interface status (MANDATORY: return 0 -> no Error).
3062 *
3063 */
asm330lhh_6d_threshold_get(const stmdev_ctx_t * ctx,asm330lhh_sixd_ths_t * val)3064 int32_t asm330lhh_6d_threshold_get(const stmdev_ctx_t *ctx,
3065 asm330lhh_sixd_ths_t *val)
3066 {
3067 asm330lhh_ths_6d_t ths_6d;
3068 int32_t ret;
3069
3070 ret = asm330lhh_read_reg(ctx, ASM330LHH_THS_6D,
3071 (uint8_t *)&ths_6d, 1);
3072
3073 switch (ths_6d.sixd_ths)
3074 {
3075 case ASM330LHH_DEG_80:
3076 *val = ASM330LHH_DEG_80;
3077 break;
3078 case ASM330LHH_DEG_70:
3079 *val = ASM330LHH_DEG_70;
3080 break;
3081 case ASM330LHH_DEG_60:
3082 *val = ASM330LHH_DEG_60;
3083 break;
3084 case ASM330LHH_DEG_50:
3085 *val = ASM330LHH_DEG_50;
3086 break;
3087 default:
3088 *val = ASM330LHH_DEG_80;
3089 break;
3090 }
3091 return ret;
3092 }
3093
3094 /**
3095 * @brief 4D orientation detection enable.[set]
3096 *
3097 * @param ctx Read / write interface definitions.(ptr)
3098 * @param val Change the values of d4d_en in reg TAP_THS_6D
3099 * @retval Interface status (MANDATORY: return 0 -> no Error).
3100 *
3101 */
asm330lhh_4d_mode_set(const stmdev_ctx_t * ctx,uint8_t val)3102 int32_t asm330lhh_4d_mode_set(const stmdev_ctx_t *ctx, uint8_t val)
3103 {
3104 asm330lhh_ths_6d_t ths_6d;
3105 int32_t ret;
3106
3107 ret = asm330lhh_read_reg(ctx, ASM330LHH_THS_6D,
3108 (uint8_t *)&ths_6d, 1);
3109 if (ret == 0)
3110 {
3111 ths_6d.d4d_en = (uint8_t)val;
3112 ret = asm330lhh_write_reg(ctx, ASM330LHH_THS_6D,
3113 (uint8_t *)&ths_6d, 1);
3114 }
3115 return ret;
3116 }
3117
3118 /**
3119 * @brief 4D orientation detection enable.[get]
3120 *
3121 * @param ctx Read / write interface definitions.(ptr)
3122 * @param val Change the values of d4d_en in reg TAP_THS_6D
3123 * @retval Interface status (MANDATORY: return 0 -> no Error).
3124 *
3125 */
asm330lhh_4d_mode_get(const stmdev_ctx_t * ctx,uint8_t * val)3126 int32_t asm330lhh_4d_mode_get(const stmdev_ctx_t *ctx, uint8_t *val)
3127 {
3128 asm330lhh_ths_6d_t ths_6d;
3129 int32_t ret;
3130
3131 ret = asm330lhh_read_reg(ctx, ASM330LHH_THS_6D,
3132 (uint8_t *)&ths_6d, 1);
3133 *val = ths_6d.d4d_en;
3134
3135 return ret;
3136 }
3137
3138 /**
3139 * @}
3140 *
3141 */
3142
3143 /**
3144 * @defgroup ASM330LHH_free_fall
3145 * @brief This section group all the functions concerning the free
3146 * fall detection.
3147 * @{
3148 *
3149 */
3150
3151 /**
3152 * @brief Free fall threshold setting.[set]
3153 *
3154 * @param ctx Read / write interface definitions.(ptr)
3155 * @param val Change the values of ff_ths in reg FREE_FALL
3156 * @retval Interface status (MANDATORY: return 0 -> no Error).
3157 *
3158 */
asm330lhh_ff_threshold_set(const stmdev_ctx_t * ctx,asm330lhh_ff_ths_t val)3159 int32_t asm330lhh_ff_threshold_set(const stmdev_ctx_t *ctx,
3160 asm330lhh_ff_ths_t val)
3161 {
3162 asm330lhh_free_fall_t free_fall;
3163 int32_t ret;
3164
3165 ret = asm330lhh_read_reg(ctx, ASM330LHH_FREE_FALL, (uint8_t *)&free_fall, 1);
3166 if (ret == 0)
3167 {
3168 free_fall.ff_ths = (uint8_t)val;
3169 ret = asm330lhh_write_reg(ctx, ASM330LHH_FREE_FALL,
3170 (uint8_t *)&free_fall, 1);
3171 }
3172 return ret;
3173 }
3174
3175 /**
3176 * @brief Free fall threshold setting.[get]
3177 *
3178 * @param ctx Read / write interface definitions.(ptr)
3179 * @param val Get the values of ff_ths in reg FREE_FALL
3180 * @retval Interface status (MANDATORY: return 0 -> no Error).
3181 *
3182 */
asm330lhh_ff_threshold_get(const stmdev_ctx_t * ctx,asm330lhh_ff_ths_t * val)3183 int32_t asm330lhh_ff_threshold_get(const stmdev_ctx_t *ctx,
3184 asm330lhh_ff_ths_t *val)
3185 {
3186 asm330lhh_free_fall_t free_fall;
3187 int32_t ret;
3188
3189 ret = asm330lhh_read_reg(ctx, ASM330LHH_FREE_FALL, (uint8_t *)&free_fall, 1);
3190
3191 switch (free_fall.ff_ths)
3192 {
3193 case ASM330LHH_FF_TSH_156mg:
3194 *val = ASM330LHH_FF_TSH_156mg;
3195 break;
3196 case ASM330LHH_FF_TSH_219mg:
3197 *val = ASM330LHH_FF_TSH_219mg;
3198 break;
3199 case ASM330LHH_FF_TSH_250mg:
3200 *val = ASM330LHH_FF_TSH_250mg;
3201 break;
3202 case ASM330LHH_FF_TSH_312mg:
3203 *val = ASM330LHH_FF_TSH_312mg;
3204 break;
3205 case ASM330LHH_FF_TSH_344mg:
3206 *val = ASM330LHH_FF_TSH_344mg;
3207 break;
3208 case ASM330LHH_FF_TSH_406mg:
3209 *val = ASM330LHH_FF_TSH_406mg;
3210 break;
3211 case ASM330LHH_FF_TSH_469mg:
3212 *val = ASM330LHH_FF_TSH_469mg;
3213 break;
3214 case ASM330LHH_FF_TSH_500mg:
3215 *val = ASM330LHH_FF_TSH_500mg;
3216 break;
3217 default:
3218 *val = ASM330LHH_FF_TSH_156mg;
3219 break;
3220 }
3221 return ret;
3222 }
3223
3224 /**
3225 * @brief Free-fall duration event(1LSb = 1 / ODR).[set]
3226 *
3227 * @param ctx Read / write interface definitions.(ptr)
3228 * @param val Change the values of ff_dur in reg FREE_FALL
3229 * @retval Interface status (MANDATORY: return 0 -> no Error).
3230 *
3231 */
asm330lhh_ff_dur_set(const stmdev_ctx_t * ctx,uint8_t val)3232 int32_t asm330lhh_ff_dur_set(const stmdev_ctx_t *ctx, uint8_t val)
3233 {
3234 asm330lhh_wake_up_dur_t wake_up_dur;
3235 asm330lhh_free_fall_t free_fall;
3236 int32_t ret;
3237
3238 ret = asm330lhh_read_reg(ctx, ASM330LHH_WAKE_UP_DUR,
3239 (uint8_t *)&wake_up_dur, 1);
3240 if (ret == 0)
3241 {
3242 wake_up_dur.ff_dur = (val & 0x20U) >> 5;
3243 ret = asm330lhh_write_reg(ctx, ASM330LHH_WAKE_UP_DUR,
3244 (uint8_t *)&wake_up_dur, 1);
3245 }
3246 if (ret == 0)
3247 {
3248 ret = asm330lhh_read_reg(ctx, ASM330LHH_FREE_FALL,
3249 (uint8_t *)&free_fall, 1);
3250 }
3251 if (ret == 0)
3252 {
3253 free_fall.ff_dur = val & 0x1FU;
3254 ret = asm330lhh_write_reg(ctx, ASM330LHH_FREE_FALL,
3255 (uint8_t *)&free_fall, 1);
3256 }
3257 return ret;
3258 }
3259
3260 /**
3261 * @brief Free-fall duration event(1LSb = 1 / ODR).[get]
3262 *
3263 * @param ctx Read / write interface definitions.(ptr)
3264 * @param val Change the values of ff_dur in reg FREE_FALL
3265 * @retval Interface status (MANDATORY: return 0 -> no Error).
3266 *
3267 */
asm330lhh_ff_dur_get(const stmdev_ctx_t * ctx,uint8_t * val)3268 int32_t asm330lhh_ff_dur_get(const stmdev_ctx_t *ctx, uint8_t *val)
3269 {
3270 asm330lhh_wake_up_dur_t wake_up_dur;
3271 asm330lhh_free_fall_t free_fall;
3272 int32_t ret;
3273
3274 ret = asm330lhh_read_reg(ctx, ASM330LHH_WAKE_UP_DUR,
3275 (uint8_t *)&wake_up_dur, 1);
3276
3277 if (ret == 0)
3278 {
3279 ret = asm330lhh_read_reg(ctx, ASM330LHH_FREE_FALL,
3280 (uint8_t *)&free_fall, 1);
3281 }
3282 *val = (wake_up_dur.ff_dur << 5) + free_fall.ff_dur;
3283
3284 return ret;
3285 }
3286
3287 /**
3288 * @}
3289 *
3290 */
3291
3292 /**
3293 * @defgroup ASM330LHH_fifo
3294 * @brief This section group all the functions concerning
3295 * the fifo usage
3296 * @{
3297 *
3298 */
3299
3300 /**
3301 * @brief FIFO watermark level selection.[set]
3302 *
3303 * @param ctx Read / write interface definitions.(ptr)
3304 * @param val Change the values of wtm in reg FIFO_CTRL1
3305 * @retval Interface status (MANDATORY: return 0 -> no Error).
3306 *
3307 */
asm330lhh_fifo_watermark_set(const stmdev_ctx_t * ctx,uint16_t val)3308 int32_t asm330lhh_fifo_watermark_set(const stmdev_ctx_t *ctx, uint16_t val)
3309 {
3310 asm330lhh_fifo_ctrl1_t fifo_ctrl1;
3311 asm330lhh_fifo_ctrl2_t fifo_ctrl2;
3312 int32_t ret;
3313
3314 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL1, (uint8_t *)&fifo_ctrl1, 1);
3315 ret += asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL2, (uint8_t *)&fifo_ctrl2, 1);
3316
3317 if (ret == 0)
3318 {
3319 fifo_ctrl1.wtm = (uint8_t)(val & 0xFFU);
3320 fifo_ctrl2.wtm = (uint8_t)((val / 256U) & 0x01U);
3321 ret = asm330lhh_write_reg(ctx, ASM330LHH_FIFO_CTRL1, (uint8_t *)&fifo_ctrl1, 1);
3322 ret += asm330lhh_write_reg(ctx, ASM330LHH_FIFO_CTRL2, (uint8_t *)&fifo_ctrl2, 1);
3323 }
3324
3325 return ret;
3326 }
3327
3328 /**
3329 * @brief FIFO watermark level selection.[get]
3330 *
3331 * @param ctx Read / write interface definitions.(ptr)
3332 * @param val Change the values of wtm in reg FIFO_CTRL1
3333 * @retval Interface status (MANDATORY: return 0 -> no Error).
3334 *
3335 */
asm330lhh_fifo_watermark_get(const stmdev_ctx_t * ctx,uint16_t * val)3336 int32_t asm330lhh_fifo_watermark_get(const stmdev_ctx_t *ctx, uint16_t *val)
3337 {
3338 asm330lhh_fifo_ctrl1_t fifo_ctrl1;
3339 asm330lhh_fifo_ctrl2_t fifo_ctrl2;
3340 int32_t ret;
3341
3342 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL2,
3343 (uint8_t *)&fifo_ctrl2, 1);
3344 if (ret == 0)
3345 {
3346 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL1,
3347 (uint8_t *)&fifo_ctrl1, 1);
3348 }
3349 *val = fifo_ctrl2.wtm;
3350 *val = (*val * 256U) + fifo_ctrl1.wtm;
3351 return ret;
3352 }
3353
3354 /**
3355 * @brief Enables ODR CHANGE virtual sensor to be batched in FIFO.[set]
3356 *
3357 * @param ctx Read / write interface definitions.(ptr)
3358 * @param val Change the values of odrchg_en in reg FIFO_CTRL2
3359 * @retval Interface status (MANDATORY: return 0 -> no Error).
3360 *
3361 */
asm330lhh_fifo_virtual_sens_odr_chg_set(const stmdev_ctx_t * ctx,uint8_t val)3362 int32_t asm330lhh_fifo_virtual_sens_odr_chg_set(const stmdev_ctx_t *ctx,
3363 uint8_t val)
3364 {
3365 asm330lhh_fifo_ctrl2_t fifo_ctrl2;
3366 int32_t ret;
3367
3368 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL2,
3369 (uint8_t *)&fifo_ctrl2, 1);
3370 if (ret == 0)
3371 {
3372 fifo_ctrl2.odrchg_en = (uint8_t)val;
3373 ret = asm330lhh_write_reg(ctx, ASM330LHH_FIFO_CTRL2,
3374 (uint8_t *)&fifo_ctrl2, 1);
3375 }
3376
3377 return ret;
3378 }
3379
3380 /**
3381 * @brief Enables ODR CHANGE virtual sensor to be batched in FIFO.[get]
3382 *
3383 * @param ctx Read / write interface definitions.(ptr)
3384 * @param val Change the values of odrchg_en in reg FIFO_CTRL2
3385 * @retval Interface status (MANDATORY: return 0 -> no Error).
3386 *
3387 */
asm330lhh_fifo_virtual_sens_odr_chg_get(const stmdev_ctx_t * ctx,uint8_t * val)3388 int32_t asm330lhh_fifo_virtual_sens_odr_chg_get(const stmdev_ctx_t *ctx,
3389 uint8_t *val)
3390 {
3391 asm330lhh_fifo_ctrl2_t fifo_ctrl2;
3392 int32_t ret;
3393
3394 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL2,
3395 (uint8_t *)&fifo_ctrl2, 1);
3396 *val = fifo_ctrl2.odrchg_en;
3397
3398 return ret;
3399 }
3400
3401 /**
3402 * @brief Sensing chain FIFO stop values memorization at threshold
3403 * level.[set]
3404 *
3405 * @param ctx Read / write interface definitions.(ptr)
3406 * @param val Change the values of stop_on_wtm in reg FIFO_CTRL2
3407 * @retval Interface status (MANDATORY: return 0 -> no Error).
3408 *
3409 */
asm330lhh_fifo_stop_on_wtm_set(const stmdev_ctx_t * ctx,uint8_t val)3410 int32_t asm330lhh_fifo_stop_on_wtm_set(const stmdev_ctx_t *ctx, uint8_t val)
3411 {
3412 asm330lhh_fifo_ctrl2_t fifo_ctrl2;
3413 int32_t ret;
3414
3415 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL2,
3416 (uint8_t *)&fifo_ctrl2, 1);
3417 if (ret == 0)
3418 {
3419 fifo_ctrl2.stop_on_wtm = (uint8_t)val;
3420 ret = asm330lhh_write_reg(ctx, ASM330LHH_FIFO_CTRL2,
3421 (uint8_t *)&fifo_ctrl2, 1);
3422 }
3423 return ret;
3424 }
3425
3426 /**
3427 * @brief Sensing chain FIFO stop values memorization at threshold
3428 * level.[get]
3429 *
3430 * @param ctx Read / write interface definitions.(ptr)
3431 * @param val Change the values of stop_on_wtm in reg FIFO_CTRL2
3432 * @retval Interface status (MANDATORY: return 0 -> no Error).
3433 *
3434 */
asm330lhh_fifo_stop_on_wtm_get(const stmdev_ctx_t * ctx,uint8_t * val)3435 int32_t asm330lhh_fifo_stop_on_wtm_get(const stmdev_ctx_t *ctx, uint8_t *val)
3436 {
3437 asm330lhh_fifo_ctrl2_t fifo_ctrl2;
3438 int32_t ret;
3439
3440 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL2,
3441 (uint8_t *)&fifo_ctrl2, 1);
3442 *val = fifo_ctrl2.stop_on_wtm;
3443
3444 return ret;
3445 }
3446
3447 /**
3448 * @brief Selects Batching Data Rate (writing frequency in FIFO)
3449 * for accelerometer data.[set]
3450 *
3451 * @param ctx Read / write interface definitions.(ptr)
3452 * @param val Change the values of bdr_xl in reg FIFO_CTRL3
3453 * @retval Interface status (MANDATORY: return 0 -> no Error).
3454 *
3455 */
asm330lhh_fifo_xl_batch_set(const stmdev_ctx_t * ctx,asm330lhh_bdr_xl_t val)3456 int32_t asm330lhh_fifo_xl_batch_set(const stmdev_ctx_t *ctx,
3457 asm330lhh_bdr_xl_t val)
3458 {
3459 asm330lhh_fifo_ctrl3_t fifo_ctrl3;
3460 int32_t ret;
3461
3462 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL3,
3463 (uint8_t *)&fifo_ctrl3, 1);
3464 if (ret == 0)
3465 {
3466 fifo_ctrl3.bdr_xl = (uint8_t)val;
3467 ret = asm330lhh_write_reg(ctx, ASM330LHH_FIFO_CTRL3,
3468 (uint8_t *)&fifo_ctrl3, 1);
3469 }
3470 return ret;
3471 }
3472
3473 /**
3474 * @brief Selects Batching Data Rate (writing frequency in FIFO)
3475 * for accelerometer data.[get]
3476 *
3477 * @param ctx Read / write interface definitions.(ptr)
3478 * @param val Get the values of bdr_xl in reg FIFO_CTRL3
3479 * @retval Interface status (MANDATORY: return 0 -> no Error).
3480 *
3481 */
asm330lhh_fifo_xl_batch_get(const stmdev_ctx_t * ctx,asm330lhh_bdr_xl_t * val)3482 int32_t asm330lhh_fifo_xl_batch_get(const stmdev_ctx_t *ctx,
3483 asm330lhh_bdr_xl_t *val)
3484 {
3485 asm330lhh_fifo_ctrl3_t fifo_ctrl3;
3486 int32_t ret;
3487
3488 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL3,
3489 (uint8_t *)&fifo_ctrl3, 1);
3490
3491 switch (fifo_ctrl3.bdr_xl)
3492 {
3493 case ASM330LHH_XL_NOT_BATCHED:
3494 *val = ASM330LHH_XL_NOT_BATCHED;
3495 break;
3496 case ASM330LHH_XL_BATCHED_AT_12Hz5:
3497 *val = ASM330LHH_XL_BATCHED_AT_12Hz5;
3498 break;
3499 case ASM330LHH_XL_BATCHED_AT_26Hz:
3500 *val = ASM330LHH_XL_BATCHED_AT_26Hz;
3501 break;
3502 case ASM330LHH_XL_BATCHED_AT_52Hz:
3503 *val = ASM330LHH_XL_BATCHED_AT_52Hz;
3504 break;
3505 case ASM330LHH_XL_BATCHED_AT_104Hz:
3506 *val = ASM330LHH_XL_BATCHED_AT_104Hz;
3507 break;
3508 case ASM330LHH_XL_BATCHED_AT_208Hz:
3509 *val = ASM330LHH_XL_BATCHED_AT_208Hz;
3510 break;
3511 case ASM330LHH_XL_BATCHED_AT_417Hz:
3512 *val = ASM330LHH_XL_BATCHED_AT_417Hz;
3513 break;
3514 case ASM330LHH_XL_BATCHED_AT_833Hz:
3515 *val = ASM330LHH_XL_BATCHED_AT_833Hz;
3516 break;
3517 case ASM330LHH_XL_BATCHED_AT_1667Hz:
3518 *val = ASM330LHH_XL_BATCHED_AT_1667Hz;
3519 break;
3520 case ASM330LHH_XL_BATCHED_AT_3333Hz:
3521 *val = ASM330LHH_XL_BATCHED_AT_3333Hz;
3522 break;
3523 case ASM330LHH_XL_BATCHED_AT_6667Hz:
3524 *val = ASM330LHH_XL_BATCHED_AT_6667Hz;
3525 break;
3526 default:
3527 *val = ASM330LHH_XL_NOT_BATCHED;
3528 break;
3529 }
3530 return ret;
3531 }
3532
3533 /**
3534 * @brief Selects Batching Data Rate (writing frequency in FIFO)
3535 * for gyroscope data.[set]
3536 *
3537 * @param ctx Read / write interface definitions.(ptr)
3538 * @param val Change the values of bdr_gy in reg FIFO_CTRL3
3539 * @retval Interface status (MANDATORY: return 0 -> no Error).
3540 *
3541 */
asm330lhh_fifo_gy_batch_set(const stmdev_ctx_t * ctx,asm330lhh_bdr_gy_t val)3542 int32_t asm330lhh_fifo_gy_batch_set(const stmdev_ctx_t *ctx,
3543 asm330lhh_bdr_gy_t val)
3544 {
3545 asm330lhh_fifo_ctrl3_t fifo_ctrl3;
3546 int32_t ret;
3547
3548 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL3,
3549 (uint8_t *)&fifo_ctrl3, 1);
3550 if (ret == 0)
3551 {
3552 fifo_ctrl3.bdr_gy = (uint8_t)val;
3553 ret = asm330lhh_write_reg(ctx, ASM330LHH_FIFO_CTRL3,
3554 (uint8_t *)&fifo_ctrl3, 1);
3555 }
3556 return ret;
3557 }
3558
3559 /**
3560 * @brief Selects Batching Data Rate (writing frequency in FIFO)
3561 * for gyroscope data.[get]
3562 *
3563 * @param ctx Read / write interface definitions.(ptr)
3564 * @param val Get the values of bdr_gy in reg FIFO_CTRL3
3565 * @retval Interface status (MANDATORY: return 0 -> no Error).
3566 *
3567 */
asm330lhh_fifo_gy_batch_get(const stmdev_ctx_t * ctx,asm330lhh_bdr_gy_t * val)3568 int32_t asm330lhh_fifo_gy_batch_get(const stmdev_ctx_t *ctx,
3569 asm330lhh_bdr_gy_t *val)
3570 {
3571 asm330lhh_fifo_ctrl3_t fifo_ctrl3;
3572 int32_t ret;
3573
3574 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL3,
3575 (uint8_t *)&fifo_ctrl3, 1);
3576
3577 switch (fifo_ctrl3.bdr_gy)
3578 {
3579 case ASM330LHH_GY_NOT_BATCHED:
3580 *val = ASM330LHH_GY_NOT_BATCHED;
3581 break;
3582 case ASM330LHH_GY_BATCHED_AT_12Hz5:
3583 *val = ASM330LHH_GY_BATCHED_AT_12Hz5;
3584 break;
3585 case ASM330LHH_GY_BATCHED_AT_26Hz:
3586 *val = ASM330LHH_GY_BATCHED_AT_26Hz;
3587 break;
3588 case ASM330LHH_GY_BATCHED_AT_52Hz:
3589 *val = ASM330LHH_GY_BATCHED_AT_52Hz;
3590 break;
3591 case ASM330LHH_GY_BATCHED_AT_104Hz:
3592 *val = ASM330LHH_GY_BATCHED_AT_104Hz;
3593 break;
3594 case ASM330LHH_GY_BATCHED_AT_208Hz:
3595 *val = ASM330LHH_GY_BATCHED_AT_208Hz;
3596 break;
3597 case ASM330LHH_GY_BATCHED_AT_417Hz:
3598 *val = ASM330LHH_GY_BATCHED_AT_417Hz;
3599 break;
3600 case ASM330LHH_GY_BATCHED_AT_833Hz:
3601 *val = ASM330LHH_GY_BATCHED_AT_833Hz;
3602 break;
3603 case ASM330LHH_GY_BATCHED_AT_1667Hz:
3604 *val = ASM330LHH_GY_BATCHED_AT_1667Hz;
3605 break;
3606 case ASM330LHH_GY_BATCHED_AT_3333Hz:
3607 *val = ASM330LHH_GY_BATCHED_AT_3333Hz;
3608 break;
3609 case ASM330LHH_GY_BATCHED_AT_6667Hz:
3610 *val = ASM330LHH_GY_BATCHED_AT_6667Hz;
3611 break;
3612 case ASM330LHH_GY_BATCHED_AT_6Hz5:
3613 *val = ASM330LHH_GY_BATCHED_AT_6Hz5;
3614 break;
3615 default:
3616 *val = ASM330LHH_GY_NOT_BATCHED;
3617 break;
3618 }
3619 return ret;
3620 }
3621
3622 /**
3623 * @brief FIFO mode selection.[set]
3624 *
3625 * @param ctx Read / write interface definitions.(ptr)
3626 * @param val Change the values of fifo_mode in reg FIFO_CTRL4
3627 * @retval Interface status (MANDATORY: return 0 -> no Error).
3628 *
3629 */
asm330lhh_fifo_mode_set(const stmdev_ctx_t * ctx,asm330lhh_fifo_mode_t val)3630 int32_t asm330lhh_fifo_mode_set(const stmdev_ctx_t *ctx,
3631 asm330lhh_fifo_mode_t val)
3632 {
3633 asm330lhh_fifo_ctrl4_t fifo_ctrl4;
3634 int32_t ret;
3635
3636 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL4,
3637 (uint8_t *)&fifo_ctrl4, 1);
3638 if (ret == 0)
3639 {
3640 fifo_ctrl4.fifo_mode = (uint8_t)val;
3641 ret = asm330lhh_write_reg(ctx, ASM330LHH_FIFO_CTRL4,
3642 (uint8_t *)&fifo_ctrl4, 1);
3643 }
3644 return ret;
3645 }
3646
3647 /**
3648 * @brief FIFO mode selection.[get]
3649 *
3650 * @param ctx Read / write interface definitions.(ptr)
3651 * @param val Get the values of fifo_mode in reg FIFO_CTRL4
3652 * @retval Interface status (MANDATORY: return 0 -> no Error).
3653 *
3654 */
asm330lhh_fifo_mode_get(const stmdev_ctx_t * ctx,asm330lhh_fifo_mode_t * val)3655 int32_t asm330lhh_fifo_mode_get(const stmdev_ctx_t *ctx,
3656 asm330lhh_fifo_mode_t *val)
3657 {
3658 asm330lhh_fifo_ctrl4_t fifo_ctrl4;
3659 int32_t ret;
3660
3661 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL4,
3662 (uint8_t *)&fifo_ctrl4, 1);
3663
3664 switch (fifo_ctrl4.fifo_mode)
3665 {
3666 case ASM330LHH_BYPASS_MODE:
3667 *val = ASM330LHH_BYPASS_MODE;
3668 break;
3669 case ASM330LHH_FIFO_MODE:
3670 *val = ASM330LHH_FIFO_MODE;
3671 break;
3672 case ASM330LHH_STREAM_TO_FIFO_MODE:
3673 *val = ASM330LHH_STREAM_TO_FIFO_MODE;
3674 break;
3675 case ASM330LHH_BYPASS_TO_STREAM_MODE:
3676 *val = ASM330LHH_BYPASS_TO_STREAM_MODE;
3677 break;
3678 case ASM330LHH_STREAM_MODE:
3679 *val = ASM330LHH_STREAM_MODE;
3680 break;
3681 case ASM330LHH_BYPASS_TO_FIFO_MODE:
3682 *val = ASM330LHH_BYPASS_TO_FIFO_MODE;
3683 break;
3684 default:
3685 *val = ASM330LHH_BYPASS_MODE;
3686 break;
3687 }
3688 return ret;
3689 }
3690
3691 /**
3692 * @brief Selects Batching Data Rate (writing frequency in FIFO)
3693 * for temperature data.[set]
3694 *
3695 * @param ctx Read / write interface definitions.(ptr)
3696 * @param val Change the values of odr_t_batch in reg FIFO_CTRL4
3697 * @retval Interface status (MANDATORY: return 0 -> no Error).
3698 *
3699 */
asm330lhh_fifo_temp_batch_set(const stmdev_ctx_t * ctx,asm330lhh_odr_t_batch_t val)3700 int32_t asm330lhh_fifo_temp_batch_set(const stmdev_ctx_t *ctx,
3701 asm330lhh_odr_t_batch_t val)
3702 {
3703 asm330lhh_fifo_ctrl4_t fifo_ctrl4;
3704 int32_t ret;
3705
3706 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL4,
3707 (uint8_t *)&fifo_ctrl4, 1);
3708 if (ret == 0)
3709 {
3710 fifo_ctrl4.odr_t_batch = (uint8_t)val;
3711 ret = asm330lhh_write_reg(ctx, ASM330LHH_FIFO_CTRL4,
3712 (uint8_t *)&fifo_ctrl4, 1);
3713 }
3714 return ret;
3715 }
3716
3717 /**
3718 * @brief Selects Batching Data Rate (writing frequency in FIFO)
3719 * for temperature data.[get]
3720 *
3721 * @param ctx Read / write interface definitions.(ptr)
3722 * @param val Get the values of odr_t_batch in reg FIFO_CTRL4
3723 * @retval Interface status (MANDATORY: return 0 -> no Error).
3724 *
3725 */
asm330lhh_fifo_temp_batch_get(const stmdev_ctx_t * ctx,asm330lhh_odr_t_batch_t * val)3726 int32_t asm330lhh_fifo_temp_batch_get(const stmdev_ctx_t *ctx,
3727 asm330lhh_odr_t_batch_t *val)
3728 {
3729 asm330lhh_fifo_ctrl4_t fifo_ctrl4;
3730 int32_t ret;
3731
3732 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL4,
3733 (uint8_t *)&fifo_ctrl4, 1);
3734
3735 switch (fifo_ctrl4.odr_t_batch)
3736 {
3737 case ASM330LHH_TEMP_NOT_BATCHED:
3738 *val = ASM330LHH_TEMP_NOT_BATCHED;
3739 break;
3740 case ASM330LHH_TEMP_BATCHED_AT_52Hz:
3741 *val = ASM330LHH_TEMP_BATCHED_AT_52Hz;
3742 break;
3743 case ASM330LHH_TEMP_BATCHED_AT_12Hz5:
3744 *val = ASM330LHH_TEMP_BATCHED_AT_12Hz5;
3745 break;
3746 case ASM330LHH_TEMP_BATCHED_AT_1Hz6:
3747 *val = ASM330LHH_TEMP_BATCHED_AT_1Hz6;
3748 break;
3749 default:
3750 *val = ASM330LHH_TEMP_NOT_BATCHED;
3751 break;
3752 }
3753 return ret;
3754 }
3755
3756 /**
3757 * @brief Selects decimation for timestamp batching in FIFO.
3758 * Writing rate will be the maximum rate between XL and
3759 * GYRO BDR divided by decimation decoder.[set]
3760 *
3761 * @param ctx Read / write interface definitions.(ptr)
3762 * @param val Change the values of dec_ts_batch in reg FIFO_CTRL4
3763 * @retval Interface status (MANDATORY: return 0 -> no Error).
3764 *
3765 */
asm330lhh_fifo_timestamp_decimation_set(const stmdev_ctx_t * ctx,asm330lhh_dec_ts_batch_t val)3766 int32_t asm330lhh_fifo_timestamp_decimation_set(const stmdev_ctx_t *ctx,
3767 asm330lhh_dec_ts_batch_t val)
3768 {
3769 asm330lhh_fifo_ctrl4_t fifo_ctrl4;
3770 int32_t ret;
3771
3772 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL4,
3773 (uint8_t *)&fifo_ctrl4, 1);
3774 if (ret == 0)
3775 {
3776 fifo_ctrl4.dec_ts_batch = (uint8_t)val;
3777 ret = asm330lhh_write_reg(ctx, ASM330LHH_FIFO_CTRL4,
3778 (uint8_t *)&fifo_ctrl4, 1);
3779 }
3780 return ret;
3781 }
3782
3783 /**
3784 * @brief Selects decimation for timestamp batching in FIFO.
3785 * Writing rate will be the maximum rate between XL and
3786 * GYRO BDR divided by decimation decoder.[get]
3787 *
3788 * @param ctx Read / write interface definitions.(ptr)
3789 * @param val Get the values of dec_ts_batch in reg
3790 * FIFO_CTRL4
3791 * @retval Interface status (MANDATORY: return 0 -> no Error).
3792 *
3793 */
asm330lhh_fifo_timestamp_decimation_get(const stmdev_ctx_t * ctx,asm330lhh_dec_ts_batch_t * val)3794 int32_t asm330lhh_fifo_timestamp_decimation_get(const stmdev_ctx_t *ctx,
3795 asm330lhh_dec_ts_batch_t *val)
3796 {
3797 asm330lhh_fifo_ctrl4_t fifo_ctrl4;
3798 int32_t ret;
3799
3800 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_CTRL4,
3801 (uint8_t *)&fifo_ctrl4, 1);
3802
3803 switch (fifo_ctrl4.dec_ts_batch)
3804 {
3805 case ASM330LHH_NO_DECIMATION:
3806 *val = ASM330LHH_NO_DECIMATION;
3807 break;
3808 case ASM330LHH_DEC_1:
3809 *val = ASM330LHH_DEC_1;
3810 break;
3811 case ASM330LHH_DEC_8:
3812 *val = ASM330LHH_DEC_8;
3813 break;
3814 case ASM330LHH_DEC_32:
3815 *val = ASM330LHH_DEC_32;
3816 break;
3817 default:
3818 *val = ASM330LHH_NO_DECIMATION;
3819 break;
3820 }
3821 return ret;
3822 }
3823
3824 /**
3825 * @brief Selects the trigger for the internal counter of batching events
3826 * between XL and gyro.[set]
3827 *
3828 * @param ctx Read / write interface definitions.(ptr)
3829 * @param val Change the values of trig_counter_bdr in
3830 * reg COUNTER_BDR_REG1
3831 * @retval Interface status (MANDATORY: return 0 -> no Error).
3832 *
3833 */
asm330lhh_fifo_cnt_event_batch_set(const stmdev_ctx_t * ctx,asm330lhh_trig_counter_bdr_t val)3834 int32_t asm330lhh_fifo_cnt_event_batch_set(const stmdev_ctx_t *ctx,
3835 asm330lhh_trig_counter_bdr_t val)
3836 {
3837 asm330lhh_counter_bdr_reg1_t counter_bdr_reg1;
3838 int32_t ret;
3839
3840 ret = asm330lhh_read_reg(ctx, ASM330LHH_COUNTER_BDR_REG1,
3841 (uint8_t *)&counter_bdr_reg1, 1);
3842 if (ret == 0)
3843 {
3844 counter_bdr_reg1.trig_counter_bdr = (uint8_t)val;
3845 ret = asm330lhh_write_reg(ctx, ASM330LHH_COUNTER_BDR_REG1,
3846 (uint8_t *)&counter_bdr_reg1, 1);
3847 }
3848 return ret;
3849 }
3850
3851 /**
3852 * @brief Selects the trigger for the internal counter of batching events
3853 * between XL and gyro.[get]
3854 *
3855 * @param ctx Read / write interface definitions.(ptr)
3856 * @param val Get the values of trig_counter_bdr
3857 * in reg COUNTER_BDR_REG1
3858 * @retval Interface status (MANDATORY: return 0 -> no Error).
3859 *
3860 */
asm330lhh_fifo_cnt_event_batch_get(const stmdev_ctx_t * ctx,asm330lhh_trig_counter_bdr_t * val)3861 int32_t asm330lhh_fifo_cnt_event_batch_get(const stmdev_ctx_t *ctx,
3862 asm330lhh_trig_counter_bdr_t *val)
3863 {
3864 asm330lhh_counter_bdr_reg1_t counter_bdr_reg1;
3865 int32_t ret;
3866
3867 ret = asm330lhh_read_reg(ctx, ASM330LHH_COUNTER_BDR_REG1,
3868 (uint8_t *)&counter_bdr_reg1, 1);
3869
3870 switch (counter_bdr_reg1.trig_counter_bdr)
3871 {
3872 case ASM330LHH_XL_BATCH_EVENT:
3873 *val = ASM330LHH_XL_BATCH_EVENT;
3874 break;
3875 case ASM330LHH_GYRO_BATCH_EVENT:
3876 *val = ASM330LHH_GYRO_BATCH_EVENT;
3877 break;
3878 default:
3879 *val = ASM330LHH_XL_BATCH_EVENT;
3880 break;
3881 }
3882 return ret;
3883 }
3884
3885 /**
3886 * @brief Resets the internal counter of batching events for a single sensor.
3887 * This bit is automatically reset to zero if it was set to ‘1’.[set]
3888 *
3889 * @param ctx Read / write interface definitions.(ptr)
3890 * @param val Change the values of rst_counter_bdr in reg COUNTER_BDR_REG1
3891 * @retval Interface status (MANDATORY: return 0 -> no Error).
3892 *
3893 */
asm330lhh_rst_batch_counter_set(const stmdev_ctx_t * ctx,uint8_t val)3894 int32_t asm330lhh_rst_batch_counter_set(const stmdev_ctx_t *ctx, uint8_t val)
3895 {
3896 asm330lhh_counter_bdr_reg1_t counter_bdr_reg1;
3897 int32_t ret;
3898
3899 ret = asm330lhh_read_reg(ctx, ASM330LHH_COUNTER_BDR_REG1,
3900 (uint8_t *)&counter_bdr_reg1, 1);
3901 if (ret == 0)
3902 {
3903 counter_bdr_reg1.rst_counter_bdr = (uint8_t)val;
3904 ret = asm330lhh_write_reg(ctx, ASM330LHH_COUNTER_BDR_REG1,
3905 (uint8_t *)&counter_bdr_reg1, 1);
3906 }
3907 return ret;
3908 }
3909
3910 /**
3911 * @brief Resets the internal counter of batching events for a single sensor.
3912 * This bit is automatically reset to zero if it was set to ‘1’.[get]
3913 *
3914 * @param ctx Read / write interface definitions.(ptr)
3915 * @param val Change the values of rst_counter_bdr in reg COUNTER_BDR_REG1
3916 * @retval Interface status (MANDATORY: return 0 -> no Error).
3917 *
3918 */
asm330lhh_rst_batch_counter_get(const stmdev_ctx_t * ctx,uint8_t * val)3919 int32_t asm330lhh_rst_batch_counter_get(const stmdev_ctx_t *ctx, uint8_t *val)
3920 {
3921 asm330lhh_counter_bdr_reg1_t counter_bdr_reg1;
3922 int32_t ret;
3923
3924 ret = asm330lhh_read_reg(ctx, ASM330LHH_COUNTER_BDR_REG1,
3925 (uint8_t *)&counter_bdr_reg1, 1);
3926 *val = counter_bdr_reg1.rst_counter_bdr;
3927
3928 return ret;
3929 }
3930
3931 /**
3932 * @brief Batch data rate counter.[set]
3933 *
3934 * @param ctx Read / write interface definitions.(ptr)
3935 * @param val Change the values of cnt_bdr_th in reg COUNTER_BDR_REG2
3936 * and COUNTER_BDR_REG1.
3937 * @retval Interface status (MANDATORY: return 0 -> no Error).
3938 *
3939 */
asm330lhh_batch_counter_threshold_set(const stmdev_ctx_t * ctx,uint16_t val)3940 int32_t asm330lhh_batch_counter_threshold_set(const stmdev_ctx_t *ctx, uint16_t val)
3941 {
3942 asm330lhh_counter_bdr_reg2_t counter_bdr_reg1;
3943 asm330lhh_counter_bdr_reg2_t counter_bdr_reg2;
3944 int32_t ret;
3945
3946 ret = asm330lhh_read_reg(ctx, ASM330LHH_COUNTER_BDR_REG1,
3947 (uint8_t *)&counter_bdr_reg1, 1);
3948 if (ret == 0)
3949 {
3950 counter_bdr_reg1.cnt_bdr_th = (uint8_t)((val / 256U) & 0x07U);
3951 ret = asm330lhh_write_reg(ctx, ASM330LHH_COUNTER_BDR_REG1,
3952 (uint8_t *)&counter_bdr_reg1, 1);
3953 }
3954 if (ret == 0)
3955 {
3956 counter_bdr_reg2.cnt_bdr_th = (uint8_t)(val - (counter_bdr_reg1.cnt_bdr_th * 256U));
3957 ret = asm330lhh_write_reg(ctx, ASM330LHH_COUNTER_BDR_REG2,
3958 (uint8_t *)&counter_bdr_reg2, 1);
3959 }
3960 return ret;
3961 }
3962
3963 /**
3964 * @brief Batch data rate counter.[get]
3965 *
3966 * @param ctx Read / write interface definitions.(ptr)
3967 * @param val Change the values of cnt_bdr_th in reg COUNTER_BDR_REG2
3968 * and COUNTER_BDR_REG1.
3969 * @retval Interface status (MANDATORY: return 0 -> no Error).
3970 *
3971 */
asm330lhh_batch_counter_threshold_get(const stmdev_ctx_t * ctx,uint16_t * val)3972 int32_t asm330lhh_batch_counter_threshold_get(const stmdev_ctx_t *ctx,
3973 uint16_t *val)
3974 {
3975 asm330lhh_counter_bdr_reg1_t counter_bdr_reg1;
3976 asm330lhh_counter_bdr_reg2_t counter_bdr_reg2;
3977 int32_t ret;
3978
3979 ret = asm330lhh_read_reg(ctx, ASM330LHH_COUNTER_BDR_REG1,
3980 (uint8_t *)&counter_bdr_reg1, 1);
3981 if (ret == 0)
3982 {
3983 ret = asm330lhh_read_reg(ctx, ASM330LHH_COUNTER_BDR_REG2,
3984 (uint8_t *)&counter_bdr_reg2, 1);
3985 }
3986
3987 *val = counter_bdr_reg1.cnt_bdr_th;
3988 *val = (*val * 256U) + counter_bdr_reg2.cnt_bdr_th;
3989 return ret;
3990 }
3991
3992 /**
3993 * @brief Number of unread sensor data (TAG + 6 bytes) stored in FIFO.[get]
3994 *
3995 * @param ctx Read / write interface definitions.(ptr)
3996 * @param val Read the value of diff_fifo in reg FIFO_STATUS1 and FIFO_STATUS2
3997 * @retval Interface status (MANDATORY: return 0 -> no Error).
3998 *
3999 */
asm330lhh_fifo_data_level_get(const stmdev_ctx_t * ctx,uint16_t * val)4000 int32_t asm330lhh_fifo_data_level_get(const stmdev_ctx_t *ctx, uint16_t *val)
4001 {
4002 uint8_t reg[2];
4003 asm330lhh_fifo_status1_t *fifo_status1 = (asm330lhh_fifo_status1_t *)®[0];
4004 asm330lhh_fifo_status2_t *fifo_status2 = (asm330lhh_fifo_status2_t *)®[1];
4005 int32_t ret;
4006
4007 /* read both FIFO_STATUS1 + FIFO_STATUS2 regs */
4008 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_STATUS1, (uint8_t *)reg, 2);
4009 if (ret == 0)
4010 {
4011 *val = fifo_status2->diff_fifo;
4012 *val = (*val * 256U) + fifo_status1->diff_fifo;
4013 }
4014
4015 return ret;
4016 }
4017
4018 /**
4019 * @brief Smart FIFO status.[get]
4020 *
4021 * @param ctx Read / write interface definitions.(ptr)
4022 * @param val Read registers FIFO_STATUS2
4023 * @retval Interface status (MANDATORY: return 0 -> no Error).
4024 *
4025 */
asm330lhh_fifo_status_get(const stmdev_ctx_t * ctx,asm330lhh_fifo_status2_t * val)4026 int32_t asm330lhh_fifo_status_get(const stmdev_ctx_t *ctx,
4027 asm330lhh_fifo_status2_t *val)
4028 {
4029 uint8_t reg[2];
4030 asm330lhh_fifo_status2_t *fifo_status2 = (asm330lhh_fifo_status2_t *)®[1];
4031 int32_t ret;
4032
4033 /* read both FIFO_STATUS1 + FIFO_STATUS2 regs */
4034 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_STATUS1, (uint8_t *)reg, 2);
4035 if (ret == 0)
4036 {
4037 *val = *fifo_status2;
4038 }
4039
4040 return ret;
4041 }
4042
4043 /**
4044 * @brief Smart FIFO full status.[get]
4045 *
4046 * @param ctx Read / write interface definitions.(ptr)
4047 * @param val Read the values of fifo_full_ia in reg FIFO_STATUS2
4048 * @retval Interface status (MANDATORY: return 0 -> no Error).
4049 *
4050 */
asm330lhh_fifo_full_flag_get(const stmdev_ctx_t * ctx,uint8_t * val)4051 int32_t asm330lhh_fifo_full_flag_get(const stmdev_ctx_t *ctx, uint8_t *val)
4052 {
4053 uint8_t reg[2];
4054 asm330lhh_fifo_status2_t *fifo_status2 = (asm330lhh_fifo_status2_t *)®[1];
4055 int32_t ret;
4056
4057 /* read both FIFO_STATUS1 + FIFO_STATUS2 regs */
4058 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_STATUS1, (uint8_t *)reg, 2);
4059 if (ret == 0)
4060 {
4061 *val = fifo_status2->fifo_full_ia;
4062 }
4063
4064 return ret;
4065 }
4066
4067 /**
4068 * @brief FIFO overrun status.[get]
4069 *
4070 * @param ctx Read / write interface definitions.(ptr)
4071 * @param val Read the values of fifo_over_run_latched in
4072 * reg FIFO_STATUS2
4073 * @retval Interface status (MANDATORY: return 0 -> no Error).
4074 *
4075 */
asm330lhh_fifo_ovr_flag_get(const stmdev_ctx_t * ctx,uint8_t * val)4076 int32_t asm330lhh_fifo_ovr_flag_get(const stmdev_ctx_t *ctx, uint8_t *val)
4077 {
4078 uint8_t reg[2];
4079 asm330lhh_fifo_status2_t *fifo_status2 = (asm330lhh_fifo_status2_t *)®[1];
4080 int32_t ret;
4081
4082 /* read both FIFO_STATUS1 + FIFO_STATUS2 regs */
4083 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_STATUS1, (uint8_t *)reg, 2);
4084 if (ret == 0)
4085 {
4086 *val = fifo_status2->fifo_ovr_ia;
4087 }
4088
4089 return ret;
4090 }
4091
4092 /**
4093 * @brief FIFO watermark status.[get]
4094 *
4095 * @param ctx Read / write interface definitions.(ptr)
4096 * @param val Read the values of fifo_wtm_ia in reg FIFO_STATUS2
4097 * @retval Interface status (MANDATORY: return 0 -> no Error).
4098 *
4099 */
asm330lhh_fifo_wtm_flag_get(const stmdev_ctx_t * ctx,uint8_t * val)4100 int32_t asm330lhh_fifo_wtm_flag_get(const stmdev_ctx_t *ctx, uint8_t *val)
4101 {
4102 uint8_t reg[2];
4103 asm330lhh_fifo_status2_t *fifo_status2 = (asm330lhh_fifo_status2_t *)®[1];
4104 int32_t ret;
4105
4106 /* read both FIFO_STATUS1 + FIFO_STATUS2 regs */
4107 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_STATUS1, (uint8_t *)reg, 2);
4108 if (ret == 0)
4109 {
4110 *val = fifo_status2->fifo_wtm_ia;
4111 }
4112
4113 return ret;
4114 }
4115
4116 /**
4117 * @brief Identifies the sensor in FIFO_DATA_OUT.[get]
4118 *
4119 * @param ctx Read / write interface definitions.(ptr)
4120 * @param val Change the values of tag_sensor in reg FIFO_DATA_OUT_TAG
4121 * @retval Interface status (MANDATORY: return 0 -> no Error).
4122 *
4123 */
asm330lhh_fifo_sensor_tag_get(const stmdev_ctx_t * ctx,asm330lhh_fifo_tag_t * val)4124 int32_t asm330lhh_fifo_sensor_tag_get(const stmdev_ctx_t *ctx,
4125 asm330lhh_fifo_tag_t *val)
4126 {
4127 asm330lhh_fifo_data_out_tag_t fifo_data_out_tag;
4128 int32_t ret;
4129
4130 ret = asm330lhh_read_reg(ctx, ASM330LHH_FIFO_DATA_OUT_TAG,
4131 (uint8_t *)&fifo_data_out_tag, 1);
4132
4133 switch (fifo_data_out_tag.tag_sensor)
4134 {
4135 case ASM330LHH_GYRO_NC_TAG:
4136 *val = ASM330LHH_GYRO_NC_TAG;
4137 break;
4138 case ASM330LHH_XL_NC_TAG:
4139 *val = ASM330LHH_XL_NC_TAG;
4140 break;
4141 case ASM330LHH_TEMPERATURE_TAG:
4142 *val = ASM330LHH_TEMPERATURE_TAG;
4143 break;
4144 case ASM330LHH_TIMESTAMP_TAG:
4145 *val = ASM330LHH_TIMESTAMP_TAG;
4146 break;
4147 case ASM330LHH_CFG_CHANGE_TAG:
4148 *val = ASM330LHH_CFG_CHANGE_TAG;
4149 break;
4150 default:
4151 *val = ASM330LHH_XL_NC_TAG;
4152 break;
4153 }
4154 return ret;
4155 }
4156
4157 /**
4158 * @}
4159 *
4160 */
4161
4162 /**
4163 * @defgroup ASM330LHH_DEN_functionality
4164 * @brief This section groups all the functions concerning
4165 * DEN functionality.
4166 * @{
4167 *
4168 */
4169
4170 /**
4171 * @brief DEN functionality marking mode.[set]
4172 *
4173 * @param ctx Read / write interface definitions.(ptr)
4174 * @param val Change the values of den_mode in reg CTRL6_C
4175 * @retval Interface status (MANDATORY: return 0 -> no Error).
4176 *
4177 */
asm330lhh_den_mode_set(const stmdev_ctx_t * ctx,asm330lhh_den_mode_t val)4178 int32_t asm330lhh_den_mode_set(const stmdev_ctx_t *ctx, asm330lhh_den_mode_t val)
4179 {
4180 asm330lhh_ctrl6_c_t ctrl6_c;
4181 int32_t ret;
4182
4183 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL6_C, (uint8_t *)&ctrl6_c, 1);
4184 if (ret == 0)
4185 {
4186 ctrl6_c.den_mode = (uint8_t)val;
4187 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL6_C, (uint8_t *)&ctrl6_c, 1);
4188 }
4189 return ret;
4190 }
4191
4192 /**
4193 * @brief DEN functionality marking mode.[get]
4194 *
4195 * @param ctx Read / write interface definitions.(ptr)
4196 * @param val Get the values of den_mode in reg CTRL6_C
4197 * @retval Interface status (MANDATORY: return 0 -> no Error).
4198 *
4199 */
asm330lhh_den_mode_get(const stmdev_ctx_t * ctx,asm330lhh_den_mode_t * val)4200 int32_t asm330lhh_den_mode_get(const stmdev_ctx_t *ctx,
4201 asm330lhh_den_mode_t *val)
4202 {
4203 asm330lhh_ctrl6_c_t ctrl6_c;
4204 int32_t ret;
4205
4206 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL6_C, (uint8_t *)&ctrl6_c, 1);
4207
4208 switch (ctrl6_c.den_mode)
4209 {
4210 case ASM330LHH_DEN_DISABLE:
4211 *val = ASM330LHH_DEN_DISABLE;
4212 break;
4213 case ASM330LHH_LEVEL_FIFO:
4214 *val = ASM330LHH_LEVEL_FIFO;
4215 break;
4216 case ASM330LHH_LEVEL_LETCHED:
4217 *val = ASM330LHH_LEVEL_LETCHED;
4218 break;
4219 case ASM330LHH_LEVEL_TRIGGER:
4220 *val = ASM330LHH_LEVEL_TRIGGER;
4221 break;
4222 case ASM330LHH_EDGE_TRIGGER:
4223 *val = ASM330LHH_EDGE_TRIGGER;
4224 break;
4225 default:
4226 *val = ASM330LHH_DEN_DISABLE;
4227 break;
4228 }
4229 return ret;
4230 }
4231
4232 /**
4233 * @brief DEN active level configuration.[set]
4234 *
4235 * @param ctx Read / write interface definitions.(ptr)
4236 * @param val Change the values of den_lh in reg CTRL9_XL
4237 * @retval Interface status (MANDATORY: return 0 -> no Error).
4238 *
4239 */
asm330lhh_den_polarity_set(const stmdev_ctx_t * ctx,asm330lhh_den_lh_t val)4240 int32_t asm330lhh_den_polarity_set(const stmdev_ctx_t *ctx,
4241 asm330lhh_den_lh_t val)
4242 {
4243 asm330lhh_ctrl9_xl_t ctrl9_xl;
4244 int32_t ret;
4245
4246 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL9_XL, (uint8_t *)&ctrl9_xl, 1);
4247 if (ret == 0)
4248 {
4249 ctrl9_xl.den_lh = (uint8_t)val;
4250 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL9_XL,
4251 (uint8_t *)&ctrl9_xl, 1);
4252 }
4253 return ret;
4254 }
4255
4256 /**
4257 * @brief DEN active level configuration.[get]
4258 *
4259 * @param ctx Read / write interface definitions.(ptr)
4260 * @param val Get the values of den_lh in reg CTRL9_XL
4261 * @retval Interface status (MANDATORY: return 0 -> no Error).
4262 *
4263 */
asm330lhh_den_polarity_get(const stmdev_ctx_t * ctx,asm330lhh_den_lh_t * val)4264 int32_t asm330lhh_den_polarity_get(const stmdev_ctx_t *ctx,
4265 asm330lhh_den_lh_t *val)
4266 {
4267 asm330lhh_ctrl9_xl_t ctrl9_xl;
4268 int32_t ret;
4269
4270 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL9_XL, (uint8_t *)&ctrl9_xl, 1);
4271
4272 switch (ctrl9_xl.den_lh)
4273 {
4274 case ASM330LHH_DEN_ACT_LOW:
4275 *val = ASM330LHH_DEN_ACT_LOW;
4276 break;
4277 case ASM330LHH_DEN_ACT_HIGH:
4278 *val = ASM330LHH_DEN_ACT_HIGH;
4279 break;
4280 default:
4281 *val = ASM330LHH_DEN_ACT_LOW;
4282 break;
4283 }
4284 return ret;
4285 }
4286
4287 /**
4288 * @brief DEN configuration.[set]
4289 *
4290 * @param ctx Read / write interface definitions.(ptr)
4291 * @param val Change the values of den_xl_g in reg CTRL9_XL
4292 * @retval Interface status (MANDATORY: return 0 -> no Error).
4293 *
4294 */
asm330lhh_den_enable_set(const stmdev_ctx_t * ctx,asm330lhh_den_xl_g_t val)4295 int32_t asm330lhh_den_enable_set(const stmdev_ctx_t *ctx,
4296 asm330lhh_den_xl_g_t val)
4297 {
4298 asm330lhh_ctrl9_xl_t ctrl9_xl;
4299 int32_t ret;
4300
4301 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL9_XL, (uint8_t *)&ctrl9_xl, 1);
4302 if (ret == 0)
4303 {
4304 ctrl9_xl.den_xl_g = (uint8_t)val;
4305 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL9_XL,
4306 (uint8_t *)&ctrl9_xl, 1);
4307 }
4308 return ret;
4309 }
4310
4311 /**
4312 * @brief DEN configuration.[get]
4313 *
4314 * @param ctx Read / write interface definitions.(ptr)
4315 * @param val Get the values of den_xl_g in reg CTRL9_XL
4316 * @retval Interface status (MANDATORY: return 0 -> no Error).
4317 *
4318 */
asm330lhh_den_enable_get(const stmdev_ctx_t * ctx,asm330lhh_den_xl_g_t * val)4319 int32_t asm330lhh_den_enable_get(const stmdev_ctx_t *ctx,
4320 asm330lhh_den_xl_g_t *val)
4321 {
4322 asm330lhh_ctrl9_xl_t ctrl9_xl;
4323 int32_t ret;
4324
4325 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL9_XL, (uint8_t *)&ctrl9_xl, 1);
4326
4327 switch (ctrl9_xl.den_xl_g)
4328 {
4329 case ASM330LHH_STAMP_IN_GY_DATA:
4330 *val = ASM330LHH_STAMP_IN_GY_DATA;
4331 break;
4332 case ASM330LHH_STAMP_IN_XL_DATA:
4333 *val = ASM330LHH_STAMP_IN_XL_DATA;
4334 break;
4335 case ASM330LHH_STAMP_IN_GY_XL_DATA:
4336 *val = ASM330LHH_STAMP_IN_GY_XL_DATA;
4337 break;
4338 default:
4339 *val = ASM330LHH_STAMP_IN_GY_DATA;
4340 break;
4341 }
4342 return ret;
4343 }
4344
4345 /**
4346 * @brief DEN value stored in LSB of X-axis.[set]
4347 *
4348 * @param ctx Read / write interface definitions.(ptr)
4349 * @param val Change the values of den_z in reg CTRL9_XL
4350 * @retval Interface status (MANDATORY: return 0 -> no Error).
4351 *
4352 */
asm330lhh_den_mark_axis_x_set(const stmdev_ctx_t * ctx,uint8_t val)4353 int32_t asm330lhh_den_mark_axis_x_set(const stmdev_ctx_t *ctx, uint8_t val)
4354 {
4355 asm330lhh_ctrl9_xl_t ctrl9_xl;
4356 int32_t ret;
4357
4358 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL9_XL, (uint8_t *)&ctrl9_xl, 1);
4359 if (ret == 0)
4360 {
4361 ctrl9_xl.den_z = (uint8_t)val;
4362 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL9_XL,
4363 (uint8_t *)&ctrl9_xl, 1);
4364 }
4365 return ret;
4366 }
4367
4368 /**
4369 * @brief DEN value stored in LSB of X-axis.[get]
4370 *
4371 * @param ctx Read / write interface definitions.(ptr)
4372 * @param val Change the values of den_z in reg CTRL9_XL
4373 * @retval Interface status (MANDATORY: return 0 -> no Error).
4374 *
4375 */
asm330lhh_den_mark_axis_x_get(const stmdev_ctx_t * ctx,uint8_t * val)4376 int32_t asm330lhh_den_mark_axis_x_get(const stmdev_ctx_t *ctx, uint8_t *val)
4377 {
4378 asm330lhh_ctrl9_xl_t ctrl9_xl;
4379 int32_t ret;
4380
4381 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL9_XL, (uint8_t *)&ctrl9_xl, 1);
4382 *val = ctrl9_xl.den_z;
4383
4384 return ret;
4385 }
4386
4387 /**
4388 * @brief DEN value stored in LSB of Y-axis.[set]
4389 *
4390 * @param ctx Read / write interface definitions.(ptr)
4391 * @param val Change the values of den_y in reg CTRL9_XL
4392 * @retval Interface status (MANDATORY: return 0 -> no Error).
4393 *
4394 */
asm330lhh_den_mark_axis_y_set(const stmdev_ctx_t * ctx,uint8_t val)4395 int32_t asm330lhh_den_mark_axis_y_set(const stmdev_ctx_t *ctx, uint8_t val)
4396 {
4397 asm330lhh_ctrl9_xl_t ctrl9_xl;
4398 int32_t ret;
4399
4400 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL9_XL, (uint8_t *)&ctrl9_xl, 1);
4401 if (ret == 0)
4402 {
4403 ctrl9_xl.den_y = (uint8_t)val;
4404 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL9_XL,
4405 (uint8_t *)&ctrl9_xl, 1);
4406 }
4407 return ret;
4408 }
4409
4410 /**
4411 * @brief DEN value stored in LSB of Y-axis.[get]
4412 *
4413 * @param ctx Read / write interface definitions.(ptr)
4414 * @param val Change the values of den_y in reg CTRL9_XL
4415 * @retval Interface status (MANDATORY: return 0 -> no Error).
4416 *
4417 */
asm330lhh_den_mark_axis_y_get(const stmdev_ctx_t * ctx,uint8_t * val)4418 int32_t asm330lhh_den_mark_axis_y_get(const stmdev_ctx_t *ctx, uint8_t *val)
4419 {
4420 asm330lhh_ctrl9_xl_t ctrl9_xl;
4421 int32_t ret;
4422
4423 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL9_XL, (uint8_t *)&ctrl9_xl, 1);
4424 *val = ctrl9_xl.den_y;
4425
4426 return ret;
4427 }
4428
4429 /**
4430 * @brief DEN value stored in LSB of Z-axis.[set]
4431 *
4432 * @param ctx Read / write interface definitions.(ptr)
4433 * @param val Change the values of den_x in reg CTRL9_XL
4434 * @retval Interface status (MANDATORY: return 0 -> no Error).
4435 *
4436 */
asm330lhh_den_mark_axis_z_set(const stmdev_ctx_t * ctx,uint8_t val)4437 int32_t asm330lhh_den_mark_axis_z_set(const stmdev_ctx_t *ctx, uint8_t val)
4438 {
4439 asm330lhh_ctrl9_xl_t ctrl9_xl;
4440 int32_t ret;
4441
4442 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL9_XL, (uint8_t *)&ctrl9_xl, 1);
4443 if (ret == 0)
4444 {
4445 ctrl9_xl.den_x = (uint8_t)val;
4446 ret = asm330lhh_write_reg(ctx, ASM330LHH_CTRL9_XL, (uint8_t *)&ctrl9_xl, 1);
4447 }
4448 return ret;
4449 }
4450
4451 /**
4452 * @brief DEN value stored in LSB of Z-axis.[get]
4453 *
4454 * @param ctx Read / write interface definitions.(ptr)
4455 * @param val Change the values of den_x in reg CTRL9_XL
4456 * @retval Interface status (MANDATORY: return 0 -> no Error).
4457 *
4458 */
asm330lhh_den_mark_axis_z_get(const stmdev_ctx_t * ctx,uint8_t * val)4459 int32_t asm330lhh_den_mark_axis_z_get(const stmdev_ctx_t *ctx, uint8_t *val)
4460 {
4461 asm330lhh_ctrl9_xl_t ctrl9_xl;
4462 int32_t ret;
4463
4464 ret = asm330lhh_read_reg(ctx, ASM330LHH_CTRL9_XL, (uint8_t *)&ctrl9_xl, 1);
4465 *val = ctrl9_xl.den_x;
4466
4467 return ret;
4468 }
4469
4470 /**
4471 * @}
4472 *
4473 */
4474
4475 /**
4476 * @}
4477 *
4478 */
4479
4480 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
4481
