1 /*
2  * SPDX-FileCopyrightText: Copyright 2010-2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Licensed under the Apache License, Version 2.0 (the License); you may
7  * not use this file except in compliance with the License.
8  * You may obtain a copy of the License at
9  *
10  * www.apache.org/licenses/LICENSE-2.0
11  *
12  * Unless required by applicable law or agreed to in writing, software
13  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
14  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15  * See the License for the specific language governing permissions and
16  * limitations under the License.
17  */
18 
19 /* ----------------------------------------------------------------------
20  * Project:      CMSIS NN Library
21  * Title:        arm_relu_q15.c
22  * Description:  Q15 version of ReLU
23  *
24  * $Date:        31 January 2023
25  * $Revision:    V.1.1.1
26  *
27  * Target :  Arm(R) M-Profile Architecture
28  *
29  * -------------------------------------------------------------------- */
30 
31 #include "arm_nnfunctions.h"
32 #include "arm_nnsupportfunctions.h"
33 
34 /**
35  *  @ingroup Public
36  */
37 
38 /**
39  * @addtogroup Acti
40  * @{
41  */
42 
43 /*
44  * Q15 ReLu function
45  *
46  * Refer header file for details.
47  *
48  */
49 
arm_relu_q15(int16_t * data,uint16_t size)50 void arm_relu_q15(int16_t *data, uint16_t size)
51 {
52 
53 #if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI)
54     /* Run the following code for M cores with DSP extension */
55 
56     uint16_t i = size >> 1;
57     int16_t *input = data;
58     int16_t *output = data;
59     int32_t in;
60     int32_t buf;
61     int32_t mask;
62 
63     while (i)
64     {
65         in = arm_nn_read_q15x2_ia((const int16_t **)&input);
66 
67         /* extract the first bit */
68         buf = ROR(in & 0x80008000, 15);
69 
70         /* if MSB=1, mask will be 0xFF, 0x0 otherwise */
71         mask = QSUB16(0x00000000, buf);
72 
73         arm_nn_write_q15x2_ia(&output, in & (~mask));
74         i--;
75     }
76 
77     if (size & 0x1)
78     {
79         if (*input < 0)
80         {
81             *input = 0;
82         }
83         input++;
84     }
85 #else
86     /* Run the following code as reference implementation for M cores without DSP extension */
87     uint16_t i;
88 
89     for (i = 0; i < size; i++)
90     {
91         if (data[i] < 0)
92             data[i] = 0;
93     }
94 
95 #endif /* ARM_MATH_DSP */
96 }
97 
98 /**
99  * @} end of Acti group
100  */
101