1 /* ----------------------------------------------------------------------
2 * Project: CMSIS DSP Library
3 * Title: arm_biquad_cascade_df1_init_f32.c
4 * Description: Floating-point Biquad cascade DirectFormI(DF1) filter initialization function
5 *
6 * $Date: 23 April 2021
7 * $Revision: V1.9.0
8 *
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
11 /*
12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
13 *
14 * SPDX-License-Identifier: Apache-2.0
15 *
16 * Licensed under the Apache License, Version 2.0 (the License); you may
17 * not use this file except in compliance with the License.
18 * You may obtain a copy of the License at
19 *
20 * www.apache.org/licenses/LICENSE-2.0
21 *
22 * Unless required by applicable law or agreed to in writing, software
23 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25 * See the License for the specific language governing permissions and
26 * limitations under the License.
27 */
28
29 #include "dsp/filtering_functions.h"
30
31 /**
32 @ingroup groupFilters
33 */
34
35 /**
36 @addtogroup BiquadCascadeDF1
37 @{
38 */
39
40 /**
41 @brief Initialization function for the floating-point Biquad cascade filter.
42 @param[in,out] S points to an instance of the floating-point Biquad cascade structure.
43 @param[in] numStages number of 2nd order stages in the filter.
44 @param[in] pCoeffs points to the filter coefficients.
45 @param[in] pState points to the state buffer.
46 @return none
47
48 @par Coefficient and State Ordering
49 The coefficients are stored in the array <code>pCoeffs</code> in the following order:
50 <pre>
51 {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
52 </pre>
53
54 @par
55 where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
56 <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
57 and so on. The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
58 @par
59 The <code>pState</code> is a pointer to state array.
60 Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
61 The state variables are arranged in the <code>pState</code> array as:
62 <pre>
63 {x[n-1], x[n-2], y[n-1], y[n-2]}
64 </pre>
65 The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
66 The state array has a total length of <code>4*numStages</code> values.
67 The state variables are updated after each block of data is processed; the coefficients are untouched.
68
69 @par For MVE code, an additional buffer of modified coefficients is required.
70 Its size is numStages and each element of this buffer has type arm_biquad_mod_coef_f32.
71 So, its total size is 32*numStages float32_t elements.
72
73 The initialization function which must be used is arm_biquad_cascade_df1_mve_init_f32.
74 */
75
76
arm_biquad_cascade_df1_init_f32(arm_biquad_casd_df1_inst_f32 * S,uint8_t numStages,const float32_t * pCoeffs,float32_t * pState)77 void arm_biquad_cascade_df1_init_f32(
78 arm_biquad_casd_df1_inst_f32 * S,
79 uint8_t numStages,
80 const float32_t * pCoeffs,
81 float32_t * pState)
82 {
83 /* Assign filter stages */
84 S->numStages = numStages;
85
86 /* Assign coefficient pointer */
87 S->pCoeffs = pCoeffs;
88
89 /* Clear state buffer and size is always 4 * numStages */
90 memset(pState, 0, (4U * (uint32_t) numStages) * sizeof(float32_t));
91
92 /* Assign state pointer */
93 S->pState = pState;
94 }
95
96
97 #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
98
generateCoefsFastBiquadF32(float32_t b0,float32_t b1,float32_t b2,float32_t a1,float32_t a2,arm_biquad_mod_coef_f32 * newCoef)99 static void generateCoefsFastBiquadF32(float32_t b0, float32_t b1, float32_t b2, float32_t a1, float32_t a2,
100 arm_biquad_mod_coef_f32 * newCoef)
101 {
102 float32_t coeffs[4][8] = {
103 {0, 0, 0, b0, b1, b2, a1, a2},
104 {0, 0, b0, b1, b2, 0, a2, 0},
105 {0, b0, b1, b2, 0, 0, 0, 0},
106 {b0, b1, b2, 0, 0, 0, 0, 0},
107 };
108
109 for (int i = 0; i < 8; i++)
110 {
111 coeffs[1][i] += a1 * coeffs[0][i];
112 coeffs[2][i] += a1 * coeffs[1][i] + a2 * coeffs[0][i];
113 coeffs[3][i] += a1 * coeffs[2][i] + a2 * coeffs[1][i];
114
115 /*
116 * transpose
117 */
118 newCoef->coeffs[i][0] = (float32_t) coeffs[0][i];
119 newCoef->coeffs[i][1] = (float32_t) coeffs[1][i];
120 newCoef->coeffs[i][2] = (float32_t) coeffs[2][i];
121 newCoef->coeffs[i][3] = (float32_t) coeffs[3][i];
122 }
123 }
124
arm_biquad_cascade_df1_mve_init_f32(arm_biquad_casd_df1_inst_f32 * S,uint8_t numStages,const float32_t * pCoeffs,arm_biquad_mod_coef_f32 * pCoeffsMod,float32_t * pState)125 void arm_biquad_cascade_df1_mve_init_f32(
126 arm_biquad_casd_df1_inst_f32 * S,
127 uint8_t numStages,
128 const float32_t * pCoeffs,
129 arm_biquad_mod_coef_f32 * pCoeffsMod,
130 float32_t * pState)
131 {
132 arm_biquad_cascade_df1_init_f32(S, numStages, (float32_t *)pCoeffsMod, pState);
133
134 /* Generate SIMD friendly modified coefs */
135 for (int i = 0; i < numStages; i++)
136 {
137 generateCoefsFastBiquadF32(pCoeffs[0], pCoeffs[1], pCoeffs[2], pCoeffs[3], pCoeffs[4], pCoeffsMod);
138 pCoeffs += 5;
139 pCoeffsMod++;
140 }
141 }
142 #endif
143
144 /**
145 @} end of BiquadCascadeDF1 group
146 */
147
