1 /* 2 * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 static uint32_t arisc_core_off[] = { 8 0x18600000, /* l.movhi r3, <corenr> */ 9 0x18000000, /* l.movhi r0, 0x0 */ 10 0x19a00170, /* l.movhi r13, 0x170 */ 11 0x84ad0030, /* l.lwz r5, 0x30(r13) */ 12 0xe0a51803, /* l.and r5, r5, r3 */ 13 0xe4050000, /* l.sfeq r5, r0 */ 14 0x13fffffd, /* l.bf -12 */ 15 16 0xb8c30050, /* l.srli r6, r3, 16 */ 17 0xbc060001, /* l.sfeqi r6, 1 */ 18 0x10000005, /* l.bf +20 */ 19 0x19a001f0, /* l.movhi r13, 0x1f0 */ 20 0x84ad1500, /* l.lwz r5, 0x1500(r13) */ 21 0xe0a53004, /* l.or r5, r5, r6 */ 22 0xd44d2d00, /* l.sw 0x1500(r13), r5 */ 23 24 0x84ad1c30, /* l.lwz r5, 0x1c30(r13) */ 25 0xacc6ffff, /* l.xori r6, r6, -1 */ 26 0xe0a53003, /* l.and r5, r5, r6 */ 27 0xd46d2c30, /* l.sw 0x1c30(r13), r5 */ 28 29 0xe0c3000f, /* l.ff1 r6, r3 */ 30 0x9cc6ffef, /* l.addi r6, r6, -17 */ 31 0xb8c60002, /* l.slli r6, r6, 2 */ 32 0xe0c66800, /* l.add r6, r6, r13 */ 33 0xa8a000ff, /* l.ori r5, r0, 0xff */ 34 0xd4462d40, /* l.sw 0x1540(r6), r5 */ 35 36 0xd46d0400, /* l.sw 0x1c00(r13), r0 */ 37 0x03ffffff, /* l.j -1 */ 38 0x15000000, /* l.nop */ 39 }; 40
