1 /******************************************************************************
2 * *
3 * License Agreement *
4 * *
5 * Copyright (c) 2015 Altera Corporation, San Jose, California, USA. *
6 * All rights reserved. *
7 * *
8 * Permission is hereby granted, free of charge, to any person obtaining a *
9 * copy of this software and associated documentation files (the "Software"), *
10 * to deal in the Software without restriction, including without limitation *
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense, *
12 * and/or sell copies of the Software, and to permit persons to whom the *
13 * Software is furnished to do so, subject to the following conditions: *
14 * *
15 * The above copyright notice and this permission notice shall be included in *
16 * all copies or substantial portions of the Software. *
17 * *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR *
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, *
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE *
21 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER *
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING *
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER *
24 * DEALINGS IN THE SOFTWARE. *
25 * *
26 * *
27 ******************************************************************************/
28
29
30 #include <errno.h>
31 #include <io.h>
32 #include <string.h>
33 #include <stddef.h>
34 #include "sys/param.h"
35 #include "alt_types.h"
36 #include "altera_generic_quad_spi_controller2_regs.h"
37 #include "altera_generic_quad_spi_controller2.h"
38 #include "priv/alt_busy_sleep.h"
39 #include "sys/alt_debug.h"
40 #include "sys/alt_cache.h"
41
42 ALT_INLINE alt_32 static alt_qspi_validate_read_write_arguments(alt_qspi_controller2_dev *flash_info,alt_u32 offset, alt_u32 length);
43 alt_32 static alt_qspi_poll_for_write_in_progress(alt_qspi_controller2_dev* qspi_flash_info);
44
45
46 /*
47 * Public API
48 *
49 * Refer to “Using Flash Devices” in the
50 * Developing Programs Using the Hardware Abstraction Layer chapter
51 * of the Nios II Software Developer’s Handbook.
52 */
53
54
55 /**
56 * alt_qspi_controller2_lock
57 *
58 * Locks the range of the memory sectors, which
59 * protected from write and erase.
60 *
61 * Arguments:
62 * - *flash_info: Pointer to general flash device structure.
63 * - sectors_to_lock: Block protection bits in EPCQ/QSPI ==> Bit4 | Bit3 | Bit2 | Bit1 | Bit0
64 * TB | BP3 | BP2 | BP1 | BP0
65 * For details of setting sectors protection, please refer to EPCQ/QSPI datasheet.
66 *
67 * Returns:
68 * 0 -> success
69 * -EINVAL -> Invalid arguments
70 * -ETIME -> Time out and skipping the looping after 0.7 sec.
71 * -ENOLCK -> Sectors lock failed.
72 **/
73
alt_qspi_controller2_lock(alt_flash_dev * flash_info,alt_u32 sectors_to_lock)74 int alt_qspi_controller2_lock(alt_flash_dev *flash_info, alt_u32 sectors_to_lock)
75
76 {
77
78 alt_u32 mem_op_value = 0; /* value to write to EPCQ_MEM_OP register */
79
80 alt_qspi_controller2_dev* qspi_flash_info = NULL;
81
82 alt_u32 result = 0;
83
84 alt_32 status = 0;
85
86
87
88 /* return -EINVAL if flash_info is NULL */
89
90 if(NULL == flash_info || 0 > sectors_to_lock)
91
92 {
93
94 return -EINVAL;
95
96 }
97
98
99
100 qspi_flash_info = (alt_qspi_controller2_dev*)flash_info;
101
102
103
104 /* sector value should occupy bits 17:8 */
105
106 mem_op_value = sectors_to_lock << 8;
107
108
109
110 /* sector protect commands 0b11 occupies lower 2 bits */
111
112 mem_op_value |= ALTERA_QSPI_CONTROLLER2_MEM_OP_SECTOR_PROTECT_CMD;
113
114
115
116 /* write sector protect command to QSPI_MEM_OP register to protect sectors */
117
118 IOWR_ALTERA_QSPI_CONTROLLER2_MEM_OP(qspi_flash_info->csr_base, mem_op_value);
119
120
121
122 /* poll write in progress to make sure no operation is in progress */
123
124 status = alt_qspi_poll_for_write_in_progress(qspi_flash_info);
125
126 if(status != 0)
127
128 {
129
130 return status;
131
132 }
133
134
135
136 status = IORD_ALTERA_QSPI_CONTROLLER2_STATUS(qspi_flash_info->csr_base);
137
138 result |= (status >> 2) & 0x07; /* extract out BP3 - BP0 */
139
140 result |= (status >> 3) & 0x08; /* extract out BP4 */
141
142 result |= (status >> 1) & 0x10; /* extract out TOP/BOTTOM bit */
143
144
145
146 if(result != sectors_to_lock)
147
148 {
149
150 return -ENOLCK;
151
152 }
153
154
155
156 return 0;
157
158 }
159
160
161
162 /**
163
164 * alt_qspi_controller2_get_info
165
166 *
167
168 * Pass the table of erase blocks to the user. This flash will return a single
169
170 * flash_region that gives the number and size of sectors for the device used.
171
172 *
173
174 * Arguments:
175
176 * - *fd: Pointer to general flash device structure.
177
178 * - **info: Pointer to flash region
179
180 * - *number_of_regions: Pointer to number of regions
181
182 *
183
184 * For details of setting sectors protection, please refer to EPCQ/QSPI datasheet.
185
186 *
187
188 * Returns:
189
190 * 0 -> success
191
192 * -EINVAL -> Invalid arguments
193
194 * -EIO -> Could be hardware problem.
195
196 **/
197
alt_qspi_controller2_get_info(alt_flash_fd * fd,flash_region ** info,int * number_of_regions)198 int alt_qspi_controller2_get_info
199
200 (
201
202 alt_flash_fd *fd, /** flash device descriptor */
203
204 flash_region **info, /** pointer to flash_region will be stored here */
205
206 int *number_of_regions /** number of regions will be stored here */
207
208 )
209
210 {
211
212 alt_flash_dev* flash = NULL;
213
214
215
216 /* return -EINVAL if fd,info and number_of_regions are NULL */
217
218 if(NULL == fd || NULL == info || NULL == number_of_regions)
219
220 {
221
222 return -EINVAL;
223
224 }
225
226
227
228 flash = (alt_flash_dev*)fd;
229
230
231
232 *number_of_regions = flash->number_of_regions;
233
234
235
236 if (!flash->number_of_regions)
237
238 {
239
240 return -EIO;
241
242 }
243
244 else
245
246 {
247
248 *info = &flash->region_info[0];
249
250 }
251
252
253
254 return 0;
255
256 }
257
258
259
260 /**
261
262 * alt_qspi_controller2_erase_block
263
264 *
265
266 * This function erases a single flash sector.
267
268 *
269
270 * Arguments:
271
272 * - *flash_info: Pointer to QSPI flash device structure.
273
274 * - block_offset: byte-addressed offset, from start of flash, of the sector to be erased
275
276 *
277
278 * Returns:
279
280 * 0 -> success
281
282 * -EINVAL -> Invalid arguments
283
284 * -EIO -> write failed, sector might be protected
285
286 **/
287
alt_qspi_controller2_erase_block(alt_flash_dev * flash_info,int block_offset)288 int alt_qspi_controller2_erase_block(alt_flash_dev *flash_info, int block_offset)
289
290 {
291
292 alt_32 ret_code = 0;
293
294 alt_u32 mem_op_value = 0; /* value to write to EPCQ_MEM_OP register */
295
296 alt_qspi_controller2_dev* qspi_flash_info = NULL;
297
298 alt_u32 sector_number = 0;
299
300
301
302 /* return -EINVAL if flash_info is NULL */
303
304 if(NULL == flash_info)
305
306 {
307
308 return -EINVAL;
309
310 }
311
312
313
314 qspi_flash_info = (alt_qspi_controller2_dev*)flash_info;
315
316
317
318 /*
319
320 * Sanity checks that block_offset is within the flash memory span and that the
321
322 * block offset is sector aligned.
323
324 *
325
326 */
327
328 if((block_offset < 0)
329
330 || (block_offset >= qspi_flash_info->size_in_bytes)
331
332 || (block_offset & (qspi_flash_info->sector_size - 1)) != 0)
333
334 {
335
336 return -EINVAL;
337
338 }
339
340
341
342 /* calculate current sector/block number */
343
344 sector_number = (block_offset/(qspi_flash_info->sector_size));
345
346
347
348 /* sector value should occupy bits 23:8 */
349
350 mem_op_value = (sector_number << 8) & ALTERA_QSPI_CONTROLLER2_MEM_OP_SECTOR_VALUE_MASK;
351
352
353
354 /* sector erase commands 0b10 occupies lower 2 bits */
355
356 mem_op_value |= ALTERA_QSPI_CONTROLLER2_MEM_OP_SECTOR_ERASE_CMD;
357
358
359
360 /* write sector erase command to QSPI_MEM_OP register to erase sector "sector_number" */
361
362 IOWR_ALTERA_QSPI_CONTROLLER2_MEM_OP(qspi_flash_info->csr_base, mem_op_value);
363
364
365
366 /* check whether erase triggered a illegal erase interrupt */
367
368 if((IORD_ALTERA_QSPI_CONTROLLER2_ISR(qspi_flash_info->csr_base) &
369
370 ALTERA_QSPI_CONTROLLER2_ISR_ILLEGAL_ERASE_MASK) ==
371
372 ALTERA_QSPI_CONTROLLER2_ISR_ILLEGAL_ERASE_ACTIVE)
373
374 {
375
376 /* clear register */
377
378 /* QSPI_ISR access is write one to clear (W1C) */
379
380 IOWR_ALTERA_QSPI_CONTROLLER2_ISR(qspi_flash_info->csr_base,
381
382 ALTERA_QSPI_CONTROLLER2_ISR_ILLEGAL_ERASE_MASK );
383
384 return -EIO; /* erase failed, sector might be protected */
385
386 }
387
388
389
390 return ret_code;
391
392 }
393
394
395
396 /**
397
398 * alt_qspi_controller2_write_block
399
400 *
401
402 * This function writes one block/sector of data to flash. The length of the write can NOT
403
404 * spill into the adjacent sector.
405
406 *
407
408 * It assumes that someone has already erased the appropriate sector(s).
409
410 *
411
412 * Arguments:
413
414 * - *flash_info: Pointer to QSPI flash device structure.
415
416 * - block_offset: byte-addressed offset, from the start of flash, of the sector to written to
417
418 * - data-offset: Byte offset (unaligned access) of write into flash memory.
419
420 * For best performance, word(32 bits - aligned access) offset of write is recommended.
421
422 * - *src_addr: source buffer
423
424 * - length: size of writing
425
426 *
427
428 * Returns:
429
430 * 0 -> success
431
432 * -EINVAL -> Invalid arguments
433
434 * -EIO -> write failed, sector might be protected
435
436 **/
437
alt_qspi_controller2_write_block(alt_flash_dev * flash_info,int block_offset,int data_offset,const void * data,int length)438 int alt_qspi_controller2_write_block
439
440 (
441
442 alt_flash_dev *flash_info, /** flash device info */
443
444 int block_offset, /** sector/block offset in byte addressing */
445
446 int data_offset, /** offset of write from base address */
447
448 const void *data, /** data to be written */
449
450 int length /** bytes of data to be written, >0 */
451
452 )
453
454 {
455
456 alt_u32 buffer_offset = 0; /** offset into data buffer to get write data */
457
458 alt_u32 remaining_length = length; /** length left to write */
459
460 alt_u32 write_offset = data_offset; /** offset into flash to write too */
461
462
463
464 alt_qspi_controller2_dev *qspi_flash_info = (alt_qspi_controller2_dev*)flash_info;
465
466
467
468 /*
469
470 * Sanity checks that data offset is not larger then a sector, that block offset is
471
472 * sector aligned and within the valid flash memory range and a write doesn't spill into
473
474 * the adjacent flash sector.
475
476 */
477
478 if(block_offset < 0
479
480 || data_offset < 0
481
482 || NULL == flash_info
483
484 || NULL == data
485
486 || data_offset >= qspi_flash_info->size_in_bytes
487
488 || block_offset >= qspi_flash_info->size_in_bytes
489
490 || length > (qspi_flash_info->sector_size - (data_offset - block_offset))
491
492 || length < 0
493
494 || (block_offset & (qspi_flash_info->sector_size - 1)) != 0)
495
496 {
497
498 return -EINVAL;
499
500 }
501
502
503
504 /*
505
506 * Do writes one 32-bit word at a time.
507
508 * We need to make sure that we pad the first few bytes so they're word aligned if they are
509
510 * not already.
511
512 */
513
514 while (remaining_length > 0)
515
516 {
517
518 alt_u32 word_to_write = 0xFFFFFFFF; /** initialize word to write to blank word */
519
520 alt_u32 padding = 0; /** bytes to pad the next word that is written */
521
522 alt_u32 bytes_to_copy = sizeof(alt_u32); /** number of bytes from source to copy */
523
524
525
526 /*
527
528 * we need to make sure the write is word aligned
529
530 * this should only be true at most 1 time
531
532 */
533
534 if (0 != (write_offset & (sizeof(alt_u32) - 1)))
535
536 {
537
538 /*
539
540 * data is not word aligned
541
542 * calculate padding bytes need to add before start of a data offset
543
544 */
545
546 padding = write_offset & (sizeof(alt_u32) - 1);
547
548
549
550 /* update variables to account for padding being added */
551
552 bytes_to_copy -= padding;
553
554
555
556 if(bytes_to_copy > remaining_length)
557
558 {
559
560 bytes_to_copy = remaining_length;
561
562 }
563
564
565
566 write_offset = write_offset - padding;
567
568 if(0 != (write_offset & (sizeof(alt_u32) - 1)))
569
570 {
571
572 return -EINVAL;
573
574 }
575
576 }
577
578 else
579
580 {
581
582 if(bytes_to_copy > remaining_length)
583
584 {
585
586 bytes_to_copy = remaining_length;
587
588 }
589
590 }
591
592
593
594 /* prepare the word to be written */
595
596 memcpy((((void*)&word_to_write)) + padding, ((void*)data) + buffer_offset, bytes_to_copy);
597
598
599
600 /* update offset and length variables */
601
602 buffer_offset += bytes_to_copy;
603
604 remaining_length -= bytes_to_copy;
605
606
607
608 /* write to flash 32 bits at a time */
609
610 IOWR_32DIRECT(qspi_flash_info->data_base, write_offset, word_to_write);
611
612
613
614 /* check whether write triggered a illegal write interrupt */
615
616 if((IORD_ALTERA_QSPI_CONTROLLER2_ISR(qspi_flash_info->csr_base) &
617
618 ALTERA_QSPI_CONTROLLER2_ISR_ILLEGAL_WRITE_MASK) ==
619
620 ALTERA_QSPI_CONTROLLER2_ISR_ILLEGAL_WRITE_ACTIVE)
621
622 {
623
624 /* clear register */
625
626 IOWR_ALTERA_QSPI_CONTROLLER2_ISR(qspi_flash_info->csr_base,
627
628 ALTERA_QSPI_CONTROLLER2_ISR_ILLEGAL_WRITE_MASK );
629
630 return -EIO; /** write failed, sector might be protected */
631
632 }
633
634
635
636 /* update current offset */
637
638 write_offset = write_offset + sizeof(alt_u32);
639
640 }
641
642
643
644 return 0;
645
646 }
647
648
649
650 /**
651
652 * alt_qspi_controller2_write
653
654 *
655
656 * Program the data into the flash at the selected address.
657
658 *
659
660 * The different between this function and alt_qspi_controller2_write_block function
661
662 * is that this function (alt_qspi_controller2_write) will automatically erase a block as needed
663
664 * Arguments:
665
666 * - *flash_info: Pointer to QSPI flash device structure.
667
668 * - offset: Byte offset (unaligned access) of write to flash memory. For best performance,
669
670 * word(32 bits - aligned access) offset of write is recommended.
671
672 * - *src_addr: source buffer
673
674 * - length: size of writing
675
676 *
677
678 * Returns:
679
680 * 0 -> success
681
682 * -EINVAL -> Invalid arguments
683
684 * -EIO -> write failed, sector might be protected
685
686 *
687
688 **/
689
alt_qspi_controller2_write(alt_flash_dev * flash_info,int offset,const void * src_addr,int length)690 int alt_qspi_controller2_write(
691
692 alt_flash_dev *flash_info, /** device info */
693
694 int offset, /** offset of write from base address */
695
696 const void *src_addr, /** source buffer */
697
698 int length /** size of writing */
699
700 )
701
702 {
703
704 alt_32 ret_code = 0;
705
706
707
708 alt_qspi_controller2_dev *qspi_flash_info = NULL;
709
710
711
712 alt_u32 write_offset = offset; /** address of next byte to write */
713
714 alt_u32 remaining_length = length; /** length of write data left to be written */
715
716 alt_u32 buffer_offset = 0; /** offset into source buffer to get write data */
717
718 alt_u32 i = 0;
719
720
721
722 /* return -EINVAL if flash_info and src_addr are NULL */
723
724 if(NULL == flash_info || NULL == src_addr)
725
726 {
727
728 return -EINVAL;
729
730 }
731
732
733
734 qspi_flash_info = (alt_qspi_controller2_dev*)flash_info;
735
736
737
738 /* make sure the write parameters are within the bounds of the flash */
739
740 ret_code = alt_qspi_validate_read_write_arguments(qspi_flash_info, offset, length);
741
742
743
744 if(0 != ret_code)
745
746 {
747
748 return ret_code;
749
750 }
751
752
753
754 /*
755
756 * This loop erases and writes data one sector at a time. We check for write completion
757
758 * before starting the next sector.
759
760 */
761
762 for(i = offset/qspi_flash_info->sector_size ; i < qspi_flash_info->number_of_sectors; i++)
763
764 {
765
766 alt_u32 block_offset = 0; /** block offset in byte addressing */
767
768 alt_u32 offset_within_current_sector = 0; /** offset into current sector to write */
769
770 alt_u32 length_to_write = 0; /** length to write to current sector */
771
772
773
774 if(0 >= remaining_length)
775
776 {
777
778 break; /* out of data to write */
779
780 }
781
782
783
784 /* calculate current sector/block offset in byte addressing */
785
786 block_offset = write_offset & ~(qspi_flash_info->sector_size - 1);
787
788
789
790 /* calculate offset into sector/block if there is one */
791
792 if(block_offset != write_offset)
793
794 {
795
796 offset_within_current_sector = write_offset - block_offset;
797
798 }
799
800
801
802 /* erase sector */
803
804 ret_code = alt_qspi_controller2_erase_block(flash_info, block_offset);
805
806
807
808 if(0 != ret_code)
809
810 {
811
812 return ret_code;
813
814 }
815
816
817
818 /* calculate the byte size of data to be written in a sector */
819
820 length_to_write = MIN(qspi_flash_info->sector_size - offset_within_current_sector,
821
822 remaining_length);
823
824
825
826 /* write data to erased block */
827
828 ret_code = alt_qspi_controller2_write_block(flash_info, block_offset, write_offset,
829
830 src_addr + buffer_offset, length_to_write);
831
832
833
834
835
836 if(0 != ret_code)
837
838 {
839
840 return ret_code;
841
842 }
843
844
845
846 /* update remaining length and buffer_offset pointer */
847
848 remaining_length -= length_to_write;
849
850 buffer_offset += length_to_write;
851
852 write_offset += length_to_write;
853
854 }
855
856
857
858 return ret_code;
859
860 }
861
862
863
864 /**
865
866 * alt_qspi_controller2_read
867
868 *
869
870 * There's no real need to use this function as opposed to using memcpy directly. It does
871
872 * do some sanity checks on the bounds of the read.
873
874 *
875
876 * Arguments:
877
878 * - *flash_info: Pointer to general flash device structure.
879
880 * - offset: offset read from flash memory.
881
882 * - *dest_addr: destination buffer
883
884 * - length: size of reading
885
886 *
887
888 * Returns:
889
890 * 0 -> success
891
892 * -EINVAL -> Invalid arguments
893
894 **/
895
alt_qspi_controller2_read(alt_flash_dev * flash_info,int offset,void * dest_addr,int length)896 int alt_qspi_controller2_read
897
898 (
899
900 alt_flash_dev *flash_info, /** device info */
901
902 int offset, /** offset of read from base address */
903
904 void *dest_addr, /** destination buffer */
905
906 int length /** size of read */
907
908 )
909
910 {
911
912 alt_32 ret_code = 0;
913
914 alt_qspi_controller2_dev *qspi_flash_info = NULL;
915
916
917
918 /* return -EINVAL if flash_info and dest_addr are NULL */
919
920 if(NULL == flash_info || NULL == dest_addr)
921
922 {
923
924 return -EINVAL;
925
926 }
927
928
929
930 qspi_flash_info = (alt_qspi_controller2_dev*)flash_info;
931
932
933
934 /* validate arguments */
935
936 ret_code = alt_qspi_validate_read_write_arguments(qspi_flash_info, offset, length);
937
938
939
940 /* copy data from flash to destination address */
941
942 if(0 == ret_code)
943
944 {
945
946 memcpy(dest_addr, (alt_u8*)qspi_flash_info->data_base + offset, length);
947
948 }
949
950
951
952 return ret_code;
953
954 }
955
956
957
958 /**
959
960 * altera_qspi_controller2_init
961
962 *
963
964 * alt_sys_init.c will call this function automatically through macro
965
966 *
967
968 * Information in system.h is checked against expected values that are determined by the silicon_id.
969
970 * If the information doesn't match then this system is configured incorrectly. Most likely the wrong
971
972 * type of EPCS or EPCQ/QSPI device was selected when instantiating the soft IP.
973
974 *
975
976 * Arguments:
977
978 * - *flash: Pointer to QSPI flash device structure.
979
980 *
981
982 * Returns:
983
984 * 0 -> success
985
986 * -EINVAL -> Invalid arguments.
987
988 * -ENODEV -> System is configured incorrectly.
989
990 **/
991
altera_qspi_controller2_init(alt_qspi_controller2_dev * flash)992 alt_32 altera_qspi_controller2_init(alt_qspi_controller2_dev *flash)
993
994 {
995
996 alt_u32 silicon_id = 0;
997
998 alt_u32 size_in_bytes = 0;
999
1000 alt_u32 number_of_sectors = 0;
1001
1002
1003
1004 /* return -EINVAL if flash is NULL */
1005
1006 if(NULL == flash)
1007
1008 {
1009
1010 return -EINVAL;
1011
1012 }
1013
1014
1015
1016 /* return -ENODEV if CSR slave is not attached */
1017
1018 if(NULL == (void *)flash->csr_base)
1019
1020 {
1021
1022 return -ENODEV;
1023
1024 }
1025
1026
1027
1028
1029
1030 /*
1031
1032 * If flash is an EPCQ/QSPI device, we read the QSPI_RD_RDID register for the ID
1033
1034 * If flash is an EPCS device, we read the QSPI_RD_SID register for the ID
1035
1036 *
1037
1038 * Whether or not the flash is a EPCQ, QSPI or EPCS is indicated in the system.h. The system.h gets
1039
1040 * this value from the hw.tcl of the IP. If this value is set incorrectly, then things will go
1041
1042 * badly.
1043
1044 *
1045
1046 * In both cases, we can determine the number of sectors, which we can use
1047
1048 * to calculate a size. We compare that size to the system.h value to make sure
1049
1050 * the QSPI soft IP was configured correctly.
1051
1052 */
1053
1054 if(0 == flash->is_epcs)
1055
1056 {
1057
1058 /* If we're an EPCQ or QSPI, we read QSPI_RD_RDID for the silicon ID */
1059
1060 silicon_id = IORD_ALTERA_QSPI_CONTROLLER2_RDID(flash->csr_base);
1061
1062 silicon_id &= ALTERA_QSPI_CONTROLLER2_RDID_MASK;
1063
1064
1065
1066 /* Determine which EPCQ/QSPI device so we can figure out the number of sectors */
1067
1068 /*EPCQ and QSPI share the same ID for the same capacity*/
1069
1070 switch(silicon_id)
1071
1072 {
1073
1074 case ALTERA_QSPI_CONTROLLER2_RDID_QSPI16:
1075
1076 {
1077
1078 number_of_sectors = 32;
1079
1080 break;
1081
1082 }
1083
1084 case ALTERA_QSPI_CONTROLLER2_RDID_QSPI32:
1085
1086 {
1087
1088 number_of_sectors = 64;
1089
1090 break;
1091
1092 }
1093
1094 case ALTERA_QSPI_CONTROLLER2_RDID_QSPI64:
1095
1096 {
1097
1098 number_of_sectors = 128;
1099
1100 break;
1101
1102 }
1103
1104 case ALTERA_QSPI_CONTROLLER2_RDID_QSPI128:
1105
1106 {
1107
1108 number_of_sectors = 256;
1109
1110 break;
1111
1112 }
1113
1114 case ALTERA_QSPI_CONTROLLER2_RDID_QSPI256:
1115
1116 {
1117
1118 number_of_sectors = 512;
1119
1120 break;
1121
1122 }
1123
1124 case ALTERA_QSPI_CONTROLLER2_RDID_QSPI512:
1125
1126 {
1127
1128 number_of_sectors = 1024;
1129
1130 break;
1131
1132 }
1133
1134 case ALTERA_QSPI_CONTROLLER2_RDID_QSPI1024:
1135
1136 {
1137
1138 number_of_sectors = 2048;
1139
1140 break;
1141
1142 }
1143
1144 default:
1145
1146 {
1147
1148 return -ENODEV;
1149
1150 }
1151
1152 }
1153
1154 }
1155
1156 else {
1157
1158 /* If we're an EPCS, we read QSPI_RD_SID for the silicon ID */
1159
1160 silicon_id = IORD_ALTERA_QSPI_CONTROLLER2_SID(flash->csr_base);
1161
1162 silicon_id &= ALTERA_QSPI_CONTROLLER2_SID_MASK;
1163
1164
1165
1166 /* Determine which EPCS device so we can figure out various properties */
1167
1168 switch(silicon_id)
1169
1170 {
1171
1172 case ALTERA_QSPI_CONTROLLER2_SID_EPCS16:
1173
1174 {
1175
1176 number_of_sectors = 32;
1177
1178 break;
1179
1180 }
1181
1182 case ALTERA_QSPI_CONTROLLER2_SID_EPCS64:
1183
1184 {
1185
1186 number_of_sectors = 128;
1187
1188 break;
1189
1190 }
1191
1192 case ALTERA_QSPI_CONTROLLER2_SID_EPCS128:
1193
1194 {
1195
1196 number_of_sectors = 256;
1197
1198 break;
1199
1200 }
1201
1202 default:
1203
1204 {
1205
1206 return -ENODEV;
1207
1208 }
1209
1210 }
1211
1212 }
1213
1214
1215
1216 /* Calculate size of flash based on number of sectors */
1217
1218 size_in_bytes = number_of_sectors * flash->sector_size;
1219
1220
1221
1222 /*
1223
1224 * Make sure calculated size is the same size given in system.h
1225
1226 * Also check number of sectors is the same number given in system.h
1227
1228 * Otherwise the QSPI IP was not configured correctly
1229
1230 */
1231
1232 if( size_in_bytes != flash->size_in_bytes ||
1233
1234 number_of_sectors != flash->number_of_sectors)
1235
1236 {
1237
1238 flash->dev.number_of_regions = 0;
1239
1240 return -ENODEV;
1241
1242 }
1243
1244 else
1245
1246 {
1247
1248 flash->silicon_id = silicon_id;
1249
1250 flash->number_of_sectors = number_of_sectors;
1251
1252
1253
1254 /*
1255
1256 * populate fields of region_info required to conform to HAL API
1257
1258 * create 1 region that composed of "number_of_sectors" blocks
1259
1260 */
1261
1262 flash->dev.number_of_regions = 1;
1263
1264 flash->dev.region_info[0].offset = 0;
1265
1266 flash->dev.region_info[0].region_size = size_in_bytes;
1267
1268 flash->dev.region_info[0].number_of_blocks = number_of_sectors;
1269
1270 flash->dev.region_info[0].block_size = flash->sector_size;
1271
1272 }
1273
1274
1275
1276
1277
1278 /*
1279
1280 * Register this device as a valid flash device type
1281
1282 *
1283
1284 * Only register the device if it's configured correctly.
1285
1286 */
1287
1288 alt_flash_device_register(&(flash->dev));
1289
1290
1291
1292
1293
1294 return 0;
1295
1296 }
1297
1298
1299
1300
1301
1302 /*
1303
1304 * Private API
1305
1306 *
1307
1308 * Helper functions used by Public API functions.
1309
1310 *
1311
1312 * Arguments:
1313
1314 * - *flash_info: Pointer to QSPI flash device structure.
1315
1316 * - offset: Offset of read/write from base address.
1317
1318 * - length: Length of read/write in bytes.
1319
1320 *
1321
1322 * Returns:
1323
1324 * 0 -> success
1325
1326 * -EINVAL -> Invalid arguments
1327
1328 */
1329
1330 /**
1331
1332 * Used to check that arguments to a read or write are valid
1333
1334 */
1335
alt_qspi_validate_read_write_arguments(alt_qspi_controller2_dev * flash_info,alt_u32 offset,alt_u32 length)1336 ALT_INLINE alt_32 static alt_qspi_validate_read_write_arguments
1337
1338 (
1339
1340 alt_qspi_controller2_dev *flash_info, /** device info */
1341
1342 alt_u32 offset, /** offset of read/write */
1343
1344 alt_u32 length /** length of read/write */
1345
1346 )
1347
1348 {
1349
1350 alt_qspi_controller2_dev *qspi_flash_info = NULL;
1351
1352 alt_u32 start_address = 0;
1353
1354 alt_32 end_address = 0;
1355
1356
1357
1358 /* return -EINVAL if flash_info is NULL */
1359
1360 if(NULL == flash_info)
1361
1362 {
1363
1364 return -EINVAL;
1365
1366 }
1367
1368
1369
1370 qspi_flash_info = (alt_qspi_controller2_dev*)flash_info;
1371
1372
1373
1374 start_address = qspi_flash_info->data_base + offset; /** first address of read or write */
1375
1376 end_address = start_address + length; /** last address of read or write (not inclusive) */
1377
1378
1379
1380 /* make sure start and end address is less then the end address of the flash */
1381
1382 if(
1383
1384 start_address >= qspi_flash_info->data_end ||
1385
1386 end_address >= qspi_flash_info->data_end ||
1387
1388 offset < 0 ||
1389
1390 length < 0
1391
1392 )
1393
1394 {
1395
1396 return -EINVAL;
1397
1398 }
1399
1400
1401
1402 return 0;
1403
1404 }
1405
1406
1407
1408 /*
1409
1410 * Private function that polls write in progress bit QSPI_RD_STATUS.
1411
1412 *
1413
1414 * Write in progress will be set if any of the following operations are in progress:
1415
1416 * -WRITE STATUS REGISTER
1417
1418 * -WRITE NONVOLATILE CONFIGURATION REGISTER
1419
1420 * -PROGRAM
1421
1422 * -ERASE
1423
1424 *
1425
1426 * Assumes QSPI was configured correctly.
1427
1428 *
1429
1430 * If ALTERA_QSPI_CONTROLLER2_1US_TIMEOUT_VALUE is set, the function will time out after
1431
1432 * a period of time determined by that value.
1433
1434 *
1435
1436 * Arguments:
1437
1438 * - *qspi_flash_info: Pointer to QSPI flash device structure.
1439
1440 *
1441
1442 * Returns:
1443
1444 * 0 -> success
1445
1446 * -EINVAL -> Invalid arguments
1447
1448 * -ETIME -> Time out and skipping the looping after 0.7 sec.
1449
1450 */
1451
alt_qspi_poll_for_write_in_progress(alt_qspi_controller2_dev * qspi_flash_info)1452 alt_32 static alt_qspi_poll_for_write_in_progress(alt_qspi_controller2_dev* qspi_flash_info)
1453
1454 {
1455
1456 /* we'll want to implement timeout if a timeout value is specified */
1457
1458 #if ALTERA_QSPI_CONTROLLER2_1US_TIMEOUT_VALUE > 0
1459
1460 alt_u32 timeout = ALTERA_QSPI_CONTROLLER2_1US_TIMEOUT_VALUE;
1461
1462 alt_u16 counter = 0;
1463
1464 #endif
1465
1466
1467
1468 /* return -EINVAL if qspi_flash_info is NULL */
1469
1470 if(NULL == qspi_flash_info)
1471
1472 {
1473
1474 return -EINVAL;
1475
1476 }
1477
1478
1479
1480 /* while Write in Progress bit is set, we wait */
1481
1482 while((IORD_ALTERA_QSPI_CONTROLLER2_STATUS(qspi_flash_info->csr_base) &
1483
1484 ALTERA_QSPI_CONTROLLER2_STATUS_WIP_MASK) ==
1485
1486 ALTERA_QSPI_CONTROLLER2_STATUS_WIP_BUSY)
1487
1488 {
1489
1490 alt_busy_sleep(1); /* delay 1us */
1491
1492 #if ALTERA_QSPI_CONTROLLER2_1US_TIMEOUT_VALUE > 0
1493
1494 if(timeout <= counter )
1495
1496 {
1497
1498 return -ETIME;
1499
1500 }
1501
1502
1503
1504 counter++;
1505
1506 #endif
1507
1508
1509
1510 }
1511
1512
1513
1514 return 0;
1515
1516 }
1517
