1 // Copyright 2020 Espressif Systems (Shanghai) PTE LTD
2 //
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
6 //
7 // http://www.apache.org/licenses/LICENSE-2.0
8 //
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
14
15 // The HAL layer for AES
16
17 #include "hal/aes_hal.h"
18 #include "hal/aes_ll.h"
19 #include <stdlib.h>
20 #include <string.h>
21 #include "soc/soc_caps.h"
22
aes_hal_setkey(const uint8_t * key,size_t key_bytes,int mode)23 uint8_t aes_hal_setkey(const uint8_t *key, size_t key_bytes, int mode)
24 {
25 aes_ll_set_mode(mode, key_bytes);
26
27 uint8_t key_bytes_in_hardware = aes_ll_write_key(key, key_bytes / 4);
28 /* Used for fault injection check: all words of key data should have been written to hardware */
29 return key_bytes_in_hardware;
30 }
31
32 /**
33 * @brief Busy wait until the AES accelerator is idle
34 *
35 */
aes_hal_wait_idle(void)36 static inline void aes_hal_wait_idle(void)
37 {
38 while (aes_ll_get_state() != ESP_AES_STATE_IDLE) {
39 }
40 }
41
aes_hal_transform_block(const void * input_block,void * output_block)42 void aes_hal_transform_block(const void *input_block, void *output_block)
43 {
44 aes_ll_write_block(input_block);
45 aes_ll_start_transform();
46 aes_hal_wait_idle();
47 aes_ll_read_block(output_block);
48 }
49
50 #if SOC_AES_SUPPORT_DMA
51
52
aes_hal_transform_dma_start(size_t num_blocks)53 void aes_hal_transform_dma_start(size_t num_blocks)
54 {
55 aes_ll_dma_enable(true);
56
57 /* Write the number of blocks */
58 aes_ll_set_num_blocks(num_blocks);
59
60 /* Start encrypting/decrypting */
61 aes_ll_start_transform();
62 }
63
aes_hal_transform_dma_finish(void)64 void aes_hal_transform_dma_finish(void)
65 {
66 aes_ll_dma_exit();
67 aes_ll_dma_enable(false);
68 }
69
aes_hal_mode_init(esp_aes_mode_t mode)70 void aes_hal_mode_init(esp_aes_mode_t mode)
71 {
72 /* Set the algorith mode CBC, CFB ... */
73 aes_ll_set_block_mode(mode);
74 /* Presently hard-coding the INC function to 32 bit */
75 if (mode == ESP_AES_BLOCK_MODE_CTR) {
76 aes_ll_set_inc();
77 }
78 }
79
aes_hal_set_iv(const uint8_t * iv)80 void aes_hal_set_iv(const uint8_t *iv)
81 {
82 aes_ll_set_iv(iv);
83 }
84
aes_hal_read_iv(uint8_t * iv)85 void aes_hal_read_iv(uint8_t *iv)
86 {
87 aes_ll_read_iv(iv);
88 }
89
aes_hal_wait_done()90 void aes_hal_wait_done()
91 {
92 while (aes_ll_get_state() != ESP_AES_STATE_DONE) {}
93 }
94
95
96 #endif //SOC_AES_SUPPORT_DMA
97
98 #if SOC_AES_SUPPORT_GCM
99
aes_hal_gcm_calc_hash(uint8_t * gcm_hash)100 void aes_hal_gcm_calc_hash(uint8_t *gcm_hash)
101 {
102 aes_ll_dma_enable(true);
103 aes_ll_start_transform();
104
105 aes_hal_wait_idle();
106
107 aes_ll_gcm_read_hash(gcm_hash);
108 }
109
aes_hal_transform_dma_gcm_start(size_t num_blocks)110 void aes_hal_transform_dma_gcm_start(size_t num_blocks)
111 {
112
113 /* Write the number of blocks */
114 aes_ll_set_num_blocks(num_blocks);
115
116 /* Start encrypting/decrypting */
117 aes_ll_cont_transform();
118 }
119
aes_hal_gcm_init(size_t aad_num_blocks,size_t num_valid_bit)120 void aes_hal_gcm_init(size_t aad_num_blocks, size_t num_valid_bit)
121 {
122 aes_ll_gcm_set_aad_num_blocks(aad_num_blocks);
123 aes_ll_gcm_set_num_valid_bit(num_valid_bit);
124 }
125
aes_hal_gcm_read_tag(uint8_t * tag,size_t tag_len)126 void aes_hal_gcm_read_tag(uint8_t *tag, size_t tag_len)
127 {
128 uint8_t tag_res[TAG_BYTES];
129 aes_ll_gcm_read_tag(tag_res);
130 memcpy(tag, tag_res, tag_len);
131 }
132
133
134 #endif //SOC_AES_SUPPORT_GCM
135
