1 /* adxl372_spi.c - SPI routines for ADXL372 driver
2 */
3
4 /*
5 * Copyright (c) 2022 Analog Devices
6 *
7 * SPDX-License-Identifier: Apache-2.0
8 */
9
10 #define DT_DRV_COMPAT adi_adxl372
11
12 #include <string.h>
13 #include <zephyr/logging/log.h>
14
15 #include "adxl372.h"
16
17 #if DT_ANY_INST_ON_BUS_STATUS_OKAY(spi)
18
19 LOG_MODULE_DECLARE(ADXL372, CONFIG_SENSOR_LOG_LEVEL);
20
adxl372_bus_access(const struct device * dev,uint8_t reg,void * data,size_t length)21 static int adxl372_bus_access(const struct device *dev, uint8_t reg,
22 void *data, size_t length)
23 {
24 const struct adxl372_dev_config *config = dev->config;
25
26 const struct spi_buf buf[2] = {
27 {
28 .buf = ®,
29 .len = 1
30 }, {
31 .buf = data,
32 .len = length
33 }
34 };
35
36 struct spi_buf_set tx = {
37 .buffers = buf,
38 };
39
40 if (reg & ADXL372_READ) {
41 const struct spi_buf_set rx = {
42 .buffers = buf,
43 .count = 2
44 };
45
46 tx.count = 1;
47
48 return spi_transceive_dt(&config->spi, &tx, &rx);
49 }
50
51 tx.count = 2;
52
53 return spi_write_dt(&config->spi, &tx);
54 }
55
adxl372_spi_reg_read(const struct device * dev,uint8_t reg_addr,uint8_t * reg_data)56 static int adxl372_spi_reg_read(const struct device *dev, uint8_t reg_addr,
57 uint8_t *reg_data)
58 {
59 return adxl372_bus_access(dev, ADXL372_REG_READ(reg_addr), reg_data, 1);
60 }
61
adxl372_spi_reg_read_multiple(const struct device * dev,uint8_t reg_addr,uint8_t * reg_data,uint16_t count)62 static int adxl372_spi_reg_read_multiple(const struct device *dev,
63 uint8_t reg_addr,
64 uint8_t *reg_data,
65 uint16_t count)
66 {
67 return adxl372_bus_access(dev, ADXL372_REG_READ(reg_addr),
68 reg_data, count);
69 }
70
adxl372_spi_reg_write(const struct device * dev,uint8_t reg_addr,uint8_t reg_data)71 static int adxl372_spi_reg_write(const struct device *dev,
72 uint8_t reg_addr,
73 uint8_t reg_data)
74 {
75 return adxl372_bus_access(dev, ADXL372_REG_WRITE(reg_addr),
76 ®_data, 1);
77 }
78
adxl372_spi_reg_write_mask(const struct device * dev,uint8_t reg_addr,uint32_t mask,uint8_t data)79 int adxl372_spi_reg_write_mask(const struct device *dev,
80 uint8_t reg_addr,
81 uint32_t mask,
82 uint8_t data)
83 {
84 int ret;
85 uint8_t tmp;
86
87 ret = adxl372_spi_reg_read(dev, reg_addr, &tmp);
88 if (ret) {
89 return ret;
90 }
91
92 tmp &= ~mask;
93 tmp |= data;
94
95 return adxl372_spi_reg_write(dev, reg_addr, tmp);
96 }
97
98 static const struct adxl372_transfer_function adxl372_spi_transfer_fn = {
99 .read_reg_multiple = adxl372_spi_reg_read_multiple,
100 .write_reg = adxl372_spi_reg_write,
101 .read_reg = adxl372_spi_reg_read,
102 .write_reg_mask = adxl372_spi_reg_write_mask,
103 };
104
adxl372_spi_init(const struct device * dev)105 int adxl372_spi_init(const struct device *dev)
106 {
107 struct adxl372_data *data = dev->data;
108 const struct adxl372_dev_config *config = dev->config;
109
110 data->hw_tf = &adxl372_spi_transfer_fn;
111
112 if (!spi_is_ready_dt(&config->spi)) {
113 return -ENODEV;
114 }
115
116 return 0;
117 }
118
119 #endif /* DT_ANY_INST_ON_BUS_STATUS_OKAY(spi) */
120
