1 /* 2 * Copyright (c) 2016 Nordic Semiconductor ASA 3 * Copyright (c) 2016 Vinayak Kariappa Chettimada 4 * 5 * SPDX-License-Identifier: Apache-2.0 6 */ 7 8 /* 9 * PDU fields sizes 10 */ 11 12 #define PDU_PREAMBLE_SIZE(phy) (phy&0x3) 13 #define PDU_ACCESS_ADDR_SIZE 4 14 #define PDU_HEADER_SIZE 2 15 #define PDU_MIC_SIZE 4 16 #define PDU_CRC_SIZE 3 17 #define PDU_OVERHEAD_SIZE(phy) (PDU_PREAMBLE_SIZE(phy) + \ 18 PDU_ACCESS_ADDR_SIZE + \ 19 PDU_HEADER_SIZE + \ 20 PDU_CRC_SIZE) 21 22 #define BDADDR_SIZE 6 23 #define ADVA_SIZE BDADDR_SIZE 24 #define SCANA_SIZE BDADDR_SIZE 25 #define INITA_SIZE BDADDR_SIZE 26 #define TARGETA_SIZE BDADDR_SIZE 27 #define LLDATA_SIZE 22 28 29 /* Constant offsets in extended header (TargetA is present in PDUs with AdvA) */ 30 #define ADVA_OFFSET 0 31 #define TGTA_OFFSET (ADVA_OFFSET + BDADDR_SIZE) 32 33 #define BYTES2US(bytes, phy) (((bytes)<<3)/BIT((phy&0x3)>>1)) 34 35 /* Advertisement channel minimum payload size */ 36 #define PDU_AC_PAYLOAD_SIZE_MIN 1 37 /* Advertisement channel maximum legacy payload size */ 38 #define PDU_AC_LEG_PAYLOAD_SIZE_MAX 37 39 /* Advertisement channel maximum legacy advertising/scan data size */ 40 #define PDU_AC_LEG_DATA_SIZE_MAX 31 41 42 #if defined(CONFIG_BT_CTLR_ADV_EXT) 43 /* Advertisement channel maximum extended payload size */ 44 #define PDU_AC_EXT_PAYLOAD_SIZE_MAX 255 45 46 /* Extended Scan and Periodic Sync Rx PDU time reservation */ 47 #if defined(CONFIG_BT_CTLR_SCAN_AUX_SYNC_RESERVE_MIN) 48 #define PDU_AC_EXT_PAYLOAD_RX_SIZE 0U 49 #else /* !CONFIG_BT_CTLR_SCAN_AUX_SYNC_RESERVE_MIN */ 50 #define PDU_AC_EXT_PAYLOAD_RX_SIZE PDU_AC_EXT_PAYLOAD_SIZE_MAX 51 #endif /* !CONFIG_BT_CTLR_SCAN_AUX_SYNC_RESERVE_MIN */ 52 53 #define PDU_AC_EXT_HEADER_SIZE_MIN offsetof(struct pdu_adv_com_ext_adv, \ 54 ext_hdr_adv_data) 55 #define PDU_AC_EXT_HEADER_SIZE_MAX 63 56 /* TODO: PDU_AC_EXT_PAYLOAD_OVERHEAD can be reduced based on supported 57 * features, like omitting support for periodic advertising will reduce 58 * 18 octets in the Common Extended Advertising Payload Format. 59 */ 60 #define PDU_AC_EXT_PAYLOAD_OVERHEAD (PDU_AC_EXT_HEADER_SIZE_MIN + \ 61 PDU_AC_EXT_HEADER_SIZE_MAX) 62 #endif /* CONFIG_BT_CTLR_ADV_EXT */ 63 64 #if defined(CONFIG_BT_CTLR_ADV_EXT) && defined(CONFIG_BT_BROADCASTER) 65 #define PDU_AC_PAYLOAD_SIZE_MAX MAX(MIN((PDU_AC_EXT_PAYLOAD_OVERHEAD + \ 66 CONFIG_BT_CTLR_ADV_DATA_LEN_MAX), \ 67 PDU_AC_EXT_PAYLOAD_SIZE_MAX), \ 68 PDU_AC_LEG_PAYLOAD_SIZE_MAX) 69 #define PDU_AC_EXT_AD_DATA_LEN_MAX (PDU_AC_PAYLOAD_SIZE_MAX - \ 70 PDU_AC_EXT_PAYLOAD_OVERHEAD) 71 #else /* !CONFIG_BT_CTLR_ADV_EXT || !CONFIG_BT_BROADCASTER */ 72 #define PDU_AC_PAYLOAD_SIZE_MAX PDU_AC_LEG_PAYLOAD_SIZE_MAX 73 #endif /* !CONFIG_BT_CTLR_ADV_EXT || !CONFIG_BT_BROADCASTER */ 74 75 /* Link Layer header size of Adv PDU. Assumes pdu_adv is packed */ 76 #define PDU_AC_LL_HEADER_SIZE (offsetof(struct pdu_adv, payload)) 77 78 /* Link Layer Advertisement channel maximum PDU buffer size */ 79 #define PDU_AC_LL_SIZE_MAX (PDU_AC_LL_HEADER_SIZE + PDU_AC_PAYLOAD_SIZE_MAX) 80 81 /* Advertisement channel Access Address */ 82 #define PDU_AC_ACCESS_ADDR 0x8e89bed6 83 84 /* Advertisement channel CRC init value */ 85 #define PDU_AC_CRC_IV 0x555555 86 87 /* CRC polynomial */ 88 #define PDU_CRC_POLYNOMIAL ((0x5bUL) | ((0x06UL) << 8) | ((0x00UL) << 16)) 89 90 /* Data channel minimum payload size and time in us */ 91 #define PDU_DC_PAYLOAD_SIZE_MIN 27 92 #define PDU_DC_PAYLOAD_TIME_MIN 328 93 #define PDU_DC_PAYLOAD_TIME_MIN_CODED 2704 94 95 /* Data channel maximum payload size and time in us */ 96 #define PDU_DC_PAYLOAD_SIZE_MAX 251 97 #define PDU_DC_PAYLOAD_TIME_MAX_CODED 17040 98 99 #if defined(CONFIG_BT_CTLR_DF) 100 #define PDU_DC_PAYLOAD_TIME_MAX 2128 101 #else /* !CONFIG_BT_CTLR_DF */ 102 #define PDU_DC_PAYLOAD_TIME_MAX 2120 103 #endif /* !CONFIG_BT_CTLR_DF */ 104 105 /* Data channel control PDU maximum payload size */ 106 #if defined(CONFIG_BT_CONN) 107 #if defined(CONFIG_BT_CTLR_CONN_ISO) 108 #if defined(CONFIG_BT_CENTRAL) && defined(CONFIG_BT_PERIPHERAL) 109 /* Isochronous Central and Peripheral */ 110 #define PDU_DC_CTRL_TX_SIZE_MAX PDU_DATA_LLCTRL_LEN(cis_req) 111 #define PDU_DC_CTRL_RX_SIZE_MAX PDU_DATA_LLCTRL_LEN(cis_req) 112 #elif defined(CONFIG_BT_CENTRAL) 113 /* Isochronous Central */ 114 #define PDU_DC_CTRL_TX_SIZE_MAX PDU_DATA_LLCTRL_LEN(cis_req) 115 #if defined(CONFIG_BT_CTLR_CONN_PARAM_REQ) 116 #define PDU_DC_CTRL_RX_SIZE_MAX PDU_DATA_LLCTRL_LEN(conn_param_req) 117 #elif defined(CONFIG_BT_CTLR_LE_ENC) 118 #define PDU_DC_CTRL_RX_SIZE_MAX PDU_DATA_LLCTRL_LEN(enc_rsp) 119 #else /* !CONFIG_BT_CTLR_LE_ENC */ 120 #define PDU_DC_CTRL_RX_SIZE_MAX PDU_DATA_LLCTRL_LEN(cis_rsp) 121 #endif /* !CONFIG_BT_CTLR_LE_ENC */ 122 #elif defined(CONFIG_BT_PERIPHERAL) 123 /* Isochronous Peripheral */ 124 #if defined(CONFIG_BT_CTLR_CONN_PARAM_REQ) 125 #define PDU_DC_CTRL_TX_SIZE_MAX PDU_DATA_LLCTRL_LEN(conn_param_req) 126 #elif defined(CONFIG_BT_CTLR_LE_ENC) 127 #define PDU_DC_CTRL_TX_SIZE_MAX PDU_DATA_LLCTRL_LEN(enc_rsp) 128 #else /* !CONFIG_BT_CTLR_LE_ENC */ 129 #define PDU_DC_CTRL_TX_SIZE_MAX PDU_DATA_LLCTRL_LEN(cis_rsp) 130 #endif /* !CONFIG_BT_CTLR_LE_ENC */ 131 #define PDU_DC_CTRL_RX_SIZE_MAX PDU_DATA_LLCTRL_LEN(cis_req) 132 #endif /* !CONFIG_BT_PERIPHERAL */ 133 134 #elif defined(CONFIG_BT_CTLR_CONN_PARAM_REQ) 135 /* Central and Peripheral with Connection Parameter Request */ 136 #define PDU_DC_CTRL_TX_SIZE_MAX PDU_DATA_LLCTRL_LEN(conn_param_req) 137 #define PDU_DC_CTRL_RX_SIZE_MAX PDU_DATA_LLCTRL_LEN(conn_param_req) 138 139 #elif defined(CONFIG_BT_CTLR_LE_ENC) 140 #if defined(CONFIG_BT_CENTRAL) && defined(CONFIG_BT_PERIPHERAL) 141 /* Central and Peripheral with encryption */ 142 #define PDU_DC_CTRL_TX_SIZE_MAX PDU_DATA_LLCTRL_LEN(enc_req) 143 #define PDU_DC_CTRL_RX_SIZE_MAX PDU_DATA_LLCTRL_LEN(enc_req) 144 #elif defined(CONFIG_BT_CENTRAL) 145 /* Central with encryption */ 146 #define PDU_DC_CTRL_TX_SIZE_MAX PDU_DATA_LLCTRL_LEN(enc_req) 147 #define PDU_DC_CTRL_RX_SIZE_MAX PDU_DATA_LLCTRL_LEN(enc_rsp) 148 #elif defined(CONFIG_BT_PERIPHERAL) 149 /* Peripheral with encryption */ 150 #define PDU_DC_CTRL_TX_SIZE_MAX PDU_DATA_LLCTRL_LEN(enc_rsp) 151 #define PDU_DC_CTRL_RX_SIZE_MAX PDU_DATA_LLCTRL_LEN(enc_req) 152 #endif /* !CONFIG_BT_PERIPHERAL */ 153 154 #else /* !CONFIG_BT_CTLR_LE_ENC */ 155 #if defined(CONFIG_BT_CENTRAL) && defined(CONFIG_BT_PERIPHERAL) 156 /* Central and Peripheral without encryption */ 157 #define PDU_DC_CTRL_TX_SIZE_MAX PDU_DATA_LLCTRL_LEN(conn_update_ind) 158 #define PDU_DC_CTRL_RX_SIZE_MAX PDU_DATA_LLCTRL_LEN(conn_update_ind) 159 #elif defined(CONFIG_BT_CENTRAL) 160 /* Central without encryption */ 161 #define PDU_DC_CTRL_TX_SIZE_MAX PDU_DATA_LLCTRL_LEN(conn_update_ind) 162 #define PDU_DC_CTRL_RX_SIZE_MAX PDU_DATA_LLCTRL_LEN(feature_rsp) 163 #elif defined(CONFIG_BT_PERIPHERAL) 164 /* Peripheral without encryption */ 165 #define PDU_DC_CTRL_TX_SIZE_MAX PDU_DATA_LLCTRL_LEN(feature_rsp) 166 #define PDU_DC_CTRL_RX_SIZE_MAX PDU_DATA_LLCTRL_LEN(conn_update_ind) 167 #endif /* !CONFIG_BT_PERIPHERAL */ 168 #endif /* !CONFIG_BT_CTLR_LE_ENC */ 169 170 #else /* !CONFIG_BT_CONN */ 171 #define PDU_DC_CTRL_TX_SIZE_MAX 0U 172 #define PDU_DC_CTRL_RX_SIZE_MAX 0U 173 #endif /* !CONFIG_BT_CONN */ 174 175 /* Link Layer header size of Data PDU. Assumes pdu_data is packed */ 176 #define PDU_DC_LL_HEADER_SIZE (offsetof(struct pdu_data, lldata)) 177 178 /* Link Layer Max size of an empty PDU. TODO: Remove; only used in Nordic LLL */ 179 #define PDU_EM_LL_SIZE_MAX (PDU_DC_LL_HEADER_SIZE) 180 181 /* Link Layer header size of BIS PDU. Assumes pdu_bis is packed */ 182 #define PDU_BIS_LL_HEADER_SIZE (offsetof(struct pdu_bis, payload)) 183 184 /* Event Active Clock Jitter */ 185 #define EVENT_CLOCK_JITTER_US 2 186 /* Event interframe timings */ 187 #define EVENT_IFS_US 150 188 /* Event interframe timings, default */ 189 #define EVENT_IFS_DEFAULT_US EVENT_IFS_US 190 /* Standard allows 2 us timing uncertainty inside the event */ 191 #define EVENT_IFS_MAX_US (EVENT_IFS_US + EVENT_CLOCK_JITTER_US) 192 /* Specification defined Minimum AUX Frame Space (MAFS) */ 193 #define EVENT_MAFS_US 300 194 /* Controller dependent MAFS minimum used to populate aux_offset */ 195 #define EVENT_MAFS_MIN_US MAX(EVENT_MAFS_US, PDU_ADV_AUX_OFFSET_MIN_US) 196 /* Standard allows 2 us timing uncertainty inside the event */ 197 #define EVENT_MAFS_MAX_US (EVENT_MAFS_US + EVENT_CLOCK_JITTER_US) 198 /* Controller defined back to back transmit MAFS for extended advertising */ 199 #define EVENT_B2B_MAFS_US (CONFIG_BT_CTLR_ADV_AUX_PDU_BACK2BACK_AFS) 200 /* Controller defined back to back transmit MAFS for periodic advertising */ 201 #define EVENT_SYNC_B2B_MAFS_US (CONFIG_BT_CTLR_ADV_SYNC_PDU_BACK2BACK_AFS) 202 /* Minimum Subevent Space timings */ 203 #define EVENT_MSS_US 150 204 /* Standard allows 2 us timing uncertainty inside the event */ 205 #define EVENT_MSS_MAX_US (EVENT_MSS_US + EVENT_CLOCK_JITTER_US) 206 207 /* Instant maximum value and maximum latency (or delta) past the instant */ 208 #define EVENT_INSTANT_MAX 0xffff 209 #define EVENT_INSTANT_LATENCY_MAX 0x7fff 210 211 /* Channel Map Unused channels count minimum */ 212 #define CHM_USED_COUNT_MIN 2U 213 214 /* Channel Map hop count minimum and maximum */ 215 #define CHM_HOP_COUNT_MIN 5U 216 #define CHM_HOP_COUNT_MAX 16U 217 218 /* Offset Units field encoding */ 219 #define OFFS_UNIT_BITS 13 220 #define OFFS_UNIT_30_US 30 221 #define OFFS_UNIT_300_US 300 222 #define OFFS_UNIT_VALUE_30_US 0 223 #define OFFS_UNIT_VALUE_300_US 1 224 /* Value specified in BT Spec. Vol 6, Part B, section 2.3.4.6 */ 225 #define OFFS_ADJUST_US 2457600UL 226 227 /* Macros for getting offset/phy from pdu_adv_aux_ptr */ 228 #define PDU_ADV_AUX_PTR_OFFSET_GET(aux_ptr) ((aux_ptr)->offs_phy_packed[0] | \ 229 (((aux_ptr)->offs_phy_packed[1] & 0x1F) << 8)) 230 #define PDU_ADV_AUX_PTR_PHY_GET(aux_ptr) (((aux_ptr)->offs_phy_packed[1] >> 5) & 0x07) 231 232 /* Macros for getting/setting offset/offset_units/offset_adjust from pdu_adv_sync_info */ 233 #define PDU_ADV_SYNC_INFO_OFFSET_GET(si) ((si)->offs_packed[0] | \ 234 (((si)->offs_packed[1] & 0x1F) << 8)) 235 #define PDU_ADV_SYNC_INFO_OFFS_UNITS_GET(si) (((si)->offs_packed[1] >> 5) & 0x01) 236 #define PDU_ADV_SYNC_INFO_OFFS_ADJUST_GET(si) (((si)->offs_packed[1] >> 6) & 0x01) 237 #define PDU_ADV_SYNC_INFO_OFFS_SET(si, offs, offs_units, offs_adjust) \ 238 do { \ 239 (si)->offs_packed[0] = (offs) & 0xFF; \ 240 (si)->offs_packed[1] = (((offs) >> 8) & 0x1F) + \ 241 (((offs_units) << 5) & 0x20) + \ 242 (((offs_adjust) << 6) & 0x40); \ 243 } while (0) 244 245 /* Advertiser's Sleep Clock Accuracy Value */ 246 #define SCA_500_PPM 500 /* 51 ppm to 500 ppm */ 247 #define SCA_50_PPM 50 /* 0 ppm to 50 ppm */ 248 #define SCA_VALUE_500_PPM 0 /* 51 ppm to 500 ppm */ 249 #define SCA_VALUE_50_PPM 1 /* 0 ppm to 50 ppm */ 250 251 /* Sleep Clock Accuracy, calculate drift in microseconds */ 252 #define SCA_DRIFT_50_PPM_US(t) (((t) * 50UL) / 1000000UL) 253 #define SCA_DRIFT_500_PPM_US(t) (((t) * 500UL) / 1000000UL) 254 255 /* transmitWindowDelay times (us) */ 256 #define WIN_DELAY_LEGACY 1250 257 #define WIN_DELAY_UNCODED 2500 258 #define WIN_DELAY_CODED 3750 259 260 /* Channel Map Size */ 261 #define PDU_CHANNEL_MAP_SIZE 5 262 263 /* Advertising Data */ 264 #define PDU_ADV_DATA_HEADER_SIZE 2U 265 #define PDU_ADV_DATA_HEADER_LEN_SIZE 1U 266 #define PDU_ADV_DATA_HEADER_TYPE_SIZE 1U 267 #define PDU_ADV_DATA_HEADER_LEN_OFFSET 0U 268 #define PDU_ADV_DATA_HEADER_TYPE_OFFSET 1U 269 #define PDU_ADV_DATA_HEADER_DATA_OFFSET 2U 270 271 /* Advertising Data Types in ACAD */ 272 #define PDU_ADV_DATA_TYPE_CHANNEL_MAP_UPDATE_IND 0x28 273 274 /* 275 * Macros to return correct Data Channel PDU time 276 * Note: formula is valid for 1M, 2M and Coded S8 277 * see BT spec Version 5.1 Vol 6. Part B, chapters 2.1 and 2.2 278 * for packet formats and thus lengths 279 */ 280 281 #define PHY_LEGACY 0 282 #define PHY_1M BIT(0) 283 #define PHY_2M BIT(1) 284 #define PHY_CODED BIT(2) 285 #define PHY_FLAGS_S2 0 286 #define PHY_FLAGS_S8 BIT(0) 287 288 /* Macros for getting/setting did/sid from pdu_adv_adi */ 289 #define PDU_ADV_ADI_DID_GET(adi) ((adi)->did_sid_packed[0] | \ 290 (((adi)->did_sid_packed[1] & 0x0F) << 8)) 291 #define PDU_ADV_ADI_SID_GET(adi) (((adi)->did_sid_packed[1] >> 4) & 0x0F) 292 #define PDU_ADV_ADI_SID_SET(adi, sid) (adi)->did_sid_packed[1] = (((sid) << 4) + \ 293 ((adi)->did_sid_packed[1] & 0x0F)) 294 #define PDU_ADV_ADI_DID_SID_SET(adi, did, sid) \ 295 do { \ 296 (adi)->did_sid_packed[0] = (did) & 0xFF; \ 297 (adi)->did_sid_packed[1] = (((did) >> 8) & 0x0F) + ((sid) << 4); \ 298 } while (0) 299 300 #if defined(CONFIG_BT_CTLR_PHY_CODED) 301 #define CODED_PHY_PREAMBLE_TIME_US 80 302 #define CODED_PHY_ACCESS_ADDRESS_TIME_US 256 303 #define CODED_PHY_CI_TIME_US 16 304 #define CODED_PHY_TERM1_TIME_US 24 305 #define CODED_PHY_CRC_SIZE 24 306 #define CODED_PHY_TERM2_SIZE 3 307 308 #define FEC_BLOCK1_US ((CODED_PHY_ACCESS_ADDRESS_TIME_US) + \ 309 (CODED_PHY_CI_TIME_US) + \ 310 (CODED_PHY_TERM1_TIME_US)) 311 312 /* cs = 0, S2 coding scheme, use PHY_FLAGS_S2 313 * cs = 1, S8 coding scheme, use PHY_FLAGS_S8 314 * 315 * Not using the term CI, Coding Indicator, where in the Spec its defined value 316 * of 0 is S8 encoding, 1 is S2 encoding. 317 */ 318 #define FEC_BLOCK2_US(octets, mic, cs) (((((PDU_HEADER_SIZE) + \ 319 (octets) + \ 320 (mic)) << 3) + \ 321 (CODED_PHY_CRC_SIZE) + \ 322 (CODED_PHY_TERM2_SIZE)) << \ 323 (1 + (((cs) & 0x01) << 1))) 324 325 #define PDU_US(octets, mic, phy, cs) (((phy) & PHY_CODED) ? \ 326 ((CODED_PHY_PREAMBLE_TIME_US) + \ 327 (FEC_BLOCK1_US) + \ 328 FEC_BLOCK2_US((octets), (mic), \ 329 (cs))) : \ 330 (((PDU_PREAMBLE_SIZE(phy) + \ 331 (PDU_ACCESS_ADDR_SIZE) + \ 332 (PDU_HEADER_SIZE) + \ 333 (octets) + \ 334 (mic) + \ 335 (PDU_CRC_SIZE)) << 3) / \ 336 BIT(((phy) & 0x03) >> 1))) 337 338 #define PDU_MAX_US(octets, mic, phy) PDU_US((octets), (mic), (phy), \ 339 PHY_FLAGS_S8) 340 341 #else /* !CONFIG_BT_CTLR_PHY_CODED */ 342 #define PDU_US(octets, mic, phy, cs) (((PDU_PREAMBLE_SIZE(phy) + \ 343 (PDU_ACCESS_ADDR_SIZE) + \ 344 (PDU_HEADER_SIZE) + \ 345 (octets) + \ 346 (mic) + \ 347 (PDU_CRC_SIZE)) << 3) / \ 348 BIT(((phy) & 0x03) >> 1)) 349 350 #define PDU_MAX_US(octets, mic, phy) PDU_US((octets), (mic), (phy), 0) 351 #endif /* !CONFIG_BT_CTLR_PHY_CODED */ 352 353 #define PDU_DC_MAX_US(octets, phy) PDU_MAX_US((octets), (PDU_MIC_SIZE), (phy)) 354 355 #define PDU_DC_US(octets, mic, phy, cs) PDU_US((octets), (mic), (phy), (cs)) 356 357 #define PDU_AC_MAX_US(octets, phy) PDU_MAX_US((octets), 0, (phy)) 358 359 #define PDU_AC_US(octets, phy, cs) PDU_US((octets), 0, (phy), (cs)) 360 361 #define PDU_BIS_MAX_US(octets, enc, phy) PDU_MAX_US((octets), \ 362 ((enc) ? \ 363 (PDU_MIC_SIZE) : 0), \ 364 (phy)) 365 366 #define PDU_BIS_US(octets, enc, phy, s8) PDU_US((octets), \ 367 ((enc) ? (PDU_MIC_SIZE) : 0), \ 368 (phy), (s8)) 369 370 #define PDU_CIS_MAX_US(octets, enc, phy) PDU_MAX_US((octets), \ 371 ((enc) ? \ 372 (PDU_MIC_SIZE) : 0), \ 373 (phy)) 374 #define PDU_CIS_OFFSET_MIN_US 500U 375 376 struct pdu_adv_adv_ind { 377 uint8_t addr[BDADDR_SIZE]; 378 uint8_t data[PDU_AC_LEG_DATA_SIZE_MAX]; 379 } __packed; 380 381 struct pdu_adv_direct_ind { 382 uint8_t adv_addr[BDADDR_SIZE]; 383 uint8_t tgt_addr[BDADDR_SIZE]; 384 } __packed; 385 386 struct pdu_adv_scan_rsp { 387 uint8_t addr[BDADDR_SIZE]; 388 uint8_t data[PDU_AC_LEG_DATA_SIZE_MAX]; 389 } __packed; 390 391 struct pdu_adv_scan_req { 392 uint8_t scan_addr[BDADDR_SIZE]; 393 uint8_t adv_addr[BDADDR_SIZE]; 394 } __packed; 395 396 struct pdu_adv_connect_ind { 397 uint8_t init_addr[BDADDR_SIZE]; 398 uint8_t adv_addr[BDADDR_SIZE]; 399 struct { 400 uint8_t access_addr[4]; 401 uint8_t crc_init[3]; 402 uint8_t win_size; 403 uint16_t win_offset; 404 uint16_t interval; 405 uint16_t latency; 406 uint16_t timeout; 407 uint8_t chan_map[PDU_CHANNEL_MAP_SIZE]; 408 #ifdef CONFIG_LITTLE_ENDIAN 409 uint8_t hop:5; 410 uint8_t sca:3; 411 #else 412 uint8_t sca:3; 413 uint8_t hop:5; 414 #endif /* CONFIG_LITTLE_ENDIAN */ 415 416 } __packed; 417 } __packed; 418 419 struct pdu_adv_ext_hdr { 420 #ifdef CONFIG_LITTLE_ENDIAN 421 uint8_t adv_addr:1; 422 uint8_t tgt_addr:1; 423 uint8_t cte_info:1; 424 uint8_t adi:1; 425 uint8_t aux_ptr:1; 426 uint8_t sync_info:1; 427 uint8_t tx_pwr:1; 428 uint8_t rfu:1; 429 #else 430 uint8_t rfu:1; 431 uint8_t tx_pwr:1; 432 uint8_t sync_info:1; 433 uint8_t aux_ptr:1; 434 uint8_t adi:1; 435 uint8_t cte_info:1; 436 uint8_t tgt_addr:1; 437 uint8_t adv_addr:1; 438 #endif /* CONFIG_LITTLE_ENDIAN */ 439 uint8_t data[0]; 440 } __packed; 441 442 struct pdu_adv_com_ext_adv { 443 #ifdef CONFIG_LITTLE_ENDIAN 444 uint8_t ext_hdr_len:6; 445 uint8_t adv_mode:2; 446 #else 447 uint8_t adv_mode:2; 448 uint8_t ext_hdr_len:6; 449 #endif /* CONFIG_LITTLE_ENDIAN */ 450 union { 451 struct pdu_adv_ext_hdr ext_hdr; 452 uint8_t ext_hdr_adv_data[0]; 453 }; 454 } __packed; 455 456 enum pdu_adv_mode { 457 EXT_ADV_MODE_NON_CONN_NON_SCAN = 0x00, 458 EXT_ADV_MODE_CONN_NON_SCAN = 0x01, 459 EXT_ADV_MODE_NON_CONN_SCAN = 0x02, 460 }; 461 462 #define PDU_ADV_SID_COUNT 16 463 464 struct pdu_adv_adi { 465 /* did:12 466 * sid:4 467 * NOTE: This layout as bitfields is not portable for BE using 468 * endianness conversion macros. 469 */ 470 uint8_t did_sid_packed[2]; 471 } __packed; 472 473 struct pdu_adv_aux_ptr { 474 #ifdef CONFIG_LITTLE_ENDIAN 475 uint8_t chan_idx:6; 476 uint8_t ca:1; 477 uint8_t offs_units:1; 478 #else 479 uint8_t offs_units:1; 480 uint8_t ca:1; 481 uint8_t chan_idx:6; 482 #endif /* CONFIG_LITTLE_ENDIAN */ 483 /* offs:13 484 * phy:3 485 * NOTE: This layout as bitfields is not portable for BE using 486 * endianness conversion macros. 487 */ 488 uint8_t offs_phy_packed[2]; 489 } __packed; 490 491 enum pdu_adv_aux_ptr_ca { 492 EXT_ADV_AUX_PTR_CA_500_PPM = 0x00, 493 EXT_ADV_AUX_PTR_CA_50_PPM = 0x01, 494 }; 495 496 enum pdu_adv_offs_units { 497 EXT_ADV_AUX_PTR_OFFS_UNITS_30 = 0x00, 498 EXT_ADV_AUX_PTR_OFFS_UNITS_300 = 0x01, 499 }; 500 501 enum pdu_adv_aux_phy { 502 EXT_ADV_AUX_PHY_LE_1M = 0x00, 503 EXT_ADV_AUX_PHY_LE_2M = 0x01, 504 EXT_ADV_AUX_PHY_LE_CODED = 0x02, 505 }; 506 507 struct pdu_adv_sync_info { 508 /* offs:13 509 * offs_units:1 510 * offs_adjust:1 511 * rfu:1 512 * NOTE: This layout as bitfields is not portable for BE using 513 * endianness conversion macros. 514 */ 515 uint8_t offs_packed[2]; 516 uint16_t interval; 517 uint8_t sca_chm[PDU_CHANNEL_MAP_SIZE]; 518 uint8_t aa[4]; 519 uint8_t crc_init[3]; 520 uint16_t evt_cntr; 521 } __packed; 522 523 #define PDU_SYNC_INFO_SCA_CHM_SCA_BYTE_OFFSET 4 524 #define PDU_SYNC_INFO_SCA_CHM_SCA_BIT_POS 5 525 #define PDU_SYNC_INFO_SCA_CHM_SCA_BIT_MASK \ 526 (0x07 << (PDU_SYNC_INFO_SCA_CHM_SCA_BIT_POS)) 527 528 struct pdu_adv_sync_chm_upd_ind { 529 uint8_t chm[PDU_CHANNEL_MAP_SIZE]; 530 uint16_t instant; 531 } __packed; 532 533 enum pdu_adv_type { 534 PDU_ADV_TYPE_ADV_IND = 0x00, 535 PDU_ADV_TYPE_DIRECT_IND = 0x01, 536 PDU_ADV_TYPE_NONCONN_IND = 0x02, 537 PDU_ADV_TYPE_SCAN_REQ = 0x03, 538 PDU_ADV_TYPE_AUX_SCAN_REQ = PDU_ADV_TYPE_SCAN_REQ, 539 PDU_ADV_TYPE_SCAN_RSP = 0x04, 540 PDU_ADV_TYPE_ADV_IND_SCAN_RSP = 0x05, 541 PDU_ADV_TYPE_CONNECT_IND = 0x05, 542 PDU_ADV_TYPE_AUX_CONNECT_REQ = PDU_ADV_TYPE_CONNECT_IND, 543 PDU_ADV_TYPE_SCAN_IND = 0x06, 544 PDU_ADV_TYPE_EXT_IND = 0x07, 545 PDU_ADV_TYPE_AUX_ADV_IND = PDU_ADV_TYPE_EXT_IND, 546 PDU_ADV_TYPE_AUX_SCAN_RSP = PDU_ADV_TYPE_EXT_IND, 547 PDU_ADV_TYPE_AUX_SYNC_IND = PDU_ADV_TYPE_EXT_IND, 548 PDU_ADV_TYPE_AUX_CHAIN_IND = PDU_ADV_TYPE_EXT_IND, 549 PDU_ADV_TYPE_AUX_CONNECT_RSP = 0x08, 550 } __packed; 551 552 struct pdu_adv { 553 #ifdef CONFIG_LITTLE_ENDIAN 554 uint8_t type:4; 555 uint8_t rfu:1; 556 uint8_t chan_sel:1; 557 uint8_t tx_addr:1; 558 uint8_t rx_addr:1; 559 #else 560 uint8_t rx_addr:1; 561 uint8_t tx_addr:1; 562 uint8_t chan_sel:1; 563 uint8_t rfu:1; 564 uint8_t type:4; 565 #endif /* CONFIG_LITTLE_ENDIAN */ 566 567 uint8_t len; 568 569 union { 570 uint8_t payload[0]; 571 struct pdu_adv_adv_ind adv_ind; 572 struct pdu_adv_direct_ind direct_ind; 573 struct pdu_adv_scan_req scan_req; 574 struct pdu_adv_scan_rsp scan_rsp; 575 struct pdu_adv_connect_ind connect_ind; 576 577 #if defined(CONFIG_BT_CTLR_ADV_EXT) 578 struct pdu_adv_com_ext_adv adv_ext_ind; 579 #endif /* CONFIG_BT_CTLR_ADV_EXT */ 580 } __packed; 581 } __packed; 582 583 enum pdu_data_llid { 584 PDU_DATA_LLID_RESV = 0x00, 585 PDU_DATA_LLID_DATA_CONTINUE = 0x01, 586 PDU_DATA_LLID_DATA_START = 0x02, 587 PDU_DATA_LLID_CTRL = 0x03, 588 }; 589 590 enum pdu_data_llctrl_type { 591 PDU_DATA_LLCTRL_TYPE_CONN_UPDATE_IND = 0x00, 592 PDU_DATA_LLCTRL_TYPE_CHAN_MAP_IND = 0x01, 593 PDU_DATA_LLCTRL_TYPE_TERMINATE_IND = 0x02, 594 PDU_DATA_LLCTRL_TYPE_ENC_REQ = 0x03, 595 PDU_DATA_LLCTRL_TYPE_ENC_RSP = 0x04, 596 PDU_DATA_LLCTRL_TYPE_START_ENC_REQ = 0x05, 597 PDU_DATA_LLCTRL_TYPE_START_ENC_RSP = 0x06, 598 PDU_DATA_LLCTRL_TYPE_UNKNOWN_RSP = 0x07, 599 PDU_DATA_LLCTRL_TYPE_FEATURE_REQ = 0x08, 600 PDU_DATA_LLCTRL_TYPE_FEATURE_RSP = 0x09, 601 PDU_DATA_LLCTRL_TYPE_PAUSE_ENC_REQ = 0x0A, 602 PDU_DATA_LLCTRL_TYPE_PAUSE_ENC_RSP = 0x0B, 603 PDU_DATA_LLCTRL_TYPE_VERSION_IND = 0x0C, 604 PDU_DATA_LLCTRL_TYPE_REJECT_IND = 0x0D, 605 PDU_DATA_LLCTRL_TYPE_PER_INIT_FEAT_XCHG = 0x0E, 606 PDU_DATA_LLCTRL_TYPE_CONN_PARAM_REQ = 0x0F, 607 PDU_DATA_LLCTRL_TYPE_CONN_PARAM_RSP = 0x10, 608 PDU_DATA_LLCTRL_TYPE_REJECT_EXT_IND = 0x11, 609 PDU_DATA_LLCTRL_TYPE_PING_REQ = 0x12, 610 PDU_DATA_LLCTRL_TYPE_PING_RSP = 0x13, 611 PDU_DATA_LLCTRL_TYPE_LENGTH_REQ = 0x14, 612 PDU_DATA_LLCTRL_TYPE_LENGTH_RSP = 0x15, 613 PDU_DATA_LLCTRL_TYPE_PHY_REQ = 0x16, 614 PDU_DATA_LLCTRL_TYPE_PHY_RSP = 0x17, 615 PDU_DATA_LLCTRL_TYPE_PHY_UPD_IND = 0x18, 616 PDU_DATA_LLCTRL_TYPE_MIN_USED_CHAN_IND = 0x19, 617 PDU_DATA_LLCTRL_TYPE_CTE_REQ = 0x1A, 618 PDU_DATA_LLCTRL_TYPE_CTE_RSP = 0x1B, 619 PDU_DATA_LLCTRL_TYPE_PERIODIC_SYNC_IND = 0x1C, 620 PDU_DATA_LLCTRL_TYPE_CLOCK_ACCURACY_REQ = 0x1D, 621 PDU_DATA_LLCTRL_TYPE_CLOCK_ACCURACY_RSP = 0x1E, 622 PDU_DATA_LLCTRL_TYPE_CIS_REQ = 0x1F, 623 PDU_DATA_LLCTRL_TYPE_CIS_RSP = 0x20, 624 PDU_DATA_LLCTRL_TYPE_CIS_IND = 0x21, 625 PDU_DATA_LLCTRL_TYPE_CIS_TERMINATE_IND = 0x22, 626 PDU_DATA_LLCTRL_TYPE_UNUSED = 0xFF 627 }; 628 629 struct pdu_data_llctrl_conn_update_ind { 630 uint8_t win_size; 631 uint16_t win_offset; 632 uint16_t interval; 633 uint16_t latency; 634 uint16_t timeout; 635 uint16_t instant; 636 } __packed; 637 638 struct pdu_data_llctrl_chan_map_ind { 639 uint8_t chm[PDU_CHANNEL_MAP_SIZE]; 640 uint16_t instant; 641 } __packed; 642 643 struct pdu_data_llctrl_terminate_ind { 644 uint8_t error_code; 645 } __packed; 646 647 struct pdu_data_llctrl_enc_req { 648 uint8_t rand[8]; 649 uint8_t ediv[2]; 650 uint8_t skdm[8]; 651 uint8_t ivm[4]; 652 } __packed; 653 654 struct pdu_data_llctrl_enc_rsp { 655 uint8_t skds[8]; 656 uint8_t ivs[4]; 657 } __packed; 658 659 struct pdu_data_llctrl_start_enc_req { 660 /* no members */ 661 } __packed; 662 663 struct pdu_data_llctrl_start_enc_rsp { 664 /* no members */ 665 } __packed; 666 667 struct pdu_data_llctrl_unknown_rsp { 668 uint8_t type; 669 } __packed; 670 671 struct pdu_data_llctrl_feature_req { 672 uint8_t features[8]; 673 } __packed; 674 675 struct pdu_data_llctrl_feature_rsp { 676 uint8_t features[8]; 677 } __packed; 678 679 struct pdu_data_llctrl_pause_enc_req { 680 /* no members */ 681 } __packed; 682 683 struct pdu_data_llctrl_pause_enc_rsp { 684 /* no members */ 685 } __packed; 686 687 struct pdu_data_llctrl_version_ind { 688 uint8_t version_number; 689 uint16_t company_id; 690 uint16_t sub_version_number; 691 } __packed; 692 693 struct pdu_data_llctrl_reject_ind { 694 uint8_t error_code; 695 } __packed; 696 697 struct pdu_data_llctrl_per_init_feat_xchg { 698 uint8_t features[8]; 699 } __packed; 700 701 struct pdu_data_llctrl_conn_param_req { 702 uint16_t interval_min; 703 uint16_t interval_max; 704 uint16_t latency; 705 uint16_t timeout; 706 uint8_t preferred_periodicity; 707 uint16_t reference_conn_event_count; 708 uint16_t offset0; 709 uint16_t offset1; 710 uint16_t offset2; 711 uint16_t offset3; 712 uint16_t offset4; 713 uint16_t offset5; 714 } __packed; 715 716 struct pdu_data_llctrl_conn_param_rsp { 717 uint16_t interval_min; 718 uint16_t interval_max; 719 uint16_t latency; 720 uint16_t timeout; 721 uint8_t preferred_periodicity; 722 uint16_t reference_conn_event_count; 723 uint16_t offset0; 724 uint16_t offset1; 725 uint16_t offset2; 726 uint16_t offset3; 727 uint16_t offset4; 728 uint16_t offset5; 729 } __packed; 730 731 /* 732 * According to Spec Core v5.3, section 2.4.2.17 733 * LL_CONNECTION_PARAM_RSP and LL_CONNECTION_PARAM_REQ are identical 734 * This is utilized in pdu encode/decode, and for this is needed a common struct 735 */ 736 struct pdu_data_llctrl_conn_param_req_rsp_common { 737 uint16_t interval_min; 738 uint16_t interval_max; 739 uint16_t latency; 740 uint16_t timeout; 741 uint8_t preferred_periodicity; 742 uint16_t reference_conn_event_count; 743 uint16_t offset0; 744 uint16_t offset1; 745 uint16_t offset2; 746 uint16_t offset3; 747 uint16_t offset4; 748 uint16_t offset5; 749 } __packed; 750 751 struct pdu_data_llctrl_reject_ext_ind { 752 uint8_t reject_opcode; 753 uint8_t error_code; 754 } __packed; 755 756 struct pdu_data_llctrl_ping_req { 757 /* no members */ 758 } __packed; 759 760 struct pdu_data_llctrl_ping_rsp { 761 /* no members */ 762 } __packed; 763 764 struct pdu_data_llctrl_length_req { 765 uint16_t max_rx_octets; 766 uint16_t max_rx_time; 767 uint16_t max_tx_octets; 768 uint16_t max_tx_time; 769 } __packed; 770 771 struct pdu_data_llctrl_length_rsp { 772 uint16_t max_rx_octets; 773 uint16_t max_rx_time; 774 uint16_t max_tx_octets; 775 uint16_t max_tx_time; 776 } __packed; 777 778 /* 779 * According to Spec Core v5.3, section 2.4.2.21 780 * LL_LENGTH_REQ and LL_LENGTH_RSP are identical 781 * This is utilized in pdu encode/decode, and for this is needed a common struct 782 */ 783 struct pdu_data_llctrl_length_req_rsp_common { 784 uint16_t max_rx_octets; 785 uint16_t max_rx_time; 786 uint16_t max_tx_octets; 787 uint16_t max_tx_time; 788 } __packed; 789 790 struct pdu_data_llctrl_phy_req { 791 uint8_t tx_phys; 792 uint8_t rx_phys; 793 } __packed; 794 795 struct pdu_data_llctrl_phy_rsp { 796 uint8_t tx_phys; 797 uint8_t rx_phys; 798 } __packed; 799 800 struct pdu_data_llctrl_phy_upd_ind { 801 uint8_t c_to_p_phy; 802 uint8_t p_to_c_phy; 803 uint16_t instant; 804 } __packed; 805 806 struct pdu_data_llctrl_min_used_chans_ind { 807 uint8_t phys; 808 uint8_t min_used_chans; 809 } __packed; 810 811 struct pdu_data_llctrl_cte_req { 812 #ifdef CONFIG_LITTLE_ENDIAN 813 uint8_t min_cte_len_req : 5; 814 uint8_t rfu : 1; 815 uint8_t cte_type_req : 2; 816 #else 817 uint8_t cte_type_req : 2; 818 uint8_t rfu : 1; 819 uint8_t min_cte_len_req : 5; 820 #endif /* CONFIG_LITTLE_ENDIAN */ 821 } __packed; 822 823 struct pdu_data_llctrl_cte_rsp { 824 /* no members */ 825 } __packed; 826 827 struct pdu_data_llctrl_clock_accuracy_req { 828 uint8_t sca; 829 } __packed; 830 831 struct pdu_data_llctrl_clock_accuracy_rsp { 832 uint8_t sca; 833 } __packed; 834 835 struct pdu_data_llctrl_cis_req { 836 uint8_t cig_id; 837 uint8_t cis_id; 838 uint8_t c_phy; 839 uint8_t p_phy; 840 /* c_max_sdu:12 841 * rfu:3 842 * framed:1 843 * NOTE: This layout as bitfields is not portable for BE using 844 * endianness conversion macros. 845 */ 846 uint8_t c_max_sdu_packed[2]; 847 /* p_max_sdu:12 848 * rfu:4 849 * NOTE: This layout as bitfields is not portable for BE using 850 * endianness conversion macros. 851 */ 852 uint8_t p_max_sdu[2]; 853 uint8_t c_sdu_interval[3]; 854 uint8_t p_sdu_interval[3]; 855 uint16_t c_max_pdu; 856 uint16_t p_max_pdu; 857 uint8_t nse; 858 uint8_t sub_interval[3]; 859 #ifdef CONFIG_LITTLE_ENDIAN 860 uint8_t c_bn:4; 861 uint8_t p_bn:4; 862 #else 863 uint8_t p_bn:4; 864 uint8_t c_bn:4; 865 #endif /* CONFIG_LITTLE_ENDIAN */ 866 uint8_t c_ft; 867 uint8_t p_ft; 868 uint16_t iso_interval; 869 uint8_t cis_offset_min[3]; 870 uint8_t cis_offset_max[3]; 871 uint16_t conn_event_count; 872 } __packed; 873 874 struct pdu_data_llctrl_cis_rsp { 875 uint8_t cis_offset_min[3]; 876 uint8_t cis_offset_max[3]; 877 uint16_t conn_event_count; 878 } __packed; 879 880 struct pdu_data_llctrl_cis_ind { 881 uint8_t aa[4]; 882 uint8_t cis_offset[3]; 883 uint8_t cig_sync_delay[3]; 884 uint8_t cis_sync_delay[3]; 885 uint16_t conn_event_count; 886 } __packed; 887 888 struct pdu_data_llctrl_cis_terminate_ind { 889 uint8_t cig_id; 890 uint8_t cis_id; 891 uint8_t error_code; 892 } __packed; 893 894 struct pdu_data_llctrl_periodic_sync_ind { 895 uint16_t id; 896 struct pdu_adv_sync_info sync_info; 897 uint16_t conn_event_count; 898 uint16_t last_pa_event_counter; 899 #ifdef CONFIG_LITTLE_ENDIAN 900 uint8_t sid:4; 901 uint8_t addr_type:1; 902 uint8_t sca:3; 903 #else 904 uint8_t sca:3; 905 uint8_t addr_type:1; 906 uint8_t sid:4; 907 #endif /* CONFIG_LITTLE_ENDIAN */ 908 uint8_t phy; 909 uint8_t adv_addr[6]; 910 uint16_t sync_conn_event_count; 911 } __packed; 912 913 struct pdu_data_llctrl { 914 uint8_t opcode; 915 union { 916 struct pdu_data_llctrl_conn_update_ind conn_update_ind; 917 struct pdu_data_llctrl_chan_map_ind chan_map_ind; 918 struct pdu_data_llctrl_terminate_ind terminate_ind; 919 struct pdu_data_llctrl_enc_req enc_req; 920 struct pdu_data_llctrl_enc_rsp enc_rsp; 921 struct pdu_data_llctrl_start_enc_req start_enc_req; 922 struct pdu_data_llctrl_start_enc_rsp start_enc_rsp; 923 struct pdu_data_llctrl_unknown_rsp unknown_rsp; 924 struct pdu_data_llctrl_feature_req feature_req; 925 struct pdu_data_llctrl_feature_rsp feature_rsp; 926 struct pdu_data_llctrl_pause_enc_req pause_enc_req; 927 struct pdu_data_llctrl_pause_enc_rsp pause_enc_rsp; 928 struct pdu_data_llctrl_version_ind version_ind; 929 struct pdu_data_llctrl_reject_ind reject_ind; 930 struct pdu_data_llctrl_per_init_feat_xchg per_init_feat_xchg; 931 struct pdu_data_llctrl_conn_param_req conn_param_req; 932 struct pdu_data_llctrl_conn_param_rsp conn_param_rsp; 933 struct pdu_data_llctrl_reject_ext_ind reject_ext_ind; 934 struct pdu_data_llctrl_ping_req ping_req; 935 struct pdu_data_llctrl_ping_rsp ping_rsp; 936 struct pdu_data_llctrl_length_req length_req; 937 struct pdu_data_llctrl_length_rsp length_rsp; 938 struct pdu_data_llctrl_phy_req phy_req; 939 struct pdu_data_llctrl_phy_rsp phy_rsp; 940 struct pdu_data_llctrl_phy_upd_ind phy_upd_ind; 941 struct pdu_data_llctrl_min_used_chans_ind min_used_chans_ind; 942 struct pdu_data_llctrl_cte_req cte_req; 943 struct pdu_data_llctrl_cte_rsp cte_rsp; 944 struct pdu_data_llctrl_clock_accuracy_req clock_accuracy_req; 945 struct pdu_data_llctrl_clock_accuracy_rsp clock_accuracy_rsp; 946 struct pdu_data_llctrl_cis_req cis_req; 947 struct pdu_data_llctrl_cis_rsp cis_rsp; 948 struct pdu_data_llctrl_cis_ind cis_ind; 949 struct pdu_data_llctrl_cis_terminate_ind cis_terminate_ind; 950 struct pdu_data_llctrl_periodic_sync_ind periodic_sync_ind; 951 } __packed; 952 } __packed; 953 954 #define PDU_DATA_LLCTRL_LEN(type) (offsetof(struct pdu_data_llctrl, type) + \ 955 sizeof(struct pdu_data_llctrl_ ## type)) 956 957 #if defined(CONFIG_BT_CTLR_PROFILE_ISR) 958 struct profile { 959 uint16_t lcur; 960 uint16_t lmin; 961 uint16_t lmax; 962 uint16_t cur; 963 uint16_t min; 964 uint16_t max; 965 uint16_t radio; 966 uint16_t lll; 967 uint16_t ull_high; 968 uint16_t ull_low; 969 uint8_t radio_ticks; 970 uint8_t lll_ticks; 971 uint8_t ull_high_ticks; 972 uint8_t ull_low_ticks; 973 } __packed; 974 #endif /* CONFIG_BT_CTLR_PROFILE_ISR */ 975 976 struct pdu_data { 977 #ifdef CONFIG_LITTLE_ENDIAN 978 uint8_t ll_id:2; 979 uint8_t nesn:1; 980 uint8_t sn:1; 981 uint8_t md:1; 982 #if defined(CONFIG_BT_CTLR_DF_CONN_CTE_TX) || defined(CONFIG_BT_CTLR_DF_CONN_CTE_RX) 983 uint8_t cp:1; 984 uint8_t rfu:2; 985 #else 986 uint8_t rfu:3; 987 #endif 988 #else 989 #if defined(CONFIG_BT_CTLR_DF_CONN_CTE_TX) || defined(CONFIG_BT_CTLR_DF_CONN_CTE_RX) 990 uint8_t rfu:2; 991 uint8_t cp:1; 992 #else 993 uint8_t rfu:3; 994 #endif 995 uint8_t md:1; 996 uint8_t sn:1; 997 uint8_t nesn:1; 998 uint8_t ll_id:2; 999 #endif /* CONFIG_LITTLE_ENDIAN */ 1000 1001 uint8_t len; 1002 1003 struct pdu_data_vnd_octet3 octet3; 1004 1005 union { 1006 struct pdu_data_llctrl llctrl; 1007 uint8_t lldata[0]; 1008 1009 #if defined(CONFIG_BT_CTLR_CONN_RSSI) 1010 uint8_t rssi; 1011 #endif /* CONFIG_BT_CTLR_CONN_RSSI */ 1012 1013 #if defined(CONFIG_BT_CTLR_PROFILE_ISR) 1014 struct profile profile; 1015 #endif /* CONFIG_BT_CTLR_PROFILE_ISR */ 1016 } __packed; 1017 } __packed; 1018 1019 /* Generic ISO pdu, could be CIS or BIS 1020 * To be used when referring to component without knowing CIS or BIS type 1021 */ 1022 struct pdu_iso { 1023 #ifdef CONFIG_LITTLE_ENDIAN 1024 uint8_t ll_id:2; 1025 uint8_t hdr_other:6; 1026 #else 1027 uint8_t hdr_other:6; 1028 uint8_t ll_id:2; 1029 #endif /* CONFIG_LITTLE_ENDIAN */ 1030 1031 uint8_t len; 1032 1033 struct pdu_iso_vnd_octet3 octet3; 1034 1035 uint8_t payload[0]; 1036 } __packed; 1037 1038 /* ISO SDU segmentation header */ 1039 #define PDU_ISO_SEG_HDR_SIZE 2 1040 #define PDU_ISO_SEG_TIMEOFFSET_SIZE 3 1041 1042 struct pdu_iso_sdu_sh { 1043 #ifdef CONFIG_LITTLE_ENDIAN 1044 uint8_t sc:1; 1045 uint8_t cmplt:1; 1046 uint8_t rfu:6; 1047 1048 uint8_t len; 1049 /* Note, timeoffset only available in first segment of sdu */ 1050 uint32_t timeoffset:24; 1051 uint32_t payload:8; 1052 #else 1053 uint8_t rfu:6; 1054 uint8_t cmplt:1; 1055 uint8_t sc:1; 1056 1057 uint8_t len; 1058 1059 /* Note, timeoffset only available in first segment of sdu */ 1060 uint32_t timeoffset:24; 1061 uint32_t payload:8; 1062 #endif /* CONFIG_LITTLE_ENDIAN */ 1063 } __packed; 1064 1065 enum pdu_cis_llid { 1066 /** Unframed complete or end fragment */ 1067 PDU_CIS_LLID_COMPLETE_END = 0x00, 1068 /** Unframed start or continuation fragment */ 1069 PDU_CIS_LLID_START_CONTINUE = 0x01, 1070 /** Framed; one or more segments of a SDU */ 1071 PDU_CIS_LLID_FRAMED = 0x02 1072 }; 1073 1074 struct pdu_cis { 1075 #ifdef CONFIG_LITTLE_ENDIAN 1076 uint8_t ll_id:2; 1077 uint8_t nesn:1; 1078 uint8_t sn:1; 1079 uint8_t cie:1; 1080 uint8_t rfu0:1; 1081 uint8_t npi:1; 1082 uint8_t rfu1:1; 1083 #else 1084 uint8_t rfu1:1; 1085 uint8_t npi:1; 1086 uint8_t rfu0:1; 1087 uint8_t cie:1; 1088 uint8_t sn:1; 1089 uint8_t nesn:1; 1090 uint8_t ll_id:2; 1091 #endif /* CONFIG_LITTLE_ENDIAN */ 1092 1093 uint8_t len; 1094 1095 struct pdu_cis_vnd_octet3 octet3; 1096 1097 uint8_t payload[0]; 1098 } __packed; 1099 1100 enum pdu_big_ctrl_type { 1101 PDU_BIG_CTRL_TYPE_CHAN_MAP_IND = 0x00, 1102 PDU_BIG_CTRL_TYPE_TERM_IND = 0x01, 1103 }; 1104 1105 struct pdu_big_ctrl_chan_map_ind { 1106 uint8_t chm[PDU_CHANNEL_MAP_SIZE]; 1107 uint16_t instant; 1108 } __packed; 1109 1110 struct pdu_big_ctrl_term_ind { 1111 uint8_t reason; 1112 uint16_t instant; 1113 } __packed; 1114 1115 1116 struct pdu_big_ctrl { 1117 uint8_t opcode; 1118 union { 1119 uint8_t ctrl_data[0]; 1120 struct pdu_big_ctrl_chan_map_ind chan_map_ind; 1121 struct pdu_big_ctrl_term_ind term_ind; 1122 } __packed; 1123 } __packed; 1124 1125 enum pdu_bis_llid { 1126 /** Unframed complete or end fragment */ 1127 PDU_BIS_LLID_COMPLETE_END = 0x00, 1128 /** Unframed start or continuation fragment */ 1129 PDU_BIS_LLID_START_CONTINUE = 0x01, 1130 /** Framed; one or more segments of a SDU */ 1131 PDU_BIS_LLID_FRAMED = 0x02, 1132 /** BIG Control PDU */ 1133 PDU_BIS_LLID_CTRL = 0x03, 1134 }; 1135 1136 struct pdu_bis { 1137 #ifdef CONFIG_LITTLE_ENDIAN 1138 uint8_t ll_id:2; 1139 uint8_t cssn:3; 1140 uint8_t cstf:1; 1141 uint8_t rfu:2; 1142 #else 1143 uint8_t rfu:2; 1144 uint8_t cstf:1; 1145 uint8_t cssn:3; 1146 uint8_t ll_id:2; 1147 #endif /* CONFIG_LITTLE_ENDIAN */ 1148 1149 uint8_t len; 1150 1151 struct pdu_bis_vnd_octet3 octet3; 1152 1153 union { 1154 uint8_t payload[0]; 1155 struct pdu_big_ctrl ctrl; 1156 } __packed; 1157 } __packed; 1158 1159 struct pdu_big_info { 1160 /* offs:14 [0].0 - [1].5 1161 * offs_units:1 [1].6 1162 * iso_interval:12 [1].7 - [3].2 1163 * num_bis:5 [3].3 - [3].7 1164 */ 1165 uint8_t bi_packed_0_3[4]; 1166 1167 /* nse:5 [0].0 - [0].4 1168 * bn:3 [0].5 - [0].7 1169 * sub_interval:20 [1].0 - [3].3 1170 * pto:4 [3].4 - [3].7 1171 */ 1172 uint8_t bi_packed_4_7[4]; 1173 1174 /* spacing:20 [0].0 - [2].3 1175 * irc:4 [2].4 - [2].7 1176 */ 1177 uint8_t bi_packed_8_11[3]; 1178 1179 uint8_t max_pdu; 1180 1181 uint8_t rfu; 1182 1183 uint32_t seed_access_addr; 1184 1185 /* sdu_interval:20 [0].0 - [2].3 1186 * max_sdu:12; [2].4 - [3].7 1187 */ 1188 uint8_t sdu_packed[4]; 1189 1190 uint16_t base_crc_init; 1191 1192 uint8_t chm_phy[PDU_CHANNEL_MAP_SIZE]; /* 37 bit chm; 3 bit phy */ 1193 uint8_t payload_count_framing[5]; /* 39 bit count; 1 bit framing */ 1194 1195 uint8_t giv[8]; /* encryption required */ 1196 uint8_t gskd[16]; /* encryption required */ 1197 } __packed; 1198 #define PDU_BIG_INFO_CLEARTEXT_SIZE offsetof(struct pdu_big_info, giv) 1199 #define PDU_BIG_INFO_ENCRYPTED_SIZE sizeof(struct pdu_big_info) 1200 #define PDU_BIG_BN_MAX 0x07 1201 #define PDU_BIG_PAYLOAD_COUNT_MAX 28 1202 1203 #define PDU_BIG_INFO_OFFS_GET(bi) \ 1204 util_get_bits(&(bi)->bi_packed_0_3[0], 0, 14) 1205 #define PDU_BIG_INFO_OFFS_UNITS_GET(bi) \ 1206 util_get_bits(&(bi)->bi_packed_0_3[1], 6, 1) 1207 #define PDU_BIG_INFO_ISO_INTERVAL_GET(bi) \ 1208 util_get_bits(&(bi)->bi_packed_0_3[1], 7, 12) 1209 #define PDU_BIG_INFO_NUM_BIS_GET(bi) \ 1210 util_get_bits(&(bi)->bi_packed_0_3[3], 3, 5) 1211 #define PDU_BIG_INFO_NSE_GET(bi) \ 1212 util_get_bits(&(bi)->bi_packed_4_7[0], 0, 5) 1213 #define PDU_BIG_INFO_BN_GET(bi) \ 1214 util_get_bits(&(bi)->bi_packed_4_7[0], 5, 3) 1215 #define PDU_BIG_INFO_SUB_INTERVAL_GET(bi) \ 1216 util_get_bits(&(bi)->bi_packed_4_7[1], 0, 20) 1217 #define PDU_BIG_INFO_PTO_GET(bi) \ 1218 util_get_bits(&(bi)->bi_packed_4_7[3], 4, 4) 1219 #define PDU_BIG_INFO_SPACING_GET(bi) \ 1220 util_get_bits(&(bi)->bi_packed_8_11[0], 0, 20) 1221 #define PDU_BIG_INFO_IRC_GET(bi) \ 1222 util_get_bits(&(bi)->bi_packed_8_11[2], 4, 4) 1223 #define PDU_BIG_INFO_SDU_INTERVAL_GET(bi) \ 1224 util_get_bits(&(bi)->sdu_packed[0], 0, 20) 1225 #define PDU_BIG_INFO_MAX_SDU_GET(bi) \ 1226 util_get_bits(&(bi)->sdu_packed[2], 4, 12) 1227 1228 #define PDU_BIG_INFO_OFFS_SET(bi, val) \ 1229 util_set_bits(&(bi)->bi_packed_0_3[0], 0, 14, val) 1230 #define PDU_BIG_INFO_OFFS_UNITS_SET(bi, val) \ 1231 util_set_bits(&(bi)->bi_packed_0_3[1], 6, 1, val) 1232 #define PDU_BIG_INFO_ISO_INTERVAL_SET(bi, val) \ 1233 util_set_bits(&(bi)->bi_packed_0_3[1], 7, 12, val) 1234 #define PDU_BIG_INFO_NUM_BIS_SET(bi, val) \ 1235 util_set_bits(&(bi)->bi_packed_0_3[3], 3, 5, val) 1236 #define PDU_BIG_INFO_NSE_SET(bi, val) \ 1237 util_set_bits(&(bi)->bi_packed_4_7[0], 0, 5, val) 1238 #define PDU_BIG_INFO_BN_SET(bi, val) \ 1239 util_set_bits(&(bi)->bi_packed_4_7[0], 5, 3, val) 1240 #define PDU_BIG_INFO_SUB_INTERVAL_SET(bi, val) \ 1241 util_set_bits(&(bi)->bi_packed_4_7[1], 0, 20, val) 1242 #define PDU_BIG_INFO_PTO_SET(bi, val) \ 1243 util_set_bits(&(bi)->bi_packed_4_7[3], 4, 4, val) 1244 #define PDU_BIG_INFO_SPACING_SET(bi, val) \ 1245 util_set_bits(&(bi)->bi_packed_8_11[0], 0, 20, val) 1246 #define PDU_BIG_INFO_IRC_SET(bi, val) \ 1247 util_set_bits(&(bi)->bi_packed_8_11[2], 4, 4, val) 1248 #define PDU_BIG_INFO_SDU_INTERVAL_SET(bi, val) \ 1249 util_set_bits(&(bi)->sdu_packed[0], 0, 20, val) 1250 #define PDU_BIG_INFO_MAX_SDU_SET(bi, val) \ 1251 util_set_bits(&(bi)->sdu_packed[2], 4, 12, val) 1252 1253 struct pdu_dtm { 1254 #ifdef CONFIG_LITTLE_ENDIAN 1255 uint8_t type:4; 1256 uint8_t rfu0:1; 1257 #if defined(CONFIG_BT_CTLR_DF_CTE_TX) 1258 uint8_t cp:1; 1259 uint8_t rfu1:2; 1260 #else 1261 uint8_t rfu1:3; 1262 #endif 1263 #else 1264 #if defined(CONFIG_BT_CTLR_DF_CTE_TX) 1265 uint8_t rfu1:2; 1266 uint8_t cp:1; 1267 #else 1268 uint8_t rfu1:3; 1269 #endif 1270 uint8_t rfu0:1; 1271 uint8_t type:4; 1272 #endif /* CONFIG_LITTLE_ENDIAN */ 1273 1274 uint8_t len; 1275 1276 struct pdu_data_vnd_octet3 octet3; 1277 1278 uint8_t payload[0]; 1279 } __packed; 1280 1281 /* Direct Test Mode maximum payload size */ 1282 #define PDU_DTM_PAYLOAD_SIZE_MAX 255 1283
