1 /***************************************************************************//**
2 * @file
3 * @brief Analog to Digital Converter (ADC) peripheral API
4 *******************************************************************************
5 * # License
6 * <b>Copyright 2018 Silicon Laboratories Inc. www.silabs.com</b>
7 *******************************************************************************
8 *
9 * SPDX-License-Identifier: Zlib
10 *
11 * The licensor of this software is Silicon Laboratories Inc.
12 *
13 * This software is provided 'as-is', without any express or implied
14 * warranty. In no event will the authors be held liable for any damages
15 * arising from the use of this software.
16 *
17 * Permission is granted to anyone to use this software for any purpose,
18 * including commercial applications, and to alter it and redistribute it
19 * freely, subject to the following restrictions:
20 *
21 * 1. The origin of this software must not be misrepresented; you must not
22 * claim that you wrote the original software. If you use this software
23 * in a product, an acknowledgment in the product documentation would be
24 * appreciated but is not required.
25 * 2. Altered source versions must be plainly marked as such, and must not be
26 * misrepresented as being the original software.
27 * 3. This notice may not be removed or altered from any source distribution.
28 *
29 ******************************************************************************/
30
31 #ifndef EM_ADC_H
32 #define EM_ADC_H
33
34 #include "em_device.h"
35 #if defined(ADC_COUNT) && (ADC_COUNT > 0)
36
37 #include <stdbool.h>
38
39 #ifdef __cplusplus
40 extern "C" {
41 #endif
42
43 /***************************************************************************//**
44 * @addtogroup adc
45 * @{
46 ******************************************************************************/
47
48 /*******************************************************************************
49 ******************************** ENUMS ************************************
50 ******************************************************************************/
51
52 /** Acquisition time (in ADC clock cycles). */
53 typedef enum {
54 adcAcqTime1 = _ADC_SINGLECTRL_AT_1CYCLE, /**< 1 clock cycle. */
55 adcAcqTime2 = _ADC_SINGLECTRL_AT_2CYCLES, /**< 2 clock cycles. */
56 adcAcqTime4 = _ADC_SINGLECTRL_AT_4CYCLES, /**< 4 clock cycles. */
57 adcAcqTime8 = _ADC_SINGLECTRL_AT_8CYCLES, /**< 8 clock cycles. */
58 adcAcqTime16 = _ADC_SINGLECTRL_AT_16CYCLES, /**< 16 clock cycles. */
59 adcAcqTime32 = _ADC_SINGLECTRL_AT_32CYCLES, /**< 32 clock cycles. */
60 adcAcqTime64 = _ADC_SINGLECTRL_AT_64CYCLES, /**< 64 clock cycles. */
61 adcAcqTime128 = _ADC_SINGLECTRL_AT_128CYCLES, /**< 128 clock cycles. */
62 adcAcqTime256 = _ADC_SINGLECTRL_AT_256CYCLES /**< 256 clock cycles. */
63 } ADC_AcqTime_TypeDef;
64
65 #if defined(_ADC_CTRL_LPFMODE_MASK)
66 /** Lowpass filter mode. */
67 typedef enum {
68 /** No filter or decoupling capacitor. */
69 adcLPFilterBypass = _ADC_CTRL_LPFMODE_BYPASS,
70
71 /** On-chip RC filter. */
72 adcLPFilterRC = _ADC_CTRL_LPFMODE_RCFILT,
73
74 /** On-chip decoupling capacitor. */
75 adcLPFilterDeCap = _ADC_CTRL_LPFMODE_DECAP
76 } ADC_LPFilter_TypeDef;
77 #endif
78
79 /** Oversample rate select. */
80 typedef enum {
81 /** 2 samples per conversion result. */
82 adcOvsRateSel2 = _ADC_CTRL_OVSRSEL_X2,
83
84 /** 4 samples per conversion result. */
85 adcOvsRateSel4 = _ADC_CTRL_OVSRSEL_X4,
86
87 /** 8 samples per conversion result. */
88 adcOvsRateSel8 = _ADC_CTRL_OVSRSEL_X8,
89
90 /** 16 samples per conversion result. */
91 adcOvsRateSel16 = _ADC_CTRL_OVSRSEL_X16,
92
93 /** 32 samples per conversion result. */
94 adcOvsRateSel32 = _ADC_CTRL_OVSRSEL_X32,
95
96 /** 64 samples per conversion result. */
97 adcOvsRateSel64 = _ADC_CTRL_OVSRSEL_X64,
98
99 /** 128 samples per conversion result. */
100 adcOvsRateSel128 = _ADC_CTRL_OVSRSEL_X128,
101
102 /** 256 samples per conversion result. */
103 adcOvsRateSel256 = _ADC_CTRL_OVSRSEL_X256,
104
105 /** 512 samples per conversion result. */
106 adcOvsRateSel512 = _ADC_CTRL_OVSRSEL_X512,
107
108 /** 1024 samples per conversion result. */
109 adcOvsRateSel1024 = _ADC_CTRL_OVSRSEL_X1024,
110
111 /** 2048 samples per conversion result. */
112 adcOvsRateSel2048 = _ADC_CTRL_OVSRSEL_X2048,
113
114 /** 4096 samples per conversion result. */
115 adcOvsRateSel4096 = _ADC_CTRL_OVSRSEL_X4096
116 } ADC_OvsRateSel_TypeDef;
117
118 /** Peripheral Reflex System signal used to trigger a single sample. */
119 typedef enum {
120 #if defined(_ADC_SINGLECTRL_PRSSEL_MASK)
121 adcPRSSELCh0 = _ADC_SINGLECTRL_PRSSEL_PRSCH0, /**< PRS channel 0. */
122 adcPRSSELCh1 = _ADC_SINGLECTRL_PRSSEL_PRSCH1, /**< PRS channel 1. */
123 adcPRSSELCh2 = _ADC_SINGLECTRL_PRSSEL_PRSCH2, /**< PRS channel 2. */
124 adcPRSSELCh3 = _ADC_SINGLECTRL_PRSSEL_PRSCH3, /**< PRS channel 3. */
125 #if defined(_ADC_SINGLECTRL_PRSSEL_PRSCH4)
126 adcPRSSELCh4 = _ADC_SINGLECTRL_PRSSEL_PRSCH4, /**< PRS channel 4. */
127 #endif
128 #if defined(_ADC_SINGLECTRL_PRSSEL_PRSCH5)
129 adcPRSSELCh5 = _ADC_SINGLECTRL_PRSSEL_PRSCH5, /**< PRS channel 5. */
130 #endif
131 #if defined(_ADC_SINGLECTRL_PRSSEL_PRSCH6)
132 adcPRSSELCh6 = _ADC_SINGLECTRL_PRSSEL_PRSCH6, /**< PRS channel 6. */
133 #endif
134 #if defined(_ADC_SINGLECTRL_PRSSEL_PRSCH7)
135 adcPRSSELCh7 = _ADC_SINGLECTRL_PRSSEL_PRSCH7, /**< PRS channel 7. */
136 #endif
137 #if defined(_ADC_SINGLECTRL_PRSSEL_PRSCH8)
138 adcPRSSELCh8 = _ADC_SINGLECTRL_PRSSEL_PRSCH8, /**< PRS channel 8. */
139 #endif
140 #if defined(_ADC_SINGLECTRL_PRSSEL_PRSCH9)
141 adcPRSSELCh9 = _ADC_SINGLECTRL_PRSSEL_PRSCH9, /**< PRS channel 9. */
142 #endif
143 #if defined(_ADC_SINGLECTRL_PRSSEL_PRSCH10)
144 adcPRSSELCh10 = _ADC_SINGLECTRL_PRSSEL_PRSCH10, /**< PRS channel 10. */
145 #endif
146 #if defined(_ADC_SINGLECTRL_PRSSEL_PRSCH11)
147 adcPRSSELCh11 = _ADC_SINGLECTRL_PRSSEL_PRSCH11, /**< PRS channel 11. */
148 #endif
149 #elif defined(_ADC_SINGLECTRLX_PRSSEL_MASK)
150 adcPRSSELCh0 = _ADC_SINGLECTRLX_PRSSEL_PRSCH0, /**< PRS channel 0. */
151 adcPRSSELCh1 = _ADC_SINGLECTRLX_PRSSEL_PRSCH1, /**< PRS channel 1. */
152 adcPRSSELCh2 = _ADC_SINGLECTRLX_PRSSEL_PRSCH2, /**< PRS channel 2. */
153 adcPRSSELCh3 = _ADC_SINGLECTRLX_PRSSEL_PRSCH3, /**< PRS channel 3. */
154 adcPRSSELCh4 = _ADC_SINGLECTRLX_PRSSEL_PRSCH4, /**< PRS channel 4. */
155 adcPRSSELCh5 = _ADC_SINGLECTRLX_PRSSEL_PRSCH5, /**< PRS channel 5. */
156 adcPRSSELCh6 = _ADC_SINGLECTRLX_PRSSEL_PRSCH6, /**< PRS channel 6. */
157 adcPRSSELCh7 = _ADC_SINGLECTRLX_PRSSEL_PRSCH7, /**< PRS channel 7. */
158 #if defined(_ADC_SINGLECTRLX_PRSSEL_PRSCH8)
159 adcPRSSELCh8 = _ADC_SINGLECTRLX_PRSSEL_PRSCH8, /**< PRS channel 8. */
160 #endif
161 #if defined(_ADC_SINGLECTRLX_PRSSEL_PRSCH9)
162 adcPRSSELCh9 = _ADC_SINGLECTRLX_PRSSEL_PRSCH9, /**< PRS channel 9. */
163 #endif
164 #if defined(_ADC_SINGLECTRLX_PRSSEL_PRSCH10)
165 adcPRSSELCh10 = _ADC_SINGLECTRLX_PRSSEL_PRSCH10, /**< PRS channel 10. */
166 #endif
167 #if defined(_ADC_SINGLECTRLX_PRSSEL_PRSCH11)
168 adcPRSSELCh11 = _ADC_SINGLECTRLX_PRSSEL_PRSCH11, /**< PRS channel 11. */
169 #endif
170 #if defined(_ADC_SINGLECTRLX_PRSSEL_PRSCH12)
171 adcPRSSELCh12 = _ADC_SINGLECTRLX_PRSSEL_PRSCH12, /**< PRS channel 12. */
172 adcPRSSELCh13 = _ADC_SINGLECTRLX_PRSSEL_PRSCH13, /**< PRS channel 13. */
173 adcPRSSELCh14 = _ADC_SINGLECTRLX_PRSSEL_PRSCH14, /**< PRS channel 14. */
174 adcPRSSELCh15 = _ADC_SINGLECTRLX_PRSSEL_PRSCH15, /**< PRS channel 15. */
175 #endif
176 #endif
177 } ADC_PRSSEL_TypeDef;
178
179 /** Single and scan mode voltage references. Using unshifted enumerations and or
180 in ADC_CTRLX_VREFSEL_REG to select the extension register CTRLX_VREFSEL. */
181 #if defined(_ADC_SCANCTRLX_VREFSEL_MASK)
182 #define ADC_CTRLX_VREFSEL_REG 0x80UL
183 #endif
184 /** ADC Reference */
185 typedef enum {
186 /** Internal 1.25 V reference. */
187 adcRef1V25 = _ADC_SINGLECTRL_REF_1V25,
188
189 /** Internal 2.5 V reference. */
190 adcRef2V5 = _ADC_SINGLECTRL_REF_2V5,
191
192 /** Buffered VDD. */
193 adcRefVDD = _ADC_SINGLECTRL_REF_VDD,
194
195 #if defined(_ADC_SINGLECTRL_REF_5VDIFF)
196 /** Internal differential 5 V reference. */
197 adcRef5VDIFF = _ADC_SINGLECTRL_REF_5VDIFF,
198 #endif
199
200 #if defined(_ADC_SINGLECTRL_REF_5V)
201 /** Internal 5 V reference. */
202 adcRef5V = _ADC_SINGLECTRL_REF_5V,
203 #endif
204
205 /** Single-ended external reference from pin 6. */
206 adcRefExtSingle = _ADC_SINGLECTRL_REF_EXTSINGLE,
207
208 /** Differential external reference from pin 6 and 7. */
209 adcRef2xExtDiff = _ADC_SINGLECTRL_REF_2XEXTDIFF,
210
211 /** Unbuffered 2xVDD. */
212 adcRef2xVDD = _ADC_SINGLECTRL_REF_2XVDD,
213
214 #if defined(_ADC_SINGLECTRLX_VREFSEL_VBGR)
215 /** Custom VFS: Internal Bandgap reference. */
216 adcRefVBGR = _ADC_SINGLECTRLX_VREFSEL_VBGR | ADC_CTRLX_VREFSEL_REG,
217 #endif
218
219 #if defined(_ADC_SINGLECTRLX_VREFSEL_VDDXWATT)
220 /** Custom VFS: Scaled AVDD: AVDD * VREFATT. */
221 adcRefVddxAtt = _ADC_SINGLECTRLX_VREFSEL_VDDXWATT | ADC_CTRLX_VREFSEL_REG,
222 #endif
223
224 #if defined(_ADC_SINGLECTRLX_VREFSEL_VREFPWATT)
225 /** Custom VFS: Scaled singled ended external reference from pin 6:
226 VREFP * VREFATT. */
227 adcRefVPxAtt = _ADC_SINGLECTRLX_VREFSEL_VREFPWATT | ADC_CTRLX_VREFSEL_REG,
228 #endif
229
230 #if defined(_ADC_SINGLECTRLX_VREFSEL_VREFP)
231 /** Custom VFS: Raw single-ended external reference from pin 6. */
232 adcRefP = _ADC_SINGLECTRLX_VREFSEL_VREFP | ADC_CTRLX_VREFSEL_REG,
233 #endif
234
235 #if defined(_ADC_SINGLECTRLX_VREFSEL_VENTROPY)
236 /** Custom VFS: Special mode for entropy generation */
237 adcRefVEntropy = _ADC_SINGLECTRLX_VREFSEL_VENTROPY | ADC_CTRLX_VREFSEL_REG,
238 #endif
239
240 #if defined(_ADC_SINGLECTRLX_VREFSEL_VREFPNWATT)
241 /** Custom VFS: Scaled differential external Vref from pin 6 and 7:
242 (VREFP - VREFN) * VREFATT. */
243 adcRefVPNxAtt = _ADC_SINGLECTRLX_VREFSEL_VREFPNWATT | ADC_CTRLX_VREFSEL_REG,
244 #endif
245
246 #if defined(_ADC_SINGLECTRLX_VREFSEL_VREFPN)
247 /** Custom VFS: Raw differential external Vref from pin 6 and 7:
248 VREFP - VREFN. */
249 adcRefPN = _ADC_SINGLECTRLX_VREFSEL_VREFPN | ADC_CTRLX_VREFSEL_REG,
250 #endif
251 } ADC_Ref_TypeDef;
252
253 /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
254 /* Deprecated enum names */
255 #if !defined(_ADC_SINGLECTRL_REF_5VDIFF)
256 #define adcRef5VDIFF adcRef5V
257 #endif
258 /** @endcond */
259
260 /** Sample resolution. */
261 typedef enum {
262 adcRes12Bit = _ADC_SINGLECTRL_RES_12BIT, /**< 12 bit sampling. */
263 adcRes8Bit = _ADC_SINGLECTRL_RES_8BIT, /**< 8 bit sampling. */
264 adcRes6Bit = _ADC_SINGLECTRL_RES_6BIT, /**< 6 bit sampling. */
265 adcResOVS = _ADC_SINGLECTRL_RES_OVS /**< Oversampling. */
266 } ADC_Res_TypeDef;
267
268 #if defined(_ADC_SINGLECTRL_INPUTSEL_MASK)
269 /** Single sample input selection. */
270 typedef enum {
271 /* Differential mode disabled */
272 adcSingleInputCh0 = _ADC_SINGLECTRL_INPUTSEL_CH0, /**< Channel 0. */
273 adcSingleInputCh1 = _ADC_SINGLECTRL_INPUTSEL_CH1, /**< Channel 1. */
274 adcSingleInputCh2 = _ADC_SINGLECTRL_INPUTSEL_CH2, /**< Channel 2. */
275 adcSingleInputCh3 = _ADC_SINGLECTRL_INPUTSEL_CH3, /**< Channel 3. */
276 adcSingleInputCh4 = _ADC_SINGLECTRL_INPUTSEL_CH4, /**< Channel 4. */
277 adcSingleInputCh5 = _ADC_SINGLECTRL_INPUTSEL_CH5, /**< Channel 5. */
278 adcSingleInputCh6 = _ADC_SINGLECTRL_INPUTSEL_CH6, /**< Channel 6. */
279 adcSingleInputCh7 = _ADC_SINGLECTRL_INPUTSEL_CH7, /**< Channel 7. */
280 adcSingleInputTemp = _ADC_SINGLECTRL_INPUTSEL_TEMP, /**< Temperature reference. */
281 adcSingleInputVDDDiv3 = _ADC_SINGLECTRL_INPUTSEL_VDDDIV3, /**< VDD divided by 3. */
282 adcSingleInputVDD = _ADC_SINGLECTRL_INPUTSEL_VDD, /**< VDD. */
283 adcSingleInputVSS = _ADC_SINGLECTRL_INPUTSEL_VSS, /**< VSS. */
284 adcSingleInputVrefDiv2 = _ADC_SINGLECTRL_INPUTSEL_VREFDIV2, /**< Vref divided by 2. */
285 adcSingleInputDACOut0 = _ADC_SINGLECTRL_INPUTSEL_DAC0OUT0, /**< DAC output 0. */
286 adcSingleInputDACOut1 = _ADC_SINGLECTRL_INPUTSEL_DAC0OUT1, /**< DAC output 1. */
287 adcSingleInputATEST = 15, /**< ATEST. */
288
289 /* Differential mode enabled */
290 adcSingleInputCh0Ch1 = _ADC_SINGLECTRL_INPUTSEL_CH0CH1, /**< Positive Ch0, negative Ch1. */
291 adcSingleInputCh2Ch3 = _ADC_SINGLECTRL_INPUTSEL_CH2CH3, /**< Positive Ch2, negative Ch3. */
292 adcSingleInputCh4Ch5 = _ADC_SINGLECTRL_INPUTSEL_CH4CH5, /**< Positive Ch4, negative Ch5. */
293 adcSingleInputCh6Ch7 = _ADC_SINGLECTRL_INPUTSEL_CH6CH7, /**< Positive Ch6, negative Ch7. */
294 adcSingleInputDiff0 = 4 /**< Differential 0. */
295 } ADC_SingleInput_TypeDef;
296
297 /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
298 /* Deprecated enum names */
299 #define adcSingleInpCh0 adcSingleInputCh0
300 #define adcSingleInpCh1 adcSingleInputCh1
301 #define adcSingleInpCh2 adcSingleInputCh2
302 #define adcSingleInpCh3 adcSingleInputCh3
303 #define adcSingleInpCh4 adcSingleInputCh4
304 #define adcSingleInpCh5 adcSingleInputCh5
305 #define adcSingleInpCh6 adcSingleInputCh6
306 #define adcSingleInpCh7 adcSingleInputCh7
307 #define adcSingleInpTemp adcSingleInputTemp
308 #define adcSingleInpVDDDiv3 adcSingleInputVDDDiv3
309 #define adcSingleInpVDD adcSingleInputVDD
310 #define adcSingleInpVSS adcSingleInputVSS
311 #define adcSingleInpVrefDiv2 adcSingleInputVrefDiv2
312 #define adcSingleInpDACOut0 adcSingleInputDACOut0
313 #define adcSingleInpDACOut1 adcSingleInputDACOut1
314 #define adcSingleInpATEST adcSingleInputATEST
315 #define adcSingleInpCh0Ch1 adcSingleInputCh0Ch1
316 #define adcSingleInpCh2Ch3 adcSingleInputCh2Ch3
317 #define adcSingleInpCh4Ch5 adcSingleInputCh4Ch5
318 #define adcSingleInpCh6Ch7 adcSingleInputCh6Ch7
319 #define adcSingleInpDiff0 adcSingleInputDiff0
320 /** @endcond */
321 #endif
322
323 #if defined(_ADC_SINGLECTRL_POSSEL_MASK)
324 /** Positive input selection for single and scan conversion. */
325 typedef enum {
326 adcPosSelAPORT0XCH0 = _ADC_SINGLECTRL_POSSEL_APORT0XCH0,
327 adcPosSelAPORT0XCH1 = _ADC_SINGLECTRL_POSSEL_APORT0XCH1,
328 adcPosSelAPORT0XCH2 = _ADC_SINGLECTRL_POSSEL_APORT0XCH2,
329 adcPosSelAPORT0XCH3 = _ADC_SINGLECTRL_POSSEL_APORT0XCH3,
330 adcPosSelAPORT0XCH4 = _ADC_SINGLECTRL_POSSEL_APORT0XCH4,
331 adcPosSelAPORT0XCH5 = _ADC_SINGLECTRL_POSSEL_APORT0XCH5,
332 adcPosSelAPORT0XCH6 = _ADC_SINGLECTRL_POSSEL_APORT0XCH6,
333 adcPosSelAPORT0XCH7 = _ADC_SINGLECTRL_POSSEL_APORT0XCH7,
334 adcPosSelAPORT0XCH8 = _ADC_SINGLECTRL_POSSEL_APORT0XCH8,
335 adcPosSelAPORT0XCH9 = _ADC_SINGLECTRL_POSSEL_APORT0XCH9,
336 adcPosSelAPORT0XCH10 = _ADC_SINGLECTRL_POSSEL_APORT0XCH10,
337 adcPosSelAPORT0XCH11 = _ADC_SINGLECTRL_POSSEL_APORT0XCH11,
338 adcPosSelAPORT0XCH12 = _ADC_SINGLECTRL_POSSEL_APORT0XCH12,
339 adcPosSelAPORT0XCH13 = _ADC_SINGLECTRL_POSSEL_APORT0XCH13,
340 adcPosSelAPORT0XCH14 = _ADC_SINGLECTRL_POSSEL_APORT0XCH14,
341 adcPosSelAPORT0XCH15 = _ADC_SINGLECTRL_POSSEL_APORT0XCH15,
342 adcPosSelAPORT0YCH0 = _ADC_SINGLECTRL_POSSEL_APORT0YCH0,
343 adcPosSelAPORT0YCH1 = _ADC_SINGLECTRL_POSSEL_APORT0YCH1,
344 adcPosSelAPORT0YCH2 = _ADC_SINGLECTRL_POSSEL_APORT0YCH2,
345 adcPosSelAPORT0YCH3 = _ADC_SINGLECTRL_POSSEL_APORT0YCH3,
346 adcPosSelAPORT0YCH4 = _ADC_SINGLECTRL_POSSEL_APORT0YCH4,
347 adcPosSelAPORT0YCH5 = _ADC_SINGLECTRL_POSSEL_APORT0YCH5,
348 adcPosSelAPORT0YCH6 = _ADC_SINGLECTRL_POSSEL_APORT0YCH6,
349 adcPosSelAPORT0YCH7 = _ADC_SINGLECTRL_POSSEL_APORT0YCH7,
350 adcPosSelAPORT0YCH8 = _ADC_SINGLECTRL_POSSEL_APORT0YCH8,
351 adcPosSelAPORT0YCH9 = _ADC_SINGLECTRL_POSSEL_APORT0YCH9,
352 adcPosSelAPORT0YCH10 = _ADC_SINGLECTRL_POSSEL_APORT0YCH10,
353 adcPosSelAPORT0YCH11 = _ADC_SINGLECTRL_POSSEL_APORT0YCH11,
354 adcPosSelAPORT0YCH12 = _ADC_SINGLECTRL_POSSEL_APORT0YCH12,
355 adcPosSelAPORT0YCH13 = _ADC_SINGLECTRL_POSSEL_APORT0YCH13,
356 adcPosSelAPORT0YCH14 = _ADC_SINGLECTRL_POSSEL_APORT0YCH14,
357 adcPosSelAPORT0YCH15 = _ADC_SINGLECTRL_POSSEL_APORT0YCH15,
358 adcPosSelAPORT1XCH0 = _ADC_SINGLECTRL_POSSEL_APORT1XCH0,
359 adcPosSelAPORT1YCH1 = _ADC_SINGLECTRL_POSSEL_APORT1YCH1,
360 adcPosSelAPORT1XCH2 = _ADC_SINGLECTRL_POSSEL_APORT1XCH2,
361 adcPosSelAPORT1YCH3 = _ADC_SINGLECTRL_POSSEL_APORT1YCH3,
362 adcPosSelAPORT1XCH4 = _ADC_SINGLECTRL_POSSEL_APORT1XCH4,
363 adcPosSelAPORT1YCH5 = _ADC_SINGLECTRL_POSSEL_APORT1YCH5,
364 adcPosSelAPORT1XCH6 = _ADC_SINGLECTRL_POSSEL_APORT1XCH6,
365 adcPosSelAPORT1YCH7 = _ADC_SINGLECTRL_POSSEL_APORT1YCH7,
366 adcPosSelAPORT1XCH8 = _ADC_SINGLECTRL_POSSEL_APORT1XCH8,
367 adcPosSelAPORT1YCH9 = _ADC_SINGLECTRL_POSSEL_APORT1YCH9,
368 adcPosSelAPORT1XCH10 = _ADC_SINGLECTRL_POSSEL_APORT1XCH10,
369 adcPosSelAPORT1YCH11 = _ADC_SINGLECTRL_POSSEL_APORT1YCH11,
370 adcPosSelAPORT1XCH12 = _ADC_SINGLECTRL_POSSEL_APORT1XCH12,
371 adcPosSelAPORT1YCH13 = _ADC_SINGLECTRL_POSSEL_APORT1YCH13,
372 adcPosSelAPORT1XCH14 = _ADC_SINGLECTRL_POSSEL_APORT1XCH14,
373 adcPosSelAPORT1YCH15 = _ADC_SINGLECTRL_POSSEL_APORT1YCH15,
374 adcPosSelAPORT1XCH16 = _ADC_SINGLECTRL_POSSEL_APORT1XCH16,
375 adcPosSelAPORT1YCH17 = _ADC_SINGLECTRL_POSSEL_APORT1YCH17,
376 adcPosSelAPORT1XCH18 = _ADC_SINGLECTRL_POSSEL_APORT1XCH18,
377 adcPosSelAPORT1YCH19 = _ADC_SINGLECTRL_POSSEL_APORT1YCH19,
378 adcPosSelAPORT1XCH20 = _ADC_SINGLECTRL_POSSEL_APORT1XCH20,
379 adcPosSelAPORT1YCH21 = _ADC_SINGLECTRL_POSSEL_APORT1YCH21,
380 adcPosSelAPORT1XCH22 = _ADC_SINGLECTRL_POSSEL_APORT1XCH22,
381 adcPosSelAPORT1YCH23 = _ADC_SINGLECTRL_POSSEL_APORT1YCH23,
382 adcPosSelAPORT1XCH24 = _ADC_SINGLECTRL_POSSEL_APORT1XCH24,
383 adcPosSelAPORT1YCH25 = _ADC_SINGLECTRL_POSSEL_APORT1YCH25,
384 adcPosSelAPORT1XCH26 = _ADC_SINGLECTRL_POSSEL_APORT1XCH26,
385 adcPosSelAPORT1YCH27 = _ADC_SINGLECTRL_POSSEL_APORT1YCH27,
386 adcPosSelAPORT1XCH28 = _ADC_SINGLECTRL_POSSEL_APORT1XCH28,
387 adcPosSelAPORT1YCH29 = _ADC_SINGLECTRL_POSSEL_APORT1YCH29,
388 adcPosSelAPORT1XCH30 = _ADC_SINGLECTRL_POSSEL_APORT1XCH30,
389 adcPosSelAPORT1YCH31 = _ADC_SINGLECTRL_POSSEL_APORT1YCH31,
390 adcPosSelAPORT2YCH0 = _ADC_SINGLECTRL_POSSEL_APORT2YCH0,
391 adcPosSelAPORT2XCH1 = _ADC_SINGLECTRL_POSSEL_APORT2XCH1,
392 adcPosSelAPORT2YCH2 = _ADC_SINGLECTRL_POSSEL_APORT2YCH2,
393 adcPosSelAPORT2XCH3 = _ADC_SINGLECTRL_POSSEL_APORT2XCH3,
394 adcPosSelAPORT2YCH4 = _ADC_SINGLECTRL_POSSEL_APORT2YCH4,
395 adcPosSelAPORT2XCH5 = _ADC_SINGLECTRL_POSSEL_APORT2XCH5,
396 adcPosSelAPORT2YCH6 = _ADC_SINGLECTRL_POSSEL_APORT2YCH6,
397 adcPosSelAPORT2XCH7 = _ADC_SINGLECTRL_POSSEL_APORT2XCH7,
398 adcPosSelAPORT2YCH8 = _ADC_SINGLECTRL_POSSEL_APORT2YCH8,
399 adcPosSelAPORT2XCH9 = _ADC_SINGLECTRL_POSSEL_APORT2XCH9,
400 adcPosSelAPORT2YCH10 = _ADC_SINGLECTRL_POSSEL_APORT2YCH10,
401 adcPosSelAPORT2XCH11 = _ADC_SINGLECTRL_POSSEL_APORT2XCH11,
402 adcPosSelAPORT2YCH12 = _ADC_SINGLECTRL_POSSEL_APORT2YCH12,
403 adcPosSelAPORT2XCH13 = _ADC_SINGLECTRL_POSSEL_APORT2XCH13,
404 adcPosSelAPORT2YCH14 = _ADC_SINGLECTRL_POSSEL_APORT2YCH14,
405 adcPosSelAPORT2XCH15 = _ADC_SINGLECTRL_POSSEL_APORT2XCH15,
406 adcPosSelAPORT2YCH16 = _ADC_SINGLECTRL_POSSEL_APORT2YCH16,
407 adcPosSelAPORT2XCH17 = _ADC_SINGLECTRL_POSSEL_APORT2XCH17,
408 adcPosSelAPORT2YCH18 = _ADC_SINGLECTRL_POSSEL_APORT2YCH18,
409 adcPosSelAPORT2XCH19 = _ADC_SINGLECTRL_POSSEL_APORT2XCH19,
410 adcPosSelAPORT2YCH20 = _ADC_SINGLECTRL_POSSEL_APORT2YCH20,
411 adcPosSelAPORT2XCH21 = _ADC_SINGLECTRL_POSSEL_APORT2XCH21,
412 adcPosSelAPORT2YCH22 = _ADC_SINGLECTRL_POSSEL_APORT2YCH22,
413 adcPosSelAPORT2XCH23 = _ADC_SINGLECTRL_POSSEL_APORT2XCH23,
414 adcPosSelAPORT2YCH24 = _ADC_SINGLECTRL_POSSEL_APORT2YCH24,
415 adcPosSelAPORT2XCH25 = _ADC_SINGLECTRL_POSSEL_APORT2XCH25,
416 adcPosSelAPORT2YCH26 = _ADC_SINGLECTRL_POSSEL_APORT2YCH26,
417 adcPosSelAPORT2XCH27 = _ADC_SINGLECTRL_POSSEL_APORT2XCH27,
418 adcPosSelAPORT2YCH28 = _ADC_SINGLECTRL_POSSEL_APORT2YCH28,
419 adcPosSelAPORT2XCH29 = _ADC_SINGLECTRL_POSSEL_APORT2XCH29,
420 adcPosSelAPORT2YCH30 = _ADC_SINGLECTRL_POSSEL_APORT2YCH30,
421 adcPosSelAPORT2XCH31 = _ADC_SINGLECTRL_POSSEL_APORT2XCH31,
422 adcPosSelAPORT3XCH0 = _ADC_SINGLECTRL_POSSEL_APORT3XCH0,
423 adcPosSelAPORT3YCH1 = _ADC_SINGLECTRL_POSSEL_APORT3YCH1,
424 adcPosSelAPORT3XCH2 = _ADC_SINGLECTRL_POSSEL_APORT3XCH2,
425 adcPosSelAPORT3YCH3 = _ADC_SINGLECTRL_POSSEL_APORT3YCH3,
426 adcPosSelAPORT3XCH4 = _ADC_SINGLECTRL_POSSEL_APORT3XCH4,
427 adcPosSelAPORT3YCH5 = _ADC_SINGLECTRL_POSSEL_APORT3YCH5,
428 adcPosSelAPORT3XCH6 = _ADC_SINGLECTRL_POSSEL_APORT3XCH6,
429 adcPosSelAPORT3YCH7 = _ADC_SINGLECTRL_POSSEL_APORT3YCH7,
430 adcPosSelAPORT3XCH8 = _ADC_SINGLECTRL_POSSEL_APORT3XCH8,
431 adcPosSelAPORT3YCH9 = _ADC_SINGLECTRL_POSSEL_APORT3YCH9,
432 adcPosSelAPORT3XCH10 = _ADC_SINGLECTRL_POSSEL_APORT3XCH10,
433 adcPosSelAPORT3YCH11 = _ADC_SINGLECTRL_POSSEL_APORT3YCH11,
434 adcPosSelAPORT3XCH12 = _ADC_SINGLECTRL_POSSEL_APORT3XCH12,
435 adcPosSelAPORT3YCH13 = _ADC_SINGLECTRL_POSSEL_APORT3YCH13,
436 adcPosSelAPORT3XCH14 = _ADC_SINGLECTRL_POSSEL_APORT3XCH14,
437 adcPosSelAPORT3YCH15 = _ADC_SINGLECTRL_POSSEL_APORT3YCH15,
438 adcPosSelAPORT3XCH16 = _ADC_SINGLECTRL_POSSEL_APORT3XCH16,
439 adcPosSelAPORT3YCH17 = _ADC_SINGLECTRL_POSSEL_APORT3YCH17,
440 adcPosSelAPORT3XCH18 = _ADC_SINGLECTRL_POSSEL_APORT3XCH18,
441 adcPosSelAPORT3YCH19 = _ADC_SINGLECTRL_POSSEL_APORT3YCH19,
442 adcPosSelAPORT3XCH20 = _ADC_SINGLECTRL_POSSEL_APORT3XCH20,
443 adcPosSelAPORT3YCH21 = _ADC_SINGLECTRL_POSSEL_APORT3YCH21,
444 adcPosSelAPORT3XCH22 = _ADC_SINGLECTRL_POSSEL_APORT3XCH22,
445 adcPosSelAPORT3YCH23 = _ADC_SINGLECTRL_POSSEL_APORT3YCH23,
446 adcPosSelAPORT3XCH24 = _ADC_SINGLECTRL_POSSEL_APORT3XCH24,
447 adcPosSelAPORT3YCH25 = _ADC_SINGLECTRL_POSSEL_APORT3YCH25,
448 adcPosSelAPORT3XCH26 = _ADC_SINGLECTRL_POSSEL_APORT3XCH26,
449 adcPosSelAPORT3YCH27 = _ADC_SINGLECTRL_POSSEL_APORT3YCH27,
450 adcPosSelAPORT3XCH28 = _ADC_SINGLECTRL_POSSEL_APORT3XCH28,
451 adcPosSelAPORT3YCH29 = _ADC_SINGLECTRL_POSSEL_APORT3YCH29,
452 adcPosSelAPORT3XCH30 = _ADC_SINGLECTRL_POSSEL_APORT3XCH30,
453 adcPosSelAPORT3YCH31 = _ADC_SINGLECTRL_POSSEL_APORT3YCH31,
454 adcPosSelAPORT4YCH0 = _ADC_SINGLECTRL_POSSEL_APORT4YCH0,
455 adcPosSelAPORT4XCH1 = _ADC_SINGLECTRL_POSSEL_APORT4XCH1,
456 adcPosSelAPORT4YCH2 = _ADC_SINGLECTRL_POSSEL_APORT4YCH2,
457 adcPosSelAPORT4XCH3 = _ADC_SINGLECTRL_POSSEL_APORT4XCH3,
458 adcPosSelAPORT4YCH4 = _ADC_SINGLECTRL_POSSEL_APORT4YCH4,
459 adcPosSelAPORT4XCH5 = _ADC_SINGLECTRL_POSSEL_APORT4XCH5,
460 adcPosSelAPORT4YCH6 = _ADC_SINGLECTRL_POSSEL_APORT4YCH6,
461 adcPosSelAPORT4XCH7 = _ADC_SINGLECTRL_POSSEL_APORT4XCH7,
462 adcPosSelAPORT4YCH8 = _ADC_SINGLECTRL_POSSEL_APORT4YCH8,
463 adcPosSelAPORT4XCH9 = _ADC_SINGLECTRL_POSSEL_APORT4XCH9,
464 adcPosSelAPORT4YCH10 = _ADC_SINGLECTRL_POSSEL_APORT4YCH10,
465 adcPosSelAPORT4XCH11 = _ADC_SINGLECTRL_POSSEL_APORT4XCH11,
466 adcPosSelAPORT4YCH12 = _ADC_SINGLECTRL_POSSEL_APORT4YCH12,
467 adcPosSelAPORT4XCH13 = _ADC_SINGLECTRL_POSSEL_APORT4XCH13,
468 adcPosSelAPORT4YCH14 = _ADC_SINGLECTRL_POSSEL_APORT4YCH14,
469 adcPosSelAPORT4XCH15 = _ADC_SINGLECTRL_POSSEL_APORT4XCH15,
470 adcPosSelAPORT4YCH16 = _ADC_SINGLECTRL_POSSEL_APORT4YCH16,
471 adcPosSelAPORT4XCH17 = _ADC_SINGLECTRL_POSSEL_APORT4XCH17,
472 adcPosSelAPORT4YCH18 = _ADC_SINGLECTRL_POSSEL_APORT4YCH18,
473 adcPosSelAPORT4XCH19 = _ADC_SINGLECTRL_POSSEL_APORT4XCH19,
474 adcPosSelAPORT4YCH20 = _ADC_SINGLECTRL_POSSEL_APORT4YCH20,
475 adcPosSelAPORT4XCH21 = _ADC_SINGLECTRL_POSSEL_APORT4XCH21,
476 adcPosSelAPORT4YCH22 = _ADC_SINGLECTRL_POSSEL_APORT4YCH22,
477 adcPosSelAPORT4XCH23 = _ADC_SINGLECTRL_POSSEL_APORT4XCH23,
478 adcPosSelAPORT4YCH24 = _ADC_SINGLECTRL_POSSEL_APORT4YCH24,
479 adcPosSelAPORT4XCH25 = _ADC_SINGLECTRL_POSSEL_APORT4XCH25,
480 adcPosSelAPORT4YCH26 = _ADC_SINGLECTRL_POSSEL_APORT4YCH26,
481 adcPosSelAPORT4XCH27 = _ADC_SINGLECTRL_POSSEL_APORT4XCH27,
482 adcPosSelAPORT4YCH28 = _ADC_SINGLECTRL_POSSEL_APORT4YCH28,
483 adcPosSelAPORT4XCH29 = _ADC_SINGLECTRL_POSSEL_APORT4XCH29,
484 adcPosSelAPORT4YCH30 = _ADC_SINGLECTRL_POSSEL_APORT4YCH30,
485 adcPosSelAPORT4XCH31 = _ADC_SINGLECTRL_POSSEL_APORT4XCH31,
486 adcPosSelAVDD = _ADC_SINGLECTRL_POSSEL_AVDD,
487 adcPosSelBUVDD = _ADC_SINGLECTRL_POSSEL_BUVDD,
488 adcPosSelDVDD = _ADC_SINGLECTRL_POSSEL_DVDD,
489 adcPosSelPAVDD = _ADC_SINGLECTRL_POSSEL_PAVDD,
490 adcPosSelDECOUPLE = _ADC_SINGLECTRL_POSSEL_DECOUPLE,
491 adcPosSelIOVDD = _ADC_SINGLECTRL_POSSEL_IOVDD,
492 adcPosSelIOVDD1 = _ADC_SINGLECTRL_POSSEL_IOVDD1,
493 adcPosSelVSP = _ADC_SINGLECTRL_POSSEL_VSP,
494 adcPosSelOPA2 = _ADC_SINGLECTRL_POSSEL_OPA2,
495 adcPosSelTEMP = _ADC_SINGLECTRL_POSSEL_TEMP,
496 adcPosSelDAC0OUT0 = _ADC_SINGLECTRL_POSSEL_DAC0OUT0,
497 adcPosSelR5VOUT = _ADC_SINGLECTRL_POSSEL_R5VOUT,
498 adcPosSelSP1 = _ADC_SINGLECTRL_POSSEL_SP1,
499 adcPosSelSP2 = _ADC_SINGLECTRL_POSSEL_SP2,
500 adcPosSelDAC0OUT1 = _ADC_SINGLECTRL_POSSEL_DAC0OUT1,
501 adcPosSelSUBLSB = _ADC_SINGLECTRL_POSSEL_SUBLSB,
502 adcPosSelOPA3 = _ADC_SINGLECTRL_POSSEL_OPA3,
503 adcPosSelDEFAULT = _ADC_SINGLECTRL_POSSEL_DEFAULT,
504 adcPosSelVSS = _ADC_SINGLECTRL_POSSEL_VSS
505 } ADC_PosSel_TypeDef;
506
507 /* Map legacy or incorrectly named select enums to correct enums. */
508 /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
509 #define adcPosSelIO0 adcPosSelIOVDD
510 #define adcPosSelVREGOUTPA adcPosSelPAVDD
511 #define adcPosSelAREG adcPosSelDVDD
512 #define adcPosSelPDBU adcPosSelDECOUPLE
513 /** @endcond */
514 #endif
515
516 #if defined(_ADC_SINGLECTRL_NEGSEL_MASK)
517 /** Negative input selection for single and scan conversion. */
518 typedef enum {
519 adcNegSelAPORT0XCH0 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH0,
520 adcNegSelAPORT0XCH1 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH1,
521 adcNegSelAPORT0XCH2 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH2,
522 adcNegSelAPORT0XCH3 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH3,
523 adcNegSelAPORT0XCH4 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH4,
524 adcNegSelAPORT0XCH5 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH5,
525 adcNegSelAPORT0XCH6 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH6,
526 adcNegSelAPORT0XCH7 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH7,
527 adcNegSelAPORT0XCH8 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH8,
528 adcNegSelAPORT0XCH9 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH9,
529 adcNegSelAPORT0XCH10 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH10,
530 adcNegSelAPORT0XCH11 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH11,
531 adcNegSelAPORT0XCH12 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH12,
532 adcNegSelAPORT0XCH13 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH13,
533 adcNegSelAPORT0XCH14 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH14,
534 adcNegSelAPORT0XCH15 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH15,
535 adcNegSelAPORT0YCH0 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH0,
536 adcNegSelAPORT0YCH1 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH1,
537 adcNegSelAPORT0YCH2 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH2,
538 adcNegSelAPORT0YCH3 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH3,
539 adcNegSelAPORT0YCH4 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH4,
540 adcNegSelAPORT0YCH5 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH5,
541 adcNegSelAPORT0YCH6 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH6,
542 adcNegSelAPORT0YCH7 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH7,
543 adcNegSelAPORT0YCH8 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH8,
544 adcNegSelAPORT0YCH9 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH9,
545 adcNegSelAPORT0YCH10 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH10,
546 adcNegSelAPORT0YCH11 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH11,
547 adcNegSelAPORT0YCH12 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH12,
548 adcNegSelAPORT0YCH13 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH13,
549 adcNegSelAPORT0YCH14 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH14,
550 adcNegSelAPORT0YCH15 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH15,
551 adcNegSelAPORT1XCH0 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH0,
552 adcNegSelAPORT1YCH1 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH1,
553 adcNegSelAPORT1XCH2 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH2,
554 adcNegSelAPORT1YCH3 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH3,
555 adcNegSelAPORT1XCH4 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH4,
556 adcNegSelAPORT1YCH5 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH5,
557 adcNegSelAPORT1XCH6 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH6,
558 adcNegSelAPORT1YCH7 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH7,
559 adcNegSelAPORT1XCH8 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH8,
560 adcNegSelAPORT1YCH9 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH9,
561 adcNegSelAPORT1XCH10 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH10,
562 adcNegSelAPORT1YCH11 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH11,
563 adcNegSelAPORT1XCH12 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH12,
564 adcNegSelAPORT1YCH13 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH13,
565 adcNegSelAPORT1XCH14 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH14,
566 adcNegSelAPORT1YCH15 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH15,
567 adcNegSelAPORT1XCH16 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH16,
568 adcNegSelAPORT1YCH17 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH17,
569 adcNegSelAPORT1XCH18 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH18,
570 adcNegSelAPORT1YCH19 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH19,
571 adcNegSelAPORT1XCH20 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH20,
572 adcNegSelAPORT1YCH21 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH21,
573 adcNegSelAPORT1XCH22 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH22,
574 adcNegSelAPORT1YCH23 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH23,
575 adcNegSelAPORT1XCH24 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH24,
576 adcNegSelAPORT1YCH25 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH25,
577 adcNegSelAPORT1XCH26 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH26,
578 adcNegSelAPORT1YCH27 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH27,
579 adcNegSelAPORT1XCH28 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH28,
580 adcNegSelAPORT1YCH29 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH29,
581 adcNegSelAPORT1XCH30 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH30,
582 adcNegSelAPORT1YCH31 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH31,
583 adcNegSelAPORT2YCH0 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH0,
584 adcNegSelAPORT2XCH1 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH1,
585 adcNegSelAPORT2YCH2 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH2,
586 adcNegSelAPORT2XCH3 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH3,
587 adcNegSelAPORT2YCH4 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH4,
588 adcNegSelAPORT2XCH5 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH5,
589 adcNegSelAPORT2YCH6 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH6,
590 adcNegSelAPORT2XCH7 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH7,
591 adcNegSelAPORT2YCH8 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH8,
592 adcNegSelAPORT2XCH9 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH9,
593 adcNegSelAPORT2YCH10 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH10,
594 adcNegSelAPORT2XCH11 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH11,
595 adcNegSelAPORT2YCH12 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH12,
596 adcNegSelAPORT2XCH13 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH13,
597 adcNegSelAPORT2YCH14 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH14,
598 adcNegSelAPORT2XCH15 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH15,
599 adcNegSelAPORT2YCH16 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH16,
600 adcNegSelAPORT2XCH17 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH17,
601 adcNegSelAPORT2YCH18 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH18,
602 adcNegSelAPORT2XCH19 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH19,
603 adcNegSelAPORT2YCH20 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH20,
604 adcNegSelAPORT2XCH21 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH21,
605 adcNegSelAPORT2YCH22 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH22,
606 adcNegSelAPORT2XCH23 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH23,
607 adcNegSelAPORT2YCH24 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH24,
608 adcNegSelAPORT2XCH25 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH25,
609 adcNegSelAPORT2YCH26 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH26,
610 adcNegSelAPORT2XCH27 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH27,
611 adcNegSelAPORT2YCH28 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH28,
612 adcNegSelAPORT2XCH29 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH29,
613 adcNegSelAPORT2YCH30 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH30,
614 adcNegSelAPORT2XCH31 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH31,
615 adcNegSelAPORT3XCH0 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH0,
616 adcNegSelAPORT3YCH1 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH1,
617 adcNegSelAPORT3XCH2 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH2,
618 adcNegSelAPORT3YCH3 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH3,
619 adcNegSelAPORT3XCH4 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH4,
620 adcNegSelAPORT3YCH5 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH5,
621 adcNegSelAPORT3XCH6 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH6,
622 adcNegSelAPORT3YCH7 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH7,
623 adcNegSelAPORT3XCH8 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH8,
624 adcNegSelAPORT3YCH9 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH9,
625 adcNegSelAPORT3XCH10 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH10,
626 adcNegSelAPORT3YCH11 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH11,
627 adcNegSelAPORT3XCH12 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH12,
628 adcNegSelAPORT3YCH13 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH13,
629 adcNegSelAPORT3XCH14 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH14,
630 adcNegSelAPORT3YCH15 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH15,
631 adcNegSelAPORT3XCH16 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH16,
632 adcNegSelAPORT3YCH17 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH17,
633 adcNegSelAPORT3XCH18 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH18,
634 adcNegSelAPORT3YCH19 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH19,
635 adcNegSelAPORT3XCH20 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH20,
636 adcNegSelAPORT3YCH21 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH21,
637 adcNegSelAPORT3XCH22 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH22,
638 adcNegSelAPORT3YCH23 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH23,
639 adcNegSelAPORT3XCH24 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH24,
640 adcNegSelAPORT3YCH25 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH25,
641 adcNegSelAPORT3XCH26 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH26,
642 adcNegSelAPORT3YCH27 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH27,
643 adcNegSelAPORT3XCH28 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH28,
644 adcNegSelAPORT3YCH29 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH29,
645 adcNegSelAPORT3XCH30 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH30,
646 adcNegSelAPORT3YCH31 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH31,
647 adcNegSelAPORT4YCH0 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH0,
648 adcNegSelAPORT4XCH1 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH1,
649 adcNegSelAPORT4YCH2 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH2,
650 adcNegSelAPORT4XCH3 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH3,
651 adcNegSelAPORT4YCH4 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH4,
652 adcNegSelAPORT4XCH5 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH5,
653 adcNegSelAPORT4YCH6 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH6,
654 adcNegSelAPORT4XCH7 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH7,
655 adcNegSelAPORT4YCH8 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH8,
656 adcNegSelAPORT4XCH9 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH9,
657 adcNegSelAPORT4YCH10 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH10,
658 adcNegSelAPORT4XCH11 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH11,
659 adcNegSelAPORT4YCH12 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH12,
660 adcNegSelAPORT4XCH13 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH13,
661 adcNegSelAPORT4YCH14 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH14,
662 adcNegSelAPORT4XCH15 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH15,
663 adcNegSelAPORT4YCH16 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH16,
664 adcNegSelAPORT4XCH17 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH17,
665 adcNegSelAPORT4YCH18 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH18,
666 adcNegSelAPORT4XCH19 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH19,
667 adcNegSelAPORT4YCH20 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH20,
668 adcNegSelAPORT4XCH21 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH21,
669 adcNegSelAPORT4YCH22 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH22,
670 adcNegSelAPORT4XCH23 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH23,
671 adcNegSelAPORT4YCH24 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH24,
672 adcNegSelAPORT4XCH25 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH25,
673 adcNegSelAPORT4YCH26 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH26,
674 adcNegSelAPORT4XCH27 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH27,
675 adcNegSelAPORT4YCH28 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH28,
676 adcNegSelAPORT4XCH29 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH29,
677 adcNegSelAPORT4YCH30 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH30,
678 adcNegSelAPORT4XCH31 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH31,
679 adcNegSelTESTN = _ADC_SINGLECTRL_NEGSEL_TESTN,
680 adcNegSelDEFAULT = _ADC_SINGLECTRL_NEGSEL_DEFAULT,
681 adcNegSelVSS = _ADC_SINGLECTRL_NEGSEL_VSS
682 } ADC_NegSel_TypeDef;
683 #endif
684
685 #if defined(_ADC_SCANINPUTSEL_MASK)
686 /** ADC scan input groups. */
687 typedef enum {
688 adcScanInputGroup0 = 0,
689 adcScanInputGroup1 = 1,
690 adcScanInputGroup2 = 2,
691 adcScanInputGroup3 = 3,
692 } ADC_ScanInputGroup_TypeDef;
693
694 /** Define none selected group for ADC_SCANINPUTSEL. */
695 #define ADC_SCANINPUTSEL_GROUP_NONE 0xFFU
696 /** Define none selected for ADC_SCANINPUTSEL. */
697 #define ADC_SCANINPUTSEL_NONE ((ADC_SCANINPUTSEL_GROUP_NONE \
698 << _ADC_SCANINPUTSEL_INPUT0TO7SEL_SHIFT) \
699 | (ADC_SCANINPUTSEL_GROUP_NONE \
700 << _ADC_SCANINPUTSEL_INPUT8TO15SEL_SHIFT) \
701 | (ADC_SCANINPUTSEL_GROUP_NONE \
702 << _ADC_SCANINPUTSEL_INPUT16TO23SEL_SHIFT) \
703 | (ADC_SCANINPUTSEL_GROUP_NONE \
704 << _ADC_SCANINPUTSEL_INPUT24TO31SEL_SHIFT))
705
706 /** ADC scan alternative negative inputs. */
707 typedef enum {
708 adcScanNegInput1 = 1,
709 adcScanNegInput3 = 3,
710 adcScanNegInput5 = 5,
711 adcScanNegInput7 = 7,
712 adcScanNegInput8 = 8,
713 adcScanNegInput10 = 10,
714 adcScanNegInput12 = 12,
715 adcScanNegInput14 = 14,
716 adcScanNegInputDefault = 0xFF,
717 } ADC_ScanNegInput_TypeDef;
718 #endif
719
720 /** ADC start command. */
721 typedef enum {
722 /** Start a single conversion. */
723 adcStartSingle = ADC_CMD_SINGLESTART,
724
725 /** Start a scan sequence. */
726 adcStartScan = ADC_CMD_SCANSTART,
727
728 /**
729 * Start a scan sequence and single conversion, typically used when tailgating
730 * a single conversion after a scan sequence.
731 */
732 adcStartScanAndSingle = ADC_CMD_SCANSTART | ADC_CMD_SINGLESTART
733 } ADC_Start_TypeDef;
734
735 /** Warm-up mode. */
736 typedef enum {
737 /** ADC shutdown after each conversion. */
738 adcWarmupNormal = _ADC_CTRL_WARMUPMODE_NORMAL,
739
740 #if defined(_ADC_CTRL_WARMUPMODE_FASTBG)
741 /** Do not warm up bandgap references. */
742 adcWarmupFastBG = _ADC_CTRL_WARMUPMODE_FASTBG,
743 #endif
744
745 #if defined(_ADC_CTRL_WARMUPMODE_KEEPSCANREFWARM)
746 /** Reference selected for scan mode kept warm.*/
747 adcWarmupKeepScanRefWarm = _ADC_CTRL_WARMUPMODE_KEEPSCANREFWARM,
748 #endif
749
750 #if defined(_ADC_CTRL_WARMUPMODE_KEEPINSTANDBY)
751 /** ADC is kept in standby mode between conversions. 1 us warmup time needed
752 before the next conversion. */
753 adcWarmupKeepInStandby = _ADC_CTRL_WARMUPMODE_KEEPINSTANDBY,
754 #endif
755
756 #if defined(_ADC_CTRL_WARMUPMODE_KEEPINSLOWACC)
757 /** ADC is kept in slow acquisition mode between conversions. 1 us warmup
758 time needed before the next conversion. */
759 adcWarmupKeepInSlowAcq = _ADC_CTRL_WARMUPMODE_KEEPINSLOWACC,
760 #endif
761
762 /** ADC and reference selected for scan mode kept at warmup allowing
763 continuous conversion. */
764 adcWarmupKeepADCWarm = _ADC_CTRL_WARMUPMODE_KEEPADCWARM,
765 } ADC_Warmup_TypeDef;
766
767 #if defined(_ADC_CTRL_ADCCLKMODE_MASK)
768 /** ADC EM2 clock configuration. */
769 typedef enum {
770 adcEm2Disabled = 0,
771 adcEm2ClockOnDemand = ADC_CTRL_ADCCLKMODE_ASYNC | ADC_CTRL_ASYNCCLKEN_ASNEEDED,
772 adcEm2ClockAlwaysOn = ADC_CTRL_ADCCLKMODE_ASYNC | ADC_CTRL_ASYNCCLKEN_ALWAYSON,
773 } ADC_EM2ClockConfig_TypeDef;
774 #endif
775
776 /*******************************************************************************
777 ******************************* STRUCTS ***********************************
778 ******************************************************************************/
779
780 /** ADC initialization structure, common for single conversion and scan sequence. */
781 typedef struct {
782 /**
783 * Oversampling rate select. To have any effect, oversampling must
784 * be enabled for single/scan mode.
785 */
786 ADC_OvsRateSel_TypeDef ovsRateSel;
787
788 #if defined(_ADC_CTRL_LPFMODE_MASK)
789 /** Lowpass or decoupling capacitor filter. */
790 ADC_LPFilter_TypeDef lpfMode;
791 #endif
792
793 /** ADC Warm-up mode. */
794 ADC_Warmup_TypeDef warmUpMode;
795
796 /**
797 * Timebase for ADC warm up. Select N to give (N+1) HFPERCLK / HFPERCCLK cycles.
798 * (Additional delay is added for bandgap references. See the
799 * reference manual for more information.) Normally, N should be selected so that the timebase
800 * is at least 1 us. See ADC_TimebaseCalc() to obtain
801 * a suggested timebase of, at least, 1 us.
802 */
803 uint8_t timebase;
804
805 /** Clock division factor N, ADC clock = (HFPERCLK or HFPERCCLK) / (N + 1). */
806 uint8_t prescale;
807
808 /** Enable/disable conversion tailgating. */
809 bool tailgate;
810
811 /** ADC EM2 clock configuration */
812 #if defined(_ADC_CTRL_ADCCLKMODE_MASK)
813 ADC_EM2ClockConfig_TypeDef em2ClockConfig;
814 #endif
815 } ADC_Init_TypeDef;
816
817 /** Default configuration for ADC initialization structure. */
818 #if defined(_ADC_CTRL_LPFMODE_MASK) && (!defined(_ADC_CTRL_ADCCLKMODE_MASK))
819 #define ADC_INIT_DEFAULT \
820 { \
821 adcOvsRateSel2, /* 2x oversampling (if enabled). */ \
822 adcLPFilterBypass, /* No input filter selected. */ \
823 adcWarmupNormal, /* ADC shutdown after each conversion. */ \
824 _ADC_CTRL_TIMEBASE_DEFAULT, /* Use hardware default value. */ \
825 _ADC_CTRL_PRESC_DEFAULT, /* Use hardware default value. */ \
826 false /* Do not use tailgate. */ \
827 }
828 #elif (!defined(_ADC_CTRL_LPFMODE_MASK)) && (!defined(_ADC_CTRL_ADCCLKMODE_MASK))
829 #define ADC_INIT_DEFAULT \
830 { \
831 adcOvsRateSel2, /* 2x oversampling (if enabled). */ \
832 adcWarmupNormal, /* ADC shutdown after each conversion. */ \
833 _ADC_CTRL_TIMEBASE_DEFAULT, /* Use hardware default value. */ \
834 _ADC_CTRL_PRESC_DEFAULT, /* Use hardware default value. */ \
835 false /* Do not use tailgate. */ \
836 }
837 #elif (!defined(_ADC_CTRL_LPFMODE_MASK)) && defined(_ADC_CTRL_ADCCLKMODE_MASK)
838 #define ADC_INIT_DEFAULT \
839 { \
840 adcOvsRateSel2, /* 2x oversampling (if enabled). */ \
841 adcWarmupNormal, /* ADC shutdown after each conversion. */ \
842 _ADC_CTRL_TIMEBASE_DEFAULT, /* Use hardware default value. */ \
843 _ADC_CTRL_PRESC_DEFAULT, /* Use hardware default value. */ \
844 false, /* Do not use tailgate. */ \
845 adcEm2Disabled /* ADC disabled in EM2. */ \
846 }
847 #endif
848
849 /** Scan input configuration. */
850 typedef struct {
851 /** Input range select to be applied to ADC_SCANINPUTSEL. */
852 uint32_t scanInputSel;
853
854 /** Input enable mask. */
855 uint32_t scanInputEn;
856
857 /** Alternative negative input. */
858 uint32_t scanNegSel;
859 } ADC_InitScanInput_TypeDef;
860
861 /** Scan sequence initialization structure. */
862 typedef struct {
863 /**
864 * Peripheral reflex system trigger selection. Only applicable if @p prsEnable
865 * is enabled.
866 */
867 ADC_PRSSEL_TypeDef prsSel;
868
869 /** Acquisition time (in ADC clock cycles). */
870 ADC_AcqTime_TypeDef acqTime;
871
872 /**
873 * Sample reference selection. Note that, for external references, the
874 * ADC calibration register must be set explicitly.
875 */
876 ADC_Ref_TypeDef reference;
877
878 /** Sample resolution. */
879 ADC_Res_TypeDef resolution;
880
881 #if defined(_ADC_SCANCTRL_INPUTMASK_MASK)
882 /**
883 * Scan input selection. If single ended (@p diff is false), use logical
884 * combination of ADC_SCANCTRL_INPUTMASK_CHx defines. If differential input
885 * (@p diff is true), use logical combination of ADC_SCANCTRL_INPUTMASK_CHxCHy
886 * defines. (Notice underscore prefix for defines used.)
887 */
888 uint32_t input;
889 #endif
890
891 #if defined(_ADC_SCANINPUTSEL_MASK)
892 /**
893 * Scan input configuration. Use @ref ADC_ScanInputClear(), @ref ADC_ScanSingleEndedInputAdd()
894 * or @ref ADC_ScanDifferentialInputAdd() to update this structure.
895 */
896 ADC_InitScanInput_TypeDef scanInputConfig;
897 #endif
898
899 /** Select if single-ended or differential input. */
900 bool diff;
901
902 /** Peripheral reflex system trigger enable. */
903 bool prsEnable;
904
905 /** Select if left adjustment should be done. */
906 bool leftAdjust;
907
908 /** Select if continuous conversion until explicit stop. */
909 bool rep;
910
911 /** When true, DMA is available in EM2 for scan conversion */
912 #if defined(_ADC_CTRL_SCANDMAWU_MASK)
913 bool scanDmaEm2Wu;
914 #endif
915
916 #if defined(_ADC_SCANCTRLX_FIFOOFACT_MASK)
917 /** When true, FIFO overwrites old data when full. If false, FIFO discards new data.
918 The SINGLEOF IRQ is triggered in both cases. */
919 bool fifoOverwrite;
920 #endif
921 } ADC_InitScan_TypeDef;
922
923 /** Default configuration for ADC scan initialization structure. */
924 #if defined(_ADC_SCANCTRL_INPUTMASK_MASK)
925 #define ADC_INITSCAN_DEFAULT \
926 { \
927 adcPRSSELCh0, /* PRS ch0 (if enabled). */ \
928 adcAcqTime1, /* 1 ADC_CLK cycle acquisition time. */ \
929 adcRef1V25, /* 1.25 V internal reference. */ \
930 adcRes12Bit, /* 12 bit resolution. */ \
931 0, /* No input selected. */ \
932 false, /* Single-ended input. */ \
933 false, /* PRS disabled. */ \
934 false, /* Right adjust. */ \
935 false, /* Deactivate conversion after one scan sequence. */ \
936 }
937 #endif
938
939 #if defined(_ADC_SCANINPUTSEL_MASK)
940 #define ADC_INITSCAN_DEFAULT \
941 { \
942 adcPRSSELCh0, /* PRS ch0 (if enabled). */ \
943 adcAcqTime1, /* 1 ADC_CLK cycle acquisition time. */ \
944 adcRef1V25, /* 1.25 V internal reference. */ \
945 adcRes12Bit, /* 12 bit resolution. */ \
946 { \
947 /* Initialization should match values set by @ref ADC_ScanInputClear(). */ \
948 ADC_SCANINPUTSEL_NONE, /* Default ADC inputs. */ \
949 0, /* Default input mask (all off). */ \
950 _ADC_SCANNEGSEL_RESETVALUE,/* Default negative select for positive terminal. */ \
951 }, \
952 false, /* Single-ended input. */ \
953 false, /* PRS disabled. */ \
954 false, /* Right adjust. */ \
955 false, /* Deactivate conversion after one scan sequence. */ \
956 false, /* No EM2 DMA wakeup from scan FIFO DVL. */ \
957 false /* Discard new data on full FIFO. */ \
958 }
959 #endif
960
961 /** Single conversion initialization structure. */
962 typedef struct {
963 /**
964 * Peripheral reflex system trigger selection. Only applicable if @p prsEnable
965 * is enabled.
966 */
967 ADC_PRSSEL_TypeDef prsSel;
968
969 /** Acquisition time (in ADC clock cycles). */
970 ADC_AcqTime_TypeDef acqTime;
971
972 /**
973 * Sample reference selection. Note that, for external references, the
974 * ADC calibration register must be set explicitly.
975 */
976 ADC_Ref_TypeDef reference;
977
978 /** Sample resolution. */
979 ADC_Res_TypeDef resolution;
980
981 #if defined(_ADC_SINGLECTRL_INPUTSEL_MASK)
982 /**
983 * Sample input selection, use single-ended or differential input according
984 * to setting of @p diff.
985 */
986 ADC_SingleInput_TypeDef input;
987 #endif
988
989 #if defined(_ADC_SINGLECTRL_POSSEL_MASK)
990 /** Select positive input for single channel conversion mode. */
991 ADC_PosSel_TypeDef posSel;
992 #endif
993
994 #if defined(_ADC_SINGLECTRL_NEGSEL_MASK)
995 /** Select negative input for single channel conversion mode. Negative input is grounded
996 for single-ended (non-differential) conversion. */
997 ADC_NegSel_TypeDef negSel;
998 #endif
999
1000 /** Select if single-ended or differential input. */
1001 bool diff;
1002
1003 /** Peripheral reflex system trigger enable. */
1004 bool prsEnable;
1005
1006 /** Select if left adjustment should be done. */
1007 bool leftAdjust;
1008
1009 /** Select if continuous conversion until explicit stop. */
1010 bool rep;
1011
1012 #if defined(_ADC_CTRL_SINGLEDMAWU_MASK)
1013 /** When true, DMA is available in EM2 for single conversion */
1014 bool singleDmaEm2Wu;
1015 #endif
1016
1017 #if defined(_ADC_SINGLECTRLX_FIFOOFACT_MASK)
1018 /** When true, FIFO overwrites old data when full. If false, FIFO discards new data.
1019 The SCANOF IRQ is triggered in both cases. */
1020 bool fifoOverwrite;
1021 #endif
1022 } ADC_InitSingle_TypeDef;
1023
1024 /** Default configuration for ADC single conversion initialization structure. */
1025 #if defined(_ADC_SINGLECTRL_INPUTSEL_MASK)
1026 #define ADC_INITSINGLE_DEFAULT \
1027 { \
1028 adcPRSSELCh0, /* PRS ch0 (if enabled). */ \
1029 adcAcqTime1, /* 1 ADC_CLK cycle acquisition time. */ \
1030 adcRef1V25, /* 1.25 V internal reference. */ \
1031 adcRes12Bit, /* 12 bit resolution. */ \
1032 adcSingleInpCh0, /* CH0 input selected. */ \
1033 false, /* Single-ended input. */ \
1034 false, /* PRS disabled. */ \
1035 false, /* Right adjust. */ \
1036 false /* Deactivate conversion after one scan sequence. */ \
1037 }
1038 #else
1039 #define ADC_INITSINGLE_DEFAULT \
1040 { \
1041 adcPRSSELCh0, /* PRS ch0 (if enabled). */ \
1042 adcAcqTime1, /* 1 ADC_CLK cycle acquisition time. */ \
1043 adcRef1V25, /* 1.25 V internal reference. */ \
1044 adcRes12Bit, /* 12 bit resolution. */ \
1045 adcPosSelAPORT0XCH0, /* Select node BUS0XCH0 as posSel */ \
1046 adcNegSelVSS, /* Select VSS as negSel */ \
1047 false, /* Single-ended input. */ \
1048 false, /* PRS disabled. */ \
1049 false, /* Right adjust. */ \
1050 false, /* Deactivate conversion after one scan sequence. */ \
1051 false, /* No EM2 DMA wakeup from single FIFO DVL */ \
1052 false /* Discard new data on full FIFO. */ \
1053 }
1054 #endif
1055
1056 /*******************************************************************************
1057 ***************************** PROTOTYPES **********************************
1058 ******************************************************************************/
1059
1060 /***************************************************************************//**
1061 * @brief
1062 * Get a single conversion result.
1063 *
1064 * @note
1065 * Check data valid flag before calling this function.
1066 *
1067 * @param[in] adc
1068 * A pointer to the ADC peripheral register block.
1069 *
1070 * @return
1071 * Single conversion data.
1072 ******************************************************************************/
ADC_DataSingleGet(ADC_TypeDef * adc)1073 __STATIC_INLINE uint32_t ADC_DataSingleGet(ADC_TypeDef *adc)
1074 {
1075 return adc->SINGLEDATA;
1076 }
1077
1078 /***************************************************************************//**
1079 * @brief
1080 * Peek single conversion result.
1081 *
1082 * @note
1083 * Check data valid flag before calling this function.
1084 *
1085 * @param[in] adc
1086 * A pointer to the ADC peripheral register block.
1087 *
1088 * @return
1089 * Single conversion data.
1090 ******************************************************************************/
ADC_DataSinglePeek(ADC_TypeDef * adc)1091 __STATIC_INLINE uint32_t ADC_DataSinglePeek(ADC_TypeDef *adc)
1092 {
1093 return adc->SINGLEDATAP;
1094 }
1095
1096 /***************************************************************************//**
1097 * @brief
1098 * Get a scan result.
1099 *
1100 * @note
1101 * Check data valid flag before calling this function.
1102 *
1103 * @param[in] adc
1104 * A pointer to the ADC peripheral register block.
1105 *
1106 * @return
1107 * Scan conversion data.
1108 ******************************************************************************/
ADC_DataScanGet(ADC_TypeDef * adc)1109 __STATIC_INLINE uint32_t ADC_DataScanGet(ADC_TypeDef *adc)
1110 {
1111 return adc->SCANDATA;
1112 }
1113
1114 /***************************************************************************//**
1115 * @brief
1116 * Peek scan result.
1117 *
1118 * @note
1119 * Check data valid flag before calling this function.
1120 *
1121 * @param[in] adc
1122 * A pointer to the ADC peripheral register block.
1123 *
1124 * @return
1125 * Scan conversion data.
1126 ******************************************************************************/
ADC_DataScanPeek(ADC_TypeDef * adc)1127 __STATIC_INLINE uint32_t ADC_DataScanPeek(ADC_TypeDef *adc)
1128 {
1129 return adc->SCANDATAP;
1130 }
1131
1132 #if defined(_ADC_SCANDATAX_MASK)
1133 uint32_t ADC_DataIdScanGet(ADC_TypeDef *adc, uint32_t *scanId);
1134 #endif
1135
1136 void ADC_Init(ADC_TypeDef *adc, const ADC_Init_TypeDef *init);
1137 void ADC_Reset(ADC_TypeDef *adc);
1138 void ADC_InitScan(ADC_TypeDef *adc, const ADC_InitScan_TypeDef *init);
1139
1140 #if defined(_ADC_SCANINPUTSEL_MASK)
1141 void ADC_ScanInputClear(ADC_InitScan_TypeDef *scanInit);
1142 uint32_t ADC_ScanSingleEndedInputAdd(ADC_InitScan_TypeDef *scanInit,
1143 ADC_ScanInputGroup_TypeDef inputGroup,
1144 ADC_PosSel_TypeDef singleEndedSel);
1145 uint32_t ADC_ScanDifferentialInputAdd(ADC_InitScan_TypeDef *scanInit,
1146 ADC_ScanInputGroup_TypeDef inputGroup,
1147 ADC_PosSel_TypeDef posSel,
1148 ADC_ScanNegInput_TypeDef negInput);
1149 #endif
1150
1151 void ADC_InitSingle(ADC_TypeDef *adc, const ADC_InitSingle_TypeDef *init);
1152 uint8_t ADC_TimebaseCalc(uint32_t hfperFreq);
1153 uint8_t ADC_PrescaleCalc(uint32_t adcFreq, uint32_t hfperFreq);
1154
1155 /***************************************************************************//**
1156 * @brief
1157 * Clear one or more pending ADC interrupts.
1158 *
1159 * @param[in] adc
1160 * A pointer to the ADC peripheral register block.
1161 *
1162 * @param[in] flags
1163 * Pending ADC interrupt source to clear. Use a bitwise logic OR combination
1164 * of valid interrupt flags for the ADC module (ADC_IF_nnn).
1165 ******************************************************************************/
ADC_IntClear(ADC_TypeDef * adc,uint32_t flags)1166 __STATIC_INLINE void ADC_IntClear(ADC_TypeDef *adc, uint32_t flags)
1167 {
1168 adc->IFC = flags;
1169 }
1170
1171 /***************************************************************************//**
1172 * @brief
1173 * Disable one or more ADC interrupts.
1174 *
1175 * @param[in] adc
1176 * A pointer to the ADC peripheral register block.
1177 *
1178 * @param[in] flags
1179 * ADC interrupt sources to disable. Use a bitwise logic OR combination of
1180 * valid interrupt flags for the ADC module (ADC_IF_nnn).
1181 ******************************************************************************/
ADC_IntDisable(ADC_TypeDef * adc,uint32_t flags)1182 __STATIC_INLINE void ADC_IntDisable(ADC_TypeDef *adc, uint32_t flags)
1183 {
1184 adc->IEN &= ~flags;
1185 }
1186
1187 /***************************************************************************//**
1188 * @brief
1189 * Enable one or more ADC interrupts.
1190 *
1191 * @note
1192 * Depending on use, a pending interrupt may already be set prior to
1193 * enabling the interrupt. Consider using ADC_IntClear() prior to enabling
1194 * if the pending interrupt should be ignored.
1195 *
1196 * @param[in] adc
1197 * A pointer to the ADC peripheral register block.
1198 *
1199 * @param[in] flags
1200 * ADC interrupt sources to enable. Use a bitwise logic OR combination of
1201 * valid interrupt flags for the ADC module (ADC_IF_nnn).
1202 ******************************************************************************/
ADC_IntEnable(ADC_TypeDef * adc,uint32_t flags)1203 __STATIC_INLINE void ADC_IntEnable(ADC_TypeDef *adc, uint32_t flags)
1204 {
1205 adc->IEN |= flags;
1206 }
1207
1208 /***************************************************************************//**
1209 * @brief
1210 * Get pending ADC interrupt flags.
1211 *
1212 * @note
1213 * This function does not clear event bits.
1214 *
1215 * @param[in] adc
1216 * A pointer to the ADC peripheral register block.
1217 *
1218 * @return
1219 * ADC interrupt sources pending. A bitwise logic OR combination of valid
1220 * interrupt flags for the ADC module (ADC_IF_nnn).
1221 ******************************************************************************/
ADC_IntGet(ADC_TypeDef * adc)1222 __STATIC_INLINE uint32_t ADC_IntGet(ADC_TypeDef *adc)
1223 {
1224 return adc->IF;
1225 }
1226
1227 /***************************************************************************//**
1228 * @brief
1229 * Get enabled and pending ADC interrupt flags.
1230 * Useful for handling more interrupt sources in the same interrupt handler.
1231 *
1232 * @param[in] adc
1233 * A pointer to the ADC peripheral register block.
1234 *
1235 * @note
1236 * This function does not clear interrupt flags.
1237 *
1238 * @return
1239 * Pending and enabled ADC interrupt sources.
1240 * The return value is the bitwise AND combination of
1241 * - the OR combination of enabled interrupt sources in ADCx_IEN_nnn
1242 * register (ADCx_IEN_nnn) and
1243 * - the OR combination of valid interrupt flags of the ADC module
1244 * (ADCx_IF_nnn).
1245 ******************************************************************************/
ADC_IntGetEnabled(ADC_TypeDef * adc)1246 __STATIC_INLINE uint32_t ADC_IntGetEnabled(ADC_TypeDef *adc)
1247 {
1248 uint32_t ien;
1249
1250 /* Store ADCx->IEN in a temporary variable to define the explicit order
1251 * of volatile accesses. */
1252 ien = adc->IEN;
1253
1254 /* Bitwise AND of pending and enabled interrupts */
1255 return adc->IF & ien;
1256 }
1257
1258 /***************************************************************************//**
1259 * @brief
1260 * Set one or more pending ADC interrupts from software.
1261 *
1262 * @param[in] adc
1263 * A pointer to the ADC peripheral register block.
1264 *
1265 * @param[in] flags
1266 * ADC interrupt sources to set to pending. Use a bitwise logic OR combination
1267 * of valid interrupt flags for the ADC module (ADC_IF_nnn).
1268 ******************************************************************************/
ADC_IntSet(ADC_TypeDef * adc,uint32_t flags)1269 __STATIC_INLINE void ADC_IntSet(ADC_TypeDef *adc, uint32_t flags)
1270 {
1271 adc->IFS = flags;
1272 }
1273
1274 /***************************************************************************//**
1275 * @brief
1276 * Start scan sequence and/or single conversion.
1277 *
1278 * @param[in] adc
1279 * A pointer to the ADC peripheral register block.
1280 *
1281 * @param[in] cmd
1282 * A command indicating which type of sampling to start.
1283 ******************************************************************************/
ADC_Start(ADC_TypeDef * adc,ADC_Start_TypeDef cmd)1284 __STATIC_INLINE void ADC_Start(ADC_TypeDef *adc, ADC_Start_TypeDef cmd)
1285 {
1286 adc->CMD = (uint32_t)cmd;
1287 }
1288
1289 /** @} (end addtogroup adc) */
1290
1291 #ifdef __cplusplus
1292 }
1293 #endif
1294
1295 #endif /* defined(ADC_COUNT) && (ADC_COUNT > 0) */
1296 #endif /* EM_ADC_H */
1297
