1 /*
2 * Copyright (c) 2024 Nordic Semiconductor ASA
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #define DT_DRV_COMPAT jedec_mspi_nor
8
9 #include <zephyr/drivers/flash.h>
10 #include <zephyr/drivers/gpio.h>
11 #include <zephyr/drivers/mspi.h>
12 #include <zephyr/logging/log.h>
13 #include <zephyr/pm/device.h>
14 #include <zephyr/pm/device_runtime.h>
15
16 #include "jesd216.h"
17 #include "spi_nor.h"
18
19 LOG_MODULE_REGISTER(flash_mspi_nor, CONFIG_FLASH_LOG_LEVEL);
20
21 #if DT_ANY_INST_HAS_PROP_STATUS_OKAY(reset_gpios)
22 #define WITH_RESET_GPIO 1
23 #endif
24
25 struct flash_mspi_nor_data {
26 struct k_sem acquired;
27 struct mspi_xfer_packet packet;
28 struct mspi_xfer xfer;
29 };
30
31 struct flash_mspi_nor_config {
32 const struct device *bus;
33 uint32_t flash_size;
34 struct mspi_dev_id mspi_id;
35 struct mspi_dev_cfg mspi_cfg;
36 enum mspi_dev_cfg_mask mspi_cfg_mask;
37 #if defined(CONFIG_MSPI_XIP)
38 struct mspi_xip_cfg xip_cfg;
39 #endif
40 #if defined(WITH_RESET_GPIO)
41 struct gpio_dt_spec reset;
42 uint32_t reset_pulse_us;
43 uint32_t reset_recovery_us;
44 #endif
45 #if defined(CONFIG_FLASH_PAGE_LAYOUT)
46 struct flash_pages_layout layout;
47 #endif
48 uint8_t jedec_id[SPI_NOR_MAX_ID_LEN];
49 };
50
acquire(const struct device * dev)51 static int acquire(const struct device *dev)
52 {
53 const struct flash_mspi_nor_config *dev_config = dev->config;
54 struct flash_mspi_nor_data *dev_data = dev->data;
55 int rc;
56
57 k_sem_take(&dev_data->acquired, K_FOREVER);
58
59 rc = pm_device_runtime_get(dev_config->bus);
60 if (rc < 0) {
61 LOG_ERR("pm_device_runtime_get() failed: %d", rc);
62 } else {
63 /* This acquires the MSPI controller and reconfigures it
64 * if needed for the flash device.
65 */
66 rc = mspi_dev_config(dev_config->bus, &dev_config->mspi_id,
67 dev_config->mspi_cfg_mask,
68 &dev_config->mspi_cfg);
69 if (rc < 0) {
70 LOG_ERR("mspi_dev_config() failed: %d", rc);
71 } else {
72 return 0;
73 }
74
75 (void)pm_device_runtime_put(dev_config->bus);
76 }
77
78 k_sem_give(&dev_data->acquired);
79 return rc;
80 }
81
release(const struct device * dev)82 static void release(const struct device *dev)
83 {
84 const struct flash_mspi_nor_config *dev_config = dev->config;
85 struct flash_mspi_nor_data *dev_data = dev->data;
86
87 /* This releases the MSPI controller. */
88 (void)mspi_get_channel_status(dev_config->bus, 0);
89
90 (void)pm_device_runtime_put(dev_config->bus);
91
92 k_sem_give(&dev_data->acquired);
93 }
94
dev_flash_size(const struct device * dev)95 static inline uint32_t dev_flash_size(const struct device *dev)
96 {
97 const struct flash_mspi_nor_config *dev_config = dev->config;
98
99 return dev_config->flash_size;
100 }
101
dev_page_size(const struct device * dev)102 static inline uint16_t dev_page_size(const struct device *dev)
103 {
104 return SPI_NOR_PAGE_SIZE;
105 }
106
api_read(const struct device * dev,off_t addr,void * dest,size_t size)107 static int api_read(const struct device *dev, off_t addr, void *dest,
108 size_t size)
109 {
110 const struct flash_mspi_nor_config *dev_config = dev->config;
111 struct flash_mspi_nor_data *dev_data = dev->data;
112 const uint32_t flash_size = dev_flash_size(dev);
113 int rc;
114
115 if (size == 0) {
116 return 0;
117 }
118
119 if ((addr < 0) || ((addr + size) > flash_size)) {
120 return -EINVAL;
121 }
122
123 rc = acquire(dev);
124 if (rc < 0) {
125 return rc;
126 }
127
128 /* TODO: get rid of all these hard-coded values for MX25Ux chips */
129 dev_data->xfer.cmd_length = 2;
130 dev_data->xfer.addr_length = 4;
131 dev_data->xfer.rx_dummy = 20;
132 dev_data->packet.dir = MSPI_RX;
133 dev_data->packet.cmd = SPI_NOR_OCMD_RD;
134 dev_data->packet.address = addr;
135 dev_data->packet.data_buf = dest;
136 dev_data->packet.num_bytes = size;
137 rc = mspi_transceive(dev_config->bus, &dev_config->mspi_id,
138 &dev_data->xfer);
139
140 release(dev);
141
142 if (rc < 0) {
143 LOG_ERR("SPI_NOR_OCMD_RD xfer failed: %d", rc);
144 return rc;
145 }
146
147 return 0;
148 }
149
wait_until_ready(const struct device * dev,k_timeout_t poll_period)150 static int wait_until_ready(const struct device *dev, k_timeout_t poll_period)
151 {
152 const struct flash_mspi_nor_config *dev_config = dev->config;
153 struct flash_mspi_nor_data *dev_data = dev->data;
154 uint8_t status_reg;
155 int rc;
156
157 while (true) {
158 dev_data->xfer.cmd_length = 2;
159 dev_data->xfer.addr_length = 4;
160 dev_data->xfer.rx_dummy = 4;
161 dev_data->packet.dir = MSPI_RX;
162 dev_data->packet.cmd = SPI_NOR_OCMD_RDSR;
163 dev_data->packet.address = 0;
164 dev_data->packet.data_buf = &status_reg;
165 dev_data->packet.num_bytes = sizeof(status_reg);
166 rc = mspi_transceive(dev_config->bus, &dev_config->mspi_id,
167 &dev_data->xfer);
168 if (rc < 0) {
169 LOG_ERR("SPI_NOR_OCMD_RDSR xfer failed: %d", rc);
170 return rc;
171 }
172 if (!(status_reg & SPI_NOR_WIP_BIT)) {
173 break;
174 }
175
176 k_sleep(poll_period);
177 }
178
179 return 0;
180 }
181
api_write(const struct device * dev,off_t addr,const void * src,size_t size)182 static int api_write(const struct device *dev, off_t addr, const void *src,
183 size_t size)
184 {
185 const struct flash_mspi_nor_config *dev_config = dev->config;
186 struct flash_mspi_nor_data *dev_data = dev->data;
187 const uint32_t flash_size = dev_flash_size(dev);
188 const uint16_t page_size = dev_page_size(dev);
189 int rc;
190
191 if (size == 0) {
192 return 0;
193 }
194
195 if ((addr < 0) || ((addr + size) > flash_size)) {
196 return -EINVAL;
197 }
198
199 rc = acquire(dev);
200 if (rc < 0) {
201 return rc;
202 }
203
204 while (size > 0) {
205 /* Split write into parts, each within one page only. */
206 uint16_t page_offset = (uint16_t)(addr % page_size);
207 uint16_t page_left = page_size - page_offset;
208 uint16_t to_write = (uint16_t)MIN(size, page_left);
209
210 dev_data->xfer.cmd_length = 2;
211 dev_data->xfer.tx_dummy = 0;
212 dev_data->packet.dir = MSPI_TX;
213
214 dev_data->xfer.addr_length = 0;
215 dev_data->packet.cmd = SPI_NOR_OCMD_WREN;
216 dev_data->packet.num_bytes = 0;
217 rc = mspi_transceive(dev_config->bus, &dev_config->mspi_id,
218 &dev_data->xfer);
219 if (rc < 0) {
220 LOG_ERR("SPI_NOR_OCMD_WREN xfer failed: %d", rc);
221 break;
222 }
223
224 dev_data->xfer.addr_length = 4;
225 dev_data->packet.cmd = SPI_NOR_OCMD_PAGE_PRG;
226 dev_data->packet.address = addr;
227 dev_data->packet.data_buf = (uint8_t *)src;
228 dev_data->packet.num_bytes = to_write;
229 rc = mspi_transceive(dev_config->bus, &dev_config->mspi_id,
230 &dev_data->xfer);
231 if (rc < 0) {
232 LOG_ERR("SPI_NOR_OCMD_PAGE_PRG xfer failed: %d", rc);
233 break;
234 }
235
236 addr += to_write;
237 src = (const uint8_t *)src + to_write;
238 size -= to_write;
239
240 rc = wait_until_ready(dev, K_MSEC(1));
241 if (rc < 0) {
242 break;
243 }
244 }
245
246 release(dev);
247
248 return rc;
249 }
250
api_erase(const struct device * dev,off_t addr,size_t size)251 static int api_erase(const struct device *dev, off_t addr, size_t size)
252 {
253 const struct flash_mspi_nor_config *dev_config = dev->config;
254 struct flash_mspi_nor_data *dev_data = dev->data;
255 const uint32_t flash_size = dev_flash_size(dev);
256 int rc = 0;
257
258 if ((addr < 0) || ((addr + size) > flash_size)) {
259 return -EINVAL;
260 }
261
262 if (!SPI_NOR_IS_SECTOR_ALIGNED(addr)) {
263 return -EINVAL;
264 }
265
266 if ((size % SPI_NOR_SECTOR_SIZE) != 0) {
267 return -EINVAL;
268 }
269
270 rc = acquire(dev);
271 if (rc < 0) {
272 return rc;
273 }
274
275 while (size > 0) {
276 dev_data->xfer.cmd_length = 2;
277 dev_data->xfer.tx_dummy = 0;
278 dev_data->packet.dir = MSPI_TX;
279 dev_data->packet.num_bytes = 0;
280
281 dev_data->xfer.addr_length = 0;
282 dev_data->packet.cmd = SPI_NOR_OCMD_WREN;
283 rc = mspi_transceive(dev_config->bus, &dev_config->mspi_id,
284 &dev_data->xfer);
285 if (rc < 0) {
286 LOG_ERR("SPI_NOR_OCMD_WREN xfer failed: %d", rc);
287 break;
288 }
289
290 if (size == flash_size) {
291 /* Chip erase. */
292 dev_data->xfer.addr_length = 0;
293 dev_data->packet.cmd = SPI_NOR_OCMD_CE;
294
295 size -= flash_size;
296 } else {
297 /* Sector erase. */
298 dev_data->xfer.addr_length = 4;
299 dev_data->packet.cmd = SPI_NOR_OCMD_SE;
300 dev_data->packet.address = addr;
301
302 addr += SPI_NOR_SECTOR_SIZE;
303 size -= SPI_NOR_SECTOR_SIZE;
304 }
305 rc = mspi_transceive(dev_config->bus, &dev_config->mspi_id,
306 &dev_data->xfer);
307 if (rc < 0) {
308 LOG_ERR("Erase command 0x%02x xfer failed: %d",
309 dev_data->packet.cmd, rc);
310 break;
311 }
312
313 rc = wait_until_ready(dev, K_MSEC(1));
314 if (rc < 0) {
315 break;
316 }
317 }
318
319 release(dev);
320
321 return rc;
322 }
323
324 static const
api_get_parameters(const struct device * dev)325 struct flash_parameters *api_get_parameters(const struct device *dev)
326 {
327 ARG_UNUSED(dev);
328
329 static const struct flash_parameters parameters = {
330 .write_block_size = 1,
331 .erase_value = 0xff,
332 };
333
334 return ¶meters;
335 }
336
read_jedec_id(const struct device * dev,uint8_t * id)337 static int read_jedec_id(const struct device *dev, uint8_t *id)
338 {
339 const struct flash_mspi_nor_config *dev_config = dev->config;
340 struct flash_mspi_nor_data *dev_data = dev->data;
341 int rc;
342
343 dev_data->xfer.cmd_length = 2;
344 dev_data->xfer.addr_length = 4;
345 dev_data->xfer.rx_dummy = 4;
346 dev_data->packet.dir = MSPI_RX;
347 dev_data->packet.cmd = JESD216_OCMD_READ_ID;
348 dev_data->packet.address = 0;
349 dev_data->packet.data_buf = id;
350 dev_data->packet.num_bytes = JESD216_READ_ID_LEN;
351 rc = mspi_transceive(dev_config->bus, &dev_config->mspi_id,
352 &dev_data->xfer);
353 if (rc < 0) {
354 printk("mspi_transceive() failed: %d\n", rc);
355 return rc;
356 }
357
358 return rc;
359 }
360
361 #if defined(CONFIG_FLASH_PAGE_LAYOUT)
api_page_layout(const struct device * dev,const struct flash_pages_layout ** layout,size_t * layout_size)362 static void api_page_layout(const struct device *dev,
363 const struct flash_pages_layout **layout,
364 size_t *layout_size)
365 {
366 const struct flash_mspi_nor_config *dev_config = dev->config;
367
368 *layout = &dev_config->layout;
369 *layout_size = 1;
370 }
371 #endif /* CONFIG_FLASH_PAGE_LAYOUT */
372
373 #if defined(CONFIG_FLASH_JESD216_API)
api_sfdp_read(const struct device * dev,off_t addr,void * dest,size_t size)374 static int api_sfdp_read(const struct device *dev, off_t addr, void *dest,
375 size_t size)
376 {
377 const struct flash_mspi_nor_config *dev_config = dev->config;
378 struct flash_mspi_nor_data *dev_data = dev->data;
379 int rc;
380
381 if (size == 0) {
382 return 0;
383 }
384
385 rc = acquire(dev);
386 if (rc < 0) {
387 return rc;
388 }
389
390 dev_data->xfer.cmd_length = 2;
391 dev_data->xfer.addr_length = 4;
392 dev_data->xfer.rx_dummy = 20;
393 dev_data->packet.dir = MSPI_RX;
394 dev_data->packet.cmd = JESD216_OCMD_READ_SFDP;
395 dev_data->packet.address = addr;
396 dev_data->packet.data_buf = dest;
397 dev_data->packet.num_bytes = size;
398 rc = mspi_transceive(dev_config->bus, &dev_config->mspi_id,
399 &dev_data->xfer);
400 if (rc < 0) {
401 printk("JESD216_OCMD_READ_SFDP xfer failed: %d\n", rc);
402 return rc;
403 }
404
405 release(dev);
406
407 return rc;
408 }
409
api_read_jedec_id(const struct device * dev,uint8_t * id)410 static int api_read_jedec_id(const struct device *dev, uint8_t *id)
411 {
412 int rc = 0;
413
414 rc = acquire(dev);
415 if (rc < 0) {
416 return rc;
417 }
418
419 rc = read_jedec_id(dev, id);
420
421 release(dev);
422
423 return rc;
424 }
425 #endif /* CONFIG_FLASH_JESD216_API */
426
dev_pm_action_cb(const struct device * dev,enum pm_device_action action)427 static int dev_pm_action_cb(const struct device *dev,
428 enum pm_device_action action)
429 {
430 switch (action) {
431 case PM_DEVICE_ACTION_SUSPEND:
432 break;
433 case PM_DEVICE_ACTION_RESUME:
434 break;
435 default:
436 return -ENOTSUP;
437 }
438
439 return 0;
440 }
441
flash_chip_init(const struct device * dev)442 static int flash_chip_init(const struct device *dev)
443 {
444 const struct flash_mspi_nor_config *dev_config = dev->config;
445 struct flash_mspi_nor_data *dev_data = dev->data;
446 struct mspi_dev_cfg init_dev_cfg = dev_config->mspi_cfg;
447 uint8_t id[JESD216_READ_ID_LEN] = {0};
448 int rc;
449
450 init_dev_cfg.freq = MHZ(1);
451 init_dev_cfg.io_mode = MSPI_IO_MODE_SINGLE;
452
453 rc = mspi_dev_config(dev_config->bus, &dev_config->mspi_id,
454 MSPI_DEVICE_CONFIG_ALL, &init_dev_cfg);
455 if (rc < 0) {
456 LOG_ERR("Failed to set initial device config: %d", rc);
457 return rc;
458 }
459
460 dev_data->xfer.xfer_mode = MSPI_PIO;
461 dev_data->xfer.packets = &dev_data->packet;
462 dev_data->xfer.num_packet = 1;
463 dev_data->xfer.timeout = 10;
464
465 dev_data->xfer.cmd_length = 1;
466 dev_data->xfer.addr_length = 0;
467 dev_data->xfer.tx_dummy = 0;
468 dev_data->xfer.rx_dummy = 0;
469
470 dev_data->packet.dir = MSPI_RX;
471 dev_data->packet.cmd = JESD216_CMD_READ_ID;
472 dev_data->packet.data_buf = id;
473 dev_data->packet.num_bytes = sizeof(id);
474 rc = mspi_transceive(dev_config->bus, &dev_config->mspi_id,
475 &dev_data->xfer);
476 if (rc < 0) {
477 LOG_ERR("Failed to read JEDEC ID in single line mode: %d", rc);
478 return rc;
479 }
480
481 /*
482 * If the read ID does not match the one from DTS, assume the flash
483 * is already in the Octa I/O mode, so switching it is not needed.
484 */
485 if (memcmp(id, dev_config->jedec_id, sizeof(id)) == 0) {
486 static const uint8_t enable_sopi[] = { 0x01 };
487
488 dev_data->packet.dir = MSPI_TX;
489 dev_data->packet.cmd = SPI_NOR_CMD_WREN;
490 dev_data->packet.num_bytes = 0;
491 rc = mspi_transceive(dev_config->bus, &dev_config->mspi_id,
492 &dev_data->xfer);
493 if (rc < 0) {
494 LOG_ERR("SPI_NOR_CMD_WREN xfer failed: %d", rc);
495 return rc;
496 }
497
498 dev_data->xfer.addr_length = 4;
499 dev_data->packet.cmd = SPI_NOR_CMD_WR_CFGREG2;
500 dev_data->packet.address = 0;
501 dev_data->packet.data_buf = (uint8_t *)&enable_sopi;
502 dev_data->packet.num_bytes = sizeof(enable_sopi);
503 rc = mspi_transceive(dev_config->bus, &dev_config->mspi_id,
504 &dev_data->xfer);
505 if (rc < 0) {
506 printk("SPI_NOR_CMD_WR_CFGREG2 xfer failed: %d\n", rc);
507 return rc;
508 }
509 }
510
511 rc = mspi_dev_config(dev_config->bus, &dev_config->mspi_id,
512 MSPI_DEVICE_CONFIG_ALL, &dev_config->mspi_cfg);
513 if (rc < 0) {
514 LOG_ERR("Failed to set device config: %d", rc);
515 return rc;
516 }
517
518 rc = read_jedec_id(dev, id);
519 if (rc < 0) {
520 return rc;
521 }
522
523 if (memcmp(id, dev_config->jedec_id, sizeof(id)) != 0) {
524 LOG_ERR("JEDEC ID mismatch, read: %02x %02x %02x, "
525 "expected: %02x %02x %02x",
526 id[0], id[1], id[2],
527 dev_config->jedec_id[0],
528 dev_config->jedec_id[1],
529 dev_config->jedec_id[2]);
530 return -ENODEV;
531 }
532
533 #if defined(CONFIG_MSPI_XIP)
534 /* Enable XIP access for this chip if specified so in DT. */
535 if (dev_config->xip_cfg.enable) {
536 rc = mspi_xip_config(dev_config->bus, &dev_config->mspi_id,
537 &dev_config->xip_cfg);
538 if (rc < 0) {
539 return rc;
540 }
541 }
542 #endif
543
544 return 0;
545 }
546
drv_init(const struct device * dev)547 static int drv_init(const struct device *dev)
548 {
549 const struct flash_mspi_nor_config *dev_config = dev->config;
550 struct flash_mspi_nor_data *dev_data = dev->data;
551 int rc;
552
553 if (!device_is_ready(dev_config->bus)) {
554 LOG_ERR("Device %s is not ready", dev_config->bus->name);
555 return -ENODEV;
556 }
557
558 #if defined(WITH_RESET_GPIO)
559 if (dev_config->reset.port) {
560 if (!gpio_is_ready_dt(&dev_config->reset)) {
561 LOG_ERR("Device %s is not ready",
562 dev_config->reset.port->name);
563 return -ENODEV;
564 }
565
566 rc = gpio_pin_configure_dt(&dev_config->reset,
567 GPIO_OUTPUT_ACTIVE);
568 if (rc < 0) {
569 LOG_ERR("Failed to activate RESET: %d", rc);
570 return -EIO;
571 }
572
573 if (dev_config->reset_pulse_us != 0) {
574 k_busy_wait(dev_config->reset_pulse_us);
575 }
576
577 rc = gpio_pin_set_dt(&dev_config->reset, 0);
578 if (rc < 0) {
579 LOG_ERR("Failed to deactivate RESET: %d", rc);
580 return -EIO;
581 }
582
583 if (dev_config->reset_recovery_us != 0) {
584 k_busy_wait(dev_config->reset_recovery_us);
585 }
586 }
587 #endif
588
589 rc = pm_device_runtime_get(dev_config->bus);
590 if (rc < 0) {
591 LOG_ERR("pm_device_runtime_get() failed: %d", rc);
592 return rc;
593 }
594
595 rc = flash_chip_init(dev);
596
597 /* Release the MSPI controller - it was acquired by the call to
598 * mspi_dev_config() in flash_chip_init().
599 */
600 (void)mspi_get_channel_status(dev_config->bus, 0);
601
602 (void)pm_device_runtime_put(dev_config->bus);
603
604 if (rc < 0) {
605 return rc;
606 }
607
608 k_sem_init(&dev_data->acquired, 1, K_SEM_MAX_LIMIT);
609
610 return pm_device_driver_init(dev, dev_pm_action_cb);
611 }
612
613 static DEVICE_API(flash, drv_api) = {
614 .read = api_read,
615 .write = api_write,
616 .erase = api_erase,
617 .get_parameters = api_get_parameters,
618 #if defined(CONFIG_FLASH_PAGE_LAYOUT)
619 .page_layout = api_page_layout,
620 #endif
621 #if defined(CONFIG_FLASH_JESD216_API)
622 .sfdp_read = api_sfdp_read,
623 .read_jedec_id = api_read_jedec_id,
624 #endif
625 };
626
627 #define FLASH_SIZE_INST(inst) (DT_INST_PROP(inst, size) / 8)
628
629 #if defined(CONFIG_FLASH_PAGE_LAYOUT)
630 BUILD_ASSERT((CONFIG_FLASH_MSPI_NOR_LAYOUT_PAGE_SIZE % 4096) == 0,
631 "MSPI_NOR_FLASH_LAYOUT_PAGE_SIZE must be multiple of 4096");
632 #define FLASH_PAGE_LAYOUT_DEFINE(inst) \
633 .layout = { \
634 .pages_size = CONFIG_FLASH_MSPI_NOR_LAYOUT_PAGE_SIZE, \
635 .pages_count = FLASH_SIZE_INST(inst) \
636 / CONFIG_FLASH_MSPI_NOR_LAYOUT_PAGE_SIZE, \
637 },
638 #define FLASH_PAGE_LAYOUT_CHECK(inst) \
639 BUILD_ASSERT((FLASH_SIZE_INST(inst) % CONFIG_FLASH_MSPI_NOR_LAYOUT_PAGE_SIZE) == 0, \
640 "MSPI_NOR_FLASH_LAYOUT_PAGE_SIZE incompatible with flash size, instance " #inst);
641 #else
642 #define FLASH_PAGE_LAYOUT_DEFINE(inst)
643 #define FLASH_PAGE_LAYOUT_CHECK(inst)
644 #endif
645
646 /* MSPI bus must be initialized before this device. */
647 #if (CONFIG_MSPI_INIT_PRIORITY < CONFIG_FLASH_INIT_PRIORITY)
648 #define INIT_PRIORITY CONFIG_FLASH_INIT_PRIORITY
649 #else
650 #define INIT_PRIORITY UTIL_INC(CONFIG_MSPI_INIT_PRIORITY)
651 #endif
652
653 #define FLASH_MSPI_NOR_INST(inst) \
654 BUILD_ASSERT(DT_INST_ENUM_IDX(inst, mspi_io_mode) == \
655 MSPI_IO_MODE_OCTAL, \
656 "Only Octal I/O mode is supported for now"); \
657 PM_DEVICE_DT_INST_DEFINE(inst, dev_pm_action_cb); \
658 static struct flash_mspi_nor_data dev##inst##_data; \
659 static const struct flash_mspi_nor_config dev##inst##_config = { \
660 .bus = DEVICE_DT_GET(DT_INST_BUS(inst)), \
661 .flash_size = FLASH_SIZE_INST(inst), \
662 .mspi_id = MSPI_DEVICE_ID_DT_INST(inst), \
663 .mspi_cfg = MSPI_DEVICE_CONFIG_DT_INST(inst), \
664 .mspi_cfg_mask = DT_PROP(DT_INST_BUS(inst), \
665 software_multiperipheral) \
666 ? MSPI_DEVICE_CONFIG_ALL \
667 : MSPI_DEVICE_CONFIG_NONE, \
668 IF_ENABLED(CONFIG_MSPI_XIP, \
669 (.xip_cfg = MSPI_XIP_CONFIG_DT_INST(inst),)) \
670 IF_ENABLED(WITH_RESET_GPIO, \
671 (.reset = GPIO_DT_SPEC_INST_GET_OR(inst, reset_gpios, {0}), \
672 .reset_pulse_us = DT_INST_PROP_OR(inst, t_reset_pulse, 0) \
673 / 1000, \
674 .reset_recovery_us = DT_INST_PROP_OR(inst, t_reset_recovery, 0) \
675 / 1000,)) \
676 FLASH_PAGE_LAYOUT_DEFINE(inst) \
677 .jedec_id = DT_INST_PROP(inst, jedec_id), \
678 }; \
679 FLASH_PAGE_LAYOUT_CHECK(inst) \
680 DEVICE_DT_INST_DEFINE(inst, \
681 drv_init, PM_DEVICE_DT_INST_GET(inst), \
682 &dev##inst##_data, &dev##inst##_config, \
683 POST_KERNEL, INIT_PRIORITY, \
684 &drv_api);
685
686 DT_INST_FOREACH_STATUS_OKAY(FLASH_MSPI_NOR_INST)
687
