1 /* 2 * Texas Instruments System Control Interface (TISCI) Protocol 3 * 4 * Communication protocol with TI SCI hardware 5 * The system works in a message response protocol 6 * See: http://processors.wiki.ti.com/index.php/TISCI for details 7 * 8 * Copyright (C) 2018-2022 Texas Instruments Incorporated - https://www.ti.com/ 9 * 10 * SPDX-License-Identifier: BSD-3-Clause 11 */ 12 13 #ifndef TI_SCI_PROTOCOL_H 14 #define TI_SCI_PROTOCOL_H 15 16 #include <stdint.h> 17 18 /* Generic Messages */ 19 #define TI_SCI_MSG_ENABLE_WDT 0x0000 20 #define TI_SCI_MSG_WAKE_RESET 0x0001 21 #define TI_SCI_MSG_VERSION 0x0002 22 #define TI_SCI_MSG_WAKE_REASON 0x0003 23 #define TI_SCI_MSG_GOODBYE 0x0004 24 #define TI_SCI_MSG_SYS_RESET 0x0005 25 26 /* Device requests */ 27 #define TI_SCI_MSG_SET_DEVICE_STATE 0x0200 28 #define TI_SCI_MSG_GET_DEVICE_STATE 0x0201 29 #define TI_SCI_MSG_SET_DEVICE_RESETS 0x0202 30 31 /* Low Power Mode Requests */ 32 #define TI_SCI_MSG_ENTER_SLEEP 0x0301 33 34 /* Clock requests */ 35 #define TI_SCI_MSG_SET_CLOCK_STATE 0x0100 36 #define TI_SCI_MSG_GET_CLOCK_STATE 0x0101 37 #define TI_SCI_MSG_SET_CLOCK_PARENT 0x0102 38 #define TI_SCI_MSG_GET_CLOCK_PARENT 0x0103 39 #define TI_SCI_MSG_GET_NUM_CLOCK_PARENTS 0x0104 40 #define TI_SCI_MSG_SET_CLOCK_FREQ 0x010c 41 #define TI_SCI_MSG_QUERY_CLOCK_FREQ 0x010d 42 #define TI_SCI_MSG_GET_CLOCK_FREQ 0x010e 43 44 /* Processor Control Messages */ 45 #define TISCI_MSG_PROC_REQUEST 0xc000 46 #define TISCI_MSG_PROC_RELEASE 0xc001 47 #define TISCI_MSG_PROC_HANDOVER 0xc005 48 #define TISCI_MSG_SET_PROC_BOOT_CONFIG 0xc100 49 #define TISCI_MSG_SET_PROC_BOOT_CTRL 0xc101 50 #define TISCI_MSG_PROC_AUTH_BOOT_IMIAGE 0xc120 51 #define TISCI_MSG_GET_PROC_BOOT_STATUS 0xc400 52 #define TISCI_MSG_WAIT_PROC_BOOT_STATUS 0xc401 53 54 /** 55 * struct ti_sci_msg_hdr - Generic Message Header for All messages and responses 56 * @type: Type of messages: One of TI_SCI_MSG* values 57 * @host: Host of the message 58 * @seq: Message identifier indicating a transfer sequence 59 * @flags: Flag for the message 60 */ 61 struct ti_sci_msg_hdr { 62 uint16_t type; 63 uint8_t host; 64 uint8_t seq; 65 #define TI_SCI_MSG_FLAG(val) (1 << (val)) 66 #define TI_SCI_FLAG_REQ_GENERIC_NORESPONSE 0x0 67 #define TI_SCI_FLAG_REQ_ACK_ON_RECEIVED TI_SCI_MSG_FLAG(0) 68 #define TI_SCI_FLAG_REQ_ACK_ON_PROCESSED TI_SCI_MSG_FLAG(1) 69 #define TI_SCI_FLAG_RESP_GENERIC_NACK 0x0 70 #define TI_SCI_FLAG_RESP_GENERIC_ACK TI_SCI_MSG_FLAG(1) 71 /* Additional Flags */ 72 uint32_t flags; 73 } __packed; 74 75 /** 76 * struct ti_sci_msg_resp_version - Response for a message 77 * @hdr: Generic header 78 * @firmware_description: String describing the firmware 79 * @firmware_revision: Firmware revision 80 * @abi_major: Major version of the ABI that firmware supports 81 * @abi_minor: Minor version of the ABI that firmware supports 82 * 83 * In general, ABI version changes follow the rule that minor version increments 84 * are backward compatible. Major revision changes in ABI may not be 85 * backward compatible. 86 * 87 * Response to a generic message with message type TI_SCI_MSG_VERSION 88 */ 89 struct ti_sci_msg_resp_version { 90 struct ti_sci_msg_hdr hdr; 91 #define FIRMWARE_DESCRIPTION_LENGTH 32 92 char firmware_description[FIRMWARE_DESCRIPTION_LENGTH]; 93 uint16_t firmware_revision; 94 uint8_t abi_major; 95 uint8_t abi_minor; 96 } __packed; 97 98 /** 99 * struct ti_sci_msg_req_reboot - Reboot the SoC 100 * @hdr: Generic Header 101 * @domain: Domain to be reset, 0 for full SoC reboot 102 * 103 * Request type is TI_SCI_MSG_SYS_RESET, responded with a generic 104 * ACK/NACK message. 105 */ 106 struct ti_sci_msg_req_reboot { 107 struct ti_sci_msg_hdr hdr; 108 #define TI_SCI_DOMAIN_FULL_SOC_RESET 0x0 109 uint8_t domain; 110 } __packed; 111 112 /** 113 * struct ti_sci_msg_req_set_device_state - Set the desired state of the device 114 * @hdr: Generic header 115 * @id: Indicates which device to modify 116 * @reserved: Reserved space in message, must be 0 for backward compatibility 117 * @state: The desired state of the device. 118 * 119 * Certain flags can also be set to alter the device state: 120 * + MSG_FLAG_DEVICE_WAKE_ENABLED - Configure the device to be a wake source. 121 * The meaning of this flag will vary slightly from device to device and from 122 * SoC to SoC but it generally allows the device to wake the SoC out of deep 123 * suspend states. 124 * + MSG_FLAG_DEVICE_RESET_ISO - Enable reset isolation for this device. 125 * + MSG_FLAG_DEVICE_EXCLUSIVE - Claim this device exclusively. When passed 126 * with STATE_RETENTION or STATE_ON, it will claim the device exclusively. 127 * If another host already has this device set to STATE_RETENTION or STATE_ON, 128 * the message will fail. Once successful, other hosts attempting to set 129 * STATE_RETENTION or STATE_ON will fail. 130 * 131 * Request type is TI_SCI_MSG_SET_DEVICE_STATE, responded with a generic 132 * ACK/NACK message. 133 */ 134 struct ti_sci_msg_req_set_device_state { 135 /* Additional hdr->flags options */ 136 #define MSG_FLAG_DEVICE_WAKE_ENABLED TI_SCI_MSG_FLAG(8) 137 #define MSG_FLAG_DEVICE_RESET_ISO TI_SCI_MSG_FLAG(9) 138 #define MSG_FLAG_DEVICE_EXCLUSIVE TI_SCI_MSG_FLAG(10) 139 struct ti_sci_msg_hdr hdr; 140 uint32_t id; 141 uint32_t reserved; 142 143 #define MSG_DEVICE_SW_STATE_AUTO_OFF 0 144 #define MSG_DEVICE_SW_STATE_RETENTION 1 145 #define MSG_DEVICE_SW_STATE_ON 2 146 uint8_t state; 147 } __packed; 148 149 /** 150 * struct ti_sci_msg_req_get_device_state - Request to get device. 151 * @hdr: Generic header 152 * @id: Device Identifier 153 * 154 * Request type is TI_SCI_MSG_GET_DEVICE_STATE, responded device state 155 * information 156 */ 157 struct ti_sci_msg_req_get_device_state { 158 struct ti_sci_msg_hdr hdr; 159 uint32_t id; 160 } __packed; 161 162 /** 163 * struct ti_sci_msg_resp_get_device_state - Response to get device request. 164 * @hdr: Generic header 165 * @context_loss_count: Indicates how many times the device has lost context. A 166 * driver can use this monotonic counter to determine if the device has 167 * lost context since the last time this message was exchanged. 168 * @resets: Programmed state of the reset lines. 169 * @programmed_state: The state as programmed by set_device. 170 * - Uses the MSG_DEVICE_SW_* macros 171 * @current_state: The actual state of the hardware. 172 * 173 * Response to request TI_SCI_MSG_GET_DEVICE_STATE. 174 */ 175 struct ti_sci_msg_resp_get_device_state { 176 struct ti_sci_msg_hdr hdr; 177 uint32_t context_loss_count; 178 uint32_t resets; 179 uint8_t programmed_state; 180 #define MSG_DEVICE_HW_STATE_OFF 0 181 #define MSG_DEVICE_HW_STATE_ON 1 182 #define MSG_DEVICE_HW_STATE_TRANS 2 183 uint8_t current_state; 184 } __packed; 185 186 /** 187 * struct ti_sci_msg_req_set_device_resets - Set the desired resets 188 * configuration of the device 189 * @hdr: Generic header 190 * @id: Indicates which device to modify 191 * @resets: A bit field of resets for the device. The meaning, behavior, 192 * and usage of the reset flags are device specific. 0 for a bit 193 * indicates releasing the reset represented by that bit while 1 194 * indicates keeping it held. 195 * 196 * Request type is TI_SCI_MSG_SET_DEVICE_RESETS, responded with a generic 197 * ACK/NACK message. 198 */ 199 struct ti_sci_msg_req_set_device_resets { 200 struct ti_sci_msg_hdr hdr; 201 uint32_t id; 202 uint32_t resets; 203 } __packed; 204 205 /** 206 * struct ti_sci_msg_req_set_clock_state - Request to setup a Clock state 207 * @hdr: Generic Header, Certain flags can be set specific to the clocks: 208 * MSG_FLAG_CLOCK_ALLOW_SSC: Allow this clock to be modified 209 * via spread spectrum clocking. 210 * MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE: Allow this clock's 211 * frequency to be changed while it is running so long as it 212 * is within the min/max limits. 213 * MSG_FLAG_CLOCK_INPUT_TERM: Enable input termination, this 214 * is only applicable to clock inputs on the SoC pseudo-device. 215 * @dev_id: Device identifier this request is for 216 * @clk_id: Clock identifier for the device for this request. 217 * Each device has it's own set of clock inputs. This indexes 218 * which clock input to modify. 219 * @request_state: Request the state for the clock to be set to. 220 * MSG_CLOCK_SW_STATE_UNREQ: The IP does not require this clock, 221 * it can be disabled, regardless of the state of the device 222 * MSG_CLOCK_SW_STATE_AUTO: Allow the System Controller to 223 * automatically manage the state of this clock. If the device 224 * is enabled, then the clock is enabled. If the device is set 225 * to off or retention, then the clock is internally set as not 226 * being required by the device.(default) 227 * MSG_CLOCK_SW_STATE_REQ: Configure the clock to be enabled, 228 * regardless of the state of the device. 229 * 230 * Normally, all required clocks are managed by TISCI entity, this is used 231 * only for specific control *IF* required. Auto managed state is 232 * MSG_CLOCK_SW_STATE_AUTO, in other states, TISCI entity assume remote 233 * will explicitly control. 234 * 235 * Request type is TI_SCI_MSG_SET_CLOCK_STATE, response is a generic 236 * ACK or NACK message. 237 */ 238 struct ti_sci_msg_req_set_clock_state { 239 /* Additional hdr->flags options */ 240 #define MSG_FLAG_CLOCK_ALLOW_SSC TI_SCI_MSG_FLAG(8) 241 #define MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE TI_SCI_MSG_FLAG(9) 242 #define MSG_FLAG_CLOCK_INPUT_TERM TI_SCI_MSG_FLAG(10) 243 struct ti_sci_msg_hdr hdr; 244 uint32_t dev_id; 245 uint8_t clk_id; 246 #define MSG_CLOCK_SW_STATE_UNREQ 0 247 #define MSG_CLOCK_SW_STATE_AUTO 1 248 #define MSG_CLOCK_SW_STATE_REQ 2 249 uint8_t request_state; 250 } __packed; 251 252 /** 253 * struct ti_sci_msg_req_get_clock_state - Request for clock state 254 * @hdr: Generic Header 255 * @dev_id: Device identifier this request is for 256 * @clk_id: Clock identifier for the device for this request. 257 * Each device has it's own set of clock inputs. This indexes 258 * which clock input to get state of. 259 * 260 * Request type is TI_SCI_MSG_GET_CLOCK_STATE, response is state 261 * of the clock 262 */ 263 struct ti_sci_msg_req_get_clock_state { 264 struct ti_sci_msg_hdr hdr; 265 uint32_t dev_id; 266 uint8_t clk_id; 267 } __packed; 268 269 /** 270 * struct ti_sci_msg_resp_get_clock_state - Response to get clock state 271 * @hdr: Generic Header 272 * @programmed_state: Any programmed state of the clock. This is one of 273 * MSG_CLOCK_SW_STATE* values. 274 * @current_state: Current state of the clock. This is one of: 275 * MSG_CLOCK_HW_STATE_NOT_READY: Clock is not ready 276 * MSG_CLOCK_HW_STATE_READY: Clock is ready 277 * 278 * Response to TI_SCI_MSG_GET_CLOCK_STATE. 279 */ 280 struct ti_sci_msg_resp_get_clock_state { 281 struct ti_sci_msg_hdr hdr; 282 uint8_t programmed_state; 283 #define MSG_CLOCK_HW_STATE_NOT_READY 0 284 #define MSG_CLOCK_HW_STATE_READY 1 285 uint8_t current_state; 286 } __packed; 287 288 /** 289 * struct ti_sci_msg_req_set_clock_parent - Set the clock parent 290 * @hdr: Generic Header 291 * @dev_id: Device identifier this request is for 292 * @clk_id: Clock identifier for the device for this request. 293 * Each device has it's own set of clock inputs. This indexes 294 * which clock input to modify. 295 * @parent_id: The new clock parent is selectable by an index via this 296 * parameter. 297 * 298 * Request type is TI_SCI_MSG_SET_CLOCK_PARENT, response is generic 299 * ACK / NACK message. 300 */ 301 struct ti_sci_msg_req_set_clock_parent { 302 struct ti_sci_msg_hdr hdr; 303 uint32_t dev_id; 304 uint8_t clk_id; 305 uint8_t parent_id; 306 } __packed; 307 308 /** 309 * struct ti_sci_msg_req_get_clock_parent - Get the clock parent 310 * @hdr: Generic Header 311 * @dev_id: Device identifier this request is for 312 * @clk_id: Clock identifier for the device for this request. 313 * Each device has it's own set of clock inputs. This indexes 314 * which clock input to get the parent for. 315 * 316 * Request type is TI_SCI_MSG_GET_CLOCK_PARENT, response is parent information 317 */ 318 struct ti_sci_msg_req_get_clock_parent { 319 struct ti_sci_msg_hdr hdr; 320 uint32_t dev_id; 321 uint8_t clk_id; 322 } __packed; 323 324 /** 325 * struct ti_sci_msg_resp_get_clock_parent - Response with clock parent 326 * @hdr: Generic Header 327 * @parent_id: The current clock parent 328 * 329 * Response to TI_SCI_MSG_GET_CLOCK_PARENT. 330 */ 331 struct ti_sci_msg_resp_get_clock_parent { 332 struct ti_sci_msg_hdr hdr; 333 uint8_t parent_id; 334 } __packed; 335 336 /** 337 * struct ti_sci_msg_req_get_clock_num_parents - Request to get clock parents 338 * @hdr: Generic header 339 * @dev_id: Device identifier this request is for 340 * @clk_id: Clock identifier for the device for this request. 341 * 342 * This request provides information about how many clock parent options 343 * are available for a given clock to a device. This is typically used 344 * for input clocks. 345 * 346 * Request type is TI_SCI_MSG_GET_NUM_CLOCK_PARENTS, response is appropriate 347 * message, or NACK in case of inability to satisfy request. 348 */ 349 struct ti_sci_msg_req_get_clock_num_parents { 350 struct ti_sci_msg_hdr hdr; 351 uint32_t dev_id; 352 uint8_t clk_id; 353 } __packed; 354 355 /** 356 * struct ti_sci_msg_resp_get_clock_num_parents - Response for get clk parents 357 * @hdr: Generic header 358 * @num_parents: Number of clock parents 359 * 360 * Response to TI_SCI_MSG_GET_NUM_CLOCK_PARENTS 361 */ 362 struct ti_sci_msg_resp_get_clock_num_parents { 363 struct ti_sci_msg_hdr hdr; 364 uint8_t num_parents; 365 } __packed; 366 367 /** 368 * struct ti_sci_msg_req_query_clock_freq - Request to query a frequency 369 * @hdr: Generic Header 370 * @dev_id: Device identifier this request is for 371 * @min_freq_hz: The minimum allowable frequency in Hz. This is the minimum 372 * allowable programmed frequency and does not account for clock 373 * tolerances and jitter. 374 * @target_freq_hz: The target clock frequency. A frequency will be found 375 * as close to this target frequency as possible. 376 * @max_freq_hz: The maximum allowable frequency in Hz. This is the maximum 377 * allowable programmed frequency and does not account for clock 378 * tolerances and jitter. 379 * @clk_id: Clock identifier for the device for this request. 380 * 381 * NOTE: Normally clock frequency management is automatically done by TISCI 382 * entity. In case of specific requests, TISCI evaluates capability to achieve 383 * requested frequency within provided range and responds with 384 * result message. 385 * 386 * Request type is TI_SCI_MSG_QUERY_CLOCK_FREQ, response is appropriate message, 387 * or NACK in case of inability to satisfy request. 388 */ 389 struct ti_sci_msg_req_query_clock_freq { 390 struct ti_sci_msg_hdr hdr; 391 uint32_t dev_id; 392 uint64_t min_freq_hz; 393 uint64_t target_freq_hz; 394 uint64_t max_freq_hz; 395 uint8_t clk_id; 396 } __packed; 397 398 /** 399 * struct ti_sci_msg_resp_query_clock_freq - Response to a clock frequency query 400 * @hdr: Generic Header 401 * @freq_hz: Frequency that is the best match in Hz. 402 * 403 * Response to request type TI_SCI_MSG_QUERY_CLOCK_FREQ. NOTE: if the request 404 * cannot be satisfied, the message will be of type NACK. 405 */ 406 struct ti_sci_msg_resp_query_clock_freq { 407 struct ti_sci_msg_hdr hdr; 408 uint64_t freq_hz; 409 } __packed; 410 411 /** 412 * struct ti_sci_msg_req_set_clock_freq - Request to setup a clock frequency 413 * @hdr: Generic Header 414 * @dev_id: Device identifier this request is for 415 * @min_freq_hz: The minimum allowable frequency in Hz. This is the minimum 416 * allowable programmed frequency and does not account for clock 417 * tolerances and jitter. 418 * @target_freq_hz: The target clock frequency. The clock will be programmed 419 * at a rate as close to this target frequency as possible. 420 * @max_freq_hz: The maximum allowable frequency in Hz. This is the maximum 421 * allowable programmed frequency and does not account for clock 422 * tolerances and jitter. 423 * @clk_id: Clock identifier for the device for this request. 424 * 425 * NOTE: Normally clock frequency management is automatically done by TISCI 426 * entity. In case of specific requests, TISCI evaluates capability to achieve 427 * requested range and responds with success/failure message. 428 * 429 * This sets the desired frequency for a clock within an allowable 430 * range. This message will fail on an enabled clock unless 431 * MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE is set for the clock. Additionally, 432 * if other clocks have their frequency modified due to this message, 433 * they also must have the MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE or be disabled. 434 * 435 * Calling set frequency on a clock input to the SoC pseudo-device will 436 * inform the PMMC of that clock's frequency. Setting a frequency of 437 * zero will indicate the clock is disabled. 438 * 439 * Calling set frequency on clock outputs from the SoC pseudo-device will 440 * function similarly to setting the clock frequency on a device. 441 * 442 * Request type is TI_SCI_MSG_SET_CLOCK_FREQ, response is a generic ACK/NACK 443 * message. 444 */ 445 struct ti_sci_msg_req_set_clock_freq { 446 struct ti_sci_msg_hdr hdr; 447 uint32_t dev_id; 448 uint64_t min_freq_hz; 449 uint64_t target_freq_hz; 450 uint64_t max_freq_hz; 451 uint8_t clk_id; 452 } __packed; 453 454 /** 455 * struct ti_sci_msg_req_get_clock_freq - Request to get the clock frequency 456 * @hdr: Generic Header 457 * @dev_id: Device identifier this request is for 458 * @clk_id: Clock identifier for the device for this request. 459 * 460 * NOTE: Normally clock frequency management is automatically done by TISCI 461 * entity. In some cases, clock frequencies are configured by host. 462 * 463 * Request type is TI_SCI_MSG_GET_CLOCK_FREQ, responded with clock frequency 464 * that the clock is currently at. 465 */ 466 struct ti_sci_msg_req_get_clock_freq { 467 struct ti_sci_msg_hdr hdr; 468 uint32_t dev_id; 469 uint8_t clk_id; 470 } __packed; 471 472 /** 473 * struct ti_sci_msg_resp_get_clock_freq - Response of clock frequency request 474 * @hdr: Generic Header 475 * @freq_hz: Frequency that the clock is currently on, in Hz. 476 * 477 * Response to request type TI_SCI_MSG_GET_CLOCK_FREQ. 478 */ 479 struct ti_sci_msg_resp_get_clock_freq { 480 struct ti_sci_msg_hdr hdr; 481 uint64_t freq_hz; 482 } __packed; 483 484 #define TISCI_ADDR_LOW_MASK 0x00000000ffffffff 485 #define TISCI_ADDR_HIGH_MASK 0xffffffff00000000 486 #define TISCI_ADDR_HIGH_SHIFT 32 487 488 /** 489 * struct ti_sci_msg_req_proc_request - Request a processor 490 * 491 * @hdr: Generic Header 492 * @processor_id: ID of processor 493 * 494 * Request type is TISCI_MSG_PROC_REQUEST, response is a generic ACK/NACK 495 * message. 496 */ 497 struct ti_sci_msg_req_proc_request { 498 struct ti_sci_msg_hdr hdr; 499 uint8_t processor_id; 500 } __packed; 501 502 /** 503 * struct ti_sci_msg_req_proc_release - Release a processor 504 * 505 * @hdr: Generic Header 506 * @processor_id: ID of processor 507 * 508 * Request type is TISCI_MSG_PROC_RELEASE, response is a generic ACK/NACK 509 * message. 510 */ 511 struct ti_sci_msg_req_proc_release { 512 struct ti_sci_msg_hdr hdr; 513 uint8_t processor_id; 514 } __packed; 515 516 /** 517 * struct ti_sci_msg_req_proc_handover - Handover a processor to a host 518 * 519 * @hdr: Generic Header 520 * @processor_id: ID of processor 521 * @host_id: New Host we want to give control to 522 * 523 * Request type is TISCI_MSG_PROC_HANDOVER, response is a generic ACK/NACK 524 * message. 525 */ 526 struct ti_sci_msg_req_proc_handover { 527 struct ti_sci_msg_hdr hdr; 528 uint8_t processor_id; 529 uint8_t host_id; 530 } __packed; 531 532 /* A53 Config Flags */ 533 #define PROC_BOOT_CFG_FLAG_ARMV8_DBG_EN 0x00000001 534 #define PROC_BOOT_CFG_FLAG_ARMV8_DBG_NIDEN 0x00000002 535 #define PROC_BOOT_CFG_FLAG_ARMV8_DBG_SPIDEN 0x00000004 536 #define PROC_BOOT_CFG_FLAG_ARMV8_DBG_SPNIDEN 0x00000008 537 #define PROC_BOOT_CFG_FLAG_ARMV8_AARCH32 0x00000100 538 539 /* R5 Config Flags */ 540 #define PROC_BOOT_CFG_FLAG_R5_DBG_EN 0x00000001 541 #define PROC_BOOT_CFG_FLAG_R5_DBG_NIDEN 0x00000002 542 #define PROC_BOOT_CFG_FLAG_R5_LOCKSTEP 0x00000100 543 #define PROC_BOOT_CFG_FLAG_R5_TEINIT 0x00000200 544 #define PROC_BOOT_CFG_FLAG_R5_NMFI_EN 0x00000400 545 #define PROC_BOOT_CFG_FLAG_R5_TCM_RSTBASE 0x00000800 546 #define PROC_BOOT_CFG_FLAG_R5_BTCM_EN 0x00001000 547 #define PROC_BOOT_CFG_FLAG_R5_ATCM_EN 0x00002000 548 549 /** 550 * struct ti_sci_msg_req_set_proc_boot_config - Set Processor boot configuration 551 * @hdr: Generic Header 552 * @processor_id: ID of processor 553 * @bootvector_low: Lower 32bit (Little Endian) of boot vector 554 * @bootvector_high: Higher 32bit (Little Endian) of boot vector 555 * @config_flags_set: Optional Processor specific Config Flags to set. 556 * Setting a bit here implies required bit sets to 1. 557 * @config_flags_clear: Optional Processor specific Config Flags to clear. 558 * Setting a bit here implies required bit gets cleared. 559 * 560 * Request type is TISCI_MSG_SET_PROC_BOOT_CONFIG, response is a generic 561 * ACK/NACK message. 562 */ 563 struct ti_sci_msg_req_set_proc_boot_config { 564 struct ti_sci_msg_hdr hdr; 565 uint8_t processor_id; 566 uint32_t bootvector_low; 567 uint32_t bootvector_high; 568 uint32_t config_flags_set; 569 uint32_t config_flags_clear; 570 } __packed; 571 572 /* ARMV8 Control Flags */ 573 #define PROC_BOOT_CTRL_FLAG_ARMV8_ACINACTM 0x00000001 574 #define PROC_BOOT_CTRL_FLAG_ARMV8_AINACTS 0x00000002 575 #define PROC_BOOT_CTRL_FLAG_ARMV8_L2FLUSHREQ 0x00000100 576 577 /* R5 Control Flags */ 578 #define PROC_BOOT_CTRL_FLAG_R5_CORE_HALT 0x00000001 579 580 /** 581 * struct ti_sci_msg_req_set_proc_boot_ctrl - Set Processor boot control flags 582 * @hdr: Generic Header 583 * @processor_id: ID of processor 584 * @config_flags_set: Optional Processor specific Config Flags to set. 585 * Setting a bit here implies required bit sets to 1. 586 * @config_flags_clear: Optional Processor specific Config Flags to clear. 587 * Setting a bit here implies required bit gets cleared. 588 * 589 * Request type is TISCI_MSG_SET_PROC_BOOT_CTRL, response is a generic ACK/NACK 590 * message. 591 */ 592 struct ti_sci_msg_req_set_proc_boot_ctrl { 593 struct ti_sci_msg_hdr hdr; 594 uint8_t processor_id; 595 uint32_t control_flags_set; 596 uint32_t control_flags_clear; 597 } __packed; 598 599 /** 600 * struct ti_sci_msg_req_proc_auth_start_image - Authenticate and start image 601 * @hdr: Generic Header 602 * @processor_id: ID of processor 603 * @cert_addr_low: Lower 32bit (Little Endian) of certificate 604 * @cert_addr_high: Higher 32bit (Little Endian) of certificate 605 * 606 * Request type is TISCI_MSG_PROC_AUTH_BOOT_IMAGE, response is a generic 607 * ACK/NACK message. 608 */ 609 struct ti_sci_msg_req_proc_auth_boot_image { 610 struct ti_sci_msg_hdr hdr; 611 uint8_t processor_id; 612 uint32_t cert_addr_low; 613 uint32_t cert_addr_high; 614 } __packed; 615 616 /** 617 * struct ti_sci_msg_req_get_proc_boot_status - Get processor boot status 618 * @hdr: Generic Header 619 * @processor_id: ID of processor 620 * 621 * Request type is TISCI_MSG_GET_PROC_BOOT_STATUS, response is appropriate 622 * message, or NACK in case of inability to satisfy request. 623 */ 624 struct ti_sci_msg_req_get_proc_boot_status { 625 struct ti_sci_msg_hdr hdr; 626 uint8_t processor_id; 627 } __packed; 628 629 /* ARMv8 Status Flags */ 630 #define PROC_BOOT_STATUS_FLAG_ARMV8_WFE 0x00000001 631 #define PROC_BOOT_STATUS_FLAG_ARMV8_WFI 0x00000002 632 #define PROC_BOOT_STATUS_FLAG_ARMV8_L2F_DONE 0x00000010 633 #define PROC_BOOT_STATUS_FLAG_ARMV8_STANDBYWFIL2 0x00000020 634 635 /* R5 Status Flags */ 636 #define PROC_BOOT_STATUS_FLAG_R5_WFE 0x00000001 637 #define PROC_BOOT_STATUS_FLAG_R5_WFI 0x00000002 638 #define PROC_BOOT_STATUS_FLAG_R5_CLK_GATED 0x00000004 639 #define PROC_BOOT_STATUS_FLAG_R5_LOCKSTEP_PERMITTED 0x00000100 640 641 /** 642 * \brief Processor Status Response 643 * struct ti_sci_msg_resp_get_proc_boot_status - Processor boot status response 644 * @hdr: Generic Header 645 * @processor_id: ID of processor 646 * @bootvector_low: Lower 32bit (Little Endian) of boot vector 647 * @bootvector_high: Higher 32bit (Little Endian) of boot vector 648 * @config_flags: Optional Processor specific Config Flags set. 649 * @control_flags: Optional Processor specific Control Flags. 650 * @status_flags: Optional Processor specific Status Flags set. 651 * 652 * Response to TISCI_MSG_GET_PROC_BOOT_STATUS. 653 */ 654 struct ti_sci_msg_resp_get_proc_boot_status { 655 struct ti_sci_msg_hdr hdr; 656 uint8_t processor_id; 657 uint32_t bootvector_low; 658 uint32_t bootvector_high; 659 uint32_t config_flags; 660 uint32_t control_flags; 661 uint32_t status_flags; 662 } __packed; 663 664 /** 665 * struct ti_sci_msg_req_wait_proc_boot_status - Wait for a processor boot status 666 * @hdr: Generic Header 667 * @processor_id: ID of processor 668 * @num_wait_iterations Total number of iterations we will check before 669 * we will timeout and give up 670 * @num_match_iterations How many iterations should we have continued 671 * status to account for status bits glitching. 672 * This is to make sure that match occurs for 673 * consecutive checks. This implies that the 674 * worst case should consider that the stable 675 * time should at the worst be num_wait_iterations 676 * num_match_iterations to prevent timeout. 677 * @delay_per_iteration_us Specifies how long to wait (in micro seconds) 678 * between each status checks. This is the minimum 679 * duration, and overhead of register reads and 680 * checks are on top of this and can vary based on 681 * varied conditions. 682 * @delay_before_iterations_us Specifies how long to wait (in micro seconds) 683 * before the very first check in the first 684 * iteration of status check loop. This is the 685 * minimum duration, and overhead of register 686 * reads and checks are. 687 * @status_flags_1_set_all_wait If non-zero, Specifies that all bits of the 688 * status matching this field requested MUST be 1. 689 * @status_flags_1_set_any_wait If non-zero, Specifies that at least one of the 690 * bits matching this field requested MUST be 1. 691 * @status_flags_1_clr_all_wait If non-zero, Specifies that all bits of the 692 * status matching this field requested MUST be 0. 693 * @status_flags_1_clr_any_wait If non-zero, Specifies that at least one of the 694 * bits matching this field requested MUST be 0. 695 * 696 * Request type is TISCI_MSG_WAIT_PROC_BOOT_STATUS, response is appropriate 697 * message, or NACK in case of inability to satisfy request. 698 */ 699 struct ti_sci_msg_req_wait_proc_boot_status { 700 struct ti_sci_msg_hdr hdr; 701 uint8_t processor_id; 702 uint8_t num_wait_iterations; 703 uint8_t num_match_iterations; 704 uint8_t delay_per_iteration_us; 705 uint8_t delay_before_iterations_us; 706 uint32_t status_flags_1_set_all_wait; 707 uint32_t status_flags_1_set_any_wait; 708 uint32_t status_flags_1_clr_all_wait; 709 uint32_t status_flags_1_clr_any_wait; 710 } __packed; 711 712 /** 713 * struct ti_sci_msg_req_enter_sleep - Request for TI_SCI_MSG_ENTER_SLEEP. 714 * 715 * @hdr Generic Header 716 * @mode Low power mode to enter. 717 * @proc_id Processor id to be restored. 718 * @core_resume_lo Low 32-bits of physical pointer to address for core 719 * to begin execution upon resume. 720 * @core_resume_hi High 32-bits of physical pointer to address for core 721 * to begin execution upon resume. 722 * 723 * This message is to be sent after TI_SCI_MSG_PREPARE_SLEEP is sent from OS 724 * and is what actually triggers entry into the specified low power mode. 725 */ 726 struct ti_sci_msg_req_enter_sleep { 727 struct ti_sci_msg_hdr hdr; 728 uint8_t mode; 729 uint8_t processor_id; 730 uint32_t core_resume_lo; 731 uint32_t core_resume_hi; 732 } __packed; 733 734 #endif /* TI_SCI_PROTOCOL_H */ 735
