1 /* 2 * Copyright (c) 2019 Intel Corp. 3 * SPDX-License-Identifier: Apache-2.0 4 */ 5 6 #ifndef ZEPHYR_ARCH_X86_INCLUDE_INTEL64_OFFSETS_SHORT_ARCH_H_ 7 #define ZEPHYR_ARCH_X86_INCLUDE_INTEL64_OFFSETS_SHORT_ARCH_H_ 8 9 #include <offsets.h> 10 11 #define _thread_offset_to_rsp \ 12 (___thread_t_callee_saved_OFFSET + ___callee_saved_t_rsp_OFFSET) 13 14 #define _thread_offset_to_rbx \ 15 (___thread_t_callee_saved_OFFSET + ___callee_saved_t_rbx_OFFSET) 16 17 #define _thread_offset_to_rbp \ 18 (___thread_t_callee_saved_OFFSET + ___callee_saved_t_rbp_OFFSET) 19 20 #define _thread_offset_to_r12 \ 21 (___thread_t_callee_saved_OFFSET + ___callee_saved_t_r12_OFFSET) 22 23 #define _thread_offset_to_r13 \ 24 (___thread_t_callee_saved_OFFSET + ___callee_saved_t_r13_OFFSET) 25 26 #define _thread_offset_to_r14 \ 27 (___thread_t_callee_saved_OFFSET + ___callee_saved_t_r14_OFFSET) 28 29 #define _thread_offset_to_r15 \ 30 (___thread_t_callee_saved_OFFSET + ___callee_saved_t_r15_OFFSET) 31 32 #define _thread_offset_to_rip \ 33 (___thread_t_callee_saved_OFFSET + ___callee_saved_t_rip_OFFSET) 34 35 #define _thread_offset_to_rflags \ 36 (___thread_t_callee_saved_OFFSET + ___callee_saved_t_rflags_OFFSET) 37 38 #define _thread_offset_to_rax \ 39 (___thread_t_arch_OFFSET + ___thread_arch_t_rax_OFFSET) 40 41 #define _thread_offset_to_rcx \ 42 (___thread_t_arch_OFFSET + ___thread_arch_t_rcx_OFFSET) 43 44 #define _thread_offset_to_rdx \ 45 (___thread_t_arch_OFFSET + ___thread_arch_t_rdx_OFFSET) 46 47 #define _thread_offset_to_rsi \ 48 (___thread_t_arch_OFFSET + ___thread_arch_t_rsi_OFFSET) 49 50 #define _thread_offset_to_rdi \ 51 (___thread_t_arch_OFFSET + ___thread_arch_t_rdi_OFFSET) 52 53 #define _thread_offset_to_r8 \ 54 (___thread_t_arch_OFFSET + ___thread_arch_t_r8_OFFSET) 55 56 #define _thread_offset_to_r9 \ 57 (___thread_t_arch_OFFSET + ___thread_arch_t_r9_OFFSET) 58 59 #define _thread_offset_to_r10 \ 60 (___thread_t_arch_OFFSET + ___thread_arch_t_r10_OFFSET) 61 62 #define _thread_offset_to_r11 \ 63 (___thread_t_arch_OFFSET + ___thread_arch_t_r11_OFFSET) 64 65 #define _thread_offset_to_sse \ 66 (___thread_t_arch_OFFSET + ___thread_arch_t_sse_OFFSET) 67 68 #define _thread_offset_to_ss \ 69 (___thread_t_arch_OFFSET + ___thread_arch_t_ss_OFFSET) 70 71 #define _thread_offset_to_cs \ 72 (___thread_t_arch_OFFSET + ___thread_arch_t_cs_OFFSET) 73 74 #endif /* ZEPHYR_ARCH_X86_INCLUDE_INTEL64_OFFSETS_SHORT_ARCH_H_ */ 75