1 /** 2 * \file 3 * 4 * \brief SPI related functionality declaration. 5 * 6 * Copyright (C) 2015 Atmel Corporation. All rights reserved. 7 * 8 * \asf_license_start 9 * 10 * \page License 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions are met: 14 * 15 * 1. Redistributions of source code must retain the above copyright notice, 16 * this list of conditions and the following disclaimer. 17 * 18 * 2. Redistributions in binary form must reproduce the above copyright notice, 19 * this list of conditions and the following disclaimer in the documentation 20 * and/or other materials provided with the distribution. 21 * 22 * 3. The name of Atmel may not be used to endorse or promote products derived 23 * from this software without specific prior written permission. 24 * 25 * 4. This software may only be redistributed and used in connection with an 26 * Atmel microcontroller product. 27 * 28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED 29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE 31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR 32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 * 40 * \asf_license_stop 41 * 42 */ 43 44 #ifndef _HPL_SPI_M_SYNC_H_INCLUDED 45 #define _HPL_SPI_M_SYNC_H_INCLUDED 46 47 #include <hpl_spi.h> 48 #include <hpl_spi_sync.h> 49 50 /** 51 * \addtogroup hpl_spi HPL SPI 52 * 53 *@{ 54 */ 55 56 #ifdef __cplusplus 57 extern "C" { 58 #endif 59 60 /** Uses common SPI async device driver. */ 61 #define _spi_m_sync_dev _spi_sync_dev 62 63 /** 64 * \brief Initialize SPI for access without interrupts 65 * It will load default hardware configuration and software struct. 66 * \param[in, out] dev Pointer to the SPI device instance. 67 * \param[in] hw Pointer to the hardware base. 68 * \return Operation status. 69 * \retval ERR_INVALID_ARG Input parameter problem. 70 * \retval ERR_BUSY SPI hardware not ready (resetting). 71 * \retval ERR_DENIED SPI has been enabled. 72 * \retval 0 Operation done successfully. 73 */ 74 int32_t _spi_m_sync_init(struct _spi_m_sync_dev *dev, void *const hw); 75 76 /** 77 * \brief Deinitialize SPI 78 * Disable, reset the hardware and the software struct. 79 * \param[in, out] dev Pointer to the SPI device instance. 80 * \return Operation status. 81 * \retval 0 Operation done successfully. 82 */ 83 int32_t _spi_m_sync_deinit(struct _spi_m_sync_dev *dev); 84 85 /** 86 * \brief Enable SPI for access without interrupts 87 * \param[in, out] dev Pointer to the SPI device instance. 88 * \return Operation status. 89 * \retval ERR_BUSY SPI hardware not ready (resetting). 90 * \retval 0 Operation done successfully. 91 */ 92 int32_t _spi_m_sync_enable(struct _spi_m_sync_dev *dev); 93 94 /** 95 * \brief Disable SPI for access without interrupts 96 * Disable SPI. Deactivate all CS pins if works as master. 97 * \param[in, out] dev Pointer to the SPI device instance. 98 * \return Operation status. 99 * \retval 0 Operation done successfully. 100 */ 101 int32_t _spi_m_sync_disable(struct _spi_m_sync_dev *dev); 102 103 /** 104 * \brief Set SPI transfer mode 105 * Set SPI transfer mode (\ref spi_transfer_mode), 106 * which controls clock polarity and clock phase. 107 * Mode 0: leading edge is rising edge, data sample on leading edge. 108 * Mode 1: leading edge is rising edge, data sample on trailing edge. 109 * Mode 2: leading edge is falling edge, data sample on leading edge. 110 * Mode 3: leading edge is falling edge, data sample on trailing edge. 111 * \param[in, out] dev Pointer to the SPI device instance. 112 * \param[in] mode The SPI transfer mode. 113 * \return Operation status. 114 * \retval ERR_BUSY SPI is not ready to accept new setting. 115 * \retval 0 Operation done successfully. 116 */ 117 int32_t _spi_m_sync_set_mode(struct _spi_m_sync_dev *dev, const enum spi_transfer_mode mode); 118 119 /** 120 * \brief Set SPI baudrate 121 * \param[in, out] dev Pointer to the SPI device instance. 122 * \param[in] baud_val The SPI baudrate value, see \ref _spi_calc_baud_val() on 123 * how it's generated. 124 * \return Operation status. 125 * \retval ERR_BUSY SPI is not ready to accept new setting. 126 * \retval 0 Operation done successfully. 127 */ 128 int32_t _spi_m_sync_set_baudrate(struct _spi_m_sync_dev *dev, const uint32_t baud_val); 129 130 /** 131 * \brief Set SPI baudrate 132 * \param[in, out] dev Pointer to the SPI device instance. 133 * \param[in] char_size The character size, see \ref spi_char_size. 134 * \return Operation status. 135 * \retval ERR_INVALID_ARG The character size is not supported. 136 * \retval ERR_BUSY SPI is not ready to accept new setting. 137 * \retval 0 Operation done successfully. 138 */ 139 int32_t _spi_m_sync_set_char_size(struct _spi_m_sync_dev *dev, const enum spi_char_size char_size); 140 141 /** 142 * \brief Set SPI data order 143 * \param[in, out] dev Pointer to the SPI device instance. 144 * \param[in] dord SPI data order (LSB/MSB first). 145 * \return Operation status. 146 * \retval ERR_INVALID_ARG The character size is not supported. 147 * \retval ERR_BUSY SPI is not ready to accept new setting. 148 * \retval 0 Operation done successfully. 149 */ 150 int32_t _spi_m_sync_set_data_order(struct _spi_m_sync_dev *dev, const enum spi_data_order dord); 151 152 /** 153 * \brief Transfer the whole message without interrupt 154 * Transfer the message, it will keep waiting until the message finish or 155 * error. 156 * \param[in, out] dev Pointer to the SPI device instance. 157 * \param[in] msg Pointer to the message instance to process. 158 * \return Error or number of characters transferred. 159 * \retval ERR_BUSY SPI hardware is not ready to start transfer (not 160 * enabled, busy applying settings, ...). 161 * \retval SPI_ERR_OVERFLOW Overflow error. 162 * \retval >=0 Number of characters transferred. 163 */ 164 int32_t _spi_m_sync_trans(struct _spi_m_sync_dev *dev, const struct spi_msg *msg); 165 166 #ifdef __cplusplus 167 } 168 #endif 169 170 /**@}*/ 171 #endif /* ifndef _HPL_SPI_M_SYNC_H_INCLUDED */ 172
