| /trusted-firmware-a-latest/include/arch/aarch32/ |
| D | asm_macros.S | 19 #define TLB_INVALIDATE(_reg, _coproc) \ argument
24 #define TLB_INVALIDATE(_reg, _coproc) \ argument
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| /trusted-firmware-a-latest/plat/xilinx/common/include/ |
| D | plat_common.h | 12 #define FIELD_GET(_mask, _reg) \ argument
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| /trusted-firmware-a-latest/include/drivers/cadence/ |
| D | cdns_nand.h | 116 #define CNF_CMDREG(_reg) (CNF_CMDREG_REG_BASE \ argument
143 #define CNF_CTRLCFG(_reg) (CNF_CTRLCFG_REG_BASE \ argument
157 #define CNF_DI(_reg) (CNF_DI_REG_BASE \ argument
176 #define CNF_CTRLPARAM(_reg) (CNF_CTRLPARAM_REG_BASE \ argument
188 #define CNF_PROT(_reg) (CNF_PROT_REG_BASE \ argument
228 #define CNF_MINICTRL(_reg) (CNF_MINICTRL_REG_BASE \ argument
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| D | cdns_combo_phy.h | 142 #define CP_DLL(_reg) (CP_DLL_REG_BASE \ argument
157 #define CP_CTB(_reg) (CP_CTB_REG_BASE \ argument
205 #define SDMMC_CDN(_reg) (SDMMC_CDN_REG_BASE + \ argument
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| D | cdns_sdmmc.h | 280 #define SDMMC_CDN(_reg) (SDMMC_CDN_REG_BASE + \ argument
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| /trusted-firmware-a-latest/plat/intel/soc/common/include/ |
| D | socfpga_system_manager.h | 33 #define SOCFPGA_SYSMGR(_reg) (SOCFPGA_SYSMGR_REG_BASE \ argument
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| D | socfpga_noc.h | 21 #define SOCFPGA_L4_PER_SCR(_reg) (SOCFPGA_L4_PER_SCR_REG_BASE \ argument
24 #define SOCFPGA_L4_SYS_SCR(_reg) (SOCFPGA_L4_SYS_SCR_REG_BASE \ argument
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| D | socfpga_f2sdram_manager.h | 45 #define SOCFPGA_F2SDRAMMGR(_reg) (SOCFPGA_F2SDRAMMGR_REG_BASE \ argument
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| D | socfpga_reset_manager.h | 230 #define SOCFPGA_RSTMGR(_reg) (SOCFPGA_RSTMGR_REG_BASE + (SOCFPGA_RSTMGR_##_reg)) argument
231 #define RSTMGR_FIELD(_reg, _field) (RSTMGR_##_reg##MODRST_##_field) argument
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| /trusted-firmware-a-latest/plat/intel/soc/agilex5/include/ |
| D | agilex5_power_manager.h | 72 #define AGX5_PWRMGR(_reg) (AGX5_PWRMGR_BASE + \ argument
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| D | agilex5_memory_controller.h | 172 #define SOCFPGA_MEMCTRL(_reg) (SOCFPGA_MEMCTRL_REG_BASE \ argument
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| D | agilex5_system_manager.h | 190 #define SOCFPGA_SYSMGR(_reg) (SOCFPGA_SYSMGR_REG_BASE \ argument
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| D | agilex5_pinmux.h | 197 #define SOCFPGA_PINMUX(_reg) (SOCFPGA_PINMUX_REG_BASE \ argument
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| /trusted-firmware-a-latest/plat/intel/soc/agilex/include/ |
| D | agilex_memory_controller.h | 171 #define SOCFPGA_MEMCTRL(_reg) (SOCFPGA_MEMCTRL_REG_BASE \ argument
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| D | agilex_system_manager.h | 186 #define SOCFPGA_SYSMGR(_reg) (SOCFPGA_SYSMGR_REG_BASE \ argument
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| /trusted-firmware-a-latest/plat/intel/soc/n5x/include/ |
| D | n5x_system_manager.h | 189 #define SOCFPGA_SYSMGR(_reg) (SOCFPGA_SYSMGR_REG_BASE \ argument
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| /trusted-firmware-a-latest/plat/intel/soc/stratix10/include/ |
| D | s10_system_manager.h | 186 #define SOCFPGA_SYSMGR(_reg) (SOCFPGA_SYSMGR_REG_BASE \ argument
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| /trusted-firmware-a-latest/drivers/st/clk/ |
| D | clk-stm32mp13.c | 1239 #define CLK_PLL_CFG(_idx, _clk_id, _type, _reg)\ argument
1612 #define CLK_PLL_CFG(_idx, _clk_id, _type, _reg)\ argument
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