1/*
2 * Copyright (c) 2019 Nordic Semiconductor ASA
3 * Copyright (c) 2019 Intel Corporation
4 *
5 * SPDX-License-Identifier: Apache-2.0
6 */
7
8/* Copied from linker.ld */
9
10/* Non-cached region of RAM */
11SECTION_DATA_PROLOGUE(_NOCACHE_SECTION_NAME,(NOLOAD),)
12{
13#if defined(CONFIG_MMU)
14	MMU_ALIGN;
15#else
16	MPU_ALIGN(_nocache_ram_size);
17#endif
18	_nocache_ram_start = .;
19	*(.nocache)
20	*(".nocache.*")
21
22#include <snippets-nocache-section.ld>
23
24#if defined(CONFIG_MMU)
25	MMU_ALIGN;
26#else
27	MPU_ALIGN(_nocache_ram_size);
28#endif
29	_nocache_ram_end = .;
30} GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION)
31_nocache_ram_size = _nocache_ram_end - _nocache_ram_start;
32