1 /**
2 * \file
3 *
4 * \brief SAM PORT.
5 *
6 * Copyright (C) 2014-2016 Atmel Corporation. All rights reserved.
7 *
8 * \asf_license_start
9 *
10 * \page License
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions are met:
14 *
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 *
18 * 2. Redistributions in binary form must reproduce the above copyright notice,
19 * this list of conditions and the following disclaimer in the documentation
20 * and/or other materials provided with the distribution.
21 *
22 * 3. The name of Atmel may not be used to endorse or promote products derived
23 * from this software without specific prior written permission.
24 *
25 * 4. This software may only be redistributed and used in connection with an
26 * Atmel microcontroller product.
27 *
28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGE.
39 *
40 * \asf_license_stop
41 *
42 */
43 #include <compiler.h>
44 #include <hpl_gpio.h>
45 #include <utils_assert.h>
46
47 /**
48 * \brief Set direction on port with mask
49 */
_gpio_set_direction(const enum gpio_port port,const uint32_t mask,const enum gpio_direction direction)50 static inline void _gpio_set_direction(const enum gpio_port port, const uint32_t mask,
51 const enum gpio_direction direction)
52 {
53 switch (direction) {
54 case GPIO_DIRECTION_OFF:
55 hri_port_clear_DIR_reg(PORT_IOBUS, port, mask);
56 hri_port_write_WRCONFIG_reg(PORT, port, PORT_WRCONFIG_WRPINCFG | (mask & 0xffff));
57 hri_port_write_WRCONFIG_reg(
58 PORT, port, PORT_WRCONFIG_HWSEL | PORT_WRCONFIG_WRPINCFG | ((mask & 0xffff0000) >> 16));
59 break;
60
61 case GPIO_DIRECTION_IN:
62 hri_port_clear_DIR_reg(PORT_IOBUS, port, mask);
63 hri_port_write_WRCONFIG_reg(PORT, port, PORT_WRCONFIG_WRPINCFG | PORT_WRCONFIG_INEN | (mask & 0xffff));
64 hri_port_write_WRCONFIG_reg(PORT,
65 port,
66 PORT_WRCONFIG_HWSEL | PORT_WRCONFIG_WRPINCFG | PORT_WRCONFIG_INEN
67 | ((mask & 0xffff0000) >> 16));
68 break;
69
70 case GPIO_DIRECTION_OUT:
71 hri_port_set_DIR_reg(PORT_IOBUS, port, mask);
72 hri_port_write_WRCONFIG_reg(PORT, port, PORT_WRCONFIG_WRPINCFG | (mask & 0xffff));
73 hri_port_write_WRCONFIG_reg(
74 PORT, port, PORT_WRCONFIG_HWSEL | PORT_WRCONFIG_WRPINCFG | ((mask & 0xffff0000) >> 16));
75 break;
76
77 default:
78 ASSERT(false);
79 }
80 }
81
82 /**
83 * \brief Set output level on port with mask
84 */
_gpio_set_level(const enum gpio_port port,const uint32_t mask,const bool level)85 static inline void _gpio_set_level(const enum gpio_port port, const uint32_t mask, const bool level)
86 {
87 if (level) {
88 hri_port_set_OUT_reg(PORT_IOBUS, port, mask);
89 } else {
90 hri_port_clear_OUT_reg(PORT_IOBUS, port, mask);
91 }
92 }
93
94 /**
95 * \brief Change output level to the opposite with mask
96 */
_gpio_toggle_level(const enum gpio_port port,const uint32_t mask)97 static inline void _gpio_toggle_level(const enum gpio_port port, const uint32_t mask)
98 {
99 hri_port_toggle_OUT_reg(PORT_IOBUS, port, mask);
100 }
101
102 /**
103 * \brief Get input levels on all port pins
104 */
_gpio_get_level(const enum gpio_port port)105 static inline uint32_t _gpio_get_level(const enum gpio_port port)
106 {
107 uint32_t tmp;
108
109 CRITICAL_SECTION_ENTER();
110
111 uint32_t dir_tmp = hri_port_read_DIR_reg(PORT_IOBUS, port);
112
113 tmp = hri_port_read_IN_reg(PORT, port) & ~dir_tmp;
114 tmp |= hri_port_read_OUT_reg(PORT_IOBUS, port) & dir_tmp;
115
116 CRITICAL_SECTION_LEAVE();
117
118 return tmp;
119 }
120
121 /**
122 * \brief Set pin pull mode
123 */
_gpio_set_pin_pull_mode(const enum gpio_port port,const uint8_t pin,const enum gpio_pull_mode pull_mode)124 static inline void _gpio_set_pin_pull_mode(const enum gpio_port port, const uint8_t pin,
125 const enum gpio_pull_mode pull_mode)
126 {
127 switch (pull_mode) {
128 case GPIO_PULL_OFF:
129 hri_port_clear_PINCFG_PULLEN_bit(PORT, port, pin);
130 break;
131
132 case GPIO_PULL_UP:
133 hri_port_clear_DIR_reg(PORT_IOBUS, port, 1U << pin);
134 hri_port_set_PINCFG_PULLEN_bit(PORT, port, pin);
135 hri_port_set_OUT_reg(PORT_IOBUS, port, 1U << pin);
136 break;
137
138 case GPIO_PULL_DOWN:
139 hri_port_clear_DIR_reg(PORT_IOBUS, port, 1U << pin);
140 hri_port_set_PINCFG_PULLEN_bit(PORT, port, pin);
141 hri_port_clear_OUT_reg(PORT_IOBUS, port, 1U << pin);
142 break;
143
144 default:
145 ASSERT(false);
146 break;
147 }
148 }
149
150 /**
151 * \brief Set gpio pin function
152 */
_gpio_set_pin_function(const uint32_t gpio,const uint32_t function)153 static inline void _gpio_set_pin_function(const uint32_t gpio, const uint32_t function)
154 {
155 uint8_t port = GPIO_PORT(gpio);
156 uint8_t pin = GPIO_PIN(gpio);
157
158 if (function == GPIO_PIN_FUNCTION_OFF) {
159 hri_port_write_PINCFG_PMUXEN_bit(PORT, port, pin, false);
160
161 } else {
162 hri_port_write_PINCFG_PMUXEN_bit(PORT, port, pin, true);
163
164 if (pin & 1) {
165 // Odd numbered pin
166 hri_port_write_PMUX_PMUXO_bf(PORT, port, pin >> 1, function & 0xffff);
167 } else {
168 // Even numbered pin
169 hri_port_write_PMUX_PMUXE_bf(PORT, port, pin >> 1, function & 0xffff);
170 }
171 }
172 }
173
