1 /*
2 * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Licensed under the Apache License, Version 2.0 (the License); you may
7 * not use this file except in compliance with the License.
8 * You may obtain a copy of the License at
9 *
10 * www.apache.org/licenses/LICENSE-2.0
11 *
12 * Unless required by applicable law or agreed to in writing, software
13 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
14 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15 * See the License for the specific language governing permissions and
16 * limitations under the License.
17 */
18
19 /*
20 * CMSIS-Core(A) Compiler Specific Macros, Functions, Instructions
21 */
22
23 #ifndef __CMSIS_CP15_H
24 #define __CMSIS_CP15_H
25
26 #if defined ( __ICCARM__ )
27 #pragma system_include /* treat file as system include file for MISRA check */
28 #elif defined (__clang__)
29 #pragma clang system_header /* treat file as system include file */
30 #endif
31
32 /** \brief Get ACTLR
33 \return Auxiliary Control register value
34 */
__get_ACTLR(void)35 __STATIC_FORCEINLINE uint32_t __get_ACTLR(void)
36 {
37 uint32_t result;
38 __get_CP(15, 0, result, 1, 0, 1);
39 return(result);
40 }
41
42 /** \brief Set ACTLR
43 \param [in] actlr Auxiliary Control value to set
44 */
__set_ACTLR(uint32_t actlr)45 __STATIC_FORCEINLINE void __set_ACTLR(uint32_t actlr)
46 {
47 __set_CP(15, 0, actlr, 1, 0, 1);
48 }
49
50 /** \brief Get CPACR
51 \return Coprocessor Access Control register value
52 */
__get_CPACR(void)53 __STATIC_FORCEINLINE uint32_t __get_CPACR(void)
54 {
55 uint32_t result;
56 __get_CP(15, 0, result, 1, 0, 2);
57 return result;
58 }
59
60 /** \brief Set CPACR
61 \param [in] cpacr Coprocessor Access Control value to set
62 */
__set_CPACR(uint32_t cpacr)63 __STATIC_FORCEINLINE void __set_CPACR(uint32_t cpacr)
64 {
65 __set_CP(15, 0, cpacr, 1, 0, 2);
66 }
67
68 /** \brief Get DFSR
69 \return Data Fault Status Register value
70 */
__get_DFSR(void)71 __STATIC_FORCEINLINE uint32_t __get_DFSR(void)
72 {
73 uint32_t result;
74 __get_CP(15, 0, result, 5, 0, 0);
75 return result;
76 }
77
78 /** \brief Set DFSR
79 \param [in] dfsr Data Fault Status value to set
80 */
__set_DFSR(uint32_t dfsr)81 __STATIC_FORCEINLINE void __set_DFSR(uint32_t dfsr)
82 {
83 __set_CP(15, 0, dfsr, 5, 0, 0);
84 }
85
86 /** \brief Get IFSR
87 \return Instruction Fault Status Register value
88 */
__get_IFSR(void)89 __STATIC_FORCEINLINE uint32_t __get_IFSR(void)
90 {
91 uint32_t result;
92 __get_CP(15, 0, result, 5, 0, 1);
93 return result;
94 }
95
96 /** \brief Set IFSR
97 \param [in] ifsr Instruction Fault Status value to set
98 */
__set_IFSR(uint32_t ifsr)99 __STATIC_FORCEINLINE void __set_IFSR(uint32_t ifsr)
100 {
101 __set_CP(15, 0, ifsr, 5, 0, 1);
102 }
103
104 /** \brief Get ISR
105 \return Interrupt Status Register value
106 */
__get_ISR(void)107 __STATIC_FORCEINLINE uint32_t __get_ISR(void)
108 {
109 uint32_t result;
110 __get_CP(15, 0, result, 12, 1, 0);
111 return result;
112 }
113
114 /** \brief Get CBAR
115 \return Configuration Base Address register value
116 */
__get_CBAR(void)117 __STATIC_FORCEINLINE uint32_t __get_CBAR(void)
118 {
119 uint32_t result;
120 __get_CP(15, 4, result, 15, 0, 0);
121 return result;
122 }
123
124 /** \brief Get TTBR0
125
126 This function returns the value of the Translation Table Base Register 0.
127
128 \return Translation Table Base Register 0 value
129 */
__get_TTBR0(void)130 __STATIC_FORCEINLINE uint32_t __get_TTBR0(void)
131 {
132 uint32_t result;
133 __get_CP(15, 0, result, 2, 0, 0);
134 return result;
135 }
136
137 /** \brief Set TTBR0
138
139 This function assigns the given value to the Translation Table Base Register 0.
140
141 \param [in] ttbr0 Translation Table Base Register 0 value to set
142 */
__set_TTBR0(uint32_t ttbr0)143 __STATIC_FORCEINLINE void __set_TTBR0(uint32_t ttbr0)
144 {
145 __set_CP(15, 0, ttbr0, 2, 0, 0);
146 }
147
148 /** \brief Get DACR
149
150 This function returns the value of the Domain Access Control Register.
151
152 \return Domain Access Control Register value
153 */
__get_DACR(void)154 __STATIC_FORCEINLINE uint32_t __get_DACR(void)
155 {
156 uint32_t result;
157 __get_CP(15, 0, result, 3, 0, 0);
158 return result;
159 }
160
161 /** \brief Set DACR
162
163 This function assigns the given value to the Domain Access Control Register.
164
165 \param [in] dacr Domain Access Control Register value to set
166 */
__set_DACR(uint32_t dacr)167 __STATIC_FORCEINLINE void __set_DACR(uint32_t dacr)
168 {
169 __set_CP(15, 0, dacr, 3, 0, 0);
170 }
171
172 /** \brief Set SCTLR
173
174 This function assigns the given value to the System Control Register.
175
176 \param [in] sctlr System Control Register value to set
177 */
__set_SCTLR(uint32_t sctlr)178 __STATIC_FORCEINLINE void __set_SCTLR(uint32_t sctlr)
179 {
180 __set_CP(15, 0, sctlr, 1, 0, 0);
181 }
182
183 /** \brief Get SCTLR
184 \return System Control Register value
185 */
__get_SCTLR(void)186 __STATIC_FORCEINLINE uint32_t __get_SCTLR(void)
187 {
188 uint32_t result;
189 __get_CP(15, 0, result, 1, 0, 0);
190 return result;
191 }
192
193 /** \brief Get MPIDR
194
195 This function returns the value of the Multiprocessor Affinity Register.
196
197 \return Multiprocessor Affinity Register value
198 */
__get_MPIDR(void)199 __STATIC_FORCEINLINE uint32_t __get_MPIDR(void)
200 {
201 uint32_t result;
202 __get_CP(15, 0, result, 0, 0, 5);
203 return result;
204 }
205
206 /** \brief Get VBAR
207
208 This function returns the value of the Vector Base Address Register.
209
210 \return Vector Base Address Register
211 */
__get_VBAR(void)212 __STATIC_FORCEINLINE uint32_t __get_VBAR(void)
213 {
214 uint32_t result;
215 __get_CP(15, 0, result, 12, 0, 0);
216 return result;
217 }
218
219 /** \brief Set VBAR
220
221 This function assigns the given value to the Vector Base Address Register.
222
223 \param [in] vbar Vector Base Address Register value to set
224 */
__set_VBAR(uint32_t vbar)225 __STATIC_FORCEINLINE void __set_VBAR(uint32_t vbar)
226 {
227 __set_CP(15, 0, vbar, 12, 0, 0);
228 }
229
230 /** \brief Get MVBAR
231
232 This function returns the value of the Monitor Vector Base Address Register.
233
234 \return Monitor Vector Base Address Register
235 */
__get_MVBAR(void)236 __STATIC_FORCEINLINE uint32_t __get_MVBAR(void)
237 {
238 uint32_t result;
239 __get_CP(15, 0, result, 12, 0, 1);
240 return result;
241 }
242
243 /** \brief Set MVBAR
244
245 This function assigns the given value to the Monitor Vector Base Address Register.
246
247 \param [in] mvbar Monitor Vector Base Address Register value to set
248 */
__set_MVBAR(uint32_t mvbar)249 __STATIC_FORCEINLINE void __set_MVBAR(uint32_t mvbar)
250 {
251 __set_CP(15, 0, mvbar, 12, 0, 1);
252 }
253
254 #if (defined(__TIM_PRESENT) && (__TIM_PRESENT == 1U)) || \
255 defined(DOXYGEN)
256
257 /** \brief Set CNTFRQ
258
259 This function assigns the given value to PL1 Physical Timer Counter Frequency Register (CNTFRQ).
260
261 \param [in] value CNTFRQ Register value to set
262 */
__set_CNTFRQ(uint32_t value)263 __STATIC_FORCEINLINE void __set_CNTFRQ(uint32_t value)
264 {
265 __set_CP(15, 0, value, 14, 0, 0);
266 }
267
268 /** \brief Get CNTFRQ
269
270 This function returns the value of the PL1 Physical Timer Counter Frequency Register (CNTFRQ).
271
272 \return CNTFRQ Register value
273 */
__get_CNTFRQ(void)274 __STATIC_FORCEINLINE uint32_t __get_CNTFRQ(void)
275 {
276 uint32_t result;
277 __get_CP(15, 0, result, 14, 0 , 0);
278 return result;
279 }
280
281 /** \brief Set CNTP_TVAL
282
283 This function assigns the given value to PL1 Physical Timer Value Register (CNTP_TVAL).
284
285 \param [in] value CNTP_TVAL Register value to set
286 */
__set_CNTP_TVAL(uint32_t value)287 __STATIC_FORCEINLINE void __set_CNTP_TVAL(uint32_t value)
288 {
289 __set_CP(15, 0, value, 14, 2, 0);
290 }
291
292 /** \brief Get CNTP_TVAL
293
294 This function returns the value of the PL1 Physical Timer Value Register (CNTP_TVAL).
295
296 \return CNTP_TVAL Register value
297 */
__get_CNTP_TVAL(void)298 __STATIC_FORCEINLINE uint32_t __get_CNTP_TVAL(void)
299 {
300 uint32_t result;
301 __get_CP(15, 0, result, 14, 2, 0);
302 return result;
303 }
304
305 /** \brief Get CNTPCT
306
307 This function returns the value of the 64 bits PL1 Physical Count Register (CNTPCT).
308
309 \return CNTPCT Register value
310 */
__get_CNTPCT(void)311 __STATIC_FORCEINLINE uint64_t __get_CNTPCT(void)
312 {
313 uint64_t result;
314 __get_CP64(15, 0, result, 14);
315 return result;
316 }
317
318 /** \brief Set CNTP_CVAL
319
320 This function assigns the given value to 64bits PL1 Physical Timer CompareValue Register (CNTP_CVAL).
321
322 \param [in] value CNTP_CVAL Register value to set
323 */
__set_CNTP_CVAL(uint64_t value)324 __STATIC_FORCEINLINE void __set_CNTP_CVAL(uint64_t value)
325 {
326 __set_CP64(15, 2, value, 14);
327 }
328
329 /** \brief Get CNTP_CVAL
330
331 This function returns the value of the 64 bits PL1 Physical Timer CompareValue Register (CNTP_CVAL).
332
333 \return CNTP_CVAL Register value
334 */
__get_CNTP_CVAL(void)335 __STATIC_FORCEINLINE uint64_t __get_CNTP_CVAL(void)
336 {
337 uint64_t result;
338 __get_CP64(15, 2, result, 14);
339 return result;
340 }
341
342 /** \brief Set CNTP_CTL
343
344 This function assigns the given value to PL1 Physical Timer Control Register (CNTP_CTL).
345
346 \param [in] value CNTP_CTL Register value to set
347 */
__set_CNTP_CTL(uint32_t value)348 __STATIC_FORCEINLINE void __set_CNTP_CTL(uint32_t value)
349 {
350 __set_CP(15, 0, value, 14, 2, 1);
351 }
352
353 /** \brief Get CNTP_CTL register
354 \return CNTP_CTL Register value
355 */
__get_CNTP_CTL(void)356 __STATIC_FORCEINLINE uint32_t __get_CNTP_CTL(void)
357 {
358 uint32_t result;
359 __get_CP(15, 0, result, 14, 2, 1);
360 return result;
361 }
362
363 /******************************* VIRTUAL TIMER *******************************/
364 /** see [ARM DDI 0406C.d] :
365 . §B4.1.31 "CNTV_CTL, Counter-timer Virtual Timer Control register"
366 . §B4.1.32 "CNTV_CVAL, Counter-timer Virtual Timer CompareValue register"
367 . §B4.1.33 "CNTV_TVAL, Counter-timer Virtual Timer TimerValue register"
368 . §B4.1.34 "CNTVCT, Counter-timer Virtual Count register"
369 **/
370 /** \brief Set CNTV_TVAL
371 This function assigns the given value to VL1 Virtual Timer Value Register (CNTV_TVAL).
372 \param [in] value CNTV_TVAL Register value to set
373 */
__set_CNTV_TVAL(uint32_t value)374 __STATIC_FORCEINLINE void __set_CNTV_TVAL(uint32_t value)
375 {
376 __set_CP(15, 0, value, 14, 3, 0);
377 }
378
379 /** \brief Get CNTV_TVAL
380 This function returns the value of the VL1 Virtual Timer Value Register (CNTV_TVAL).
381 \return CNTV_TVAL Register value
382 */
__get_CNTV_TVAL(void)383 __STATIC_FORCEINLINE uint32_t __get_CNTV_TVAL(void)
384 {
385 uint32_t result;
386 __get_CP(15, 0, result, 14, 3, 0);
387 return result;
388 }
389
390 /** \brief Get CNTVCT
391 This function returns the value of the 64 bits VL1 Virtual Count Register (CNTVCT).
392 \return CNTVCT Register value
393 */
__get_CNTVCT(void)394 __STATIC_FORCEINLINE uint64_t __get_CNTVCT(void)
395 {
396 uint64_t result;
397 __get_CP64(15, 1, result, 14);
398 return result;
399 }
400
401 /** \brief Set CNTV_CVAL
402 This function assigns the given value to 64bits VL1 Virtual Timer CompareValue Register (CNTV_CVAL).
403 \param [in] value CNTV_CVAL Register value to set
404 */
__set_CNTV_CVAL(uint64_t value)405 __STATIC_FORCEINLINE void __set_CNTV_CVAL(uint64_t value)
406 {
407 __set_CP64(15, 3, value, 14);
408 }
409
410 /** \brief Get CNTV_CVAL
411 This function returns the value of the 64 bits VL1 Virtual Timer CompareValue Register (CNTV_CVAL).
412 \return CNTV_CVAL Register value
413 */
__get_CNTV_CVAL(void)414 __STATIC_FORCEINLINE uint64_t __get_CNTV_CVAL(void)
415 {
416 uint64_t result;
417 __get_CP64(15, 3, result, 14);
418 return result;
419 }
420
421 /** \brief Set CNTV_CTL
422 This function assigns the given value to VL1 Virtual Timer Control Register (CNTV_CTL).
423 \param [in] value CNTV_CTL Register value to set
424 */
__set_CNTV_CTL(uint32_t value)425 __STATIC_FORCEINLINE void __set_CNTV_CTL(uint32_t value)
426 {
427 __set_CP(15, 0, value, 14, 3, 1);
428 }
429
430 /** \brief Get CNTV_CTL register
431 \return CNTV_CTL Register value
432 */
__get_CNTV_CTL(void)433 __STATIC_FORCEINLINE uint32_t __get_CNTV_CTL(void)
434 {
435 uint32_t result;
436 __get_CP(15, 0, result, 14, 3, 1);
437 return result;
438 }
439
440 /***************************** VIRTUAL TIMER END *****************************/
441 #endif
442
443 /** \brief Set TLBIALL
444
445 TLB Invalidate All
446 */
__set_TLBIALL(uint32_t value)447 __STATIC_FORCEINLINE void __set_TLBIALL(uint32_t value)
448 {
449 __set_CP(15, 0, value, 8, 7, 0);
450 }
451
452 /** \brief Set BPIALL.
453
454 Branch Predictor Invalidate All
455 */
__set_BPIALL(uint32_t value)456 __STATIC_FORCEINLINE void __set_BPIALL(uint32_t value)
457 {
458 __set_CP(15, 0, value, 7, 5, 6);
459 }
460
461 /** \brief Set ICIALLU
462
463 Instruction Cache Invalidate All
464 */
__set_ICIALLU(uint32_t value)465 __STATIC_FORCEINLINE void __set_ICIALLU(uint32_t value)
466 {
467 __set_CP(15, 0, value, 7, 5, 0);
468 }
469
470 /** \brief Set ICIMVAC
471
472 Instruction Cache Invalidate
473 */
__set_ICIMVAC(uint32_t value)474 __STATIC_FORCEINLINE void __set_ICIMVAC(uint32_t value)
475 {
476 __set_CP(15, 0, value, 7, 5, 1);
477 }
478
479 /** \brief Set DCCMVAC
480
481 Data cache clean
482 */
__set_DCCMVAC(uint32_t value)483 __STATIC_FORCEINLINE void __set_DCCMVAC(uint32_t value)
484 {
485 __set_CP(15, 0, value, 7, 10, 1);
486 }
487
488 /** \brief Set DCIMVAC
489
490 Data cache invalidate
491 */
__set_DCIMVAC(uint32_t value)492 __STATIC_FORCEINLINE void __set_DCIMVAC(uint32_t value)
493 {
494 __set_CP(15, 0, value, 7, 6, 1);
495 }
496
497 /** \brief Set DCCIMVAC
498
499 Data cache clean and invalidate
500 */
__set_DCCIMVAC(uint32_t value)501 __STATIC_FORCEINLINE void __set_DCCIMVAC(uint32_t value)
502 {
503 __set_CP(15, 0, value, 7, 14, 1);
504 }
505
506 /** \brief Set CSSELR
507 */
__set_CSSELR(uint32_t value)508 __STATIC_FORCEINLINE void __set_CSSELR(uint32_t value)
509 {
510 __set_CP(15, 2, value, 0, 0, 0);
511 }
512
513 /** \brief Get CSSELR
514 \return CSSELR Register value
515 */
__get_CSSELR(void)516 __STATIC_FORCEINLINE uint32_t __get_CSSELR(void)
517 {
518 uint32_t result;
519 __get_CP(15, 2, result, 0, 0, 0);
520 return result;
521 }
522
523 /** \brief Get CCSIDR
524 \return CCSIDR Register value
525 */
__get_CCSIDR(void)526 __STATIC_FORCEINLINE uint32_t __get_CCSIDR(void)
527 {
528 uint32_t result;
529 __get_CP(15, 1, result, 0, 0, 0);
530 return result;
531 }
532
533 /** \brief Get CLIDR
534 \return CLIDR Register value
535 */
__get_CLIDR(void)536 __STATIC_FORCEINLINE uint32_t __get_CLIDR(void)
537 {
538 uint32_t result;
539 __get_CP(15, 1, result, 0, 0, 1);
540 return result;
541 }
542
543 /** \brief Set DCISW
544 */
__set_DCISW(uint32_t value)545 __STATIC_FORCEINLINE void __set_DCISW(uint32_t value)
546 {
547 __set_CP(15, 0, value, 7, 6, 2);
548 }
549
550 /** \brief Set DCCSW
551 */
__set_DCCSW(uint32_t value)552 __STATIC_FORCEINLINE void __set_DCCSW(uint32_t value)
553 {
554 __set_CP(15, 0, value, 7, 10, 2);
555 }
556
557 /** \brief Set DCCISW
558 */
__set_DCCISW(uint32_t value)559 __STATIC_FORCEINLINE void __set_DCCISW(uint32_t value)
560 {
561 __set_CP(15, 0, value, 7, 14, 2);
562 }
563
564 #endif
565
