1/*
2 * Copyright (c) 2013-2014 Wind River Systems, Inc.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/**
8 * @file
9 * @brief Linker command/script file
10 *
11 * Linker script for the Cortex-A and Cortex-R platforms.
12 */
13
14#include <zephyr/linker/sections.h>
15#include <zephyr/devicetree.h>
16
17#include <zephyr/linker/devicetree_regions.h>
18#include <zephyr/linker/linker-defs.h>
19#include <zephyr/linker/linker-tool.h>
20
21/* physical address of RAM */
22#ifdef CONFIG_XIP
23  #define ROMABLE_REGION FLASH
24#else
25  #define ROMABLE_REGION RAM
26#endif
27#define RAMABLE_REGION RAM
28
29#if !defined(CONFIG_XIP) && (CONFIG_FLASH_SIZE == 0)
30  #define ROM_ADDR RAM_ADDR
31#else
32  #define ROM_ADDR (CONFIG_FLASH_BASE_ADDRESS + CONFIG_FLASH_LOAD_OFFSET)
33#endif
34
35#if defined(CONFIG_ROM_END_OFFSET)
36#define ROM_END_OFFSET CONFIG_ROM_END_OFFSET
37#else
38#define ROM_END_OFFSET 0
39#endif
40
41#if CONFIG_FLASH_LOAD_SIZE > 0
42  #define ROM_SIZE (CONFIG_FLASH_LOAD_SIZE - ROM_END_OFFSET)
43#else
44  #define ROM_SIZE (CONFIG_FLASH_SIZE*1K - CONFIG_FLASH_LOAD_OFFSET - ROM_END_OFFSET)
45#endif
46
47#if defined(CONFIG_XIP)
48  #if defined(CONFIG_IS_BOOTLOADER)
49    #define RAM_SIZE (CONFIG_BOOTLOADER_SRAM_SIZE * 1K)
50    #define RAM_ADDR (CONFIG_SRAM_BASE_ADDRESS + \
51                     (CONFIG_SRAM_SIZE * 1K - RAM_SIZE))
52  #else
53    #define RAM_SIZE (CONFIG_SRAM_SIZE * 1K)
54    #define RAM_ADDR CONFIG_SRAM_BASE_ADDRESS
55  #endif
56#else
57  #define RAM_SIZE (CONFIG_SRAM_SIZE * 1K - CONFIG_BOOTLOADER_SRAM_SIZE * 1K)
58  #define RAM_ADDR CONFIG_SRAM_BASE_ADDRESS
59#endif
60
61/* Set alignment to CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE
62 * to make linker section alignment comply with MPU granularity.
63 */
64#if defined(CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE)
65_region_min_align = CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE;
66#elif defined(CONFIG_ARM_AARCH32_MMU)
67_region_min_align = CONFIG_MMU_PAGE_SIZE;
68#else
69/* If building without MPU/MMU support, use default 4-byte alignment. */
70_region_min_align = 4;
71#endif
72
73#if defined(CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT)
74  #define MPU_ALIGN(region_size) \
75    . = ALIGN(_region_min_align); \
76    . = ALIGN(1 << LOG2CEIL(region_size))
77#else
78  #define MPU_ALIGN(region_size) \
79    . = ALIGN(_region_min_align)
80#endif
81
82#define BSS_ALIGN ALIGN(_region_min_align)
83
84#define MMU_ALIGN    . = ALIGN(_region_min_align)
85
86MEMORY
87{
88    FLASH    (rx) : ORIGIN = ROM_ADDR, LENGTH = ROM_SIZE
89    RAM      (wx) : ORIGIN = RAM_ADDR, LENGTH = RAM_SIZE
90    LINKER_DT_REGIONS()
91    /* Used by and documented in include/linker/intlist.ld */
92    IDT_LIST (wx) : ORIGIN = 0xFFFF8000, LENGTH = 32K
93}
94
95ENTRY(CONFIG_KERNEL_ENTRY)
96
97SECTIONS
98{
99#include <zephyr/linker/rel-sections.ld>
100
101    /*
102     * .plt and .iplt are here according to 'arm-zephyr-elf-ld --verbose',
103     * before text section.
104     */
105    SECTION_PROLOGUE(.plt,,)
106    {
107        *(.plt)
108    }
109
110    SECTION_PROLOGUE(.iplt,,)
111    {
112        *(.iplt)
113    }
114
115    GROUP_START(ROMABLE_REGION)
116
117#if defined(CONFIG_XIP)
118    __rom_region_start = ROM_ADDR;
119#else
120    __rom_region_start = RAM_ADDR;
121#endif
122
123    SECTION_PROLOGUE(rom_start,,)
124    {
125
126/* Located in generated directory. This file is populated by calling
127 * zephyr_linker_sources(ROM_START ...). This typically contains the vector
128 * table and debug information.
129 */
130#include <snippets-rom-start.ld>
131
132    } GROUP_LINK_IN(ROMABLE_REGION)
133
134#ifdef CONFIG_CODE_DATA_RELOCATION
135
136#include <linker_relocate.ld>
137
138#endif /* CONFIG_CODE_DATA_RELOCATION */
139
140    SECTION_PROLOGUE(_TEXT_SECTION_NAME,,)
141    {
142        . = ALIGN(_region_min_align);
143        __text_region_start = .;
144#ifndef CONFIG_XIP
145        z_mapped_start = .;
146#endif
147
148#include <zephyr/linker/kobject-text.ld>
149
150        *(.text)
151        *(".text.*")
152        *(.gnu.linkonce.t.*)
153
154        /*
155         * These are here according to 'arm-zephyr-elf-ld --verbose',
156         * after .gnu.linkonce.t.*
157         */
158        *(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx)
159
160        __text_region_end = .;
161        . = ALIGN(_region_min_align);
162    } GROUP_LINK_IN(ROMABLE_REGION)
163
164#if defined (CONFIG_CPP)
165    SECTION_PROLOGUE(.ARM.extab,,)
166    {
167        /*
168         * .ARM.extab section containing exception unwinding information.
169         */
170        *(.ARM.extab* .gnu.linkonce.armextab.*)
171    } GROUP_LINK_IN(ROMABLE_REGION)
172#endif
173
174    SECTION_PROLOGUE(.ARM.exidx,,)
175    {
176        /*
177         * This section, related to stack and exception unwinding, is placed
178         * explicitly to prevent it from being shared between multiple regions.
179         * It  must be defined for gcc to support 64-bit math and avoid
180         * section overlap.
181         */
182        __exidx_start = .;
183#if defined (__GCC_LINKER_CMD__)
184        *(.ARM.exidx* gnu.linkonce.armexidx.*)
185#endif
186        __exidx_end = .;
187    } GROUP_LINK_IN(ROMABLE_REGION)
188
189    SECTION_PROLOGUE(rodata_start,,)
190    {
191        . = ALIGN(_region_min_align);
192        __rodata_region_start = .;
193    } GROUP_LINK_IN(ROMABLE_REGION)
194
195#include <zephyr/linker/common-rom.ld>
196#include <zephyr/linker/thread-local-storage.ld>
197#include <zephyr/linker/cplusplus-rom.ld>
198
199    SECTION_PROLOGUE(_RODATA_SECTION_NAME,,)
200    {
201        *(.rodata)
202        *(".rodata.*")
203        *(.gnu.linkonce.r.*)
204
205/* Located in generated directory. This file is populated by the
206 * zephyr_linker_sources() Cmake function.
207 */
208#include <snippets-rodata.ld>
209
210#include <zephyr/linker/kobject-rom.ld>
211
212        /*
213         * For XIP images, in order to avoid the situation when __data_rom_start
214         * is 32-bit aligned, but the actual data is placed right after rodata
215         * section, which may not end exactly at 32-bit border, pad rodata
216         * section, so __data_rom_start points at data and it is 32-bit aligned.
217         *
218         * On non-XIP images this may enlarge image size up to 3 bytes. This
219         * generally is not an issue, since modern ROM and FLASH memory is
220         * usually 4k aligned.
221         */
222        . = ALIGN(4);
223
224        /*
225         * RODATA must be the last section so that the size of the entire read
226         * only area will be filled to a power of 2.
227         */
228        MPU_ALIGN(ABSOLUTE(.) - __rom_region_start);
229    } GROUP_LINK_IN(ROMABLE_REGION)
230
231    __rodata_region_end = .;
232    __rom_region_end = .;
233    MPU_ALIGN(__rodata_region_end - __rom_region_start);
234    _image_rom_end_order = (LOG2CEIL(__rom_region_end) - 1) << 1;
235
236    GROUP_END(ROMABLE_REGION)
237
238    /*
239     * These are here according to 'arm-zephyr-elf-ld --verbose',
240     * before data section.
241     */
242    SECTION_PROLOGUE(.got,,)
243    {
244        *(.got.plt)
245        *(.igot.plt)
246        *(.got)
247        *(.igot)
248    }
249
250    GROUP_START(RAMABLE_REGION)
251
252    . = RAM_ADDR;
253    /* Align the start of image RAM with the
254     * minimum granularity required by MPU.
255     */
256    . = ALIGN(_region_min_align);
257    _image_ram_start = .;
258#ifdef CONFIG_XIP
259    z_mapped_start = .;
260#endif
261
262/* Located in generated directory. This file is populated by the
263 * zephyr_linker_sources() Cmake function.
264 */
265#include <snippets-ram-sections.ld>
266
267#if defined(CONFIG_USERSPACE)
268#define APP_SHARED_ALIGN . = ALIGN(_region_min_align);
269#define SMEM_PARTITION_ALIGN MPU_ALIGN
270
271#include <app_smem.ld>
272
273    _app_smem_size = _app_smem_end - _app_smem_start;
274    _app_smem_rom_start = LOADADDR(_APP_SMEM_SECTION_NAME);
275#endif  /* CONFIG_USERSPACE */
276
277    SECTION_DATA_PROLOGUE(_BSS_SECTION_NAME,(NOLOAD), BSS_ALIGN)
278    {
279        /*
280         * For performance, BSS section is assumed to be 4 byte aligned and
281         * a multiple of 4 bytes
282         */
283        . = ALIGN(4);
284        __bss_start = .;
285        __kernel_ram_start = .;
286
287        *(.bss)
288        *(".bss.*")
289        *(COMMON)
290        *(".kernel_bss.*")
291
292#ifdef CONFIG_CODE_DATA_RELOCATION
293#include <linker_sram_bss_relocate.ld>
294#endif
295
296        /*
297         * As memory is cleared in words only, it is simpler to ensure the BSS
298         * section ends on a 4 byte boundary. This wastes a maximum of 3 bytes.
299         */
300        __bss_end = ALIGN(4);
301    } GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION)
302
303#include <zephyr/linker/common-noinit.ld>
304
305    SECTION_DATA_PROLOGUE(_DATA_SECTION_NAME,,)
306    {
307        __data_region_start = .;
308        __data_start = .;
309        *(.data)
310        *(".data.*")
311        *(".kernel.*")
312
313/* Located in generated directory. This file is populated by the
314 * zephyr_linker_sources() Cmake function.
315 */
316#include <snippets-rwdata.ld>
317
318#ifdef CONFIG_CODE_DATA_RELOCATION
319#include <linker_sram_data_relocate.ld>
320#endif
321        __data_end = .;
322
323    } GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
324    __data_size = __data_end - __data_start;
325    __data_load_start = LOADADDR(_DATA_SECTION_NAME);
326
327    __data_region_load_start = LOADADDR(_DATA_SECTION_NAME);
328
329#include <zephyr/linker/common-ram.ld>
330#include <zephyr/linker/kobject-data.ld>
331#include <zephyr/linker/cplusplus-ram.ld>
332
333/* Located in generated directory. This file is populated by the
334 * zephyr_linker_sources() Cmake function.
335 */
336#include <snippets-data-sections.ld>
337
338    __data_region_end = .;
339
340
341    /* Define linker symbols */
342
343    __kernel_ram_end = RAM_ADDR + RAM_SIZE;
344    __kernel_ram_size = __kernel_ram_end - __kernel_ram_start;
345
346#if DT_NODE_HAS_STATUS(DT_CHOSEN(zephyr_ocm), okay)
347GROUP_START(OCM)
348
349	SECTION_PROLOGUE(_OCM_BSS_SECTION_NAME, (NOLOAD),SUBALIGN(4))
350	{
351		__ocm_start = .;
352		__ocm_bss_start = .;
353		*(.ocm_bss)
354		*(".ocm_bss.*")
355		__ocm_bss_end = .;
356	} GROUP_LINK_IN(LINKER_DT_NODE_REGION_NAME(DT_CHOSEN(zephyr_ocm)))
357
358	SECTION_PROLOGUE(_OCM_DATA_SECTION_NAME,,SUBALIGN(4))
359	{
360		__ocm_data_start = .;
361		*(.ocm_data)
362		*(".ocm_data.*")
363		__ocm_data_end = .;
364	} GROUP_LINK_IN(LINKER_DT_NODE_REGION_NAME(DT_CHOSEN(zephyr_ocm)))
365
366  __ocm_end = .;
367  __ocm_size = __ocm_end - __ocm_start;
368
369GROUP_END(OCM)
370#endif
371
372/* Located in generated directory. This file is populated by the
373 * zephyr_linker_sources() Cmake function.
374 */
375#include <snippets-sections.ld>
376
377#define LAST_RAM_ALIGN . = ALIGN(_region_min_align);
378
379#include <zephyr/linker/ram-end.ld>
380
381    GROUP_END(RAMABLE_REGION)
382
383#include <zephyr/linker/debug-sections.ld>
384
385    SECTION_PROLOGUE(.ARM.attributes, 0,)
386    {
387        KEEP(*(.ARM.attributes))
388        KEEP(*(.gnu.attributes))
389    }
390
391    /* Sections generated from 'zephyr,memory-region' nodes */
392    LINKER_DT_SECTIONS()
393
394    /* Must be last in romable region */
395    SECTION_PROLOGUE(.last_section,,)
396    {
397#ifdef CONFIG_LINKER_LAST_SECTION_ID
398      /* Fill last section with a word to ensure location counter and actual rom
399       * region data usage match. */
400      LONG(CONFIG_LINKER_LAST_SECTION_ID_PATTERN)
401#endif
402    } GROUP_LINK_IN(ROMABLE_REGION)
403
404    /* To provide the image size as a const expression,
405     * calculate this value here. */
406    _flash_used = LOADADDR(.last_section) + SIZEOF(.last_section) - __rom_region_start;
407
408}
409