1/*
2 * Copyright (c) 2018-2022 ARM Limited
3 * Copyright (c) 2016-2021 Cypress Semiconductor Corp. All rights reserved.
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
8 *
9 *     http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 *
18 * This file is derivative of Cypress PDL 3.0 cy8c6xx7_cm4_dual.ld
19 */
20
21
22OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
23SEARCH_DIR(.)
24ENTRY(Reset_Handler)
25
26#include "region_defs.h"
27
28__heap_size__  = NS_HEAP_SIZE;
29__stack_size__ = NS_STACK_SIZE;
30
31/* Force symbol to be entered in the output file as an undefined symbol. Doing
32* this may, for example, trigger linking of additional modules from standard
33* libraries. You may list several symbols for each EXTERN, and you may use
34* EXTERN multiple times. This command has the same effect as the -u command-line
35* option.
36*/
37EXTERN(Reset_Handler)
38
39/* The MEMORY section below describes the location and size of blocks of memory in the target.
40* Use this section to specify the memory regions available for allocation.
41*/
42MEMORY
43{
44    /* The ram and flash regions control RAM and flash memory allocation for the CM4 core.
45     * You can change the memory allocation by editing the 'ram' and 'flash' regions.
46     */
47    ram               (rwx)   : ORIGIN = NS_DATA_START, LENGTH = NS_DATA_SIZE
48    flash             (rx)    : ORIGIN = NS_CODE_START, LENGTH = NS_CODE_SIZE
49
50    /* This is a 32K flash region used for EEPROM emulation. This region can also be used as the general purpose flash.
51     * You can assign sections to this memory region for only one of the cores.
52     * Note some middleware (e.g. BLE, Emulated EEPROM) can place their data into this memory region.
53     * Therefore, repurposing this memory region will prevent such middleware from operation.
54     */
55    em_eeprom         (rx)    : ORIGIN = 0x14000000, LENGTH = 0x8000       /*  32 KB */
56
57    /* The following regions define device specific memory regions and must not be changed. */
58    sflash_user_data  (rx)    : ORIGIN = 0x16000800, LENGTH = 0x800        /* Supervisory flash: User data */
59    sflash_nar        (rx)    : ORIGIN = 0x16001A00, LENGTH = 0x200        /* Supervisory flash: Normal Access Restrictions (NAR) */
60    sflash_public_key (rx)    : ORIGIN = 0x16005A00, LENGTH = 0xC00        /* Supervisory flash: Public Key */
61    sflash_toc_2      (rx)    : ORIGIN = 0x16007C00, LENGTH = 0x200        /* Supervisory flash: Table of Content # 2 */
62    sflash_rtoc_2     (rx)    : ORIGIN = 0x16007E00, LENGTH = 0x200        /* Supervisory flash: Table of Content # 2 Copy */
63    xip               (rx)    : ORIGIN = 0x18000000, LENGTH = 0x8000000    /* 128 MB */
64    efuse             (r)     : ORIGIN = 0x90700000, LENGTH = 0x100000     /*   1 MB */
65}
66
67/* Linker script to place sections and symbol values. Should be used together
68 * with other linker script that defines memory regions FLASH and RAM.
69 * It references following symbols, which must be defined in code:
70 *   Reset_Handler : Entry of reset handler
71 *
72 * It defines following symbols, which code can use without definition:
73 *   __exidx_start
74 *   __exidx_end
75 *   __copy_table_start__
76 *   __copy_table_end__
77 *   __zero_table_start__
78 *   __zero_table_end__
79 *   __etext
80 *   __data_start__
81 *   __preinit_array_start
82 *   __preinit_array_end
83 *   __init_array_start
84 *   __init_array_end
85 *   __fini_array_start
86 *   __fini_array_end
87 *   __data_end__
88 *   __bss_start__
89 *   __bss_end__
90 *   __end__
91 *   end
92 *   __HeapLimit
93 *   __StackLimit
94 *   __StackTop
95 *   __stack
96 *   __Vectors_End
97 *   __Vectors_Size
98 */
99
100
101SECTIONS
102{
103    .text (READONLY) :
104    {
105        . = ALIGN(4);
106        __Vectors = . ;
107        KEEP(*(.vectors))
108        . = ALIGN(4);
109        __Vectors_End = .;
110        __Vectors_Size = __Vectors_End - __Vectors;
111        __end__ = .;
112
113        . = ALIGN(4);
114        *(.text*)
115
116        . = ALIGN(4);
117        /* preinit data */
118        PROVIDE_HIDDEN (__preinit_array_start = .);
119        KEEP(*(.preinit_array))
120        PROVIDE_HIDDEN (__preinit_array_end = .);
121
122        . = ALIGN(4);
123        /* init data */
124        PROVIDE_HIDDEN (__init_array_start = .);
125        KEEP(*(SORT(.init_array.*)))
126        KEEP(*(.init_array))
127        PROVIDE_HIDDEN (__init_array_end = .);
128
129        . = ALIGN(4);
130        /* finit data */
131        PROVIDE_HIDDEN (__fini_array_start = .);
132        KEEP(*(SORT(.fini_array.*)))
133        KEEP(*(.fini_array))
134        PROVIDE_HIDDEN (__fini_array_end = .);
135
136        /* .copy.table
137         * To copy multiple ROM to RAM sections,
138         * uncomment .copy.table and,
139         * define __STARTUP_COPY_MULTIPLE in startup file */
140        . = ALIGN(4);
141        __copy_table_start__ = .;
142
143#ifdef RAM_VECTORS_SUPPORT
144        /* Copy interrupt vectors from flash to RAM */
145        LONG (__Vectors)                                    /* From */
146        LONG (__ram_vectors_start__)                        /* To   */
147        LONG ((__Vectors_End - __Vectors) / 4)              /* Size */
148#endif
149        /* Copy data section to RAM */
150        LONG (__etext)                                      /* From */
151        LONG (__data_start__)                               /* To   */
152        LONG ((__data_end__ - __data_start__) / 4)          /* Size */
153
154        __copy_table_end__ = .;
155
156        /* .zero.table
157         * To clear multiple BSS sections,
158         * uncomment .zero.table and,
159         * define __STARTUP_CLEAR_BSS_MULTIPLE in startup file */
160        . = ALIGN(4);
161        __zero_table_start__ = .;
162        LONG (__bss_start__)
163        LONG ((__bss_end__ - __bss_start__) / 4)
164        __zero_table_end__ = .;
165
166        KEEP(*(.init))
167        KEEP(*(.fini))
168
169        /* .ctors */
170        *crtbegin.o(.ctors)
171        *crtbegin?.o(.ctors)
172        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
173        *(SORT(.ctors.*))
174        *(.ctors)
175
176        /* .dtors */
177        *crtbegin.o(.dtors)
178        *crtbegin?.o(.dtors)
179        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
180        *(SORT(.dtors.*))
181        *(.dtors)
182
183        /* Read-only code (constants). */
184        *(.rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
185
186        KEEP(*(.eh_frame*))
187    } > flash
188
189
190    .ARM.extab :
191    {
192        *(.ARM.extab* .gnu.linkonce.armextab.*)
193    } > flash
194
195    __exidx_start = .;
196
197    .ARM.exidx :
198    {
199        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
200    } > flash
201    __exidx_end = .;
202
203    __etext =  ALIGN(4);
204
205
206#ifdef RAM_VECTORS_SUPPORT
207    .ramVectors (NOLOAD) : ALIGN(8)
208    {
209        __ram_vectors_start__ = .;
210        KEEP(*(.ram_vectors))
211        __ram_vectors_end__   = .;
212    } > ram
213
214    .data __ram_vectors_end__ : AT (__etext)
215#else
216    .data : AT (__etext)
217#endif
218    {
219        __data_start__ = .;
220
221        *(vtable)
222        *(.data*)
223
224        KEEP(*(.jcr*))
225        . = ALIGN(4);
226
227        KEEP(*(.ramfunc))
228        . = ALIGN(4);
229
230        __data_end__ = .;
231
232    } > ram
233
234
235    /* Place variables in the section that should not be initialized during the
236    *  device startup.
237    */
238    .noinit (NOLOAD) : ALIGN(8)
239    {
240      KEEP(*(.noinit))
241    } > ram
242
243
244    /* The uninitialized global or static variables are placed in this section.
245    *
246    * The NOLOAD attribute tells linker that .bss section does not consume
247    * any space in the image. The NOLOAD attribute changes the .bss type to
248    * NOBITS, and that  makes linker to A) not allocate section in memory, and
249    * A) put information to clear the section with all zeros during application
250    * loading.
251    *
252    * Without the NOLOAD attribute, the .bss section might get PROGBITS type.
253    * This  makes linker to A) allocate zeroed section in memory, and B) copy
254    * this section to RAM during application loading.
255    */
256    .bss (NOLOAD):
257    {
258        . = ALIGN(4);
259        __bss_start__ = .;
260        *(.bss*)
261        *(COMMON)
262        . = ALIGN(4);
263        __bss_end__ = .;
264    } > ram
265
266
267    .heap (NOLOAD):
268    {
269        __HeapBase = .;
270        __end__ = .;
271        PROVIDE(end = .);
272        end = __end__;
273        . += __heap_size__;
274        __HeapLimit = .;
275        __heap_limit = .; /* Add for _sbrk */
276    } > ram
277
278    .stack : ALIGN(32)
279    {
280        . += __stack_size__;
281    } > ram
282    __StackLimit = ADDR(.stack);
283    __StackTop = ADDR(.stack) + SIZEOF(.stack);
284
285    PROVIDE(__stack = __StackTop);
286
287    Image$$ER_TFM_DATA$$RW$$Base = ADDR(.data);
288    Image$$ER_TFM_DATA$$RW$$Limit = ADDR(.data) + SIZEOF(.data);
289
290    Image$$ER_TFM_DATA$$ZI$$Base = ADDR(.bss);
291    Image$$ER_TFM_DATA$$ZI$$Limit = ADDR(.bss) + SIZEOF(.bss);
292
293    Image$$ER_TFM_DATA$$Base = ADDR(.data);
294    Image$$ER_TFM_DATA$$Limit = ADDR(.data) + SIZEOF(.data) + SIZEOF(.bss);
295
296#if defined(PSA_API_TEST_ENABLED)
297    .PSA_API_TEST_NVMEM PSA_API_TEST_NVMEM_START (NOLOAD) :
298    {
299        . += PSA_API_TEST_NVMEM_SIZE;
300    } > ram
301#endif
302
303#if defined (NS_DATA_SHARED_START)
304    .TFM_SHARED NS_DATA_SHARED_START (NOLOAD) :
305    {
306        . = ALIGN(4);
307        . += NS_DATA_SHARED_SIZE;
308    } > ram
309#endif
310
311    /* Used for the digital signature of the secure application and the Bootloader SDK appication.
312    * The size of the section depends on the required data size. */
313    .cy_app_signature ORIGIN(flash) + LENGTH(flash) - 256 :
314    {
315        KEEP(*(.cy_app_signature))
316    } > flash
317
318
319    /* Emulated EEPROM Flash area */
320    .cy_em_eeprom :
321    {
322        KEEP(*(.cy_em_eeprom))
323    } > em_eeprom
324
325
326    /* Supervisory Flash: User data */
327    .cy_sflash_user_data :
328    {
329        KEEP(*(.cy_sflash_user_data))
330    } > sflash_user_data
331
332
333    /* Supervisory Flash: Normal Access Restrictions (NAR) */
334    .cy_sflash_nar :
335    {
336        KEEP(*(.cy_sflash_nar))
337    } > sflash_nar
338
339
340    /* Supervisory Flash: Public Key */
341    .cy_sflash_public_key :
342    {
343        KEEP(*(.cy_sflash_public_key))
344    } > sflash_public_key
345
346
347    /* Supervisory Flash: Table of Content # 2 */
348    .cy_toc_part2 :
349    {
350        KEEP(*(.cy_toc_part2))
351    } > sflash_toc_2
352
353
354    /* Supervisory Flash: Table of Content # 2 Copy */
355    .cy_rtoc_part2 :
356    {
357        KEEP(*(.cy_rtoc_part2))
358    } > sflash_rtoc_2
359
360
361    /* Places the code in the Execute in Place (XIP) section. See the smif driver
362    *  documentation for details.
363    */
364    .cy_xip :
365    {
366        KEEP(*(.cy_xip))
367    } > xip
368
369
370    /* eFuse */
371    .cy_efuse :
372    {
373        KEEP(*(.cy_efuse))
374    } > efuse
375
376
377    /* These sections are used for additional metadata (silicon revision,
378    *  Silicon/JTAG ID, etc.) storage.
379    */
380    .cymeta         0x90500000 : { KEEP(*(.cymeta)) } :NONE
381}
382
383
384/* The following symbols used by the cymcuelftool. */
385/* Flash */
386__cy_memory_0_start    = 0x10000000;
387__cy_memory_0_length   = 0x00100000;
388__cy_memory_0_row_size = 0x200;
389
390/* Emulated EEPROM Flash area */
391__cy_memory_1_start    = 0x14000000;
392__cy_memory_1_length   = 0x8000;
393__cy_memory_1_row_size = 0x200;
394
395/* Supervisory Flash */
396__cy_memory_2_start    = 0x16000000;
397__cy_memory_2_length   = 0x8000;
398__cy_memory_2_row_size = 0x200;
399
400/* XIP */
401__cy_memory_3_start    = 0x18000000;
402__cy_memory_3_length   = 0x08000000;
403__cy_memory_3_row_size = 0x200;
404
405/* eFuse */
406__cy_memory_4_start    = 0x90700000;
407__cy_memory_4_length   = 0x100000;
408__cy_memory_4_row_size = 1;
409
410/* EOF */
411