1 /*
2 * Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6 
7 /* Ensure Renesas MCU variation definitions are included to ensure MCU
8  * specific register variations are handled correctly. */
9 #ifndef BSP_FEATURE_H
10  #error "INTERNAL ERROR: bsp_feature.h must be included before renesas.h."
11 #endif
12 
13 /** @addtogroup Renesas Electronics Corporation
14  * @{
15  */
16 
17 /** @addtogroup RZN2
18  * @{
19  */
20 
21 #ifndef RZN2_H
22  #define RZN2_H
23 
24  #ifdef __cplusplus
25 extern "C" {
26  #endif
27 
28  #include "../../../../mcu/all/bsp_compiler_support.h"
29 
30 /* Define compiler macros for CPU architecture, used in CMSIS 5. */
31  #if defined(__ICCARM__)
32   #if __ARM_ARCH_6M__ || __ARM_ARCH_7M__ || __ARM_ARCH_7EM__ || __ARM_ARCH_8M_BASE__ || __ARM_ARCH_8M_MAIN__
33 
34 /* Macros already defined */
35   #else
36    #if defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__)
37     #define __ARM_ARCH_8M_MAIN__    1
38    #elif defined(__ARM8M_BASELINE__)
39     #define __ARM_ARCH_8M_BASE__    1
40    #elif defined(__ARM_ARCH_PROFILE) && __ARM_ARCH_PROFILE == 'M'
41     #if __ARM_ARCH == 6
42      #define __ARM_ARCH_6M__        1
43     #elif __ARM_ARCH == 7
44      #if __ARM_FEATURE_DSP
45       #define __ARM_ARCH_7EM__      1
46      #else
47       #define __ARM_ARCH_7M__       1
48      #endif
49     #endif                             /* __ARM_ARCH */
50    #endif                              /* __ARM_ARCH_PROFILE == 'M' */
51   #endif
52 
53 /* Alternative core deduction for older ICCARM's */
54   #if !defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_7M__) && !defined(__ARM_ARCH_7EM__) && \
55     !defined(__ARM_ARCH_8M_BASE__) && !defined(__ARM_ARCH_8M_MAIN__)
56    #if defined(__ARM6M__) && (__CORE__ == __ARM6M__)
57     #define __ARM_ARCH_6M__         1
58    #elif defined(__ARM7M__) && (__CORE__ == __ARM7M__)
59     #define __ARM_ARCH_7M__         1
60    #elif defined(__ARM7EM__) && (__CORE__ == __ARM7EM__)
61     #define __ARM_ARCH_7EM__        1
62    #elif defined(__ARM8M_BASELINE__) && (__CORE == __ARM8M_BASELINE__)
63     #define __ARM_ARCH_8M_BASE__    1
64    #elif defined(__ARM8M_MAINLINE__) && (__CORE == __ARM8M_MAINLINE__)
65     #define __ARM_ARCH_8M_MAIN__    1
66    #elif defined(__ARM8EM_MAINLINE__) && (__CORE == __ARM8EM_MAINLINE__)
67     #define __ARM_ARCH_8M_MAIN__    1
68    #elif defined(__ARM8R__) && (__CORE__ == __ARM8R__)
69     #define __ARM_ARCH_8R__         1
70    #elif defined(__ARM8A__) && (__CORE__ == __ARM8A__)
71     #define __ARM_ARCH_8A__         1
72    #else
73     #error "Unknown target."
74    #endif
75   #endif
76  #endif
77 
78 /** @addtogroup Configuration_of_CMSIS
79  * @{
80  */
81 
82 /* =========================================================================================================================== */
83 /* ================                                Interrupt Number Definition                                ================ */
84 /* =========================================================================================================================== */
85 /* IRQn_Type is generated as part of an FSP project. It can be found in vector_data.h. */
86 
87 /** @} */ /* End of group Configuration_of_CMSIS */
88 
89 /* =========================================================================================================================== */
90 /* ================                           Processor and Core Peripheral Section                           ================ */
91 /* =========================================================================================================================== */
92 
93  #if   __ARM_ARCH_7EM__
94   #define RENESAS_CORTEX_M4
95  #elif __ARM_ARCH_6M__
96   #define RENESAS_CORTEX_M0PLUS
97  #elif __ARM_ARCH_8M_BASE__
98   #define RENESAS_CORTEX_M23
99  #elif __ARM_ARCH_8M_MAIN__
100   #define RENESAS_CORTEX_M33
101  #elif __ARM_ARCH_8R__
102   #define RENESAS_CORTEX_R52
103  #elif __ARM_ARCH_8A__ || __ARM_ARCH_8A
104   #define RENESAS_CORTEX_A55
105  #else
106   #warning Unsupported Architecture
107  #endif
108 
109  #if BSP_MCU_GROUP_RZN2L
110   #include "R9A07G084.h"
111  #elif BSP_MCU_GROUP_RZN2H
112   #include "R9A09G087.h"
113  #else
114   #warning Unsupported MCU
115  #endif
116 
117  #ifdef __cplusplus
118 }
119  #endif
120 
121 #endif                                 /* RZN2_H */
122 
123 /** @} */ /* End of group RZN2 */
124 
125 /** @} */ /* End of group Renesas Electronics Corporation */
126