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Searched defs:_SMU_PPUPATD1_TIMER0_SHIFT (Results 1 – 25 of 69) sorted by relevance

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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_smu.h259 #define _SMU_PPUPATD1_TIMER0_SHIFT 4 /**< Shift value f… macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_smu.h259 #define _SMU_PPUPATD1_TIMER0_SHIFT 4 /**< Shift value f… macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_smu.h264 #define _SMU_PPUPATD1_TIMER0_SHIFT 5 /**< Shift value f… macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_smu.h264 #define _SMU_PPUPATD1_TIMER0_SHIFT 5 /**< Shift value f… macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_smu.h264 #define _SMU_PPUPATD1_TIMER0_SHIFT 5 /**< Shift value f… macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_smu.h320 #define _SMU_PPUPATD1_TIMER0_SHIFT 10 /**< Shift value f… macro
Defm32gg12b110f1024iq64.h8527 #define _SMU_PPUPATD1_TIMER0_SHIFT 10 /**< Shift value f… macro
Defm32gg12b130f512gm64.h8527 #define _SMU_PPUPATD1_TIMER0_SHIFT 10 /**< Shift value f… macro
Defm32gg12b130f512gq64.h8527 #define _SMU_PPUPATD1_TIMER0_SHIFT 10 /**< Shift value f… macro
Defm32gg12b130f512im64.h8527 #define _SMU_PPUPATD1_TIMER0_SHIFT 10 /**< Shift value f… macro
Defm32gg12b130f512iq64.h8527 #define _SMU_PPUPATD1_TIMER0_SHIFT 10 /**< Shift value f… macro
Defm32gg12b110f1024gm64.h8527 #define _SMU_PPUPATD1_TIMER0_SHIFT 10 /**< Shift value f… macro
Defm32gg12b110f1024gq64.h8527 #define _SMU_PPUPATD1_TIMER0_SHIFT 10 /**< Shift value f… macro
Defm32gg12b110f1024im64.h8527 #define _SMU_PPUPATD1_TIMER0_SHIFT 10 /**< Shift value f… macro
Defm32gg12b390f1024gl112.h7760 #define _SMU_PPUPATD1_TIMER0_SHIFT 10 /**< Shift value f… macro
Defm32gg12b390f512gl112.h7760 #define _SMU_PPUPATD1_TIMER0_SHIFT 10 /**< Shift value f… macro
Defm32gg12b510f1024gl120.h8563 #define _SMU_PPUPATD1_TIMER0_SHIFT 10 /**< Shift value f… macro
Defm32gg12b510f1024gm64.h8563 #define _SMU_PPUPATD1_TIMER0_SHIFT 10 /**< Shift value f… macro
Defm32gg12b510f1024gl112.h8563 #define _SMU_PPUPATD1_TIMER0_SHIFT 10 /**< Shift value f… macro
Defm32gg12b530f512im64.h8563 #define _SMU_PPUPATD1_TIMER0_SHIFT 10 /**< Shift value f… macro
Defm32gg12b530f512iq64.h8563 #define _SMU_PPUPATD1_TIMER0_SHIFT 10 /**< Shift value f… macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_smu.h330 #define _SMU_PPUPATD1_TIMER0_SHIFT 9 /**< Shift value f… macro
Defm32gg11b120f2048im64.h9072 #define _SMU_PPUPATD1_TIMER0_SHIFT 9 /**< Shift value f… macro
Defm32gg11b110f2048gm64.h9072 #define _SMU_PPUPATD1_TIMER0_SHIFT 9 /**< Shift value f… macro
Defm32gg11b110f2048gq64.h9072 #define _SMU_PPUPATD1_TIMER0_SHIFT 9 /**< Shift value f… macro

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