1/*
2 * Copyright (c) 2021 Telink Semiconductor
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/**
8 * @brief Linker script for the Telink B91 SoC
9 */
10
11#include <zephyr/devicetree.h>
12#include <zephyr/linker/linker-tool.h>
13
14MEMORY
15{
16	RAM_ILM  (rwx) : ORIGIN = DT_REG_ADDR(DT_NODELABEL(ram_ilm)), LENGTH = DT_REG_SIZE(DT_NODELABEL(ram_ilm))
17}
18
19#include <zephyr/arch/riscv/common/linker.ld>
20
21SECTIONS
22{
23	SECTION_DATA_PROLOGUE(aes_data,,)
24	{
25		. = ALIGN(8);
26		*(.aes_data)
27		*(".aes_data.*")
28
29		PROVIDE (_AES_DATA_VMA_END = .);
30		PROVIDE (_AES_DATA_VMA_START = ADDR(aes_data));
31	} GROUP_DATA_LINK_IN(RAM_ILM, ROMABLE_REGION)
32
33	SECTION_DATA_PROLOGUE(retention_data,,)
34	{
35		. = ALIGN(8);
36		*(.retention_data)
37		*(".retention_data.*")
38
39		PROVIDE (_RETENTION_DATA_VMA_END = .);
40		PROVIDE (_RETENTION_DATA_VMA_START = ADDR(retention_data));
41		PROVIDE (_RETENTION_DATA_LMA_START = LOADADDR(retention_data));
42	} GROUP_DATA_LINK_IN(RAM_ILM, ROMABLE_REGION)
43
44	SECTION_DATA_PROLOGUE(ram_code,,)
45	{
46		. = ALIGN(8);
47		*(.ram_code)
48		*(".ram_code.*")
49
50		PROVIDE (_RAMCODE_VMA_END = .);
51		PROVIDE (_RAMCODE_VMA_START = ADDR(ram_code));
52		PROVIDE (_RAMCODE_LMA_START = LOADADDR(ram_code));
53	} GROUP_DATA_LINK_IN(RAM_ILM, ROMABLE_REGION)
54}
55