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Searched defs:_EMU_EM4CTRL_RETAINULFRCO_MASK (Results 1 – 25 of 71) sorted by relevance

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/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG1P/Include/
Defr32fg1p_emu.h225 #define _EMU_EM4CTRL_RETAINULFRCO_MASK 0x8UL /**… macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG1B/Include/
Defm32pg1b_emu.h225 #define _EMU_EM4CTRL_RETAINULFRCO_MASK 0x8UL /**… macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_emu.h294 #define _EMU_EM4CTRL_RETAINULFRCO_MASK 0x8UL … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_emu.h289 #define _EMU_EM4CTRL_RETAINULFRCO_MASK 0x8UL … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_emu.h294 #define _EMU_EM4CTRL_RETAINULFRCO_MASK 0x8UL … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_emu.h289 #define _EMU_EM4CTRL_RETAINULFRCO_MASK 0x8UL … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_emu.h294 #define _EMU_EM4CTRL_RETAINULFRCO_MASK 0x8UL … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_emu.h317 #define _EMU_EM4CTRL_RETAINULFRCO_MASK 0x8UL … macro
Defm32gg12b110f1024gm64.h3224 #define _EMU_EM4CTRL_RETAINULFRCO_MASK 0x8UL … macro
Defm32gg12b110f1024gq64.h3224 #define _EMU_EM4CTRL_RETAINULFRCO_MASK 0x8UL … macro
Defm32gg12b110f1024im64.h3224 #define _EMU_EM4CTRL_RETAINULFRCO_MASK 0x8UL … macro
Defm32gg12b110f1024iq64.h3224 #define _EMU_EM4CTRL_RETAINULFRCO_MASK 0x8UL … macro
Defm32gg12b130f512gm64.h3224 #define _EMU_EM4CTRL_RETAINULFRCO_MASK 0x8UL … macro
Defm32gg12b130f512gq64.h3224 #define _EMU_EM4CTRL_RETAINULFRCO_MASK 0x8UL … macro
Defm32gg12b130f512im64.h3224 #define _EMU_EM4CTRL_RETAINULFRCO_MASK 0x8UL … macro
Defm32gg12b130f512iq64.h3224 #define _EMU_EM4CTRL_RETAINULFRCO_MASK 0x8UL … macro
Defm32gg12b390f1024gl112.h2393 #define _EMU_EM4CTRL_RETAINULFRCO_MASK 0x8UL … macro
Defm32gg12b390f512gl112.h2393 #define _EMU_EM4CTRL_RETAINULFRCO_MASK 0x8UL … macro
Defm32gg12b530f512il120.h3232 #define _EMU_EM4CTRL_RETAINULFRCO_MASK 0x8UL … macro
Defm32gg12b530f512im64.h3232 #define _EMU_EM4CTRL_RETAINULFRCO_MASK 0x8UL … macro
Defm32gg12b530f512iq100.h3232 #define _EMU_EM4CTRL_RETAINULFRCO_MASK 0x8UL … macro
Defm32gg12b530f512iq64.h3232 #define _EMU_EM4CTRL_RETAINULFRCO_MASK 0x8UL … macro
Defm32gg12b530f512gq100.h3232 #define _EMU_EM4CTRL_RETAINULFRCO_MASK 0x8UL … macro
Defm32gg12b530f512gq64.h3232 #define _EMU_EM4CTRL_RETAINULFRCO_MASK 0x8UL … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_emu.h325 #define _EMU_EM4CTRL_RETAINULFRCO_MASK 0x8UL … macro

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