Home
last modified time | relevance | path

Searched defs:_EMU_DCDCLPVCTRL_LPVREF_MASK (Results 1 – 25 of 71) sorted by relevance

123

/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG1P/Include/
Defr32fg1p_emu.h888 #define _EMU_DCDCLPVCTRL_LPVREF_MASK 0x1FEUL /**< Bi… macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG1B/Include/
Defm32pg1b_emu.h888 #define _EMU_DCDCLPVCTRL_LPVREF_MASK 0x1FEUL /**< Bi… macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_emu.h981 #define _EMU_DCDCLPVCTRL_LPVREF_MASK 0x1FEUL … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_emu.h964 #define _EMU_DCDCLPVCTRL_LPVREF_MASK 0x1FEUL … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_emu.h981 #define _EMU_DCDCLPVCTRL_LPVREF_MASK 0x1FEUL … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_emu.h964 #define _EMU_DCDCLPVCTRL_LPVREF_MASK 0x1FEUL … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_emu.h981 #define _EMU_DCDCLPVCTRL_LPVREF_MASK 0x1FEUL … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_emu.h1092 #define _EMU_DCDCLPVCTRL_LPVREF_MASK 0x1FEUL … macro
Defm32gg12b110f1024gm64.h3999 #define _EMU_DCDCLPVCTRL_LPVREF_MASK 0x1FEUL … macro
Defm32gg12b110f1024gq64.h3999 #define _EMU_DCDCLPVCTRL_LPVREF_MASK 0x1FEUL … macro
Defm32gg12b110f1024im64.h3999 #define _EMU_DCDCLPVCTRL_LPVREF_MASK 0x1FEUL … macro
Defm32gg12b110f1024iq64.h3999 #define _EMU_DCDCLPVCTRL_LPVREF_MASK 0x1FEUL … macro
Defm32gg12b130f512gm64.h3999 #define _EMU_DCDCLPVCTRL_LPVREF_MASK 0x1FEUL … macro
Defm32gg12b130f512gq64.h3999 #define _EMU_DCDCLPVCTRL_LPVREF_MASK 0x1FEUL … macro
Defm32gg12b130f512im64.h3999 #define _EMU_DCDCLPVCTRL_LPVREF_MASK 0x1FEUL … macro
Defm32gg12b130f512iq64.h3999 #define _EMU_DCDCLPVCTRL_LPVREF_MASK 0x1FEUL … macro
Defm32gg12b390f1024gl112.h3168 #define _EMU_DCDCLPVCTRL_LPVREF_MASK 0x1FEUL … macro
Defm32gg12b390f512gl112.h3168 #define _EMU_DCDCLPVCTRL_LPVREF_MASK 0x1FEUL … macro
Defm32gg12b530f512il120.h4007 #define _EMU_DCDCLPVCTRL_LPVREF_MASK 0x1FEUL … macro
Defm32gg12b530f512im64.h4007 #define _EMU_DCDCLPVCTRL_LPVREF_MASK 0x1FEUL … macro
Defm32gg12b530f512iq100.h4007 #define _EMU_DCDCLPVCTRL_LPVREF_MASK 0x1FEUL … macro
Defm32gg12b530f512iq64.h4007 #define _EMU_DCDCLPVCTRL_LPVREF_MASK 0x1FEUL … macro
Defm32gg12b530f512gq100.h4007 #define _EMU_DCDCLPVCTRL_LPVREF_MASK 0x1FEUL … macro
Defm32gg12b530f512gq64.h4007 #define _EMU_DCDCLPVCTRL_LPVREF_MASK 0x1FEUL … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_emu.h1100 #define _EMU_DCDCLPVCTRL_LPVREF_MASK 0x1FEUL … macro

123