1 /*
2  * Copyright (c) 2016 Linaro Limited.
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 /**
8  * @file SoC configuration macros for the ARM LTD Beetle SoC.
9  *
10  */
11 
12 #ifndef _ARM_BEETLE_SOC_H_
13 #define _ARM_BEETLE_SOC_H_
14 
15 #include <zephyr/sys/util.h>
16 
17 #ifndef _ASMLANGUAGE
18 #include "CMSDK_BEETLE.h"
19 #endif
20 
21 #include "soc_irq.h"
22 
23 /*
24  * The bit definitions below are used to enable/disable the following
25  * peripheral configurations:
26  * - Clocks in active state
27  * - Clocks in sleep state
28  * - Clocks in deep sleep state
29  * - Wake up sources
30  */
31 
32 /* Beetle SoC AHB Devices */
33 #define _BEETLE_GPIO0       (1 << 0)
34 #define _BEETLE_GPIO1       (1 << 1)
35 #define _BEETLE_GPIO2       (1 << 2)
36 #define _BEETLE_GPIO3       (1 << 3)
37 
38 /* Beetle SoC APB Devices */
39 #define _BEETLE_TIMER0      (1 << 0)
40 #define _BEETLE_TIMER1      (1 << 1)
41 #define _BEETLE_DUALTIMER0  (1 << 2)
42 #define _BEETLE_UART0       (1 << 4)
43 #define _BEETLE_UART1       (1 << 5)
44 #define _BEETLE_I2C0        (1 << 7)
45 #define _BEETLE_WDOG        (1 << 8)
46 #define _BEETLE_QSPI        (1 << 11)
47 #define _BEETLE_SPI0        (1 << 12)
48 #define _BEETLE_SPI1        (1 << 13)
49 #define _BEETLE_I2C1        (1 << 14)
50 #define _BEETLE_TRNG        (1 << 15)
51 
52 /*
53  * Address space definitions
54  */
55 
56 /* Beetle SoC Address space definition */
57 #define _BEETLE_APB_BASE      0x40000000
58 #define _BEETLE_APB_PER_SIZE  0x1000
59 #define _BEETLE_APB_FULL_SIZE 0x10000
60 #define _BEETLE_AHB_BASE      0x40010000
61 #define _BEETLE_AHB_PER_SIZE  0x1000
62 #define _BEETLE_AHB_FULL_SIZE 0x10000
63 
64 /* Beetle SoC AHB peripherals */
65 #define _BEETLE_GPIO0_BASE      (_BEETLE_AHB_BASE + 0x0000)
66 #define _BEETLE_GPIO1_BASE      (_BEETLE_AHB_BASE + 0x1000)
67 #define _BEETLE_GPIO2_BASE      (_BEETLE_AHB_BASE + 0x2000)
68 #define _BEETLE_GPIO3_BASE      (_BEETLE_AHB_BASE + 0x3000)
69 #define _BEETLE_SYSCON_BASE     (_BEETLE_AHB_BASE + 0xF000)
70 
71 /* Beetle SoC APB peripherals */
72 #define _BEETLE_TIMER0_BASE	(_BEETLE_APB_BASE + 0x0000)
73 #define _BEETLE_TIMER1_BASE	(_BEETLE_APB_BASE + 0x1000)
74 #define _BEETLE_DTIMER_BASE	(_BEETLE_APB_BASE + 0x2000)
75 #define _BEETLE_FCACHE_BASE	(_BEETLE_APB_BASE + 0x3000)
76 #define _BEETLE_UART0_BASE	(_BEETLE_APB_BASE + 0x4000)
77 #define _BEETLE_UART1_BASE	(_BEETLE_APB_BASE + 0x5000)
78 #define _BEETLE_RTC_BASE	(_BEETLE_APB_BASE + 0x6000)
79 #define _BEETLE_I2C0_BASE	(_BEETLE_APB_BASE + 0x7000)
80 #define _BEETLE_WDOG_BASE	(_BEETLE_APB_BASE + 0x8000)
81 #define _BEETLE_EFLASH_BASE	(_BEETLE_APB_BASE + 0x9000)
82 #define _BEETLE_QSPI_BASE	(_BEETLE_APB_BASE + 0xB000)
83 #define _BEETLE_SPI0_BASE	(_BEETLE_APB_BASE + 0xC000)
84 #define _BEETLE_SPI1_BASE	(_BEETLE_APB_BASE + 0xD000)
85 #define _BEETLE_I2C1_BASE	(_BEETLE_APB_BASE + 0xE000)
86 #define _BEETLE_TRNG_BASE	(_BEETLE_APB_BASE + 0xF000)
87 
88 /* Beetle SoC peripheral bitbanding */
89 #define _BEETLE_BITBAND_BASE  0x42000000
90 #define _BEETLE_BITBAND_SIZE  0x2000000
91 
92 /* Beetle SoC Private Peripheral Bus */
93 #define _BEETLE_PPB_BASE  0xE0000000
94 #define _BEETLE_PPB_SIZE  0x100000
95 
96 #ifndef _ASMLANGUAGE
97 
98 
99 #include "soc_pins.h"
100 #include "soc_power.h"
101 #include "soc_registers.h"
102 #include "soc_pll.h"
103 
104 /* System Control Register (SYSCON) */
105 #define __BEETLE_SYSCON ((volatile struct syscon *)_BEETLE_SYSCON_BASE)
106 
107 #endif /* !_ASMLANGUAGE */
108 
109 #endif /* _ARM_BEETLE_SOC_H_ */
110