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Searched defs:XSPI_BFGENCR_SEQID_WR_MASK (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h67249 #define XSPI_BFGENCR_SEQID_WR_MASK (0xF0000000U) macro
DMIMXRT758S_hifi1.h67178 #define XSPI_BFGENCR_SEQID_WR_MASK (0xF0000000U) macro
DMIMXRT758S_cm33_core0.h91431 #define XSPI_BFGENCR_SEQID_WR_MASK (0xF0000000U) macro
DMIMXRT758S_ezhv.h96604 #define XSPI_BFGENCR_SEQID_WR_MASK (0xF0000000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h63957 #define XSPI_BFGENCR_SEQID_WR_MASK (0xF0000000U) macro
DMIMXRT735S_cm33_core1.h64026 #define XSPI_BFGENCR_SEQID_WR_MASK (0xF0000000U) macro
DMIMXRT735S_ezhv.h92832 #define XSPI_BFGENCR_SEQID_WR_MASK (0xF0000000U) macro
DMIMXRT735S_cm33_core0.h88206 #define XSPI_BFGENCR_SEQID_WR_MASK (0xF0000000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h67178 #define XSPI_BFGENCR_SEQID_WR_MASK (0xF0000000U) macro
DMIMXRT798S_cm33_core1.h67249 #define XSPI_BFGENCR_SEQID_WR_MASK (0xF0000000U) macro
DMIMXRT798S_hifi4.h91330 #define XSPI_BFGENCR_SEQID_WR_MASK (0xF0000000U) macro
DMIMXRT798S_cm33_core0.h91431 #define XSPI_BFGENCR_SEQID_WR_MASK (0xF0000000U) macro
DMIMXRT798S_ezhv.h96628 #define XSPI_BFGENCR_SEQID_WR_MASK (0xF0000000U) macro