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Searched defs:XSHAL_RAM_PADDR (Results 1 – 15 of 15) sorted by relevance

/hal_xtensa-latest/zephyr/soc/mt8195_adsp/xtensa/config/
Dsystem.h87 #define XSHAL_RAM_PADDR 0x40000000 macro
/hal_xtensa-latest/zephyr/soc/nxp_rt600_adsp/xtensa/config/
Dsystem.h87 #define XSHAL_RAM_PADDR 0x00000000 macro
/hal_xtensa-latest/zephyr/soc/nxp_rt500_adsp/xtensa/config/
Dsystem.h87 #define XSHAL_RAM_PADDR 0x20000000 macro
/hal_xtensa-latest/zephyr/soc/nxp_imx8ulp_adsp/xtensa/config/
Dsystem.h103 #define XSHAL_RAM_PADDR 0x00000000 macro
/hal_xtensa-latest/zephyr/soc/mimx8ml8/xtensa/config/
Dsystem.h103 #define XSHAL_RAM_PADDR 0x3B700000 macro
/hal_xtensa-latest/zephyr/soc/intel_ace30_ptl/xtensa/config/
Dsystem.h93 #define XSHAL_RAM_PADDR 0x00000000 macro
/hal_xtensa-latest/zephyr/soc/sample_controller32/xtensa/config/
Dsystem.h93 #define XSHAL_RAM_PADDR 0x60000000 macro
/hal_xtensa-latest/zephyr/soc/sample_controller/xtensa/config/
Dsystem.h103 #define XSHAL_RAM_PADDR 0x60000000 macro
/hal_xtensa-latest/zephyr/soc/nxp_imx_adsp/xtensa/config/
Dsystem.h103 #define XSHAL_RAM_PADDR 0x80700000 macro
/hal_xtensa-latest/zephyr/soc/dc233c/xtensa/config/
Dsystem.h96 #define XSHAL_RAM_PADDR 0x00000000 macro
/hal_xtensa-latest/zephyr/soc/intel_ace15_mtpm/xtensa/config/
Dsystem.h93 #define XSHAL_RAM_PADDR 0xA0000000 macro
/hal_xtensa-latest/zephyr/soc/intel_tgl_adsp/xtensa/config/
Dsystem.h107 #define XSHAL_RAM_PADDR 0x80000000 macro
/hal_xtensa-latest/zephyr/soc/intel_cnl_adsp/xtensa/config/
Dsystem.h107 #define XSHAL_RAM_PADDR 0x80000000 macro
/hal_xtensa-latest/zephyr/soc/intel_icl_adsp/xtensa/config/
Dsystem.h107 #define XSHAL_RAM_PADDR 0x80000000 macro
/hal_xtensa-latest/zephyr/soc/intel_apl_adsp/xtensa/config/
Dsystem.h107 #define XSHAL_RAM_PADDR 0x80000000 macro