1 /**
2 * @file xmc_vadc.c
3 * @date 2019-05-07
4 *
5 * @cond
6 *********************************************************************************************************************
7 * XMClib v2.1.24 - XMC Peripheral Driver Library
8 *
9 * Copyright (c) 2015-2019, Infineon Technologies AG
10 * All rights reserved.
11 *
12 * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the
13 * following conditions are met:
14 *
15 * Redistributions of source code must retain the above copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following
19 * disclaimer in the documentation and/or other materials provided with the distribution.
20 *
21 * Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote
22 * products derived from this software without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
25 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
29 * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with
33 * Infineon Technologies AG dave@infineon.com).
34 *********************************************************************************************************************
35 *
36 * Change History
37 * --------------
38 *
39 * 2015-02-15:
40 * - Initial <br>
41 *
42 * 2015-02-20:
43 * - Revised for XMC1201 device.<br>
44 *
45 * 2015-04-27:
46 * - Added new APIs for SHS.<br>
47 * - Added New APIs for trigger edge selection.<BR>
48 * - Added new APIs for Queue flush entries, boundary selection, Boundary node pointer.<BR>
49 * - Revised GatingMode APIs and EMUX Control Init API.<BR>
50 *
51 * 2015-06-20:
52 * - Removed version macros and declaration of GetDriverVersion API
53 *
54 * 2015-06-25:
55 * - BFL configuration in channel initialization fixed.
56 *
57 * 2015-07-28:
58 * - CLOCK_GATING_SUPPORTED and PERIPHERAL_RESET_SUPPORTED macros used
59 * - Clubbed the macro definitions for XMC13 XMC12 and XMC14
60 * - Clubbed the macro definitions for XMC44 XMC47 and XMC48
61 * - New APIs Created.
62 * - XMC_VADC_GLOBAL_SetIndividualBoundary
63 * - XMC_VADC_GROUP_SetIndividualBoundary
64 * - XMC_VADC_GROUP_GetAlias
65 * - XMC_VADC_GROUP_GetInputClass
66 * - XMC_VADC_GROUP_ChannelSetIclass
67 * - XMC_VADC_GROUP_ChannelGetResultAlignment
68 * - XMC_VADC_GROUP_ChannelGetInputClass
69 * - XMC_VADC_GROUP_SetResultSubtractionValue
70 *
71 * 2015-12-01:
72 * - Fixed the analog calibration voltage for XMC1100 to external reference upper supply range.
73 * - Fixed the XMC_VADC_GLOBAL_StartupCalibration() for XMC1100.
74 *
75 * 2016-06-17:
76 * - New macros added XMC_VADC_SHS_FULL_SET_REG, XMC_VADC_RESULT_PRIORITY_AVAILABLE
77 * and XMC_VADC_SYNCTR_START_LOCATION
78 * - New Enum added XMC_VADC_SHS_GAIN_LEVEL_t and XMC_VADC_SYNCTR_EVAL_t
79 * - Fixed the EVAL configuration in API XMC_VADC_GROUP_CheckSlaveReadiness and XMC_VADC_GROUP_IgnoreSlaveReadiness
80 * - New APIs added are:
81 * - XMC_VADC_GROUP_SetSyncSlaveReadySignal
82 * - XMC_VADC_GROUP_ChannelGetAssertedEvents
83 * - XMC_VADC_GROUP_GetAssertedResultEvents
84 * - XMC_VADC_GROUP_SetResultRegPriority
85 * - XMC_VADC_GROUP_SetSyncReadySignal
86 * - XMC_VADC_GROUP_GetSyncReadySignal
87 * - XMC_VADC_GROUP_GetResultRegPriority
88 *
89 * 2017-01-11:
90 * - Fix assertion in XMC_VADC_GROUP_CheckSlaveReadiness() and XMC_VADC_GROUP_IgnoreSlaveReadiness() checking the slave_group parameter
91 *
92 * 2018-06-26:
93 * - Fixed XMC_VADC_GLOBAL_StartupCalibration(), added wait until calibration is started
94 *
95 * 2019-03-30:
96 * - Changed XMC_VADC_GROUP_SetChannelAlias() to inline function
97 *
98 * 2019-05-07:
99 * - Fix compilation warnings
100 *
101 * @endcond
102 *
103 */
104
105 /*********************************************************************************************************************
106 * HEADER FILES
107 ********************************************************************************************************************/
108 #include <xmc_vadc.h>
109
110 /*********************************************************************************************************************
111 * MACROS
112 ********************************************************************************************************************/
113 #define XMC_VADC_MAX_ICLASS_SET (2U) /**< Defines the maximum number of conversion parameter sets */
114 #define XMC_VADC_NUM_EMUX_INTERFACES (2U) /**< Defines the maximum number of external multiplexer interfaces */
115
116 #define XMC_VADC_RESULT_LEFT_ALIGN_10BIT (2U) /**< Defines the 10 bit converted result register left align mask. It \
117 is used in the XMC_VADC_GLOBAL_SetCompareValue() API */
118
119 #define XMC_VADC_SYNCTR_START_LOCATION (3U) /**< Defines the location in SYNCTR needed for calculations*/
120 /*********************************************************************************************************************
121 * ENUMS
122 ********************************************************************************************************************/
123
124 /*********************************************************************************************************************
125 * DATA STRUCTURES
126 ********************************************************************************************************************/
127
128 /*********************************************************************************************************************
129 * GLOBAL DATA
130 ********************************************************************************************************************/
131
132 #if (XMC_VADC_GROUP_AVAILABLE == 1U)
133
134 #if (XMC_VADC_MAXIMUM_NUM_GROUPS == 4U)
135 static VADC_G_TypeDef *const g_xmc_vadc_group_array[XMC_VADC_MAXIMUM_NUM_GROUPS] = {(VADC_G_TypeDef*)(void*)VADC_G0,
136 (VADC_G_TypeDef*)(void*)VADC_G1,
137 (VADC_G_TypeDef*)(void*)VADC_G2,
138 (VADC_G_TypeDef*)(void*)VADC_G3 };
139 #else
140 static VADC_G_TypeDef *const g_xmc_vadc_group_array[XMC_VADC_MAXIMUM_NUM_GROUPS] = {(VADC_G_TypeDef* )(void *) VADC_G0,
141 (VADC_G_TypeDef* )(void *)VADC_G1 };
142 #endif
143
144 #endif
145
146 /*********************************************************************************************************************
147 * LOCAL ROUTINES
148 ********************************************************************************************************************/
149
150 /*********************************************************************************************************************
151 * API IMPLEMENTATION
152 ********************************************************************************************************************/
153
154 /*API to enable the VADC Module*/
XMC_VADC_GLOBAL_EnableModule(void)155 void XMC_VADC_GLOBAL_EnableModule(void)
156 {
157 /*
158 * Enable Out of Range Comparator for ADC channels pins P2.2to P2.9. This hack is applicable only for XMC1xxx devices
159 * and in particular the G11 step.
160 *
161 * Please refer to the XMC1000 Errata sheet V1.4 released 2014-06 Errata ID : ADC_AI.003 Additonal bit to enable ADC
162 * function
163 */
164
165 #if defined (COMPARATOR)
166 COMPARATOR->ORCCTRL = (uint32_t)0xFF;
167 #endif
168
169 #if defined(CLOCK_GATING_SUPPORTED)
170 XMC_SCU_CLOCK_UngatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_VADC);
171 #endif
172
173 #if defined(PERIPHERAL_RESET_SUPPORTED)
174 /* Reset the Hardware */
175 XMC_SCU_RESET_DeassertPeripheralReset((XMC_SCU_PERIPHERAL_RESET_t)XMC_SCU_PERIPHERAL_RESET_VADC );
176 #endif
177 }
178
179 /*API to Disable the VADC Module*/
XMC_VADC_GLOBAL_DisableModule(void)180 void XMC_VADC_GLOBAL_DisableModule(void)
181 {
182 #if defined(PERIPHERAL_RESET_SUPPORTED)
183 /* Reset the Hardware */
184 XMC_SCU_RESET_AssertPeripheralReset((XMC_SCU_PERIPHERAL_RESET_t)XMC_SCU_PERIPHERAL_RESET_VADC );
185 #endif
186
187 #if defined(CLOCK_GATING_SUPPORTED)
188 XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_VADC);
189 #endif
190
191 }
192
193
194 /* API to initialize global resources */
XMC_VADC_GLOBAL_Init(XMC_VADC_GLOBAL_t * const global_ptr,const XMC_VADC_GLOBAL_CONFIG_t * config)195 void XMC_VADC_GLOBAL_Init(XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_GLOBAL_CONFIG_t *config)
196 {
197 #if (XMC_VADC_GROUP_AVAILABLE == 0U)
198 uint32_t reg;
199 #endif
200 XMC_ASSERT("XMC_VADC_GLOBAL_Init:Wrong Module Pointer", (global_ptr == VADC))
201
202 /* Enable the VADC module*/
203 XMC_VADC_GLOBAL_EnableModule();
204
205 global_ptr->CLC = (uint32_t)(config->clc);
206
207 /* Clock configuration */
208
209 #if (XMC_VADC_GROUP_AVAILABLE == 1U)
210 global_ptr->GLOBCFG = (uint32_t)(config->clock_config.globcfg | (uint32_t)(VADC_GLOBCFG_DIVWC_Msk));
211 #endif
212
213 /* ICLASS-0 configuration */
214 global_ptr->GLOBICLASS[0] = (uint32_t)(config->class0.globiclass);
215
216 /* ICLASS-1 configuration */
217 global_ptr->GLOBICLASS[1] = (uint32_t)(config->class1.globiclass);
218
219
220 /*Result generation related configuration */
221 global_ptr->GLOBRCR = (uint32_t)(config->globrcr);
222
223 #if (XMC_VADC_BOUNDARY_AVAILABLE == 1U)
224
225 /* Boundaries */
226 global_ptr->GLOBBOUND = (uint32_t)(config->globbound);
227
228 #endif
229
230 /* Configure the SHS register that are needed for XMC11xx devices*/
231 #if (XMC_VADC_GROUP_AVAILABLE == 0U)
232
233 /* Enabling the Analog part of the converter*/
234 reg = SHS0->SHSCFG | SHS_SHSCFG_SCWC_Msk;
235 reg &= ~(SHS_SHSCFG_ANOFF_Msk);
236 SHS0->SHSCFG = reg;
237
238 /* From the Errata sheet of XMC1100 V1.7*/
239 XMC_VADC_CONV_ENABLE_FOR_XMC11 = 1U;
240 #endif
241
242 }
243
244 /* API to Set the Global IClass registers*/
XMC_VADC_GLOBAL_InputClassInit(XMC_VADC_GLOBAL_t * const global_ptr,const XMC_VADC_GLOBAL_CLASS_t config,const XMC_VADC_GROUP_CONV_t conv_type,const uint32_t set_num)245 void XMC_VADC_GLOBAL_InputClassInit(XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_GLOBAL_CLASS_t config,
246 const XMC_VADC_GROUP_CONV_t conv_type, const uint32_t set_num)
247 {
248
249 XMC_ASSERT("XMC_VADC_GLOBAL_InputClassInit:Wrong Module Pointer", (global_ptr == VADC))
250 XMC_ASSERT("XMC_VADC_GLOBAL_InputClassInit:Wrong Conversion Type", ((conv_type) <= XMC_VADC_GROUP_CONV_EMUX))
251 XMC_ASSERT("XMC_VADC_GLOBAL_InputClassInit:Wrong ICLASS set number", (set_num < XMC_VADC_MAX_ICLASS_SET))
252
253 #if(XMC_VADC_EMUX_AVAILABLE == 1U)
254 if (conv_type == XMC_VADC_GROUP_CONV_STD )
255 {
256 #endif
257 XMC_UNUSED_ARG(conv_type);
258 global_ptr->GLOBICLASS[set_num] = config.globiclass &
259 (uint32_t)(VADC_GLOBICLASS_CMS_Msk | VADC_GLOBICLASS_STCS_Msk);
260 #if(XMC_VADC_EMUX_AVAILABLE == 1U)
261 }
262 else
263 {
264 global_ptr->GLOBICLASS[set_num] = config.globiclass & (uint32_t)(VADC_GLOBICLASS_CME_Msk | VADC_GLOBICLASS_STCE_Msk);
265 }
266 #endif
267 }
268
269 /* API to enable startup calibration feature */
XMC_VADC_GLOBAL_StartupCalibration(XMC_VADC_GLOBAL_t * const global_ptr)270 void XMC_VADC_GLOBAL_StartupCalibration(XMC_VADC_GLOBAL_t *const global_ptr)
271 {
272 #if (XMC_VADC_GROUP_AVAILABLE == 1U)
273 uint8_t i;
274 VADC_G_TypeDef *group_ptr;
275 #endif
276
277 XMC_ASSERT("XMC_VADC_GLOBAL_StartupCalibration:Wrong Module Pointer", (global_ptr == VADC))
278
279 global_ptr->GLOBCFG |= (uint32_t)VADC_GLOBCFG_SUCAL_Msk;
280
281 #if (XMC_VADC_GROUP_AVAILABLE == 1U)
282 /* Loop until all active groups finish calibration */
283 for(i=0U; i<XMC_VADC_MAXIMUM_NUM_GROUPS; i++)
284 {
285 group_ptr = g_xmc_vadc_group_array[i];
286 if ( (group_ptr->ARBCFG) & (uint32_t)VADC_G_ARBCFG_ANONS_Msk)
287 {
288 /* This group is active. Loop until it finishes calibration */
289 while((group_ptr->ARBCFG) & (uint32_t)VADC_G_ARBCFG_CAL_Msk)
290 {
291 __NOP();
292 }
293 }
294 }
295 #else
296
297 /* Loop until calibration is started */
298 while ((((SHS0->SHSCFG) & (uint32_t)SHS_SHSCFG_STATE_Msk) >> (uint32_t)SHS_SHSCFG_STATE_Pos) !=
299 XMC_VADC_SHS_START_UP_CAL_ACTIVE )
300 {
301 __NOP();
302 }
303 /* Loop until it finishes calibration */
304 while ((((SHS0->SHSCFG) & (uint32_t)SHS_SHSCFG_STATE_Msk) >> (uint32_t)SHS_SHSCFG_STATE_Pos) ==
305 XMC_VADC_SHS_START_UP_CAL_ACTIVE )
306 {
307 __NOP();
308 }
309 #endif
310 }
311
312 /* API to set boudaries for result of conversion. Should the boundaries be violated, interrupts are generated */
313 #if (XMC_VADC_BOUNDARY_AVAILABLE == 1U)
XMC_VADC_GLOBAL_SetBoundaries(XMC_VADC_GLOBAL_t * const global_ptr,const uint32_t boundary0,const uint32_t boundary1)314 void XMC_VADC_GLOBAL_SetBoundaries(XMC_VADC_GLOBAL_t *const global_ptr,
315 const uint32_t boundary0,
316 const uint32_t boundary1)
317 {
318 uint32_t globbound;
319
320 XMC_ASSERT("XMC_VADC_GLOBAL_SetBoundaries:Wrong Module Pointer", (global_ptr == VADC))
321
322 globbound = 0U;
323 globbound |= (uint32_t) (boundary0 << VADC_GLOBBOUND_BOUNDARY0_Pos);
324 globbound |= (uint32_t) (boundary1 << VADC_GLOBBOUND_BOUNDARY1_Pos);
325
326 global_ptr->GLOBBOUND = globbound;
327 }
328
329 /* API to set an individual boundary for conversion results */
XMC_VADC_GLOBAL_SetIndividualBoundary(XMC_VADC_GLOBAL_t * const global_ptr,const XMC_VADC_CHANNEL_BOUNDARY_t selection,const uint16_t boundary_value)330 void XMC_VADC_GLOBAL_SetIndividualBoundary(XMC_VADC_GLOBAL_t *const global_ptr,
331 const XMC_VADC_CHANNEL_BOUNDARY_t selection,
332 const uint16_t boundary_value)
333 {
334
335 uint32_t globbound;
336
337 XMC_ASSERT("XMC_VADC_GLOBAL_SetBoundaries:Wrong Module Pointer", (global_ptr == VADC))
338 XMC_ASSERT("XMC_VADC_GLOBAL_SetBoundaries:Wrong Boundary Selection",
339 ((XMC_VADC_CHANNEL_BOUNDARY_GLOBAL_BOUND0 == selection) ||
340 (XMC_VADC_CHANNEL_BOUNDARY_GLOBAL_BOUND1 == selection)))
341
342 /* Program the Boundary registers */
343 globbound = global_ptr->GLOBBOUND;
344
345 if (XMC_VADC_CHANNEL_BOUNDARY_GLOBAL_BOUND0 == selection)
346 {
347 globbound &= ~((uint32_t) VADC_GLOBBOUND_BOUNDARY0_Msk);
348 globbound |= (uint32_t) ((uint32_t) boundary_value << VADC_GLOBBOUND_BOUNDARY0_Pos);
349 }
350 else if (XMC_VADC_CHANNEL_BOUNDARY_GLOBAL_BOUND1 == selection)
351 {
352 globbound &= ~((uint32_t) VADC_GLOBBOUND_BOUNDARY1_Msk);
353 globbound |= (uint32_t) ((uint32_t) boundary_value << VADC_GLOBBOUND_BOUNDARY1_Pos);
354 }
355 else
356 {
357 /* For MISRA*/
358 }
359 global_ptr->GLOBBOUND = globbound;
360
361 }
362
363 #endif
364
365 /* API to set compare value for the result register. Result of conversion is compared against this compare value */
XMC_VADC_GLOBAL_SetCompareValue(XMC_VADC_GLOBAL_t * const global_ptr,const XMC_VADC_RESULT_SIZE_t compare_val)366 void XMC_VADC_GLOBAL_SetCompareValue(XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_RESULT_SIZE_t compare_val)
367 {
368 XMC_ASSERT("XMC_VADC_GLOBAL_SetCompareValue:Wrong Module Pointer", (global_ptr == VADC))
369
370 global_ptr->GLOBRES &= ~((uint32_t)VADC_GLOBRES_RESULT_Msk);
371 global_ptr->GLOBRES |= (uint32_t)((uint32_t)compare_val << XMC_VADC_RESULT_LEFT_ALIGN_10BIT);
372 }
373
374 /* API to retrieve the result of comparison */
XMC_VADC_GLOBAL_GetCompareResult(XMC_VADC_GLOBAL_t * const global_ptr)375 XMC_VADC_FAST_COMPARE_t XMC_VADC_GLOBAL_GetCompareResult(XMC_VADC_GLOBAL_t *const global_ptr)
376 {
377 XMC_VADC_FAST_COMPARE_t result;
378 uint32_t res;
379
380 XMC_ASSERT("XMC_VADC_GLOBAL_GetCompareResult:Wrong Module Pointer", (global_ptr == VADC))
381
382 res = global_ptr->GLOBRES;
383
384 if (res & (uint32_t)VADC_GLOBRES_VF_Msk)
385 {
386 result = (XMC_VADC_FAST_COMPARE_t)((uint32_t)(res >> (uint32_t)VADC_GLOBRES_FCR_Pos) & (uint32_t)1);
387 }
388 else
389 {
390 result = XMC_VADC_FAST_COMPARE_UNKNOWN;
391 }
392
393 return result;
394 }
395
396 /* Bind one of the four groups to one of the two EMUX interfaces */
397 #if (XMC_VADC_EMUX_AVAILABLE == 1U)
XMC_VADC_GLOBAL_BindGroupToEMux(XMC_VADC_GLOBAL_t * const global_ptr,const uint32_t emuxif,const uint32_t group)398 void XMC_VADC_GLOBAL_BindGroupToEMux(XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t emuxif, const uint32_t group)
399 {
400 uint32_t mask;
401 uint32_t pos;
402
403 XMC_ASSERT("XMC_VADC_GLOBAL_BindGroupToEMux:Wrong Module Pointer", (global_ptr == VADC))
404 XMC_ASSERT("XMC_VADC_GLOBAL_BindGroupToEMux:Wrong EMUX Group", (emuxif < XMC_VADC_NUM_EMUX_INTERFACES))
405 XMC_ASSERT("XMC_VADC_GLOBAL_BindGroupToEMux:Wrong VADC Group", (group < XMC_VADC_MAXIMUM_NUM_GROUPS))
406
407 if (0U == emuxif)
408 {
409 pos = (uint32_t)VADC_EMUXSEL_EMUXGRP0_Pos;
410 mask = (uint32_t)VADC_EMUXSEL_EMUXGRP0_Msk;
411 }
412 else
413 {
414 pos = (uint32_t)VADC_EMUXSEL_EMUXGRP1_Pos;
415 mask = (uint32_t)VADC_EMUXSEL_EMUXGRP1_Msk;
416 }
417
418 global_ptr->EMUXSEL &= ~(mask);
419 global_ptr->EMUXSEL |= (uint32_t) (group << pos);
420
421 }
422 #endif
423
424 /* API to bind result event with a service request line */
XMC_VADC_GLOBAL_SetResultEventInterruptNode(XMC_VADC_GLOBAL_t * const global_ptr,XMC_VADC_SR_t sr)425 void XMC_VADC_GLOBAL_SetResultEventInterruptNode(XMC_VADC_GLOBAL_t *const global_ptr, XMC_VADC_SR_t sr)
426 {
427 uint32_t node;
428
429 XMC_ASSERT("XMC_VADC_GLOBAL_SetResultEventInterruptNode:Wrong Module Pointer", (global_ptr == VADC))
430 XMC_ASSERT("XMC_VADC_GLOBAL_SetResultEventInterruptNode:Wrong SR Number", (sr <= XMC_VADC_SR_SHARED_SR3))
431
432 if (sr >= XMC_VADC_SR_SHARED_SR0)
433 {
434 node = (uint32_t)sr - (uint32_t)XMC_VADC_SR_SHARED_SR0;
435 }
436 else
437 {
438 node = (uint32_t)sr;
439 }
440
441 global_ptr->GLOBEVNP &= ~((uint32_t)VADC_GLOBEVNP_REV0NP_Msk);
442 global_ptr->GLOBEVNP |= (uint32_t)(node << VADC_GLOBEVNP_REV0NP_Pos);
443 }
444
445 /* API to bind request source event with a service request line */
XMC_VADC_GLOBAL_BackgroundSetReqSrcEventInterruptNode(XMC_VADC_GLOBAL_t * const global_ptr,XMC_VADC_SR_t sr)446 void XMC_VADC_GLOBAL_BackgroundSetReqSrcEventInterruptNode(XMC_VADC_GLOBAL_t *const global_ptr, XMC_VADC_SR_t sr)
447 {
448 uint32_t node;
449
450 XMC_ASSERT("XMC_VADC_GLOBAL_BackgroundSetReqSrcEventInterruptNode:Wrong Module Pointer", (global_ptr == VADC))
451
452 if (sr >= XMC_VADC_SR_SHARED_SR0)
453 {
454 node = (uint32_t)sr - (uint32_t)XMC_VADC_SR_SHARED_SR0;
455 }
456 else
457 {
458 node = (uint32_t)sr;
459 }
460
461 global_ptr->GLOBEVNP &= ~((uint32_t)VADC_GLOBEVNP_SEV0NP_Msk);
462 global_ptr->GLOBEVNP |= (uint32_t) (node << VADC_GLOBEVNP_SEV0NP_Pos);
463 }
464
465 /* API to initialize an instance of group of VADC hardware */
466 #if (XMC_VADC_GROUP_AVAILABLE == 1U)
XMC_VADC_GROUP_Init(XMC_VADC_GROUP_t * const group_ptr,const XMC_VADC_GROUP_CONFIG_t * config)467 void XMC_VADC_GROUP_Init( XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_GROUP_CONFIG_t *config)
468 {
469 XMC_ASSERT("XMC_VADC_GROUP_Init:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
470
471 /* Program the input classes */
472 XMC_VADC_GROUP_InputClassInit(group_ptr, config->class0, XMC_VADC_GROUP_CONV_STD, 0U);
473 XMC_VADC_GROUP_InputClassInit(group_ptr, config->class0, XMC_VADC_GROUP_CONV_EMUX, 0U);
474 XMC_VADC_GROUP_InputClassInit(group_ptr, config->class1, XMC_VADC_GROUP_CONV_STD, 1U);
475 XMC_VADC_GROUP_InputClassInit(group_ptr, config->class1, XMC_VADC_GROUP_CONV_EMUX, 1U);
476
477 group_ptr->ARBCFG = config->g_arbcfg;
478
479 group_ptr->BOUND = config->g_bound;
480
481 /* External mux configuration */
482 XMC_VADC_GROUP_ExternalMuxControlInit(group_ptr,config->emux_config);
483
484 }
485
486 /* API to program conversion characteristics */
XMC_VADC_GROUP_InputClassInit(XMC_VADC_GROUP_t * const group_ptr,const XMC_VADC_GROUP_CLASS_t config,const XMC_VADC_GROUP_CONV_t conv_type,const uint32_t set_num)487 void XMC_VADC_GROUP_InputClassInit(XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_GROUP_CLASS_t config,
488 const XMC_VADC_GROUP_CONV_t conv_type, const uint32_t set_num)
489 {
490 uint32_t conv_class;
491 uint32_t conv_mode_pos;
492 uint32_t sample_time_pos;
493 uint32_t conv_mode_mask;
494 uint32_t sample_time_mask;
495 uint32_t sample_time;
496 XMC_VADC_CONVMODE_t conv_mode;
497
498 XMC_ASSERT("XMC_VADC_GROUP_InputClassInit:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
499 XMC_ASSERT("XMC_VADC_GROUP_InputClassInit:Wrong Conversion Type", ((conv_type) <= XMC_VADC_GROUP_CONV_EMUX))
500 XMC_ASSERT("XMC_VADC_GROUP_InputClassInit:Wrong ICLASS set number", (set_num < XMC_VADC_MAX_ICLASS_SET))
501
502 /*
503 * Obtain the mask and position macros of the parameters based on what is being requested - Standard channels vs
504 * external mux channels.
505 */
506 if (XMC_VADC_GROUP_CONV_STD == conv_type)
507 {
508 conv_mode_pos = (uint32_t) VADC_G_ICLASS_CMS_Pos;
509 conv_mode_mask = (uint32_t) VADC_G_ICLASS_CMS_Msk;
510 sample_time_pos = (uint32_t) VADC_G_ICLASS_STCS_Pos;
511 sample_time_mask = (uint32_t) VADC_G_ICLASS_STCS_Msk;
512 sample_time = (uint32_t) config.sample_time_std_conv;
513 conv_mode = (XMC_VADC_CONVMODE_t)config.conversion_mode_standard;
514 }
515 else
516 {
517 conv_mode_pos = (uint32_t) VADC_G_ICLASS_CME_Pos;
518 conv_mode_mask = (uint32_t) VADC_G_ICLASS_CME_Msk;
519 sample_time_pos = (uint32_t) VADC_G_ICLASS_STCE_Pos;
520 sample_time_mask = (uint32_t) VADC_G_ICLASS_STCE_Msk;
521 sample_time = (uint32_t) config.sampling_phase_emux_channel;
522 conv_mode = (XMC_VADC_CONVMODE_t)config.conversion_mode_emux;
523 }
524
525 /* Determine the class */
526 conv_class = group_ptr->ICLASS[set_num];
527
528 /* Program the class register */
529 conv_class &= ~(conv_mode_mask);
530 conv_class |= (uint32_t)((uint32_t) conv_mode << conv_mode_pos);
531 conv_class &= ~(sample_time_mask);
532 conv_class |= (uint32_t)(sample_time << sample_time_pos);
533 group_ptr->ICLASS[set_num] = conv_class;
534 }
535
536 /* API which sets the power mode of analog converter of a VADC group */
XMC_VADC_GROUP_SetPowerMode(XMC_VADC_GROUP_t * const group_ptr,const XMC_VADC_GROUP_POWERMODE_t power_mode)537 void XMC_VADC_GROUP_SetPowerMode(XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_GROUP_POWERMODE_t power_mode)
538 {
539 uint32_t arbcfg;
540
541 XMC_ASSERT("XMC_VADC_GROUP_SetPowerMode:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
542 XMC_ASSERT("XMC_VADC_GROUP_SetPowerMode:Wrong Power Mode", (power_mode <= XMC_VADC_GROUP_POWERMODE_NORMAL))
543
544 arbcfg = group_ptr->ARBCFG;
545
546 arbcfg &= ~((uint32_t)VADC_G_ARBCFG_ANONC_Msk);
547 arbcfg |= (uint32_t)power_mode;
548
549 group_ptr->ARBCFG = arbcfg;
550 }
551
552 /* API which programs a group as a slave group during sync conversions */
XMC_VADC_GROUP_SetSyncSlave(XMC_VADC_GROUP_t * const group_ptr,uint32_t master_grp,uint32_t slave_grp)553 void XMC_VADC_GROUP_SetSyncSlave(XMC_VADC_GROUP_t *const group_ptr, uint32_t master_grp, uint32_t slave_grp)
554 {
555 uint32_t synctr;
556 #if (XMC_VADC_MULTIPLE_SLAVEGROUPS == 1U )
557 #endif
558 XMC_ASSERT("XMC_VADC_GROUP_SetSyncSlave:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
559
560 #if (XMC_VADC_MULTIPLE_SLAVEGROUPS == 1U )
561
562 /* Determine the coding of SYNCTR */
563 if (slave_grp > master_grp)
564 {
565 master_grp = master_grp + 1U;
566 }
567 #endif
568
569 /* Program SYNCTR */
570 synctr = group_ptr->SYNCTR;
571 synctr &= ~((uint32_t)VADC_G_SYNCTR_STSEL_Msk);
572 synctr |= master_grp;
573 group_ptr->SYNCTR = synctr;
574 }
575
576 /* API which programs a group as a master group during sync conversions */
XMC_VADC_GROUP_SetSyncMaster(XMC_VADC_GROUP_t * const group_ptr)577 void XMC_VADC_GROUP_SetSyncMaster(XMC_VADC_GROUP_t *const group_ptr)
578 {
579 uint32_t synctr;
580
581 XMC_ASSERT("XMC_VADC_GROUP_SetSyncMaster:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
582
583 synctr = group_ptr->SYNCTR;
584 synctr &= ~((uint32_t)VADC_G_SYNCTR_STSEL_Msk);
585 group_ptr->SYNCTR = synctr;
586 }
587
588 /* API to enable checking of readiness of slaves before a synchronous conversion request is issued */
XMC_VADC_GROUP_CheckSlaveReadiness(XMC_VADC_GROUP_t * const group_ptr,uint32_t slave_group)589 void XMC_VADC_GROUP_CheckSlaveReadiness(XMC_VADC_GROUP_t *const group_ptr, uint32_t slave_group)
590 {
591 uint32_t i,master_grp_num;
592 XMC_ASSERT("XMC_VADC_GROUP_CheckSlaveReadiness:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
593 XMC_ASSERT("XMC_VADC_GROUP_CheckSlaveReadiness:Wrong Slave group", (slave_group <= (XMC_VADC_MAXIMUM_NUM_GROUPS - 1)))
594
595 master_grp_num =0;
596 for(i=0; i<XMC_VADC_MAXIMUM_NUM_GROUPS; i++)
597 {
598 if(g_xmc_vadc_group_array[i] == group_ptr)
599 {
600 master_grp_num = i;
601 }
602 }
603
604
605 if(slave_group < master_grp_num)
606 {
607 slave_group++;
608 }
609 group_ptr->SYNCTR |= (1U << (slave_group + XMC_VADC_SYNCTR_START_LOCATION));
610 }
611
612 /* API to disable checking of readiness of slaves during synchronous conversions */
XMC_VADC_GROUP_IgnoreSlaveReadiness(XMC_VADC_GROUP_t * const group_ptr,uint32_t slave_group)613 void XMC_VADC_GROUP_IgnoreSlaveReadiness(XMC_VADC_GROUP_t *const group_ptr, uint32_t slave_group)
614 {
615 uint32_t i,master_grp_num;
616 XMC_ASSERT("XMC_VADC_GROUP_IgnoreSlaveReadiness:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
617 XMC_ASSERT("XMC_VADC_GROUP_IgnoreSlaveReadiness:Wrong Slave group", (slave_group <= (XMC_VADC_MAXIMUM_NUM_GROUPS - 1)))
618
619 master_grp_num =0;
620 for(i=0; i<XMC_VADC_MAXIMUM_NUM_GROUPS; i++)
621 {
622 if(g_xmc_vadc_group_array[i] == group_ptr)
623 {
624 master_grp_num = i;
625 }
626 }
627
628 if(slave_group < master_grp_num)
629 {
630 slave_group++;
631 }
632 group_ptr->SYNCTR &= ~(1U << (slave_group + XMC_VADC_SYNCTR_START_LOCATION));
633 }
634
635 /* API to configure EVAL bit in the slave groups*/
XMC_VADC_GROUP_SetSyncSlaveReadySignal(XMC_VADC_GROUP_t * const group_ptr,uint32_t eval_waiting_group,uint32_t eval_origin_group)636 void XMC_VADC_GROUP_SetSyncSlaveReadySignal(XMC_VADC_GROUP_t *const group_ptr,
637 uint32_t eval_waiting_group,
638 uint32_t eval_origin_group)
639 {
640 XMC_ASSERT("XMC_VADC_GROUP_SetSyncSlaveReadySignal:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
641 XMC_ASSERT("XMC_VADC_GROUP_SetSyncSlaveReadySignal:Wrong Group numbers", (eval_waiting_group != eval_origin_group ))
642
643 if(eval_origin_group < eval_waiting_group)
644 {
645 eval_origin_group++;
646 }
647 group_ptr->SYNCTR |= (1U << (eval_origin_group + XMC_VADC_SYNCTR_START_LOCATION));
648 }
649
650
651 /* API to enable the synchronous conversion feature - Applicable only to kernel configured as master */
XMC_VADC_GROUP_EnableChannelSyncRequest(XMC_VADC_GROUP_t * const group_ptr,const uint32_t ch_num)652 void XMC_VADC_GROUP_EnableChannelSyncRequest(XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
653 {
654 uint32_t synctr;
655
656 XMC_ASSERT("XMC_VADC_GROUP_EnableChannelSyncRequest:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
657 XMC_ASSERT("XMC_VADC_GROUP_EnableChannelSyncRequest:Wrong Channel Number",
658 ((ch_num) < XMC_VADC_NUM_CHANNELS_PER_GROUP))
659
660 synctr = group_ptr->SYNCTR;
661
662 if (!(synctr & (uint32_t)VADC_G_SYNCTR_STSEL_Msk))
663 {
664 group_ptr->CHCTR[ch_num] |= (uint32_t)((uint32_t)1 << VADC_G_CHCTR_SYNC_Pos);
665 }
666 }
667
668 /* API to disable synchronous conversion feature */
XMC_VADC_GROUP_DisableChannelSyncRequest(XMC_VADC_GROUP_t * const group_ptr,const uint32_t ch_num)669 void XMC_VADC_GROUP_DisableChannelSyncRequest(XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
670 {
671 uint32_t synctr;
672
673 XMC_ASSERT("XMC_VADC_GROUP_DisableChannelSyncRequest:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
674 XMC_ASSERT("XMC_VADC_GROUP_DisableChannelSyncRequest:Wrong Channel Number",
675 ((ch_num) < XMC_VADC_NUM_CHANNELS_PER_GROUP))
676
677 synctr = group_ptr->SYNCTR;
678
679 if (synctr & (uint32_t)VADC_G_SYNCTR_STSEL_Msk)
680 {
681 group_ptr->CHCTR[ch_num] &= ~((uint32_t)VADC_G_CHCTR_SYNC_Msk);
682 }
683 }
684
685 /* API to retrieve the converter state - Idle vs Busy */
XMC_VADC_GROUP_IsConverterBusy(XMC_VADC_GROUP_t * const group_ptr)686 XMC_VADC_GROUP_STATE_t XMC_VADC_GROUP_IsConverterBusy(XMC_VADC_GROUP_t *const group_ptr)
687 {
688 uint32_t arbcfg;
689
690 XMC_ASSERT("XMC_VADC_GROUP_IsConverterBusy:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
691
692 arbcfg = group_ptr->ARBCFG;
693 arbcfg &= (uint32_t)VADC_G_ARBCFG_BUSY_Msk;
694 arbcfg = arbcfg >> VADC_G_ARBCFG_BUSY_Pos;
695
696 return( (XMC_VADC_GROUP_STATE_t)arbcfg);
697 }
698
699 /* API to set boundaries for conversion results */
XMC_VADC_GROUP_SetBoundaries(XMC_VADC_GROUP_t * const group_ptr,const uint32_t boundary0,const uint32_t boundary1)700 void XMC_VADC_GROUP_SetBoundaries(XMC_VADC_GROUP_t *const group_ptr, const uint32_t boundary0, const uint32_t boundary1)
701 {
702 uint32_t bound;
703
704 XMC_ASSERT("XMC_VADC_GROUP_SetBoundaries:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
705
706 /* Program the Boundary registers */
707 bound = group_ptr->BOUND;
708 bound &= ~((uint32_t) VADC_G_BOUND_BOUNDARY0_Msk);
709 bound &= ~((uint32_t) VADC_G_BOUND_BOUNDARY1_Msk);
710 bound |= (uint32_t) ((uint32_t) boundary0 << VADC_G_BOUND_BOUNDARY0_Pos);
711 bound |= (uint32_t) ((uint32_t) boundary1 << VADC_G_BOUND_BOUNDARY1_Pos);
712 group_ptr->BOUND = bound;
713 }
714
715 /* API to set an individual boundary for conversion results */
XMC_VADC_GROUP_SetIndividualBoundary(XMC_VADC_GROUP_t * const group_ptr,const XMC_VADC_CHANNEL_BOUNDARY_t selection,const uint16_t boundary_value)716 void XMC_VADC_GROUP_SetIndividualBoundary(XMC_VADC_GROUP_t *const group_ptr,
717 const XMC_VADC_CHANNEL_BOUNDARY_t selection,
718 const uint16_t boundary_value)
719 {
720
721 uint32_t bound;
722
723 XMC_ASSERT("XMC_VADC_GROUP_SetIndividualBoundary:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
724 XMC_ASSERT("XMC_VADC_GROUP_SetIndividualBoundary:Wrong Boundary Selection",
725 ((XMC_VADC_CHANNEL_BOUNDARY_GROUP_BOUND0 == selection) ||
726 (XMC_VADC_CHANNEL_BOUNDARY_GROUP_BOUND1 == selection)))
727
728 /* Program the Boundary registers */
729 bound = group_ptr->BOUND;
730 if (XMC_VADC_CHANNEL_BOUNDARY_GROUP_BOUND0 == selection)
731 {
732 bound &= ~((uint32_t) VADC_G_BOUND_BOUNDARY0_Msk);
733 bound |= (uint32_t) ((uint32_t) boundary_value << VADC_G_BOUND_BOUNDARY0_Pos);
734 }
735 else if (XMC_VADC_CHANNEL_BOUNDARY_GROUP_BOUND1 == selection)
736 {
737 bound &= ~((uint32_t) VADC_G_BOUND_BOUNDARY1_Msk);
738 bound |= (uint32_t) ((uint32_t) boundary_value << VADC_G_BOUND_BOUNDARY1_Pos);
739 }
740 else
741 {
742 /* For MISRA*/
743 }
744 group_ptr->BOUND = bound;
745
746 }
747
748 /* Manually assert service request (Interrupt) to NVIC */
XMC_VADC_GROUP_TriggerServiceRequest(XMC_VADC_GROUP_t * const group_ptr,const uint32_t sr_num,const XMC_VADC_GROUP_IRQ_t type)749 void XMC_VADC_GROUP_TriggerServiceRequest(XMC_VADC_GROUP_t *const group_ptr,
750 const uint32_t sr_num,
751 const XMC_VADC_GROUP_IRQ_t type)
752 {
753 uint32_t sract;
754
755 XMC_ASSERT("XMC_VADC_GROUP_TriggerServiceRequest:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
756 XMC_ASSERT("XMC_VADC_GROUP_TriggerServiceRequest:Wrong SR number", (sr_num <= XMC_VADC_SR_SHARED_SR3))
757 XMC_ASSERT("XMC_VADC_GROUP_TriggerServiceRequest:Wrong SR type", ((type)<= XMC_VADC_GROUP_IRQ_SHARED))
758
759 sract = group_ptr->SRACT;
760
761 if (XMC_VADC_GROUP_IRQ_KERNEL == type)
762 {
763 sract |= (uint32_t)((uint32_t)1 << sr_num);
764 }
765 else
766 {
767 sract |= (uint32_t)((uint32_t)1 << (sr_num + (uint32_t)8));
768 }
769
770 group_ptr->SRACT = sract;
771 }
772
773 #if XMC_VADC_BOUNDARY_FLAG_SELECT == 1U
774
775 /* API to set the SR line for the Boundary flag node pointer*/
XMC_VADC_GROUP_SetBoundaryEventInterruptNode(XMC_VADC_GROUP_t * const group_ptr,const uint8_t boundary_flag_num,const XMC_VADC_BOUNDARY_NODE_t sr)776 void XMC_VADC_GROUP_SetBoundaryEventInterruptNode(XMC_VADC_GROUP_t *const group_ptr,
777 const uint8_t boundary_flag_num,
778 const XMC_VADC_BOUNDARY_NODE_t sr)
779 {
780 uint32_t flag_pos;
781 XMC_ASSERT("XMC_VADC_GROUP_SetBoundaryEventInterruptNode:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
782
783 /* Program the GxBFLNP */
784 flag_pos = (uint32_t)boundary_flag_num << (uint32_t)2;
785 group_ptr->BFLNP &= ~((uint32_t)VADC_G_BFLNP_BFL0NP_Msk << flag_pos);
786 group_ptr->BFLNP |= (uint32_t)sr << flag_pos;
787 }
788
789 #endif
790
791 #endif
792
793 #if(XMC_VADC_SHS_AVAILABLE == 1U)
794
795 /* API to Initialize the Sample and hold features*/
XMC_VADC_GLOBAL_SHS_Init(XMC_VADC_GLOBAL_SHS_t * const shs_ptr,const XMC_VADC_GLOBAL_SHS_CONFIG_t * config)796 void XMC_VADC_GLOBAL_SHS_Init(XMC_VADC_GLOBAL_SHS_t *const shs_ptr, const XMC_VADC_GLOBAL_SHS_CONFIG_t *config)
797 {
798 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_Init:Wrong SHS Pointer", (shs_ptr == (XMC_VADC_GLOBAL_SHS_t*)(void*)SHS0))
799 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_Init:Wrong Index number",(config == (XMC_VADC_GLOBAL_SHS_CONFIG_t*)NULL))
800
801 /* Initialize the SHS Configuration register*/
802 shs_ptr->SHSCFG = (uint32_t)((uint32_t)config->shscfg | (uint32_t)SHS_SHSCFG_SCWC_Msk);
803
804 #if(XMC_VADC_SHS_FULL_SET_REG == 1U)
805 /* Select the Calibration order*/
806 shs_ptr->CALCTR &= ~((uint32_t)SHS_CALCTR_CALORD_Msk);
807 shs_ptr->CALCTR |= (uint32_t) ((uint32_t)config->calibration_order << SHS_CALCTR_CALORD_Pos);
808 #endif
809 }
810
811 #if(XMC_VADC_SHS_FULL_SET_REG == 1U)
812 /* API to enable the accelerated mode of conversion */
XMC_VADC_GLOBAL_SHS_EnableAcceleratedMode(XMC_VADC_GLOBAL_SHS_t * const shs_ptr,XMC_VADC_GROUP_INDEX_t group_num)813 void XMC_VADC_GLOBAL_SHS_EnableAcceleratedMode(XMC_VADC_GLOBAL_SHS_t *const shs_ptr, XMC_VADC_GROUP_INDEX_t group_num)
814 {
815 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_EnableAcceleratedMode:Wrong SHS Pointer",
816 (shs_ptr == (XMC_VADC_GLOBAL_SHS_t*)(void*)SHS0))
817 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_EnableAcceleratedMode:Wrong Index number",(group_num <= XMC_VADC_GROUP_INDEX_1))
818
819 /* Set the converted to Accelerated mode from compatible mode*/
820 if (group_num == XMC_VADC_GROUP_INDEX_0 )
821 {
822 shs_ptr->TIMCFG0 |= (uint32_t)SHS_TIMCFG0_AT_Msk;
823 }
824 else if (group_num == XMC_VADC_GROUP_INDEX_1 )
825 {
826 shs_ptr->TIMCFG1 |= (uint32_t)SHS_TIMCFG1_AT_Msk;
827 }
828 else
829 {
830 /* for MISRA*/
831 }
832 }
833
834 /* API to disable the accelerated mode of conversion */
XMC_VADC_GLOBAL_SHS_DisableAcceleratedMode(XMC_VADC_GLOBAL_SHS_t * const shs_ptr,XMC_VADC_GROUP_INDEX_t group_num)835 void XMC_VADC_GLOBAL_SHS_DisableAcceleratedMode(XMC_VADC_GLOBAL_SHS_t *const shs_ptr, XMC_VADC_GROUP_INDEX_t group_num)
836 {
837 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_DisableAcceleratedMode:Wrong SHS Pointer",
838 (shs_ptr == (XMC_VADC_GLOBAL_SHS_t*)(void*)SHS0))
839 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_DisableAcceleratedMode:Wrong Index number",(group_num <= XMC_VADC_GROUP_INDEX_1))
840
841 /* Set the converted to Accelerated mode from compatible mode*/
842 if (group_num == XMC_VADC_GROUP_INDEX_0 )
843 {
844 shs_ptr->TIMCFG0 &= ~(uint32_t)SHS_TIMCFG0_AT_Msk;
845 }
846 else if (group_num == XMC_VADC_GROUP_INDEX_1 )
847 {
848 shs_ptr->TIMCFG1 &= ~(uint32_t)SHS_TIMCFG1_AT_Msk;
849 }
850 else
851 {
852 /* for MISRA*/
853 }
854 }
855
856 /* API to set the Short sample time of the Sample and hold module*/
XMC_VADC_GLOBAL_SHS_SetShortSampleTime(XMC_VADC_GLOBAL_SHS_t * const shs_ptr,XMC_VADC_GROUP_INDEX_t group_num,uint8_t sst_value)857 void XMC_VADC_GLOBAL_SHS_SetShortSampleTime(XMC_VADC_GLOBAL_SHS_t *const shs_ptr,
858 XMC_VADC_GROUP_INDEX_t group_num,
859 uint8_t sst_value)
860 {
861 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_SetShortSampleTime:Wrong SHS Pointer",
862 (shs_ptr == (XMC_VADC_GLOBAL_SHS_t*)(void*)SHS0))
863 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_SetShortSampleTime:Wrong Index number",(group_num <= XMC_VADC_GROUP_INDEX_1))
864 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_SetShortSampleTime:Wrong SST value",(sst_value < 64U))
865
866 /* Set the short sample time for the Accelerated mode of operation*/
867 if (group_num == XMC_VADC_GROUP_INDEX_0 )
868 {
869 shs_ptr->TIMCFG0 &= ~((uint32_t)SHS_TIMCFG0_SST_Msk);
870 shs_ptr->TIMCFG0 |= (uint32_t)((uint32_t)sst_value << SHS_TIMCFG0_SST_Pos );
871 }
872 else if (group_num == XMC_VADC_GROUP_INDEX_1 )
873 {
874 shs_ptr->TIMCFG1 &= ~((uint32_t)SHS_TIMCFG1_SST_Msk);
875 shs_ptr->TIMCFG1 |= (uint32_t)((uint32_t)sst_value << SHS_TIMCFG1_SST_Pos );
876 }
877 else
878 {
879 /* for MISRA*/
880 }
881 }
882 #endif
883
884 /* API to set the gain factor of the Sample and hold module*/
XMC_VADC_GLOBAL_SHS_SetGainFactor(XMC_VADC_GLOBAL_SHS_t * const shs_ptr,uint8_t gain_value,XMC_VADC_GROUP_INDEX_t group_num,uint8_t ch_num)885 void XMC_VADC_GLOBAL_SHS_SetGainFactor(XMC_VADC_GLOBAL_SHS_t *const shs_ptr,
886 uint8_t gain_value,
887 XMC_VADC_GROUP_INDEX_t group_num,
888 uint8_t ch_num)
889 {
890 uint32_t ch_mask;
891
892 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_SetGainFactor:Wrong SHS Pointer", (shs_ptr == (XMC_VADC_GLOBAL_SHS_t*)(void*)SHS0))
893 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_SetGainFactor:Wrong Index number",(group_num <= XMC_VADC_GROUP_INDEX_1))
894
895 /*Calculate location of channel bit-field*/
896 ch_mask = ((uint32_t)ch_num << (uint32_t)2);
897 if (group_num == XMC_VADC_GROUP_INDEX_0 )
898 {
899 shs_ptr->GNCTR00 &= ~((uint32_t)SHS_GNCTR00_GAIN0_Msk << ch_mask) ;
900 shs_ptr->GNCTR00 |= ((uint32_t)gain_value << ch_mask);
901 }
902 else if (group_num == XMC_VADC_GROUP_INDEX_1 )
903 {
904 shs_ptr->GNCTR10 &= ~((uint32_t)SHS_GNCTR10_GAIN0_Msk << ch_mask);
905 shs_ptr->GNCTR10 |= ((uint32_t)gain_value << ch_mask);
906 }
907 else
908 {
909 /* for MISRA*/
910 }
911 }
912
913 #if(XMC_VADC_SHS_FULL_SET_REG == 1U)
914 /* API to enable the gain and offset calibration of the Sample and hold module*/
XMC_VADC_GLOBAL_SHS_EnableGainAndOffsetCalibrations(XMC_VADC_GLOBAL_SHS_t * const shs_ptr,XMC_VADC_GROUP_INDEX_t group_num)915 void XMC_VADC_GLOBAL_SHS_EnableGainAndOffsetCalibrations(XMC_VADC_GLOBAL_SHS_t *const shs_ptr,
916 XMC_VADC_GROUP_INDEX_t group_num)
917 {
918 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_EnableGainAndOffsetCalibrations:Wrong SHS Pointer",
919 (shs_ptr == (XMC_VADC_GLOBAL_SHS_t*)(void*)SHS0))
920 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_EnableGainAndOffsetCalibrations:Wrong group selected",
921 (group_num <= (uint32_t)XMC_VADC_GROUP_INDEX_1))
922
923 /* Enable gain and offset calibration*/
924 if ( XMC_VADC_GROUP_INDEX_0 == group_num)
925 {
926 shs_ptr->CALOC0 &= ~((uint32_t)SHS_CALOC0_DISCAL_Msk);
927 }
928 else if ( XMC_VADC_GROUP_INDEX_1 == group_num)
929 {
930 shs_ptr->CALOC1 &= ~((uint32_t)SHS_CALOC1_DISCAL_Msk);
931 }
932 else
933 {
934 /* for MISRA */
935 }
936 }
937
938 /* API to enable the gain and offset calibration of the Sample and hold module*/
XMC_VADC_GLOBAL_SHS_DisableGainAndOffsetCalibrations(XMC_VADC_GLOBAL_SHS_t * const shs_ptr,XMC_VADC_GROUP_INDEX_t group_num)939 void XMC_VADC_GLOBAL_SHS_DisableGainAndOffsetCalibrations(XMC_VADC_GLOBAL_SHS_t *const shs_ptr,
940 XMC_VADC_GROUP_INDEX_t group_num)
941 {
942 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_DisableGainAndOffsetCalibrations:Wrong SHS Pointer",
943 (shs_ptr == (XMC_VADC_GLOBAL_SHS_t*)(void*)SHS0))
944 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_DisableGainAndOffsetCalibrations:Wrong group selected",
945 (group_num <= (uint32_t)XMC_VADC_GROUP_INDEX_1))
946
947 if ( XMC_VADC_GROUP_INDEX_0 == group_num)
948 {
949 shs_ptr->CALOC0 |= (uint32_t)SHS_CALOC0_DISCAL_Msk;
950 }
951 else if ( XMC_VADC_GROUP_INDEX_1 == group_num)
952 {
953 shs_ptr->CALOC1 |= (uint32_t)SHS_CALOC1_DISCAL_Msk;
954 }
955 else
956 {
957 /* for MISRA */
958 }
959 }
960
961 /* API to get the offset calibration value of the Sample and hold module*/
XMC_VADC_GLOBAL_SHS_GetOffsetCalibrationValue(XMC_VADC_GLOBAL_SHS_t * const shs_ptr,XMC_VADC_GROUP_INDEX_t group_num,XMC_VADC_SHS_GAIN_LEVEL_t gain_level)962 uint8_t XMC_VADC_GLOBAL_SHS_GetOffsetCalibrationValue(XMC_VADC_GLOBAL_SHS_t *const shs_ptr,
963 XMC_VADC_GROUP_INDEX_t group_num,
964 XMC_VADC_SHS_GAIN_LEVEL_t gain_level)
965 {
966 uint32_t calibration_value;
967 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_GetOffsetCalibrationValue:Wrong SHS Pointer",
968 (shs_ptr == (XMC_VADC_GLOBAL_SHS_t*)(void*)SHS0))
969 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_GetOffsetCalibrationValue:Wrong Group number selected",
970 (group_num == XMC_VADC_GROUP_INDEX_0)||(group_num == XMC_VADC_GROUP_INDEX_1))
971 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_GetOffsetCalibrationValue:Wrong gain level selected",
972 (gain_level == XMC_VADC_SHS_GAIN_LEVEL_0)||(gain_level == XMC_VADC_SHS_GAIN_LEVEL_1)||
973 (gain_level == XMC_VADC_SHS_GAIN_LEVEL_2)||(gain_level == XMC_VADC_SHS_GAIN_LEVEL_3))
974
975 calibration_value = 0U;
976 if ( XMC_VADC_GROUP_INDEX_0 == group_num)
977 {
978 calibration_value = (shs_ptr->CALOC0 >> (uint32_t)gain_level) & (uint32_t)SHS_CALOC0_CALOFFVAL0_Msk;
979 }
980 else if ( XMC_VADC_GROUP_INDEX_1 == group_num)
981 {
982 calibration_value = (shs_ptr->CALOC1 >> (uint32_t)gain_level) & (uint32_t)SHS_CALOC1_CALOFFVAL0_Msk;
983 }
984 else
985 {
986 /* for MISRA */
987 }
988 return ((uint8_t)calibration_value);
989 }
990
991 /* API to set the offset calibration value of the Sample and hold module*/
XMC_VADC_GLOBAL_SHS_SetOffsetCalibrationValue(XMC_VADC_GLOBAL_SHS_t * const shs_ptr,XMC_VADC_GROUP_INDEX_t group_num,XMC_VADC_SHS_GAIN_LEVEL_t gain_level,uint8_t offset_calibration_value)992 void XMC_VADC_GLOBAL_SHS_SetOffsetCalibrationValue(XMC_VADC_GLOBAL_SHS_t *const shs_ptr,
993 XMC_VADC_GROUP_INDEX_t group_num,
994 XMC_VADC_SHS_GAIN_LEVEL_t gain_level,
995 uint8_t offset_calibration_value)
996 {
997 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_SetOffsetCalibrationValue:Wrong SHS Pointer",
998 (shs_ptr == (XMC_VADC_GLOBAL_SHS_t*)(void*)SHS0))
999 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_SetOffsetCalibrationValue:Wrong Group number selected",
1000 (group_num == XMC_VADC_GROUP_INDEX_0)||(group_num == XMC_VADC_GROUP_INDEX_1))
1001 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_SetOffsetCalibrationValue:Wrong gain level selected",
1002 (gain_level == XMC_VADC_SHS_GAIN_LEVEL_0)||(gain_level == XMC_VADC_SHS_GAIN_LEVEL_1)||
1003 (gain_level == XMC_VADC_SHS_GAIN_LEVEL_2)||(gain_level == XMC_VADC_SHS_GAIN_LEVEL_3))
1004
1005 if ( XMC_VADC_GROUP_INDEX_0 == group_num)
1006 {
1007 shs_ptr->CALOC0 = (shs_ptr->CALOC0 & ~((uint32_t)SHS_CALOC0_CALOFFVAL0_Msk << (uint32_t)gain_level)) |
1008 (uint32_t)SHS_CALOC0_OFFWC_Msk;
1009 shs_ptr->CALOC0 |= ((uint32_t)offset_calibration_value << (uint32_t)gain_level) | (uint32_t)SHS_CALOC0_OFFWC_Msk;
1010 }
1011 else if ( XMC_VADC_GROUP_INDEX_1 == group_num)
1012 {
1013 shs_ptr->CALOC1 = (shs_ptr->CALOC1 & ~((uint32_t)SHS_CALOC1_CALOFFVAL0_Msk << (uint32_t)gain_level)) |
1014 (uint32_t)SHS_CALOC1_OFFWC_Msk;
1015 shs_ptr->CALOC1 |= ((uint32_t)offset_calibration_value << (uint32_t)gain_level) | (uint32_t)SHS_CALOC1_OFFWC_Msk;
1016 }
1017 else
1018 {
1019 /* for MISRA */
1020 }
1021 }
1022 #endif
1023
1024 /* API to set the values of sigma delta loop of the Sample and hold module*/
XMC_VADC_GLOBAL_SHS_SetSigmaDeltaLoop(XMC_VADC_GLOBAL_SHS_t * const shs_ptr,XMC_VADC_GROUP_INDEX_t group_num,XMC_VADC_SHS_LOOP_CH_t loop_select,uint8_t ch_num)1025 void XMC_VADC_GLOBAL_SHS_SetSigmaDeltaLoop(XMC_VADC_GLOBAL_SHS_t *const shs_ptr,
1026 XMC_VADC_GROUP_INDEX_t group_num,
1027 XMC_VADC_SHS_LOOP_CH_t loop_select,
1028 uint8_t ch_num)
1029 {
1030 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_SetSigmaDeltaLoop:Wrong SHS Pointer",
1031 (shs_ptr == (XMC_VADC_GLOBAL_SHS_t*)(void*)SHS0))
1032 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_SetSigmaDeltaLoop:Wrong Group number selected",
1033 (group_num == XMC_VADC_GROUP_INDEX_0)||(group_num == XMC_VADC_GROUP_INDEX_1))
1034 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_SetSigmaDeltaLoop:Wrong Delta sigma loop selected",
1035 (loop_select == XMC_VADC_SHS_LOOP_CH_0)||(loop_select == XMC_VADC_SHS_LOOP_CH_1))
1036 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_SetSigmaDeltaLoop:Wrong Channel Number",
1037 ((ch_num) < XMC_VADC_NUM_CHANNELS_PER_GROUP))
1038
1039 shs_ptr->LOOP &= ~(((uint32_t)SHS_LOOP_LPCH0_Msk | (uint32_t)SHS_LOOP_LPSH0_Msk | (uint32_t)SHS_LOOP_LPEN0_Msk)
1040 << (uint32_t)loop_select);
1041 shs_ptr->LOOP |= ((uint32_t)ch_num | ((uint32_t)group_num << (uint32_t)SHS_LOOP_LPSH0_Pos)) << (uint32_t)loop_select;
1042
1043 }
1044
1045 #endif
1046
1047 #if (XMC_VADC_GSCAN_AVAILABLE == 1U)
1048 /* API to initialize the group scan hardware of a kernel */
XMC_VADC_GROUP_ScanInit(XMC_VADC_GROUP_t * const group_ptr,const XMC_VADC_SCAN_CONFIG_t * config)1049 void XMC_VADC_GROUP_ScanInit(XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_SCAN_CONFIG_t *config)
1050 {
1051 uint32_t reg;
1052
1053 XMC_ASSERT("XMC_VADC_GROUP_ScanInit:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1054
1055 /* All configurations have to be performed with the arbitration slot disabled */
1056 XMC_VADC_GROUP_ScanDisableArbitrationSlot(group_ptr);
1057
1058 /* Read in the existing contents of arbitration priority register */
1059 reg = group_ptr->ARBPR;
1060
1061 /* Program the priority of the request source */
1062 reg &= ~(uint32_t)VADC_G_ARBPR_PRIO1_Msk;
1063 reg |= (uint32_t)((uint32_t)config->req_src_priority << VADC_G_ARBPR_PRIO1_Pos);
1064
1065 /* Program the start mode */
1066 if (XMC_VADC_STARTMODE_WFS != (XMC_VADC_STARTMODE_t)(config->conv_start_mode))
1067 {
1068 reg |= (uint32_t)(VADC_G_ARBPR_CSM1_Msk);
1069 }
1070
1071 group_ptr->ARBPR = reg;
1072
1073 group_ptr->ASCTRL = (uint32_t)(config->asctrl |(VADC_G_ASCTRL_XTWC_Msk) |(VADC_G_ASCTRL_GTWC_Msk) |
1074 (VADC_G_ASCTRL_TMWC_Msk));
1075
1076 group_ptr->ASMR = (uint32_t)((config->asmr)| (uint32_t)((uint32_t)XMC_VADC_GATEMODE_IGNORE << VADC_G_ASMR_ENGT_Pos));
1077
1078 if (XMC_VADC_STARTMODE_CNR == (XMC_VADC_STARTMODE_t)(config->conv_start_mode))
1079 {
1080 group_ptr->ASMR |= (uint32_t)VADC_G_ASMR_RPTDIS_Msk;
1081 }
1082
1083 /* Enable arbitration slot now */
1084 XMC_VADC_GROUP_ScanEnableArbitrationSlot(group_ptr);
1085
1086 }
1087
1088 /* API to select one of the 16 inputs as a trigger input for Group Scan request source */
XMC_VADC_GROUP_ScanSelectTrigger(XMC_VADC_GROUP_t * const group_ptr,XMC_VADC_TRIGGER_INPUT_SELECT_t trigger_input)1089 void XMC_VADC_GROUP_ScanSelectTrigger(XMC_VADC_GROUP_t *const group_ptr, XMC_VADC_TRIGGER_INPUT_SELECT_t trigger_input)
1090 {
1091 uint32_t scanctrl;
1092
1093 XMC_ASSERT("XMC_VADC_GROUP_ScanSelectTrigger:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1094 XMC_ASSERT("XMC_VADC_GROUP_ScanSelectTrigger:Wrong Trigger Port", ((trigger_input)< XMC_VADC_NUM_PORTS))
1095
1096 scanctrl = group_ptr->ASCTRL;
1097 scanctrl |= (uint32_t) VADC_G_ASCTRL_XTWC_Msk;
1098 scanctrl &= ~((uint32_t)VADC_G_ASCTRL_XTSEL_Msk);
1099 scanctrl |= (uint32_t)((uint32_t)trigger_input << VADC_G_ASCTRL_XTSEL_Pos);
1100 group_ptr->ASCTRL = scanctrl;
1101 }
1102
1103 /* Select a trigger edge*/
XMC_VADC_GROUP_ScanSelectTriggerEdge(XMC_VADC_GROUP_t * const group_ptr,const XMC_VADC_TRIGGER_EDGE_t trigger_edge)1104 void XMC_VADC_GROUP_ScanSelectTriggerEdge(XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_TRIGGER_EDGE_t trigger_edge)
1105 {
1106 uint32_t scanctrl;
1107
1108 XMC_ASSERT("XMC_VADC_GROUP_ScanSelectTriggerEdge:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1109 XMC_ASSERT("XMC_VADC_GROUP_ScanSelectTriggerEdge:Wrong Trigger Port", ((trigger_edge)<= XMC_VADC_TRIGGER_EDGE_ANY))
1110
1111 scanctrl = group_ptr->ASCTRL;
1112 scanctrl |= (uint32_t) VADC_G_ASCTRL_XTWC_Msk;
1113 scanctrl &= ~((uint32_t)VADC_G_ASCTRL_XTMODE_Msk);
1114 scanctrl |= (uint32_t)((uint32_t)trigger_edge << VADC_G_ASCTRL_XTMODE_Pos);
1115 group_ptr->ASCTRL = scanctrl;
1116 }
1117
1118 /* API to select one of the 16 inputs as a trigger gating input for Group Scan request source */
XMC_VADC_GROUP_ScanSelectGating(XMC_VADC_GROUP_t * const group_ptr,XMC_VADC_GATE_INPUT_SELECT_t gating_input)1119 void XMC_VADC_GROUP_ScanSelectGating(XMC_VADC_GROUP_t *const group_ptr, XMC_VADC_GATE_INPUT_SELECT_t gating_input)
1120 {
1121 uint32_t scanctrl;
1122
1123 XMC_ASSERT("XMC_VADC_GROUP_ScanSelectGating:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1124 XMC_ASSERT("XMC_VADC_GROUP_ScanSelectGating:Wrong Gating Port", ((gating_input)< XMC_VADC_NUM_PORTS))
1125
1126 scanctrl = group_ptr->ASCTRL;
1127 scanctrl |= (uint32_t)VADC_G_ASCTRL_GTWC_Msk;
1128 scanctrl &= ~((uint32_t)VADC_G_ASCTRL_GTSEL_Msk);
1129 scanctrl |= (uint32_t)((uint32_t)gating_input << VADC_G_ASCTRL_GTSEL_Pos);
1130 group_ptr->ASCTRL = scanctrl;
1131 }
1132
1133 /* API to stop an ongoing conversion of a sequence */
XMC_VADC_GROUP_ScanSequenceAbort(XMC_VADC_GROUP_t * const group_ptr)1134 void XMC_VADC_GROUP_ScanSequenceAbort(XMC_VADC_GROUP_t *const group_ptr)
1135 {
1136 uint32_t asctrl;
1137 bool arbitration_status;
1138
1139 XMC_ASSERT("XMC_VADC_GROUP_ScanSequenceAbort:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1140
1141 /* To disable trigger and gating before abort*/
1142 asctrl = group_ptr->ASCTRL;
1143
1144 group_ptr->ASCTRL =(0U | (uint32_t)VADC_G_ASCTRL_XTWC_Msk |
1145 (uint32_t)VADC_G_ASCTRL_GTWC_Msk | (uint32_t)VADC_G_ASCTRL_TMWC_Msk );
1146
1147 /* To disable Arbitration before abort*/
1148 arbitration_status = (bool)((uint32_t)(group_ptr->ARBPR >> VADC_G_ARBPR_ASEN1_Pos) & 1U);
1149 XMC_VADC_GROUP_ScanDisableArbitrationSlot(group_ptr);
1150
1151 group_ptr->ASMR &= ~((uint32_t)VADC_G_ASMR_ENGT_Msk);
1152 group_ptr->ASMR |= (uint32_t)VADC_G_ASMR_CLRPND_Msk;
1153
1154 /* Enable the arbitration slot 1*/
1155 group_ptr->ARBPR |= (uint32_t)((uint32_t)arbitration_status << VADC_G_ARBPR_ASEN1_Pos);
1156
1157 /* Enable any disabled gating*/
1158 group_ptr->ASCTRL =(asctrl | (uint32_t)VADC_G_ASCTRL_XTWC_Msk |
1159 (uint32_t)VADC_G_ASCTRL_GTWC_Msk | (uint32_t)VADC_G_ASCTRL_TMWC_Msk );
1160 }
1161
1162 /* API to find out number of channels awaiting conversion */
XMC_VADC_GROUP_ScanGetNumChannelsPending(XMC_VADC_GROUP_t * const group_ptr)1163 uint32_t XMC_VADC_GROUP_ScanGetNumChannelsPending(XMC_VADC_GROUP_t *const group_ptr)
1164 {
1165 uint32_t reg;
1166 uint32_t i;
1167 uint32_t count;
1168
1169 XMC_ASSERT("XMC_VADC_GROUP_ScanGetNumChannelsPending:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1170
1171
1172 count = 0U;
1173
1174 if (group_ptr->ASPND)
1175 {
1176 reg = group_ptr->ASPND;
1177
1178 for(i=0U;i<XMC_VADC_NUM_CHANNELS_PER_GROUP;i++)
1179 {
1180 if (reg & 1U)
1181 {
1182 count++;
1183 }
1184 reg = (uint32_t)(reg >> (uint32_t)1);
1185 }
1186 }
1187
1188 return count;
1189 }
1190
1191 /* API to select a service request line (NVIC Node) for request source event */
XMC_VADC_GROUP_ScanSetReqSrcEventInterruptNode(XMC_VADC_GROUP_t * const group_ptr,const XMC_VADC_SR_t sr)1192 void XMC_VADC_GROUP_ScanSetReqSrcEventInterruptNode(XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_SR_t sr)
1193 {
1194 uint32_t sevnp;
1195 sevnp = group_ptr->SEVNP;
1196
1197 XMC_ASSERT("XMC_VADC_GROUP_ScanSetReqSrcEventInterruptNode:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1198 XMC_ASSERT("XMC_VADC_GROUP_ScanSetReqSrcEventInterruptNode:Wrong Service Request", ((sr) <= XMC_VADC_SR_SHARED_SR3))
1199
1200 sevnp &= ~((uint32_t)VADC_G_SEVNP_SEV1NP_Msk);
1201 sevnp |= (uint32_t)((uint32_t)sr << VADC_G_SEVNP_SEV1NP_Pos);
1202
1203 group_ptr->SEVNP = sevnp;
1204 }
1205
1206 /* Removes the selected channel from conversion*/
XMC_VADC_GROUP_ScanRemoveChannel(XMC_VADC_GROUP_t * const group_ptr,const uint32_t channel_num)1207 void XMC_VADC_GROUP_ScanRemoveChannel(XMC_VADC_GROUP_t *const group_ptr, const uint32_t channel_num)
1208 {
1209 uint32_t assel;
1210
1211 XMC_ASSERT("XMC_VADC_GROUP_ScanRemoveChannel:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1212 XMC_ASSERT("XMC_VADC_GROUP_ScanRemoveChannel:Wrong channel number", ((channel_num)< XMC_VADC_NUM_CHANNELS_PER_GROUP))
1213
1214 assel = group_ptr->ASSEL;
1215 assel &= (~( 1 << channel_num));
1216 group_ptr->ASSEL = assel;
1217 }
1218 #endif
1219
1220 /* API to initialize background scan request source hardware */
XMC_VADC_GLOBAL_BackgroundInit(XMC_VADC_GLOBAL_t * const global_ptr,const XMC_VADC_BACKGROUND_CONFIG_t * config)1221 void XMC_VADC_GLOBAL_BackgroundInit(XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_BACKGROUND_CONFIG_t *config)
1222 {
1223 #if (XMC_VADC_GROUP_AVAILABLE ==1U)
1224 uint8_t i;
1225 uint32_t reg;
1226 uint32_t conv_start_mask;
1227 #endif
1228
1229 XMC_ASSERT("XMC_VADC_GLOBAL_BackgroundInit:Wrong Module Pointer", (global_ptr == VADC))
1230
1231 #if (XMC_VADC_GROUP_AVAILABLE ==1U)
1232 for(i=(uint8_t)0; i < XMC_VADC_MAXIMUM_NUM_GROUPS; i++)
1233 {
1234 XMC_VADC_GROUP_BackgroundDisableArbitrationSlot((XMC_VADC_GROUP_t *)g_xmc_vadc_group_array[i]);
1235 }
1236
1237 conv_start_mask = (uint32_t) 0;
1238 if (XMC_VADC_STARTMODE_WFS != (XMC_VADC_STARTMODE_t)config->conv_start_mode)
1239 {
1240 conv_start_mask = (uint32_t)VADC_G_ARBPR_CSM2_Msk;
1241 }
1242
1243 for(i=0U; i < XMC_VADC_MAXIMUM_NUM_GROUPS; i++)
1244 {
1245 reg = g_xmc_vadc_group_array[i]->ARBPR;
1246
1247 reg &= ~(uint32_t)(VADC_G_ARBPR_PRIO2_Msk);
1248
1249 /* Program the priority of the request source */
1250 reg |= (uint32_t)((uint32_t)config->req_src_priority << VADC_G_ARBPR_PRIO2_Pos);
1251
1252 /* Program the start mode */
1253 reg |= conv_start_mask;
1254
1255 g_xmc_vadc_group_array[i]->ARBPR = reg;
1256
1257 }
1258 #endif
1259
1260 /* program BRSCTRL register */
1261 global_ptr->BRSCTRL = (uint32_t)(config->asctrl | (uint32_t)VADC_BRSCTRL_XTWC_Msk | (uint32_t)VADC_BRSCTRL_GTWC_Msk);
1262
1263 /* program BRSMR register */
1264 global_ptr->BRSMR = (uint32_t)((config->asmr)| (uint32_t)((uint32_t)XMC_VADC_GATEMODE_IGNORE << VADC_BRSMR_ENGT_Pos));
1265
1266 #if (XMC_VADC_GROUP_AVAILABLE ==1U)
1267 if (XMC_VADC_STARTMODE_CNR == (XMC_VADC_STARTMODE_t)(config->conv_start_mode))
1268 {
1269 global_ptr->BRSMR |= (uint32_t)VADC_BRSMR_RPTDIS_Msk;
1270 }
1271 #endif
1272
1273 #if (XMC_VADC_GROUP_AVAILABLE ==1U)
1274 for(i=(uint8_t)0; i < XMC_VADC_MAXIMUM_NUM_GROUPS; i++)
1275 {
1276 XMC_VADC_GROUP_BackgroundEnableArbitrationSlot((XMC_VADC_GROUP_t *)g_xmc_vadc_group_array[i]);
1277 }
1278 #endif
1279
1280 }
1281
1282 /* API to select one of the 16 inputs as a trigger for background scan request source */
XMC_VADC_GLOBAL_BackgroundSelectTrigger(XMC_VADC_GLOBAL_t * const global_ptr,const uint32_t input_num)1283 void XMC_VADC_GLOBAL_BackgroundSelectTrigger(XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t input_num)
1284 {
1285 uint32_t scanctrl;
1286
1287 XMC_ASSERT("VADC_BCKGND_SelectTriggerInput:Wrong Module Pointer", (global_ptr == VADC))
1288 XMC_ASSERT("XMC_VADC_GLOBAL_BackgroundSelectTrigger:Wrong Trigger Port", ((input_num)< XMC_VADC_NUM_PORTS))
1289
1290
1291 scanctrl = global_ptr->BRSCTRL;
1292 scanctrl |= (uint32_t)VADC_BRSCTRL_XTWC_Msk;
1293 scanctrl &= ~((uint32_t)VADC_BRSCTRL_XTSEL_Msk);
1294 scanctrl |= (uint32_t)(input_num << VADC_BRSCTRL_XTSEL_Pos);
1295 global_ptr->BRSCTRL = scanctrl;
1296 }
1297
1298 /* Select a trigger edge*/
XMC_VADC_GLOBAL_BackgroundSelectTriggerEdge(XMC_VADC_GLOBAL_t * const global_ptr,const XMC_VADC_TRIGGER_EDGE_t trigger_edge)1299 void XMC_VADC_GLOBAL_BackgroundSelectTriggerEdge(XMC_VADC_GLOBAL_t *const global_ptr,
1300 const XMC_VADC_TRIGGER_EDGE_t trigger_edge)
1301 {
1302 uint32_t scanctrl;
1303
1304 XMC_ASSERT("XMC_VADC_GLOBAL_BackgroundSelectTriggerEdge:Wrong Global Pointer", (global_ptr == VADC))
1305 XMC_ASSERT("XMC_VADC_GLOBAL_BackgroundSelectTriggerEdge:Wrong Trigger Port",
1306 ((trigger_edge)<= XMC_VADC_TRIGGER_EDGE_ANY))
1307
1308 scanctrl = global_ptr->BRSCTRL;
1309 scanctrl |= (uint32_t) VADC_BRSCTRL_XTWC_Msk;
1310 scanctrl &= ~((uint32_t)VADC_BRSCTRL_XTMODE_Msk);
1311 scanctrl |= (uint32_t)((uint32_t)trigger_edge << VADC_BRSCTRL_XTMODE_Pos);
1312 global_ptr->BRSCTRL = scanctrl;
1313 }
1314
1315
1316 /* API to select one of the 16 inputs as a trigger gate for background scan request source */
XMC_VADC_GLOBAL_BackgroundSelectGating(XMC_VADC_GLOBAL_t * const global_ptr,const uint32_t input_num)1317 void XMC_VADC_GLOBAL_BackgroundSelectGating(XMC_VADC_GLOBAL_t *const global_ptr, const uint32_t input_num)
1318 {
1319 uint32_t scanctrl;
1320
1321 XMC_ASSERT("XMC_VADC_GLOBAL_BackgroundSelectGating:Wrong Module Pointer", (global_ptr == VADC))
1322 XMC_ASSERT("XMC_VADC_GLOBAL_BackgroundSelectGating:Wrong Gating Port", ((input_num)< XMC_VADC_NUM_PORTS))
1323
1324 scanctrl = global_ptr->BRSCTRL;
1325 scanctrl |= (uint32_t)VADC_BRSCTRL_GTWC_Msk;
1326 scanctrl &= ~((uint32_t)VADC_BRSCTRL_GTSEL_Msk);
1327 scanctrl |= (uint32_t)(input_num << VADC_BRSCTRL_GTSEL_Pos);
1328 global_ptr->BRSCTRL = scanctrl;
1329 }
1330
1331 /* API to abort ongoing conversion of a sequence */
XMC_VADC_GLOBAL_BackgroundAbortSequence(XMC_VADC_GLOBAL_t * const global_ptr)1332 void XMC_VADC_GLOBAL_BackgroundAbortSequence(XMC_VADC_GLOBAL_t *const global_ptr)
1333 {
1334 uint32_t brsctrl;
1335 #if (XMC_VADC_GROUP_AVAILABLE ==1U)
1336 uint32_t i;
1337 uint8_t grp_asen2_flag[XMC_VADC_MAXIMUM_NUM_GROUPS];
1338 #endif
1339 XMC_ASSERT("XMC_VADC_GLOBAL_BackgroundAbortSequence:Wrong Module Pointer", (global_ptr == VADC))
1340
1341 /* To disable trigger and gating before abort*/
1342 brsctrl = global_ptr->BRSCTRL;
1343
1344 global_ptr->BRSCTRL =(0U | (uint32_t)VADC_BRSCTRL_XTWC_Msk | (uint32_t)VADC_BRSCTRL_GTWC_Msk);
1345
1346 /* Disable Background Request source */
1347
1348 #if (XMC_VADC_GROUP_AVAILABLE ==1U)
1349 for(i=(uint8_t)0; i < XMC_VADC_MAXIMUM_NUM_GROUPS; i++)
1350 {
1351 grp_asen2_flag[i] = (uint8_t)(g_xmc_vadc_group_array[i]->ARBPR >> VADC_G_ARBPR_ASEN2_Pos);
1352 XMC_VADC_GROUP_BackgroundDisableArbitrationSlot((XMC_VADC_GROUP_t *)g_xmc_vadc_group_array[i]);
1353 }
1354 #endif
1355
1356 /* Abort the ongoing sequence */
1357 global_ptr->BRSMR |= (uint32_t)VADC_BRSMR_CLRPND_Msk;
1358
1359 #if (XMC_VADC_GROUP_AVAILABLE ==1U)
1360 /* Enable Background Request source */
1361 for(i=(uint8_t)0; i < XMC_VADC_MAXIMUM_NUM_GROUPS; i++)
1362 {
1363 if ((uint8_t)1 == grp_asen2_flag[i])
1364 {
1365 XMC_VADC_GROUP_BackgroundEnableArbitrationSlot((XMC_VADC_GROUP_t*)g_xmc_vadc_group_array[i]);
1366 }
1367 }
1368 #endif
1369
1370 /* Re-enable any disabled trigger and gating*/
1371 global_ptr->BRSCTRL =(brsctrl | (uint32_t)VADC_BRSCTRL_XTWC_Msk | (uint32_t)VADC_BRSCTRL_GTWC_Msk);
1372 }
1373
1374 /* API to determine how many channels are awaiting conversion */
XMC_VADC_GLOBAL_BackgroundGetNumChannelsPending(XMC_VADC_GLOBAL_t * const global_ptr)1375 uint32_t XMC_VADC_GLOBAL_BackgroundGetNumChannelsPending(XMC_VADC_GLOBAL_t *const global_ptr)
1376 {
1377 uint32_t reg;
1378 uint32_t i;
1379 uint32_t j;
1380 uint32_t count;
1381
1382 XMC_ASSERT("XMC_VADC_GLOBAL_BackgroundGetNumChannelsPending:Wrong Module Pointer", (global_ptr == VADC))
1383
1384 count = 0U;
1385
1386 /* Loop through all groups and find out who is awaiting conversion */
1387 for(i = 0U; i < XMC_VADC_MAXIMUM_NUM_GROUPS; i++)
1388 {
1389 if (global_ptr->BRSSEL[i])
1390 {
1391 reg = global_ptr->BRSPND[i];
1392
1393 for(j=0U;j<XMC_VADC_NUM_CHANNELS_PER_GROUP;j++)
1394 {
1395 if (reg & 1U)
1396 {
1397 count++;
1398 }
1399
1400 reg = reg >> 1U;
1401 }
1402 }
1403 }
1404
1405 return count;
1406 }
1407
1408 #if (XMC_VADC_QUEUE_AVAILABLE == 1U)
1409 /* API to initialize queue request source */
XMC_VADC_GROUP_QueueInit(XMC_VADC_GROUP_t * const group_ptr,const XMC_VADC_QUEUE_CONFIG_t * config)1410 void XMC_VADC_GROUP_QueueInit(XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_QUEUE_CONFIG_t *config)
1411 {
1412 uint32_t reg;
1413
1414 XMC_ASSERT("XMC_VADC_GROUP_QueueInit:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1415
1416 /* Disable arbitration slot of the queue request source */
1417 XMC_VADC_GROUP_QueueDisableArbitrationSlot(group_ptr);
1418
1419 reg = group_ptr->ARBPR;
1420
1421 /* Request Source priority */
1422 reg &= ~((uint32_t)VADC_G_ARBPR_PRIO0_Msk);
1423 reg |= (uint32_t) ((uint32_t)config->req_src_priority << VADC_G_ARBPR_PRIO0_Pos);
1424
1425 /* Conversion Start mode */
1426 if (XMC_VADC_STARTMODE_WFS != (XMC_VADC_STARTMODE_t)config->conv_start_mode)
1427 {
1428 reg |= (uint32_t)(VADC_G_ARBPR_CSM0_Msk);
1429 }
1430
1431 group_ptr->ARBPR = reg;
1432
1433
1434 group_ptr->QCTRL0 = (uint32_t)((config->qctrl0)|(uint32_t)(VADC_G_QCTRL0_XTWC_Msk)|
1435 (uint32_t)(VADC_G_QCTRL0_TMWC_Msk)|
1436 (uint32_t)(VADC_G_QCTRL0_GTWC_Msk));
1437
1438 /* Gating mode */
1439 group_ptr->QMR0 = ((uint32_t)(config->qmr0) | (uint32_t)((uint32_t)XMC_VADC_GATEMODE_IGNORE << VADC_G_QMR0_ENGT_Pos));
1440
1441 if (XMC_VADC_STARTMODE_CNR == (XMC_VADC_STARTMODE_t)(config->conv_start_mode) )
1442 {
1443 group_ptr->QMR0 |= (uint32_t)((uint32_t)1 << VADC_G_QMR0_RPTDIS_Pos);
1444 }
1445 /* Enable arbitration slot for the queue request source */
1446 XMC_VADC_GROUP_QueueEnableArbitrationSlot(group_ptr);
1447
1448 }
1449
1450 /* API to select one of the 16 possible triggers as a conversion trigger for queue request source */
XMC_VADC_GROUP_QueueSelectTrigger(XMC_VADC_GROUP_t * const group_ptr,const XMC_VADC_TRIGGER_INPUT_SELECT_t input_num)1451 void XMC_VADC_GROUP_QueueSelectTrigger(XMC_VADC_GROUP_t *const group_ptr,
1452 const XMC_VADC_TRIGGER_INPUT_SELECT_t input_num)
1453 {
1454 uint32_t qctrl;
1455
1456 XMC_ASSERT("XMC_VADC_GROUP_QueueSelectTrigger:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1457 XMC_ASSERT("XMC_VADC_GROUP_QueueSelectTrigger:Wrong Trigger Port", ((input_num)< XMC_VADC_NUM_PORTS))
1458
1459
1460 /* Now select the conversion trigger */
1461 qctrl = group_ptr->QCTRL0;
1462 qctrl |= (uint32_t)VADC_G_QCTRL0_XTWC_Msk;
1463 qctrl &= ~((uint32_t)VADC_G_QCTRL0_XTSEL_Msk);
1464 qctrl |= (uint32_t)((uint32_t)input_num << VADC_G_QCTRL0_XTSEL_Pos);
1465 group_ptr->QCTRL0 = qctrl;
1466 }
1467
1468 /* Select a trigger edge*/
XMC_VADC_GROUP_QueueSelectTriggerEdge(XMC_VADC_GROUP_t * const group_ptr,const XMC_VADC_TRIGGER_EDGE_t trigger_edge)1469 void XMC_VADC_GROUP_QueueSelectTriggerEdge(XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_TRIGGER_EDGE_t trigger_edge)
1470 {
1471 uint32_t qctrl;
1472
1473 XMC_ASSERT("XMC_VADC_GROUP_QueueSelectTriggerEdge:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1474 XMC_ASSERT("XMC_VADC_GROUP_QueueSelectTriggerEdge:Wrong Gating Port", ((trigger_edge)<= XMC_VADC_TRIGGER_EDGE_ANY))
1475
1476 /* Now select the gating input */
1477 qctrl = group_ptr->QCTRL0;
1478 qctrl |= (uint32_t)VADC_G_QCTRL0_XTWC_Msk;
1479 qctrl &= ~((uint32_t)VADC_G_QCTRL0_XTMODE_Msk);
1480 qctrl |= (uint32_t)((uint32_t)trigger_edge << VADC_G_QCTRL0_XTMODE_Pos);
1481 group_ptr->QCTRL0 = qctrl;
1482 }
1483
1484 /* API to select one of the 16 possible trigger gates as a trigger gating signal for queue request source */
XMC_VADC_GROUP_QueueSelectGating(XMC_VADC_GROUP_t * const group_ptr,const XMC_VADC_GATE_INPUT_SELECT_t input_num)1485 void XMC_VADC_GROUP_QueueSelectGating(XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_GATE_INPUT_SELECT_t input_num)
1486 {
1487 uint32_t qctrl;
1488
1489 XMC_ASSERT("XMC_VADC_GROUP_QueueSelectGating:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1490 XMC_ASSERT("XMC_VADC_GROUP_QueueSelectGating:Wrong Gating Port", ((input_num)< XMC_VADC_NUM_PORTS))
1491
1492 /* Now select the gating input */
1493 qctrl = group_ptr->QCTRL0;
1494 qctrl |= (uint32_t)VADC_G_QCTRL0_GTWC_Msk;
1495 qctrl &= ~((uint32_t)VADC_G_QCTRL0_GTSEL_Msk);
1496 qctrl |= (uint32_t)((uint32_t)input_num << VADC_G_QCTRL0_GTSEL_Pos);
1497 group_ptr->QCTRL0 = qctrl;
1498 }
1499
1500 /* API to determine the number of channels in the queue (length includes the valid channel in the Backup register)*/
XMC_VADC_GROUP_QueueGetLength(XMC_VADC_GROUP_t * const group_ptr)1501 uint32_t XMC_VADC_GROUP_QueueGetLength(XMC_VADC_GROUP_t *const group_ptr)
1502 {
1503 uint32_t qsr;
1504 uint32_t qbur0;
1505 uint32_t length;
1506
1507 XMC_ASSERT("XMC_VADC_GROUP_QueueGetLength:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1508
1509 qsr = group_ptr->QSR0;
1510 qbur0 = group_ptr->QBUR0;
1511
1512 if (qsr & (uint32_t)VADC_G_QSR0_EMPTY_Msk)
1513 {
1514 length = 0U;
1515 }
1516 else
1517 {
1518 length = (qsr & (uint32_t)VADC_G_QSR0_FILL_Msk) + 1U;
1519 }
1520
1521 if (qbur0 & (uint32_t)VADC_G_QBUR0_V_Msk )
1522 {
1523 length++;
1524 }
1525
1526 return length;
1527 }
1528
1529 /* API to abort ongoing conversion of a channel sequence */
XMC_VADC_GROUP_QueueAbortSequence(XMC_VADC_GROUP_t * const group_ptr)1530 void XMC_VADC_GROUP_QueueAbortSequence(XMC_VADC_GROUP_t *const group_ptr)
1531 {
1532 uint32_t qctrl0;
1533 bool arbitration_status;
1534
1535 XMC_ASSERT("XMC_VADC_GROUP_QueueAbortSequence:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1536
1537 /* Disable any gating if present*/
1538 qctrl0 = group_ptr->QCTRL0;
1539
1540 group_ptr->QCTRL0 =(0U | (uint32_t)VADC_G_QCTRL0_XTWC_Msk |
1541 (uint32_t)VADC_G_QCTRL0_GTWC_Msk | (uint32_t)VADC_G_QCTRL0_TMWC_Msk );
1542
1543 /* Disable the Arbitration 0 in the group before abort*/
1544 arbitration_status = (bool)((uint32_t)(group_ptr->ARBPR >> VADC_G_ARBPR_ASEN0_Pos) & 1U);
1545 XMC_VADC_GROUP_QueueDisableArbitrationSlot(group_ptr);
1546
1547 /* Flush the Entries from queue*/
1548 XMC_VADC_GROUP_QueueFlushEntries(group_ptr);
1549
1550 /* Enable the arbitration slot 0*/
1551 group_ptr->ARBPR |= (uint32_t)((uint32_t)arbitration_status << VADC_G_ARBPR_ASEN0_Pos);
1552
1553 /* Enable any disabled gating*/
1554 group_ptr->QCTRL0 = (qctrl0 | (uint32_t)VADC_G_QCTRL0_XTWC_Msk |
1555 (uint32_t)VADC_G_QCTRL0_GTWC_Msk | (uint32_t)VADC_G_QCTRL0_TMWC_Msk );
1556 }
1557
1558 /* API to abort conversion of the channel queued up next */
XMC_VADC_GROUP_QueueRemoveChannel(XMC_VADC_GROUP_t * const group_ptr)1559 void XMC_VADC_GROUP_QueueRemoveChannel(XMC_VADC_GROUP_t *const group_ptr)
1560 {
1561 uint32_t length_before_abort;
1562 uint32_t length_after_abort;
1563 uint32_t qctrl0;
1564 bool arbitration_status;
1565
1566 XMC_ASSERT("XMC_VADC_GROUP_QueueRemoveChannel:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1567
1568 /* Disable any gating if present*/
1569 qctrl0= group_ptr->QCTRL0;
1570
1571 group_ptr->QCTRL0 =(0U | (uint32_t)VADC_G_QCTRL0_XTWC_Msk |
1572 (uint32_t)VADC_G_QCTRL0_GTWC_Msk | (uint32_t)VADC_G_QCTRL0_TMWC_Msk );
1573
1574 /* Disable the Arbitration 0 in the group before abort*/
1575 arbitration_status = (bool)((uint32_t)(group_ptr->ARBPR >> VADC_G_ARBPR_ASEN0_Pos) & 1U);
1576 XMC_VADC_GROUP_QueueDisableArbitrationSlot(group_ptr);
1577
1578 length_before_abort = XMC_VADC_GROUP_QueueGetLength(group_ptr);
1579
1580 if (length_before_abort)
1581 {
1582 /* Remove the first entry of the queue */
1583 group_ptr->QMR0 |= (uint32_t)VADC_G_QMR0_CLRV_Msk;
1584
1585 length_after_abort = XMC_VADC_GROUP_QueueGetLength(group_ptr);
1586
1587 /* Loop until a reduction in queue length is assessed */
1588 while(length_after_abort == length_before_abort)
1589 {
1590 length_after_abort = XMC_VADC_GROUP_QueueGetLength(group_ptr);
1591 }
1592 }
1593 /* Enable the arbitration slot 0*/
1594 group_ptr->ARBPR |= (uint32_t)((uint32_t)arbitration_status << VADC_G_ARBPR_ASEN0_Pos);
1595
1596 /* Enable any disabled gating*/
1597 group_ptr->QCTRL0 = (qctrl0 | (uint32_t)VADC_G_QCTRL0_XTWC_Msk |
1598 (uint32_t)VADC_G_QCTRL0_GTWC_Msk | (uint32_t)VADC_G_QCTRL0_TMWC_Msk );
1599 }
1600
1601 /* Get details of channel meant to be converted right after the ongoing conversion */
XMC_VADC_GROUP_QueueGetNextChannel(XMC_VADC_GROUP_t * const group_ptr)1602 int32_t XMC_VADC_GROUP_QueueGetNextChannel(XMC_VADC_GROUP_t *const group_ptr)
1603 {
1604 int32_t ch_num;
1605
1606 XMC_ASSERT("XMC_VADC_GROUP_QueueGetNextChannel:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1607
1608 /*
1609 * Check if there is something in the backup stage. If not, read queue-0
1610 * entry.
1611 */
1612 if ( (group_ptr->QBUR0) & (uint32_t)VADC_G_QBUR0_V_Msk)
1613 {
1614 ch_num = (int32_t)(group_ptr->QBUR0 & (uint32_t)VADC_G_QBUR0_REQCHNR_Msk);
1615 }
1616 else if ( (group_ptr->Q0R0) & (uint32_t)VADC_G_Q0R0_V_Msk)
1617 {
1618 ch_num = (int32_t)(group_ptr->Q0R0 & (uint32_t)VADC_G_Q0R0_REQCHNR_Msk);
1619 }
1620 else
1621 {
1622 /* Nothing is pending */
1623 ch_num = -1;
1624 }
1625
1626 return ch_num;
1627 }
1628
1629 /* Get the channel number of the channel whose conversion had been interrupted */
XMC_VADC_GROUP_QueueGetInterruptedChannel(XMC_VADC_GROUP_t * const group_ptr)1630 int32_t XMC_VADC_GROUP_QueueGetInterruptedChannel(XMC_VADC_GROUP_t *const group_ptr)
1631 {
1632 int32_t ch_num;
1633
1634 XMC_ASSERT("XMC_VADC_GROUP_QueueGetInterruptedChannel:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1635
1636 if ((group_ptr->QBUR0) & (uint32_t)VADC_G_QBUR0_V_Msk)
1637 {
1638 ch_num = (int32_t)(group_ptr->QBUR0 & (uint32_t)VADC_G_QBUR0_REQCHNR_Msk);
1639 }
1640 else
1641 {
1642 /* No such channel */
1643 ch_num = -1;
1644 }
1645
1646 return ch_num;
1647 }
1648
1649 /* Select a Service Request line for the request source event */
XMC_VADC_GROUP_QueueSetReqSrcEventInterruptNode(XMC_VADC_GROUP_t * const group_ptr,const XMC_VADC_SR_t sr)1650 void XMC_VADC_GROUP_QueueSetReqSrcEventInterruptNode(XMC_VADC_GROUP_t *const group_ptr, const XMC_VADC_SR_t sr)
1651 {
1652 uint32_t sevnp;
1653
1654 XMC_ASSERT("XMC_VADC_GROUP_QueueSetReqSrcEventInterruptNode:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1655 XMC_ASSERT("XMC_VADC_GROUP_QueueSetReqSrcEventInterruptNode:Wrong Service Request", ((sr) <= XMC_VADC_SR_SHARED_SR3))
1656
1657 sevnp = group_ptr->SEVNP;
1658
1659 sevnp &= ~((uint32_t)VADC_G_SEVNP_SEV0NP_Msk);
1660 sevnp |= (uint32_t)((uint32_t)sr << VADC_G_SEVNP_SEV0NP_Pos);
1661
1662 group_ptr->SEVNP = sevnp;
1663
1664 }
1665 #endif
1666
1667 #if (XMC_VADC_GROUP_AVAILABLE ==1U)
1668 /* API to initialize a channel unit */
XMC_VADC_GROUP_ChannelInit(XMC_VADC_GROUP_t * const group_ptr,const uint32_t ch_num,const XMC_VADC_CHANNEL_CONFIG_t * config)1669 void XMC_VADC_GROUP_ChannelInit(XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num,
1670 const XMC_VADC_CHANNEL_CONFIG_t *config)
1671 {
1672 uint32_t prio;
1673 uint32_t ch_assign;
1674 uint32_t mask;
1675
1676
1677 XMC_ASSERT("XMC_VADC_GROUP_ChannelInit:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1678 XMC_ASSERT("XMC_VADC_GROUP_ChannelInit:Wrong Channel Number", ((ch_num) < XMC_VADC_NUM_CHANNELS_PER_GROUP))
1679
1680 prio = (uint32_t)config->channel_priority;
1681
1682 /* Priority channel */
1683 ch_assign = group_ptr->CHASS;
1684 ch_assign &= ~((uint32_t)((uint32_t)1 << ch_num));
1685 ch_assign |= (uint32_t)(prio << ch_num);
1686 group_ptr->CHASS = ch_assign;
1687
1688 /* Alias channel */
1689 if (config->alias_channel >= (int32_t)0)
1690 {
1691 mask = (uint32_t)0;
1692 if ((uint32_t)1 == ch_num)
1693 {
1694 mask = VADC_G_ALIAS_ALIAS1_Pos;
1695 group_ptr->ALIAS &= ~(uint32_t)(VADC_G_ALIAS_ALIAS1_Msk);
1696 }
1697 else if ((uint32_t)0 == ch_num)
1698 {
1699 mask = VADC_G_ALIAS_ALIAS0_Pos;
1700 group_ptr->ALIAS &= ~(uint32_t)(VADC_G_ALIAS_ALIAS0_Msk);
1701 }
1702
1703 group_ptr->ALIAS |= (uint32_t)(config->alias_channel << mask);
1704 }
1705
1706 group_ptr->BFL |= config->bfl;
1707
1708 #if (XMC_VADC_BOUNDARY_FLAG_SELECT == 1U)
1709 group_ptr->BFLC |= config->bflc;
1710 #endif
1711 /* Program the CHCTR register */
1712 group_ptr->CHCTR[ch_num] = config->chctr;
1713
1714 }
1715
1716 /* API to determine whether input to a channel has violated boundary conditions */
XMC_VADC_GROUP_ChannelIsResultOutOfBounds(XMC_VADC_GROUP_t * const group_ptr,const uint32_t ch_num)1717 bool XMC_VADC_GROUP_ChannelIsResultOutOfBounds(XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
1718 {
1719 bool retval;
1720 uint32_t chctr;
1721 uint32_t ceflag;
1722
1723 XMC_ASSERT("XMC_VADC_GROUP_ChannelIsResultOutOfBounds:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1724 XMC_ASSERT("XMC_VADC_GROUP_ChannelIsResultOutOfBounds:Wrong Channel Number",
1725 ((ch_num) < XMC_VADC_NUM_CHANNELS_PER_GROUP))
1726
1727 retval = (bool)false;
1728 /*
1729 Check if the Channel event is configured to be generated in the event of
1730 boundary violation and if affirmative, check if the channel event is set.
1731 */
1732 /* Extract CHEVMODE for requested channel */
1733 chctr = group_ptr->CHCTR[ch_num];
1734 chctr = (uint32_t)(chctr >> (uint32_t)VADC_G_CHCTR_CHEVMODE_Pos)& (uint32_t)0x3;
1735
1736 /* Extract CEFLAG for the requested channel */
1737 ceflag = group_ptr->CEFLAG;
1738 ceflag = ceflag & ((uint32_t)((uint32_t)1 << ch_num) );
1739
1740 /* Check what was the channel event generation criteria */
1741 if ( (( (uint32_t)XMC_VADC_CHANNEL_EVGEN_INBOUND == chctr) \
1742 || ((uint32_t) XMC_VADC_CHANNEL_EVGEN_OUTBOUND == chctr)) && (ceflag) )
1743 {
1744 retval = (bool)true;
1745 }
1746
1747 return retval;
1748 }
1749
1750 /* Set a reference voltage for conversion */
XMC_VADC_GROUP_ChannelSetInputReference(XMC_VADC_GROUP_t * const group_ptr,const uint32_t ch_num,const XMC_VADC_CHANNEL_REF_t ref)1751 void XMC_VADC_GROUP_ChannelSetInputReference(XMC_VADC_GROUP_t *const group_ptr,
1752 const uint32_t ch_num,
1753 const XMC_VADC_CHANNEL_REF_t ref)
1754 {
1755 uint32_t chctr;
1756 XMC_ASSERT("XMC_VADC_GROUP_ChannelSetInputReference:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1757 XMC_ASSERT("XMC_VADC_GROUP_ChannelSetInputReference:Wrong Channel Number", ((ch_num) < XMC_VADC_NUM_CHANNELS_PER_GROUP))
1758 XMC_ASSERT("XMC_VADC_GROUP_ChannelSetInputReference:Wrong Voltage Reference", ((ref)<= XMC_VADC_CHANNEL_REF_ALT_CH0))
1759
1760 chctr = group_ptr->CHCTR[ch_num];
1761 chctr &= ~((uint32_t)VADC_G_CHCTR_REFSEL_Msk);
1762 chctr |= (uint32_t)((uint32_t)ref << VADC_G_CHCTR_REFSEL_Pos);
1763
1764 group_ptr->CHCTR[ch_num] = chctr;
1765 }
1766
1767 /* API to select one of the available 16 registers for storing the channel result */
XMC_VADC_GROUP_ChannelSetResultRegister(XMC_VADC_GROUP_t * const group_ptr,const uint32_t ch_num,const uint32_t result_reg_num)1768 void XMC_VADC_GROUP_ChannelSetResultRegister(XMC_VADC_GROUP_t *const group_ptr,
1769 const uint32_t ch_num,
1770 const uint32_t result_reg_num)
1771 {
1772 uint32_t chctr;
1773
1774 XMC_ASSERT("XMC_VADC_GROUP_ChannelSetResultRegister:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1775 XMC_ASSERT("XMC_VADC_GROUP_ChannelSetResultRegister:Wrong Channel Number",
1776 ((ch_num) < XMC_VADC_NUM_CHANNELS_PER_GROUP))
1777 XMC_ASSERT("XMC_VADC_GROUP_ChannelSetResultRegister:Wrong Result Register",
1778 ((result_reg_num) < XMC_VADC_NUM_RESULT_REGISTERS))
1779
1780 chctr = group_ptr->CHCTR[ch_num];
1781 chctr &= ~((uint32_t)VADC_G_CHCTR_RESREG_Msk);
1782 chctr |= (uint32_t)(result_reg_num << VADC_G_CHCTR_RESREG_Pos);
1783
1784 group_ptr->CHCTR[ch_num] = chctr;
1785 }
1786
1787 /* API to select one of the available 4 class conversion */
XMC_VADC_GROUP_ChannelSetIclass(XMC_VADC_GROUP_t * const group_ptr,const uint32_t ch_num,const XMC_VADC_CHANNEL_CONV_t conversion_class)1788 void XMC_VADC_GROUP_ChannelSetIclass(XMC_VADC_GROUP_t *const group_ptr,
1789 const uint32_t ch_num,
1790 const XMC_VADC_CHANNEL_CONV_t conversion_class)
1791 {
1792
1793 uint32_t chctr;
1794
1795 XMC_ASSERT("XMC_VADC_GROUP_ChannelSetIclass:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1796 XMC_ASSERT("XMC_VADC_GROUP_ChannelSetIclass:Wrong Channel Number",
1797 ((ch_num) < XMC_VADC_NUM_CHANNELS_PER_GROUP))
1798 XMC_ASSERT("XMC_VADC_GROUP_ChannelSetIclass:Wrong input class ",
1799 (XMC_VADC_CHANNEL_CONV_GLOBAL_CLASS1 >= conversion_class))
1800
1801 chctr = group_ptr->CHCTR[ch_num];
1802 chctr &= ~((uint32_t)VADC_G_CHCTR_ICLSEL_Msk);
1803 chctr |= (uint32_t)((uint32_t)conversion_class << (uint32_t)VADC_G_CHCTR_ICLSEL_Pos);
1804
1805 group_ptr->CHCTR[ch_num] = chctr;
1806
1807 }
1808
1809 /* API to retrieve the result register bound with specified channel */
XMC_VADC_GROUP_ChannelGetResultRegister(XMC_VADC_GROUP_t * const group_ptr,const uint32_t ch_num)1810 uint8_t XMC_VADC_GROUP_ChannelGetResultRegister(XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
1811 {
1812 uint8_t resreg;
1813
1814 XMC_ASSERT("XMC_VADC_GROUP_ChannelGetResultRegister:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1815 XMC_ASSERT("XMC_VADC_GROUP_ChannelGetResultRegister:Wrong Channel Number",
1816 ((ch_num) < XMC_VADC_NUM_CHANNELS_PER_GROUP))
1817
1818 resreg = (uint8_t)((group_ptr->CHCTR[ch_num] & (uint32_t)VADC_G_CHCTR_RESREG_Msk) >> VADC_G_CHCTR_RESREG_Pos) ;
1819
1820 return resreg;
1821 }
1822
1823 /* API to manually assert channel event */
XMC_VADC_GROUP_ChannelTriggerEvent(XMC_VADC_GROUP_t * const group_ptr,const uint32_t ch_num)1824 void XMC_VADC_GROUP_ChannelTriggerEvent(XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num)
1825 {
1826 uint32_t ceflag;
1827
1828 XMC_ASSERT("XMC_VADC_GROUP_ChannelTriggerEvent:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1829 XMC_ASSERT("XMC_VADC_GROUP_ChannelTriggerEvent:Wrong Channel Number", ((ch_num) < XMC_VADC_NUM_CHANNELS_PER_GROUP))
1830
1831 ceflag = group_ptr->CEFLAG;
1832 ceflag |= (uint32_t)((uint32_t)1 << ch_num);
1833 group_ptr->CEFLAG = ceflag;
1834 }
1835
1836 /* API to bind channel event with a service request (NVIC Node) */
XMC_VADC_GROUP_ChannelSetEventInterruptNode(XMC_VADC_GROUP_t * const group_ptr,const uint32_t ch_num,const XMC_VADC_SR_t sr)1837 void XMC_VADC_GROUP_ChannelSetEventInterruptNode(XMC_VADC_GROUP_t *const group_ptr,
1838 const uint32_t ch_num,
1839 const XMC_VADC_SR_t sr)
1840 {
1841 uint32_t route_mask;
1842
1843 XMC_ASSERT("XMC_VADC_GROUP_ChannelSetEventInterruptNode:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1844 XMC_ASSERT("XMC_VADC_GROUP_ChannelSetEventInterruptNode:Wrong Channel Number",
1845 ((ch_num) < XMC_VADC_NUM_CHANNELS_PER_GROUP))
1846 XMC_ASSERT("XMC_VADC_GROUP_ChannelSetEventInterruptNode:Wrong Service Request", ((sr) <= XMC_VADC_SR_SHARED_SR3))
1847
1848 route_mask = group_ptr->CEVNP0;
1849 route_mask &= ~((uint32_t)15 << (ch_num * (uint32_t)4));
1850 route_mask |= (uint32_t)( (uint32_t)sr << (ch_num * (uint32_t)4));
1851 group_ptr->CEVNP0 = route_mask;
1852 }
1853
1854 /* API to configure conditions for generation of channel event */
XMC_VADC_GROUP_ChannelTriggerEventGenCriteria(XMC_VADC_GROUP_t * const group_ptr,const uint32_t ch_num,const XMC_VADC_CHANNEL_EVGEN_t criteria)1855 void XMC_VADC_GROUP_ChannelTriggerEventGenCriteria( XMC_VADC_GROUP_t *const group_ptr,
1856 const uint32_t ch_num,
1857 const XMC_VADC_CHANNEL_EVGEN_t criteria)
1858 {
1859 uint32_t chctr;
1860
1861 XMC_ASSERT("XMC_VADC_GROUP_ChannelTriggerEventGenCriteria:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1862 XMC_ASSERT("XMC_VADC_GROUP_ChannelTriggerEventGenCriteria:Wrong Channel Number",
1863 ((ch_num) < XMC_VADC_NUM_CHANNELS_PER_GROUP))
1864 XMC_ASSERT("XMC_VADC_GROUP_ChannelTriggerEventGenCriteria:Wrong Event Generation Criteria",
1865 ((criteria) <= XMC_VADC_CHANNEL_EVGEN_ALWAYS))
1866
1867 chctr = group_ptr->CHCTR[ch_num];
1868 chctr &= ~((uint32_t)VADC_G_CHCTR_CHEVMODE_Msk);
1869 chctr |= (uint32_t)((uint32_t)criteria << VADC_G_CHCTR_CHEVMODE_Pos);
1870 group_ptr->CHCTR[ch_num] = chctr;
1871 }
1872
1873 /* API to configure the boundary selection */
XMC_VADC_GROUP_ChannelSetBoundarySelection(XMC_VADC_GROUP_t * const group_ptr,const uint32_t ch_num,XMC_VADC_BOUNDARY_SELECT_t boundary_sel,XMC_VADC_CHANNEL_BOUNDARY_t selection)1874 void XMC_VADC_GROUP_ChannelSetBoundarySelection(XMC_VADC_GROUP_t *const group_ptr,
1875 const uint32_t ch_num,
1876 XMC_VADC_BOUNDARY_SELECT_t boundary_sel,
1877 XMC_VADC_CHANNEL_BOUNDARY_t selection)
1878 {
1879 XMC_ASSERT("XMC_VADC_GROUP_ChannelSetBoundarySelection:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1880 XMC_ASSERT("XMC_VADC_GROUP_ChannelSetBoundarySelection:Wrong Channel Number",
1881 ((ch_num) < XMC_VADC_NUM_CHANNELS_PER_GROUP))
1882
1883 group_ptr->CHCTR[ch_num] &= ~((uint32_t)VADC_G_CHCTR_BNDSELL_Msk << boundary_sel);
1884 group_ptr->CHCTR[ch_num] |= (selection<< ((uint32_t)VADC_G_CHCTR_BNDSELL_Pos + (uint32_t)boundary_sel));
1885 }
1886
1887 /* Make the specified result register part of Result FIFO */
XMC_VADC_GROUP_AddResultToFifo(XMC_VADC_GROUP_t * const group_ptr,const uint32_t res_reg)1888 void XMC_VADC_GROUP_AddResultToFifo(XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
1889 {
1890 uint32_t fen;
1891
1892 XMC_ASSERT("XMC_VADC_GROUP_AddResultToFifo:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1893 XMC_ASSERT("XMC_VADC_GROUP_AddResultToFifo:Wrong Result Register", ((res_reg) < XMC_VADC_NUM_RESULT_REGISTERS))
1894
1895 /* Extract and clear the FIFO enable field */
1896 fen = group_ptr->RCR[res_reg];
1897 fen &= ~((uint32_t)VADC_G_RCR_FEN_Msk);
1898 /* Set this register up as a FIFO member */
1899 fen |= (uint32_t)((uint32_t)1 << VADC_G_RCR_FEN_Pos);
1900 group_ptr->RCR[res_reg] = fen;
1901 }
1902
1903
1904 /* Applicable to fast compare mode, this API sets up the value which is to be compared against conversion result */
XMC_VADC_GROUP_SetResultFastCompareValue(XMC_VADC_GROUP_t * const group_ptr,const uint32_t res_reg,const XMC_VADC_RESULT_SIZE_t compare_val)1905 void XMC_VADC_GROUP_SetResultFastCompareValue(XMC_VADC_GROUP_t *const group_ptr,
1906 const uint32_t res_reg,
1907 const XMC_VADC_RESULT_SIZE_t compare_val)
1908 {
1909 uint32_t res = group_ptr->RES[res_reg];
1910
1911 XMC_ASSERT("XMC_VADC_GROUP_SetResultFastCompareValue:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1912 XMC_ASSERT("XMC_VADC_GROUP_SetResultFastCompareValue:Wrong Result Register",
1913 ((res_reg) < XMC_VADC_NUM_RESULT_REGISTERS))
1914
1915 res &= ~((uint32_t)VADC_G_RES_RESULT_Msk);
1916 res |= (uint32_t)((uint32_t)compare_val << XMC_VADC_RESULT_LEFT_ALIGN_10BIT);
1917 group_ptr->RES[res_reg] = res;
1918 }
1919
1920 /* API to retrieve the result of fast mode comparison */
XMC_VADC_GROUP_GetFastCompareResult(XMC_VADC_GROUP_t * const group_ptr,const uint32_t res_reg)1921 XMC_VADC_FAST_COMPARE_t XMC_VADC_GROUP_GetFastCompareResult(XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
1922 {
1923 XMC_VADC_FAST_COMPARE_t result;
1924 uint32_t res;
1925
1926 XMC_ASSERT("XMC_VADC_GROUP_GetFastCompareResult:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1927 XMC_ASSERT("XMC_VADC_GROUP_GetFastCompareResult:Wrong Result Register", ((res_reg) < XMC_VADC_NUM_RESULT_REGISTERS))
1928
1929 res = group_ptr->RES[res_reg];
1930
1931 if (res & (uint32_t)VADC_G_RES_VF_Msk)
1932 {
1933 result = (XMC_VADC_FAST_COMPARE_t)((uint32_t)(res >> (uint32_t)VADC_G_RES_FCR_Pos) & (uint32_t)1);
1934 }
1935 else
1936 {
1937 result = XMC_VADC_FAST_COMPARE_UNKNOWN;
1938 }
1939
1940 return result;
1941 }
1942
1943 /* Applicable to fast compare mode, this API sets up the value which is to be compared against conversion result */
XMC_VADC_GROUP_SetResultSubtractionValue(XMC_VADC_GROUP_t * const group_ptr,const uint16_t subtraction_val)1944 void XMC_VADC_GROUP_SetResultSubtractionValue(XMC_VADC_GROUP_t *const group_ptr,
1945 const uint16_t subtraction_val)
1946 {
1947 uint32_t res;
1948
1949 XMC_ASSERT("XMC_VADC_GROUP_SetResultSubtractionValue:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1950
1951 res = group_ptr->RES[0];
1952 res &= ~((uint32_t)VADC_G_RES_RESULT_Msk);
1953 res |= (uint32_t)subtraction_val;
1954 group_ptr->RES[0] = res;
1955 }
1956
1957
1958 /* API to select a service request line (NVIC Node) for result event of specified unit of result hardware */
XMC_VADC_GROUP_SetResultInterruptNode(XMC_VADC_GROUP_t * const group_ptr,const uint32_t res_reg,const XMC_VADC_SR_t sr)1959 void XMC_VADC_GROUP_SetResultInterruptNode(XMC_VADC_GROUP_t *const group_ptr,
1960 const uint32_t res_reg,
1961 const XMC_VADC_SR_t sr)
1962 {
1963 uint32_t route_mask;
1964
1965 XMC_ASSERT("XMC_VADC_GROUP_SetResultInterruptNode:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1966 XMC_ASSERT("XMC_VADC_GROUP_SetResultInterruptNode:Wrong Result Register", ((res_reg) < XMC_VADC_NUM_RESULT_REGISTERS))
1967 XMC_ASSERT("XMC_VADC_GROUP_SetResultInterruptNode:Wrong Service Request", ((sr) <= XMC_VADC_SR_SHARED_SR3))
1968
1969 if (res_reg <= 7U)
1970 {
1971 route_mask = group_ptr->REVNP0;
1972 route_mask &= ~((uint32_t)((uint32_t)15 << (res_reg * (uint32_t)4) ));
1973 route_mask |= (uint32_t)((uint32_t)sr << (res_reg * (uint32_t)4));
1974 group_ptr->REVNP0 = route_mask;
1975 }
1976 else
1977 {
1978 route_mask = group_ptr->REVNP1;
1979 route_mask &= ~((uint32_t)((uint32_t)15 << (( res_reg - (uint32_t)8) * (uint32_t)4) ));
1980 route_mask |= (uint32_t)((uint32_t)sr << ((res_reg - (uint32_t)8) * (uint32_t)4));
1981 group_ptr->REVNP1 = route_mask;
1982 }
1983 }
1984
1985 /* API to retrieve the tail of the fifo which the specified result register is a part of */
XMC_VADC_GROUP_GetResultFifoTail(XMC_VADC_GROUP_t * const group_ptr,uint32_t res_reg)1986 uint32_t XMC_VADC_GROUP_GetResultFifoTail(XMC_VADC_GROUP_t *const group_ptr, uint32_t res_reg)
1987 {
1988 uint32_t tail;
1989 uint32_t rcr;
1990 int32_t i;
1991 bool exit_flag;
1992
1993 XMC_ASSERT("XMC_VADC_GROUP_GetResultFifoTail:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
1994 XMC_ASSERT("XMC_VADC_GROUP_GetResultFifoTail:Wrong Result Register", ((res_reg) < XMC_VADC_NUM_RESULT_REGISTERS))
1995
1996 tail = 0U;
1997 exit_flag= (bool)false;
1998
1999 if ((bool)true == XMC_VADC_GROUP_IsResultRegisterFifoHead(group_ptr, res_reg))
2000 {
2001 res_reg = res_reg - 1U;
2002 }
2003
2004 /* Border condition */
2005 if (0U == res_reg)
2006 {
2007 tail = 0U;
2008 }
2009 else
2010 {
2011 /* Stop either at a node that does not have FEN set or at Node-0 */
2012 for(i = (int32_t)res_reg; i >= (int32_t)0; i--)
2013 {
2014 rcr = group_ptr->RCR[i];
2015 rcr &= (uint32_t)VADC_G_RCR_FEN_Msk;
2016
2017 if (rcr)
2018 {
2019 if ((int32_t)0 == i)
2020 {
2021 /* No more nodes. Stop here */
2022 tail = (uint32_t)0;
2023 exit_flag = (bool)true;
2024 }
2025 }
2026 else
2027 {
2028 /* The preceding register forms the tail of the FIFO */
2029 tail = (uint32_t)i + (uint32_t)1;
2030 exit_flag = (bool)true;
2031 }
2032 if (exit_flag)
2033 {
2034 break;
2035 }
2036 }
2037 }
2038 return tail;
2039 }
2040
2041 /* API to retrieve the head of the fifo which the specified result register is a part of */
XMC_VADC_GROUP_GetResultFifoHead(XMC_VADC_GROUP_t * const group_ptr,const uint32_t res_reg)2042 uint32_t XMC_VADC_GROUP_GetResultFifoHead(XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
2043 {
2044 uint32_t head;
2045 uint32_t rcr;
2046 uint32_t i;
2047
2048 XMC_ASSERT("XMC_VADC_GROUP_GetResultFifoHead:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
2049 XMC_ASSERT("XMC_VADC_GROUP_GetResultFifoHead:Wrong Result Register", ((res_reg) < XMC_VADC_NUM_RESULT_REGISTERS))
2050
2051 if ((bool)true == XMC_VADC_GROUP_IsResultRegisterFifoHead(group_ptr, res_reg))
2052 {
2053 head = res_reg;
2054 }
2055 else
2056 {
2057 head = XMC_VADC_NUM_RESULT_REGISTERS - (uint32_t)1;
2058
2059 for(i = res_reg; i < XMC_VADC_NUM_RESULT_REGISTERS ; i++)
2060 {
2061 rcr = group_ptr->RCR[i];
2062 rcr &= (uint32_t)VADC_G_RCR_FEN_Msk;
2063
2064 if (!rcr)
2065 {
2066 /* This node forms the head of the FIFO */
2067 head = i ;
2068 break;
2069 }
2070 }
2071 }
2072 return head;
2073 }
2074
2075 /* API to determine if the specified result register is the head of a result fifo */
XMC_VADC_GROUP_IsResultRegisterFifoHead(XMC_VADC_GROUP_t * const group_ptr,const uint32_t res_reg)2076 bool XMC_VADC_GROUP_IsResultRegisterFifoHead(XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_reg)
2077 {
2078 bool ret_val;
2079 uint32_t rcr_head;
2080 uint32_t rcr_next;
2081
2082 XMC_ASSERT("XMC_VADC_GROUP_IsResultRegisterFifoHead:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr))
2083 XMC_ASSERT("XMC_VADC_GROUP_IsResultRegisterFifoHead:Wrong Result Register",
2084 ((res_reg) < XMC_VADC_NUM_RESULT_REGISTERS))
2085
2086 rcr_head = group_ptr->RCR[res_reg];
2087 rcr_head &= (uint32_t)VADC_G_RCR_FEN_Msk;
2088 rcr_next = group_ptr->RCR[res_reg - (uint32_t)1];
2089 rcr_next &= (uint32_t)VADC_G_RCR_FEN_Msk;
2090
2091 if (rcr_head)
2092 {
2093 ret_val = (bool)false;
2094 }
2095 else if (rcr_next)
2096 {
2097 ret_val = (bool)true;
2098 }
2099 else
2100 {
2101 ret_val = (bool)false;
2102 }
2103
2104 return ret_val;
2105 }
2106
2107 #endif
2108
