1 /**
2  * @file xmc_dac.h
3  * @date 2015-08-31
4  *
5  * @cond
6  **********************************************************************************
7  * XMClib v2.1.24 - XMC Peripheral Driver Library
8  *
9  * Copyright (c) 2015-2019, Infineon Technologies AG
10  * All rights reserved.
11  *
12  * Redistribution and use in source and binary forms, with or without
13  * modification,are permitted provided that the following conditions are met:
14  *
15  *   Redistributions of source code must retain the above copyright notice,
16  *   this list of conditions and the following disclaimer.
17  *
18  *   Redistributions in binary form must reproduce the above copyright notice,
19  *   this list of conditions and the following disclaimer in the documentation
20  *   and/or other materials provided with the distribution.
21  *
22  *   Neither the name of the copyright holders nor the names of its contributors
23  *   may be used to endorse or promote products derived from this software without
24  *   specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
27  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29  * ARE  DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
30  * LIABLE  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR  SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  *
38  * To improve the quality of the software, users are encouraged to share
39  * modifications, enhancements or bug fixes with Infineon Technologies AG
40  * dave@infineon.com).
41  **********************************************************************************
42  *
43  * Change History
44  * --------------
45  *
46  * 2015-02-18:
47  *     - Initial version
48  *
49  * 2015-02-20:
50  *     - Driver description added
51  *
52  * 2015-06-19:
53  *     - Removed version macros and declaration of GetDriverVersion API
54  *
55  * 2015-08-31:
56  *     - Help document updated
57  * @endcond
58  *
59  */
60 
61 #ifndef XMC_DAC_H
62 #define XMC_DAC_H
63 
64 /*******************************************************************************
65  * HEADER FILES
66  *******************************************************************************/
67 
68 #include <xmc_common.h>
69 
70 /* DAC peripheral is not available on XMC1X devices. */
71 #if defined(DAC)
72 
73 /**
74  * @addtogroup XMClib
75  * @{
76  */
77 
78 /**
79  * @addtogroup DAC
80  * @{
81  *
82  * @brief Digital to Analog Converter (DAC) driver for XMC 4000 microcontroller family. <br>
83  *
84  * DAC driver uses DAC peripheral to convert digital value to analog value. XMC4000 microcontroller family has two DAC channels of 12-bit resolution
85  * and maximum conversion rate of 2MHz with full accuracy and 5MHz with reduced accuracy.
86  * It consists of inbuilt pattern generator, ramp generator and noise generator modes. Additionally, waveforms can be generated by configuring data registers
87  * in single value mode and in data mode.
88  * It has DMA handling capability to generate custom waveforms in data mode without CPU intervention.
89  *
90  * DAC driver features:
91  * -#  Configuration structure XMC_DAC_CH_CONFIG_t and initialization function XMC_DAC_CH_Init() to initialize DAC and configure channel settings
92  * -#  Pattern Generator Mode:
93  * 	- DAC is configured in pattern generator mode using XMC_DAC_CH_StartPatternMode()
94  * 	- XMC_DAC_CH_SetPattern() is used to set the waveform pattern values in pattern register for one quarter
95  * 	- Allows to change the trigger frequency using XMC_DAC_CH_SetPatternFrequency()
96  * -#  Single Value Mode:
97  * 	- DAC is configured in single value mode using XMC_DAC_CH_StartSingleValueMode()
98  * 	- Allows to change the trigger frequency using XMC_DAC_CH_SetFrequency()
99  * -# Data Mode:
100  * 	- DAC is configured in data mode using XMC_DAC_CH_StartDataMode()
101  * 	- Allows to change the trigger frequency using XMC_DAC_CH_SetFrequency()
102  * -# Ramp Mode:
103  *  - DAC is configured in ramp generator mode using XMC_DAC_CH_StartRampMode()
104  *  - Allows to change the trigger frequency using XMC_DAC_CH_SetRampFrequency()
105  *  - Allows to set the start and stop values of the ramp using XMC_DAC_CH_SetRampStart() and XMC_DAC_CH_SetRampStop()
106  * -# Noise Mode:
107  * 	- DAC is configured in noise mode using XMC_DAC_CH_StartNoiseMode()
108  * 	- Allows to change the trigger frequency using XMC_DAC_CH_SetFrequency()
109  * -# Allows to change the scale, offset dynamically using XMC_DAC_CH_SetOutputScale() and XMC_DAC_CH_SetOutputOffset() respectively
110  * -# Allows to select one of the eight possible trigger sources using XMC_DAC_CH_SetTrigger()
111  * -# 2 DAC channels can be used in synchronization in single value mode and data mode to generate two analog outputs in sync. XMC_DAC_EnableSimultaneousDataMode()
112  */
113 
114 /*******************************************************************************
115  * MACROS
116  *******************************************************************************/
117 
118 #define XMC_DAC0 ((XMC_DAC_t *)DAC_BASE)         /**< DAC module register base */
119 
120 #define XMC_DAC_DACCFG_NEGATE_Msk (0x10000000UL) /*< DAC negation enable mask in XMC44 device */
121 #define XMC_DAC_NO_CHANNELS (2U)                 /**< DAC maximum channels */
122 #define XMC_DAC_SAMPLES_PER_PERIOD (32U)         /**< DAC samples per period in pattern mode */
123 
124 #define XMC_DAC_PATTERN_TRIANGLE  {0U, 4U, 8U, 12U, 16U, 19U, 23U, 27U, 31U} /**< First quarter Triangle waveform samples */
125 #define XMC_DAC_PATTERN_SINE      {0U, 6U, 12U, 17U, 22U, 26U, 29U, 30U, 31U} /**< First quarter Sine waveform samples */
126 #define XMC_DAC_PATTERN_RECTANGLE {31U, 31U, 31U, 31U, 31U, 31U, 31U, 31U, 31U} /**< First quarter Rectangle waveform samples */
127 
128 #define XMC_DAC_IS_DAC_VALID(PTR)            ((PTR) == XMC_DAC0)
129 #define XMC_DAC_IS_CHANNEL_VALID(CH)         (CH < XMC_DAC_NO_CHANNELS)
130 #define XMC_DAC_IS_TRIGGER_VALID(TRIGGER)    ((TRIGGER == XMC_DAC_CH_TRIGGER_INTERNAL) ||\
131                                               (TRIGGER == XMC_DAC_CH_TRIGGER_EXTERNAL_CCU80_SR1) ||\
132                                               (TRIGGER == XMC_DAC_CH_TRIGGER_EXTERNAL_CCU40_SR1) ||\
133                                               (TRIGGER == XMC_DAC_CH_TRIGGER_EXTERNAL_CCU41_SR1) ||\
134                                               (TRIGGER == XMC_DAC_CH_TRIGGER_EXTERNAL_P2_9) ||\
135                                               (TRIGGER == XMC_DAC_CH_TRIGGER_EXTERNAL_P2_8) ||\
136                                               (TRIGGER == XMC_DAC_CH_TRIGGER_EXTERNAL_U0C0_DX1INS) ||\
137                                               (TRIGGER == XMC_DAC_CH_TRIGGER_EXTERNAL_U1C0_DX1INS) ||\
138                                               (TRIGGER == XMC_DAC_CH_TRIGGER_SOFTWARE))
139 #define XMC_DAC_IS_MODE_VALID(MODE)          ((MODE == XMC_DAC_CH_MODE_IDLE) ||\
140                                               (MODE == XMC_DAC_CH_MODE_SINGLE) ||\
141                                               (MODE == XMC_DAC_CH_MODE_DATA) ||\
142                                               (MODE == XMC_DAC_CH_MODE_PATTERN) ||\
143                                               (MODE == XMC_DAC_CH_MODE_NOISE) ||\
144                                               (MODE == XMC_DAC_CH_MODE_RAMP))
145 #define XMC_DAC_IS_OUTPUT_SCALE_VALID(SCALE) ((SCALE == XMC_DAC_CH_OUTPUT_SCALE_NONE) ||\
146                                               (SCALE == XMC_DAC_CH_OUTPUT_SCALE_MUL_2) ||\
147                                               (SCALE == XMC_DAC_CH_OUTPUT_SCALE_MUL_4) ||\
148                                               (SCALE == XMC_DAC_CH_OUTPUT_SCALE_MUL_8) ||\
149                                               (SCALE == XMC_DAC_CH_OUTPUT_SCALE_MUL_16) ||\
150                                               (SCALE == XMC_DAC_CH_OUTPUT_SCALE_MUL_32) ||\
151                                               (SCALE == XMC_DAC_CH_OUTPUT_SCALE_MUL_64) ||\
152                                               (SCALE == XMC_DAC_CH_OUTPUT_SCALE_MUL_128) ||\
153                                               (SCALE == XMC_DAC_CH_OUTPUT_SCALE_DIV_2) ||\
154                                               (SCALE == XMC_DAC_CH_OUTPUT_SCALE_DIV_4) ||\
155                                               (SCALE == XMC_DAC_CH_OUTPUT_SCALE_DIV_8) ||\
156                                               (SCALE == XMC_DAC_CH_OUTPUT_SCALE_DIV_16) ||\
157                                               (SCALE == XMC_DAC_CH_OUTPUT_SCALE_DIV_32) ||\
158                                               (SCALE == XMC_DAC_CH_OUTPUT_SCALE_DIV_64) ||\
159                                               (SCALE == XMC_DAC_CH_OUTPUT_SCALE_DIV_128))
160 
161 
162 /*******************************************************************************
163  * ENUMS
164  *******************************************************************************/
165 
166 /**
167  * Return types of the API's
168  */
169 typedef enum XMC_DAC_CH_STATUS
170 {
171   XMC_DAC_CH_STATUS_OK              = 0U, /**< Status is ok, no error detected */
172   XMC_DAC_CH_STATUS_ERROR           = 1U, /**< Error detected */
173   XMC_DAC_CH_STATUS_BUSY            = 2U, /**< DAC is busy */
174   XMC_DAC_CH_STATUS_ERROR_FREQ2LOW  = 3U, /**< Frequency can't be configured. Frequency is to low. */
175   XMC_DAC_CH_STATUS_ERROR_FREQ2HIGH = 4U  /**< Frequency can't be configured. Frequency is to high.  */
176 } XMC_DAC_CH_STATUS_t;
177 
178 /**
179  * Operating modes of DAC
180  */
181 typedef enum XMC_DAC_CH_MODE
182 {
183   XMC_DAC_CH_MODE_IDLE    = 0x0U << DAC_DAC0CFG0_MODE_Pos,    /**< DAC is disabled */
184   XMC_DAC_CH_MODE_SINGLE  = 0x1U << DAC_DAC0CFG0_MODE_Pos,    /**< Single value mode - single data value is updated and maintained */
185   XMC_DAC_CH_MODE_DATA    = 0x2U << DAC_DAC0CFG0_MODE_Pos,    /**< Data mode - continuous data processing */
186   XMC_DAC_CH_MODE_PATTERN = 0x3U << DAC_DAC0CFG0_MODE_Pos,    /**< Pattern mode - inbuilt pattern waveform generation -
187                                                                    Sine, Triangle, Rectangle */
188   XMC_DAC_CH_MODE_NOISE   = 0x4U << DAC_DAC0CFG0_MODE_Pos,    /**< Noise mode - pseudo-random noise generation */
189   XMC_DAC_CH_MODE_RAMP    = 0x5U << DAC_DAC0CFG0_MODE_Pos     /**< Ramp mode - ramp generation */
190 } XMC_DAC_CH_MODE_t;
191 
192 /**
193  * Trigger sources for the data update
194  */
195 typedef enum XMC_DAC_CH_TRIGGER
196 {
197   XMC_DAC_CH_TRIGGER_INTERNAL =
198       (0x0U << DAC_DAC0CFG1_TRIGMOD_Pos),                                      /**< Internal trigger as per frequency divider value */
199   XMC_DAC_CH_TRIGGER_EXTERNAL_CCU80_SR1 =
200       (0x1U << DAC_DAC0CFG1_TRIGMOD_Pos) | 0x0U,                               /**< External trigger from CCU80 Interrupt SR1 */
201   XMC_DAC_CH_TRIGGER_EXTERNAL_CCU40_SR1 =
202       (0x1U << DAC_DAC0CFG1_TRIGMOD_Pos) | (0x2U << DAC_DAC0CFG1_TRIGSEL_Pos), /**< External trigger from CCU40 Interrupt SR1 */
203   XMC_DAC_CH_TRIGGER_EXTERNAL_CCU41_SR1 =
204       (0x1U << DAC_DAC0CFG1_TRIGMOD_Pos) | (0x3U << DAC_DAC0CFG1_TRIGSEL_Pos), /**< External trigger from CCU41 Interrupt SR1 */
205   XMC_DAC_CH_TRIGGER_EXTERNAL_P2_9 =
206       (0x1U << DAC_DAC0CFG1_TRIGMOD_Pos) | (0x4U << DAC_DAC0CFG1_TRIGSEL_Pos), /**< External trigger from pin 2.9 */
207   XMC_DAC_CH_TRIGGER_EXTERNAL_P2_8 =
208       (0x1U << DAC_DAC0CFG1_TRIGMOD_Pos) | (0x5U << DAC_DAC0CFG1_TRIGSEL_Pos), /**< External trigger from pin 2.8 */
209   XMC_DAC_CH_TRIGGER_EXTERNAL_U0C0_DX1INS =
210       (0x1U << DAC_DAC0CFG1_TRIGMOD_Pos) | (0x6U << DAC_DAC0CFG1_TRIGSEL_Pos), /**< External trigger from USIC-0 DX1 Input Signal */
211   XMC_DAC_CH_TRIGGER_EXTERNAL_U1C0_DX1INS =
212       (0x1U << DAC_DAC0CFG1_TRIGMOD_Pos) | (0x7U << DAC_DAC0CFG1_TRIGSEL_Pos), /**< External trigger from USIC-1 DX1 Input Signal */
213   XMC_DAC_CH_TRIGGER_SOFTWARE =
214       (0x2U << DAC_DAC0CFG1_TRIGMOD_Pos)                                       /**< Software trigger */
215 } XMC_DAC_CH_TRIGGER_t;
216 
217 /**
218  * Data type of the input data
219  */
220 typedef enum XMC_DAC_CH_DATA_TYPE
221 {
222   XMC_DAC_CH_DATA_TYPE_UNSIGNED = 0U , /**< input data is unsigned */
223   XMC_DAC_CH_DATA_TYPE_SIGNED = 1U     /**< input data is signed */
224 } XMC_DAC_CH_DATA_TYPE_t;
225 
226 /**
227  * Scaling of the input data
228  */
229 typedef enum XMC_DAC_CH_OUTPUT_SCALE
230 {
231   XMC_DAC_CH_OUTPUT_SCALE_NONE =
232       0x0U,                                                                   /**< No scaling */
233   XMC_DAC_CH_OUTPUT_SCALE_MUL_2 =
234       (0x1U << DAC_DAC0CFG1_MULDIV_Pos) | (0x1U << DAC_DAC0CFG1_SCALE_Pos),   /**< multiplied by 2 */
235   XMC_DAC_CH_OUTPUT_SCALE_MUL_4 =
236       (0x1U << DAC_DAC0CFG1_MULDIV_Pos) | (0x2U << DAC_DAC0CFG1_SCALE_Pos),   /**< multiplied by 4 */
237   XMC_DAC_CH_OUTPUT_SCALE_MUL_8 =
238       (0x1U << DAC_DAC0CFG1_MULDIV_Pos) | (0x3U << DAC_DAC0CFG1_SCALE_Pos),   /**< multiplied by 8 */
239   XMC_DAC_CH_OUTPUT_SCALE_MUL_16 =
240       (0x1U << DAC_DAC0CFG1_MULDIV_Pos) | (0x4U << DAC_DAC0CFG1_SCALE_Pos),   /**< multiplied by 16 */
241   XMC_DAC_CH_OUTPUT_SCALE_MUL_32 =
242       (0x1U << DAC_DAC0CFG1_MULDIV_Pos) | (0x5U << DAC_DAC0CFG1_SCALE_Pos),   /**< multiplied by 32 */
243   XMC_DAC_CH_OUTPUT_SCALE_MUL_64 =
244       (0x1U << DAC_DAC0CFG1_MULDIV_Pos) | (0x6U << DAC_DAC0CFG1_SCALE_Pos),   /**< multiplied by 64 */
245   XMC_DAC_CH_OUTPUT_SCALE_MUL_128 =
246       (0x1U << DAC_DAC0CFG1_MULDIV_Pos) | (0x7U << DAC_DAC0CFG1_SCALE_Pos),   /**< multiplied by 128 */
247   XMC_DAC_CH_OUTPUT_SCALE_DIV_2 =
248       0x1U << DAC_DAC0CFG1_SCALE_Pos,                                         /**< divided by 2 */
249   XMC_DAC_CH_OUTPUT_SCALE_DIV_4 =
250       0x2U << DAC_DAC0CFG1_SCALE_Pos,                                         /**< divided by 4 */
251   XMC_DAC_CH_OUTPUT_SCALE_DIV_8 =
252       0x3U << DAC_DAC0CFG1_SCALE_Pos,                                         /**< divided by 8 */
253   XMC_DAC_CH_OUTPUT_SCALE_DIV_16 =
254       0x4U << DAC_DAC0CFG1_SCALE_Pos,                                         /**< divided by 16 */
255   XMC_DAC_CH_OUTPUT_SCALE_DIV_32 =
256       0x5U << DAC_DAC0CFG1_SCALE_Pos,                                         /**< divided by 32 */
257   XMC_DAC_CH_OUTPUT_SCALE_DIV_64 =
258       0x6U << DAC_DAC0CFG1_SCALE_Pos,                                         /**< divided by 64 */
259   XMC_DAC_CH_OUTPUT_SCALE_DIV_128 =
260       0x7U << DAC_DAC0CFG1_SCALE_Pos                                          /**< divided by 128 */
261 } XMC_DAC_CH_OUTPUT_SCALE_t;
262 
263 /**
264  * Negation of input data (applicable only for XMC44 device)
265  */
266 typedef enum XMC_DAC_CH_OUTPUT_NEGATION
267 {
268   XMC_DAC_CH_OUTPUT_NEGATION_DISABLED = 0U,                   /**< XMC_DAC_CH_OUTPUT_NEGATION_DISABLED */
269   XMC_DAC_CH_OUTPUT_NEGATION_ENABLED = 1U                     /**< XMC_DAC_CH_OUTPUT_NEGATION_ENABLED */
270 } XMC_DAC_CH_OUTPUT_NEGATION_t;
271 
272 /**
273  * Output sign signal for the Pattern Generation Mode
274  */
275 typedef enum XMC_DAC_CH_PATTERN_SIGN_OUTPUT
276 {
277   XMC_DAC_CH_PATTERN_SIGN_OUTPUT_DISABLED = 0U,  /**< Sign output signal generation is disabled */
278   XMC_DAC_CH_PATTERN_SIGN_OUTPUT_ENABLED = 1U    /**< Sign output signal generation is enabled */
279 } XMC_DAC_CH_PATTERN_SIGN_OUTPUT_t;
280 
281 /*******************************************************************************
282  * DATA STRUCTURES
283  *******************************************************************************/
284 /**
285  * DAC peripheral registers configuration.
286  */
287 typedef struct
288 {
289   __I  uint32_t  ID;
290 
291   struct
292   {
293      __IO uint32_t low;
294      __IO uint32_t high;
295   } DACCFG[XMC_DAC_NO_CHANNELS];
296 
297   __IO uint32_t DACDATA[XMC_DAC_NO_CHANNELS];
298   __IO uint32_t DAC01DATA;
299 
300   struct
301   {
302      __IO uint32_t low;
303      __IO uint32_t high;
304   } DACPAT[XMC_DAC_NO_CHANNELS];
305 
306 } XMC_DAC_t;
307 
308 /*Anonymous structure/union guard start*/
309 #if defined(__CC_ARM)
310   #pragma push
311   #pragma anon_unions
312 #elif defined(__TASKING__)
313   #pragma warning 586
314 #endif
315 
316 /**
317  * Channel related configuration
318  */
319 typedef struct XMC_DAC_CH_CONFIG
320 {
321   union
322   {
323   struct
324   {
325     uint32_t :23;                /**< Not used bits */
326     uint32_t data_type:1;        /**< input data type - unsigned / signed */
327     uint32_t :4;                 /**< Not used bits */
328     uint32_t output_negation:1;  /**< Negation of the output waveform enabled/disabled */
329     uint32_t :3;
330   };
331   uint32_t cfg0;
332   };
333   union
334   {
335   struct
336   {
337     uint32_t output_scale:4;  /**< Scale value of type XMC_DAC_CH_OUTPUT_SCALE_t. It includes scaling + mul/div bit */
338     uint32_t output_offset:8; /**< offset value */
339     uint32_t :20;
340   };
341   uint32_t cfg1;
342   };
343 } XMC_DAC_CH_CONFIG_t;
344 /*Anonymous structure/union guard end*/
345 #if defined(__CC_ARM)
346   #pragma pop
347 #elif defined(__TASKING__)
348   #pragma warning restore
349 #endif
350 /*******************************************************************************
351  * API PROTOTYPES
352  *******************************************************************************/
353 
354 #ifdef __cplusplus
355 extern "C" {
356 #endif
357 
358 /**
359  * @param dac Pointer to an instance of DAC module
360  *
361  * @return None
362  *
363  * \par<b>Description:</b><br>
364  * Enables DAC clock and releases DAC reset.<br>
365  *
366  * \par
367  * Enabling DAC is the first step of DAC initialisation. This API is called by XMC_DAC_CH_Init().
368  * DAC clock is enabled by setting \a DAC bit of \a CGATCLR1 register. DAC reset is released by setting \a DACRS bit of \a PRCLR1 register.
369  *
370  *
371  * \par<b>Related APIs:</b><BR>
372  * XMC_DAC_IsEnabled(), XMC_DAC_Disable(), XMC_DAC_CH_Init()\n\n\n
373  *
374  */
375 void XMC_DAC_Enable(XMC_DAC_t *const dac);
376 
377 /**
378  * @param dac Pointer to an instance of DAC module
379  *
380  * @return None
381  *
382  * \par<b>Description:</b><br>
383  * Disables DAC clock and resets DAC.
384  *
385  * \par
386  * DAC clock is disabled by setting \a DAC bit of \a CGATSET1 register. DAC is reset by setting \a DACRS bit of \a PRSET1 register.
387  *
388  * \par<b>Related APIs:</b><BR>
389  * XMC_DAC_IsEnabled(), XMC_DAC_Enable()\n\n\n
390  *
391  */
392 void XMC_DAC_Disable(XMC_DAC_t *const dac);
393 
394 /**
395  * @param dac Pointer to an instance of DAC module
396  *
397  * @return bool<br>
398  * true  - if DAC is enabled<br>
399  * false - if DAC is disabled
400  *
401  * \par<b>Description:</b><br>
402  * Returns the state of the DAC.
403  *
404  * \par
405  * DAC enabled status is determined by referring to \a DACRS bit of \a PRSTAT1 register.
406  *
407  * \par<b>Related APIs:</b><BR>
408  * XMC_DAC_Enable(), XMC_DAC_Disable()\n\n\n
409  *
410  */
411 bool XMC_DAC_IsEnabled(const XMC_DAC_t *const dac);
412 
413 /**
414  * @param dac Pointer to an instance of DAC module
415  *
416  * @return None
417  *
418  * \par<b>Description:</b><br>
419  * DAC switches to Simultaneous data mode from Independent data mode.
420  *
421  * \par
422  * Independent data mode is the default data mode.
423  * Simultaneous data mode is enabled by setting \a DATMOD bit of \a DAC0CFG1 register.
424  *
425  * \par<b>Note:</b><br>
426  * Set channel 0 and channel 1 to Data mode before calling this API.
427  *
428  * \par<b>Related APIs:</b><BR>
429  * XMC_DAC_CH_StartSingleValueMode(), XMC_DAC_CH_StartDataMode(), XMC_DAC_SimultaneousWrite(), XMC_DAC_DisableSimultaneousDataMode()\n\n\n
430  *
431  */
XMC_DAC_EnableSimultaneousDataMode(XMC_DAC_t * const dac)432 __STATIC_INLINE void XMC_DAC_EnableSimultaneousDataMode(XMC_DAC_t *const dac)
433 {
434   XMC_ASSERT("XMC_DAC_EnableSimultaneousDataMode: dac parameter not valid\n", XMC_DAC_IS_DAC_VALID(dac));
435 
436   dac->DACCFG[0].high |= DAC_DAC0CFG1_DATMOD_Msk;
437 }
438 
439 /**
440  * @param dac Pointer to an instance of DAC module
441  *
442  * @return None
443  *
444  * \par<b>Description:</b><br>
445  * DAC switches to independent data mode from simultaneous Data mode.
446  *
447  * \par
448  * Independent data mode is the default data mode.
449  * Simultaneous data mode is disabled by clearing \a DATMOD bit of \a DAC0CFG1 register.
450  *
451  * \par<b>Related APIs:</b><BR>
452  * XMC_DAC_CH_StartDataMode(), XMC_DAC_EnableSimultaneousDataMode()\n\n\n
453  *
454  */
XMC_DAC_DisableSimultaneousDataMode(XMC_DAC_t * const dac)455 __STATIC_INLINE void XMC_DAC_DisableSimultaneousDataMode(XMC_DAC_t *const dac)
456 {
457   XMC_ASSERT("XMC_DAC_DisableSimultaneousDataMode: dac parameter not valid\n", XMC_DAC_IS_DAC_VALID(dac));
458 
459   dac->DACCFG[0].high &= ~DAC_DAC0CFG1_DATMOD_Msk;
460 }
461 
462 /**
463  * @param dac Pointer to an instance of DAC module
464  * @param data0 Data for DAC channel 0 [0-4095]
465  * @param data1 Data for DAC channel 1 [0-4095]
466  *
467  * @return None
468  *
469  * \par<b>Description:</b><br>
470  * The data (\e data0 & \e data1) to be converted by channel 0 & channel 1 are updated to \a DATA1 bit-fields of \a DAC01DATA register.
471  * data0 and data1 have the range of [0-4095].
472  *
473  * \par<b>Note:</b><br>
474  * Channel 0 and Channel 1 should be set to simultaneous data mode before calling this API.
475  *
476  * \par<b>Related APIs:</b><BR>
477  * XMC_DAC_EnableSimultaneousDataMode()\n\n\n
478  *
479  */
XMC_DAC_SimultaneousWrite(XMC_DAC_t * const dac,const uint16_t data0,const uint16_t data1)480 __STATIC_INLINE void XMC_DAC_SimultaneousWrite(XMC_DAC_t *const dac, const uint16_t data0, const uint16_t data1)
481 {
482   XMC_ASSERT("XMC_DAC_SimultaneousWrite: dac parameter not valid\n", XMC_DAC_IS_DAC_VALID(dac));
483 
484   dac->DAC01DATA = (data0 << DAC_DAC01DATA_DATA0_Pos) | (data1 << DAC_DAC01DATA_DATA1_Pos);
485 }
486 
487 /**
488  * @param dac Pointer to an instance of DAC module
489  * @param channel DAC channel number
490  * @param config Pointer to the DAC channel configuration structure
491  *
492  * @return None
493  *
494  * \par<b>Description:</b><br>
495  * Initialises and configures the DAC \e channel with the configuration date pointed by \e config.
496  *
497  * \par
498  * DAC channel is initialised by configuring the registers \a DAC0CFG0 and \a DAC0CFG1 registers (for channel 0) / \a DAC1CFG0 and \a DAC1CFG1 registers (for channel 1).
499  * It enables the channel output by calling XMC_DAC_CH_EnableOutput().
500  *
501  */
502 void XMC_DAC_CH_Init(XMC_DAC_t *const dac, const uint8_t channel, const XMC_DAC_CH_CONFIG_t *const config);
503 
504 /**
505  * @param dac Pointer to an instance of DAC module
506  * @param channel DAC channel number
507  *
508  * @return None
509  *
510  * \par<b>Description:</b><br>
511  * Channel \a channel output is enabled by setting the \a ANAEN bit of \a DAC0CFG1 register (for channel 0) / \a DAC1CFG1 register (for channel 1).
512  *
513  * \par<b>Note:</b><BR>
514  * \a tSTARTUP time for DAC analog output starts after the \a ANAEN bit is set to one.
515  * After the expiry of the startup time the default value is driven to DAC output and a new value can be written.
516  *
517  * \par<b>Related APIs:</b><BR>
518  * XMC_DAC_CH_DisableOutput(), XMC_DAC_CH_IsOutputEnabled()\n\n\n
519  *
520  */
XMC_DAC_CH_EnableOutput(XMC_DAC_t * const dac,const uint8_t channel)521 __STATIC_INLINE void XMC_DAC_CH_EnableOutput(XMC_DAC_t *const dac, const uint8_t channel)
522 {
523   XMC_ASSERT("XMC_DAC_CH_EnableOutput: dac parameter not valid\n", XMC_DAC_IS_DAC_VALID(dac));
524   XMC_ASSERT("XMC_DAC_CH_EnableOutput: channel parameter not valid\n", XMC_DAC_IS_CHANNEL_VALID(channel));
525 
526   dac->DACCFG[channel].high |= DAC_DAC0CFG1_ANAEN_Msk;
527 }
528 
529 /**
530  * @param dac Pointer to an instance of DAC module
531  * @param channel DAC channel number
532  *
533  * @return None
534  *
535  * \par<b>Description:</b><br>
536  * Channel \a channel output is disabled by clearing the \a ANAEN bit of \a DAC0CFG1 register (for channel 0) / \a DAC1CFG1 register (for channel 1).
537  *
538  * \par
539  * A call to this API stops driving the converted digital input to its output.
540  *
541  * \par<b>Related APIs:</b><BR>
542  * XMC_DAC_CH_EnableOutput(), XMC_DAC_CH_IsOutputEnabled()\n\n\n
543  *
544  */
XMC_DAC_CH_DisableOutput(XMC_DAC_t * const dac,const uint8_t channel)545 __STATIC_INLINE void XMC_DAC_CH_DisableOutput(XMC_DAC_t *const dac, const uint8_t channel)
546 {
547   XMC_ASSERT("XMC_DAC_CH_DisableOutput: dac parameter not valid\n", XMC_DAC_IS_DAC_VALID(dac));
548   XMC_ASSERT("XMC_DAC_CH_DisableOutput: channel parameter not valid\n", XMC_DAC_IS_CHANNEL_VALID(channel));
549 
550   dac->DACCFG[channel].high &= ~DAC_DAC0CFG1_ANAEN_Msk;
551 }
552 
553 /**
554  * @param dac Pointer to an instance of DAC module
555  * @param channel DAC channel number
556  *
557  * @return bool <BR>
558  * true  - if analog output is enabled <BR>
559  * false - if analog output is disabled <BR>
560  *
561  * \par<b>Description:</b><br>
562  * Returns the status of DAC analog output.
563  *
564  * \par
565  * Channel \a channel output enabled or disabled is determined by reading the \a ANAEN bit of \a DAC0CFG1 register (for channel 0) / \a DAC1CFG1 register (for channel 1).
566  *
567  * \par<b>Related APIs:</b><BR>
568  * XMC_DAC_CH_EnableOutput(), XMC_DAC_CH_DisableOutput()\n\n\n
569  *
570  */
XMC_DAC_CH_IsOutputEnabled(const XMC_DAC_t * const dac,const uint8_t channel)571 __STATIC_INLINE bool XMC_DAC_CH_IsOutputEnabled(const XMC_DAC_t *const dac, const uint8_t channel)
572 {
573   XMC_ASSERT("XMC_DAC_CH_IsOutputEnabled: dac parameter not valid\n", XMC_DAC_IS_DAC_VALID(dac));
574   XMC_ASSERT("XMC_DAC_CH_IsOutputEnabled: channel parameter not valid\n", XMC_DAC_IS_CHANNEL_VALID(channel));
575 
576   return (bool)(dac->DACCFG[channel].high & DAC_DAC0CFG1_ANAEN_Msk);
577 }
578 
579 /**
580  * @param dac Pointer to an instance of DAC module
581  * @param channel DAC channel number
582  * @param data Data to be written  [0-4095]
583  *
584  * @return None
585  *
586  * \par<b>Description:</b><br>
587  * Writes the \e data to the \e channel's DATA register.
588  *
589  * \par
590  * The \e data is then converted and driven to the output.
591  * If the trigger is set, On a trigger event the data in DATA register is converted and driven to \e channel output.
592  * Data \a data is written to the \a channel by loading \a data to \a DATA0 bit-field of \a DAC0DATA (for channel 0) / \a DATA1 bit-field of \a DAC1DATA register (for channel 1).
593  * data has the range of [0-4095].
594  *
595  * \par<b>Note:</b><br>
596  * The API can be used for Single Value Mode, Data Mode (Individual) & Ramp Mode.
597  * Call XMC_DAC_CH_EnableOutput() API to enable analog output.
598  *
599  * \par<b>Related APIs:</b><BR>
600  * XMC_DAC_CH_StartSingleValueMode(), XMC_DAC_CH_StartDataMode(), XMC_DAC_CH_StartRampMode()\n\n\n
601  *
602  */
XMC_DAC_CH_Write(XMC_DAC_t * const dac,const uint8_t channel,const uint16_t data)603 __STATIC_INLINE void XMC_DAC_CH_Write(XMC_DAC_t *const dac, const uint8_t channel, const uint16_t data)
604 {
605   XMC_ASSERT("XMC_DAC_CH_Write: dac parameter not valid\n", XMC_DAC_IS_DAC_VALID(dac));
606   XMC_ASSERT("XMC_DAC_CH_Write: channel parameter not valid\n", XMC_DAC_IS_CHANNEL_VALID(channel));
607 
608   dac->DACDATA[channel] = data;
609 }
610 
611 /**
612  * @param dac Pointer to an instance of DAC module
613  * @param channel DAC channel number
614  *
615  * @return None
616  *
617  * \par<b>Description:</b><br>
618  * Sets the \e channel to Single Value Mode by calling XMC_DAC_CH_SetMode().
619  *
620  * \par<b>Note:</b><br>
621  * Call XMC_DAC_CH_Write() API to write the data.
622  *
623  * \par<b>Related APIs:</b><BR>
624  * XMC_DAC_CH_Write()\n\n\n
625  *
626  */
627 XMC_DAC_CH_STATUS_t XMC_DAC_CH_StartSingleValueMode(XMC_DAC_t *const dac, const uint8_t channel);
628 
629 /**
630  * @param dac Pointer to an instance of DAC module
631  * @param channel DAC channel number
632  * @param trigger Data points update trigger
633  * @param frequency Waveform frequency [Hz]
634  *
635  * @return XMC_DAC_CH_STATUS_t status
636  *
637  * \par<b>Description:</b><br>
638  * Sets the \e channel to Data mode. Trigger and frequency are configured.
639  *
640  * \par<b>Note:</b><br>
641  * Call XMC_DAC_CH_Write() API to write the data. Call XMC_DAC_EnableSimultaneousDataMode() to switch to Simultaneous data mode.
642  *
643  * \par<b>Related APIs:</b><BR>
644  * XMC_DAC_CH_Init(), XMC_DAC_CH_Write(), XMC_DAC_EnableSimultaneousDataMode() \n\n\n
645  *
646  */
647 XMC_DAC_CH_STATUS_t XMC_DAC_CH_StartDataMode(XMC_DAC_t *const dac,
648                                              const uint8_t channel,
649                                              const XMC_DAC_CH_TRIGGER_t trigger,
650                                              const uint32_t frequency);
651 
652 /**
653  * @param dac Pointer to an instance of DAC module
654  * @param channel DAC channel number
655  * @param start Start point of the ramp [0-4095]
656  * @param stop Stop point of the ramp [0-4095]
657  * @param trigger Data points update trigger
658  * @param frequency Ramp frequency in [Hz]
659  *
660  * @return XMC_DAC_CH_STATUS_t status
661  *
662  * \par<b>Description:</b><br>
663  * Sets the \e channel to Ramp mode. Trigger, frequency, start and stop values are configured.
664  * On a \e trigger ramp values are converted and driven to \e channel output.
665  * Start and stop have the range of [0-4095]. Stop should be equal or greater than start.
666  *
667  * \par<b>Note:</b><br>
668  * If the ramp counter reaches its \e stop value, it restarts from the \e start value with the next trigger pulse.
669  *
670  * \par<b>Related APIs:</b><BR>
671  * XMC_DAC_CH_Init(), XMC_DAC_CH_GetRampStart(), XMC_DAC_CH_GetRampStop() \n\n\n
672  *
673  */
674 XMC_DAC_CH_STATUS_t XMC_DAC_CH_StartRampMode(XMC_DAC_t *const dac,
675                                              const uint8_t channel,
676                                              const uint16_t start,
677                                              const uint16_t stop,
678                                              const XMC_DAC_CH_TRIGGER_t trigger,
679                                              const uint32_t frequency);
680 
681 /**
682  * @param dac Pointer to an instance of DAC module
683  * @param channel DAC channel number
684  * @param pattern Data table of a pattern
685  * @param sign_output Sign information of the waveform
686  * @param trigger Data points update trigger
687  * @param frequency Waveform frequency in [Hz]
688  *
689  * @return XMC_DAC_CH_STATUS_t status
690  *
691  * \par<b>Description:</b><br>
692  * Sets the \e channel to Pattern mode. Trigger, frequency, sign output and data are configured.
693  * On a \e trigger, the \e pattern values are converted and driven to \e channel output.
694  *
695  * \par<b>Related APIs:</b><BR>
696  * XMC_DAC_CH_Init(), XMC_DAC_CH_DisablePatternSignOutput() \n\n\n
697  *
698  */
699 XMC_DAC_CH_STATUS_t XMC_DAC_CH_StartPatternMode(XMC_DAC_t *const dac,
700                                                 const uint8_t channel,
701                                                 const uint8_t *const pattern,
702                                                 const XMC_DAC_CH_PATTERN_SIGN_OUTPUT_t sign_output,
703                                                 const XMC_DAC_CH_TRIGGER_t trigger,
704                                                 const uint32_t frequency);
705 
706 /**
707  * @param dac Pointer to an instance of DAC module
708  * @param channel DAC channel number
709  * @param trigger Data points update trigger
710  * @param frequency Waveform frequency in [Hz]
711  *
712  * @return XMC_DAC_CH_STATUS_t status
713  *
714  * \par<b>Description:</b><br>
715  * Sets the \e channel to Noise mode. Trigger and frequency are configured.
716  * On a \e trigger the DAC starts converting and drives to \e channel output.
717  *
718  * \par<b>Related APIs:</b><BR>
719  * XMC_DAC_CH_Init()\n\n\n
720  *
721  */
722 XMC_DAC_CH_STATUS_t XMC_DAC_CH_StartNoiseMode(XMC_DAC_t *const dac,
723                                               const uint8_t channel,
724                                               const XMC_DAC_CH_TRIGGER_t trigger,
725                                               const uint32_t frequency);
726 
727 /**
728  * @param dac Pointer to an instance of DAC module
729  * @param channel DAC channel number
730  * @param pattern Pointer to the data table
731  *
732  * @return None
733  *
734  * \par<b>Description:</b><br>
735  * The data for the Pattern mode is written to the \a DAC0PATL and \a DAC0PATH registers.
736  * The API is called by XMC_DAC_CH_StartPatternMode().
737  *
738  * \par<b>Note:</b><br>
739  * Call this API if the \a channel is set to Pattern mode.
740  *
741  * \par<b>Related APIs:</b><BR>
742  * XMC_DAC_CH_EnablePatternSignOutput(), XMC_DAC_CH_DisablePatternSignOutput()\n\n\n
743  *
744  */
745 void XMC_DAC_CH_SetPattern(XMC_DAC_t *const dac, const uint8_t channel, const uint8_t *const pattern);
746 
747 /**
748  * @param dac Pointer to an instance of DAC module
749  * @param channel DAC channel number
750  *
751  * @return None
752  *
753  * \par<b>Description:</b><br>
754  * Enables the output sign information for Pattern Mode.
755  *
756  * \par
757  * Sign output is enabled by setting \a SIGNEN bit of \a DAC0CFG0 register (for channel 0) / DAC1CFG0 register (for channel 1).
758  *
759  * \par<b>Note:</b><br>
760  * Call this API if the \e channel is set to Pattern mode.
761  *
762  * \par<b>Related APIs:</b><BR>
763  * XMC_DAC_CH_StartPatternMode(), XMC_DAC_CH_DisablePatternSignOutput()\n\n\n
764  *
765  */
XMC_DAC_CH_EnablePatternSignOutput(XMC_DAC_t * const dac,const uint8_t channel)766 __STATIC_INLINE void XMC_DAC_CH_EnablePatternSignOutput(XMC_DAC_t *const dac,
767                                                      const uint8_t channel)
768 {
769   XMC_ASSERT("XMC_DAC_CH_EnablePatternSignOutput: dac parameter not valid\n", XMC_DAC_IS_DAC_VALID(dac));
770   XMC_ASSERT("XMC_DAC_CH_EnablePatternSignOutput: channel parameter not valid\n", XMC_DAC_IS_CHANNEL_VALID(channel));
771 
772   dac->DACCFG[channel].low |= DAC_DAC0CFG0_SIGNEN_Msk;
773 }
774 
775 /**
776  * @param dac Pointer to an instance of DAC module
777  * @param channel DAC channel number
778  *
779  * @return None
780  *
781  * \par<b>Description:</b><br>
782  * Disables output sign information for Pattern Mode.
783  *
784  * \par
785  * Sign output is disabled by clearing \a SIGNEN bit of \a DAC0CFG0 register (for channel 0) / DAC1CFG0 register (for channel 1).
786  *
787  * \par<b>Note:</b><br>
788  * Call this API if the \e channel is set to Pattern mode.
789  *
790  * \par<b>Related APIs:</b><BR>
791  * XMC_DAC_CH_StartPatternMode(), XMC_DAC_CH_EnablePatternSignOutput()\n\n\n
792  *
793  */
XMC_DAC_CH_DisablePatternSignOutput(XMC_DAC_t * const dac,const uint8_t channel)794 __STATIC_INLINE void XMC_DAC_CH_DisablePatternSignOutput(XMC_DAC_t *const dac,
795                                                      const uint8_t channel)
796 {
797   XMC_ASSERT("XMC_DAC_CH_DisablePatternSignOutput: dac parameter not valid\n", XMC_DAC_IS_DAC_VALID(dac));
798   XMC_ASSERT("XMC_DAC_CH_DisablePatternSignOutput: channel parameter not valid\n", XMC_DAC_IS_CHANNEL_VALID(channel));
799 
800   dac->DACCFG[channel].low &= ~DAC_DAC0CFG0_SIGNEN_Msk;
801 }
802 
803 /**
804  * @param dac Pointer to an instance of DAC module
805  * @param channel DAC channel number
806  * @param start Ramp start point [0-4095]
807  *
808  * @return None
809  *
810  * \par<b>Description:</b><br>
811  * Sets the ramp start value by writing to the register \a DAC0DATA (for \e channel 0) or \a DAC1DATA (for \e channel 1).
812  * If the ramp counter reaches its stop value, it restarts from the \a start value with the next trigger pulse.
813  * Ensure \e start value is lower than the stop value.
814  *
815  * \par<b>Note:</b><br>
816  * Call this API if the \a channel is set to Ramp mode.
817  * Start value is a 12 bit data.
818  *
819  * \par<b>Related APIs:</b><BR>
820  * XMC_DAC_CH_GetRampStart(), XMC_DAC_CH_GetRampStop(), XMC_DAC_CH_SetRampStop()\n\n\n
821  *
822  */
XMC_DAC_CH_SetRampStart(XMC_DAC_t * const dac,const uint8_t channel,const uint16_t start)823 __STATIC_INLINE void XMC_DAC_CH_SetRampStart(XMC_DAC_t *const dac, const uint8_t channel, const uint16_t start)
824 {
825   XMC_ASSERT("XMC_DAC_CH_SetRampStart: dac parameter not valid\n", XMC_DAC_IS_DAC_VALID(dac));
826   XMC_ASSERT("XMC_DAC_CH_SetRampStart: channel parameter not valid\n", XMC_DAC_IS_CHANNEL_VALID(channel));
827 
828   dac->DACDATA[channel] = start;
829 }
830 
831 /**
832  * @param dac Pointer to an instance of DAC module
833  * @param channel DAC channel number
834  *
835  * @return uint16_t
836  *
837  * \par<b>Description:</b><br>
838  * Gets the ramp start value by reading \a DATA0 bit-field of \a DAC0DATA register (for channel 0) / \a DATA1 bit-field of \a DAC1DATA register (for channel 1).
839  * If the ramp counter reaches its stop value, it restarts from the start value with the next trigger pulse.
840  *
841  * \par<b>Note:</b><br>
842  * Call this API if the \e channel is set to Ramp mode.
843  *
844  * \par<b>Related APIs:</b><BR>
845  * XMC_DAC_CH_SetRampStart(), XMC_DAC_CH_StartRampMode(), XMC_DAC_CH_GetRampStop(), XMC_DAC_CH_SetRampStop()\n\n\n
846  *
847  */
XMC_DAC_CH_GetRampStart(XMC_DAC_t * const dac,const uint8_t channel)848 __STATIC_INLINE uint16_t XMC_DAC_CH_GetRampStart(XMC_DAC_t *const dac, const uint8_t channel)
849 {
850   XMC_ASSERT("XMC_DAC_CH_GetRampStart: dac parameter not valid\n", XMC_DAC_IS_DAC_VALID(dac));
851   XMC_ASSERT("XMC_DAC_CH_GetRampStart: channel parameter not valid\n", XMC_DAC_IS_CHANNEL_VALID(channel));
852 
853   return (uint16_t)(dac->DACDATA[channel]);
854 }
855 
856 /**
857  * @param dac Pointer to an instance of DAC module
858  * @param channel DAC channel number
859  * @param stop Ramp stop point [0-4095]
860  *
861  * @return None
862  *
863  * \par<b>Description:</b><br>
864  * Sets the ramp stop value by writing to the bit-field \a DATA0 (for \e channel 0) or \a DATA1 (for \e channel 1) of \a DAC01DATA register.
865  * If the ramp counter reaches its \a stop value, it restarts from the start value with the next trigger pulse.
866  * Ensure \e stop value is higher than the start value.
867  *
868  * \par<b>Note:</b><br>
869  * Call this API if the \e channel is set to Ramp mode.
870  * Stop value is a 12 bit data.
871  *
872  * \par<b>Related APIs:</b><BR>
873  * XMC_DAC_CH_GetRampStop(), XMC_DAC_CH_SetRampStart()\n\n\n
874  *
875  */
XMC_DAC_CH_SetRampStop(XMC_DAC_t * const dac,const uint8_t channel,const uint16_t stop)876 __STATIC_INLINE void XMC_DAC_CH_SetRampStop(XMC_DAC_t *const dac, const uint8_t channel, const uint16_t stop)
877 {
878   XMC_ASSERT("XMC_DAC_CH_SetRampStop: dac parameter not valid\n", XMC_DAC_IS_DAC_VALID(dac));
879   XMC_ASSERT("XMC_DAC_CH_SetRampStop: channel parameter not valid\n", XMC_DAC_IS_CHANNEL_VALID(channel));
880 
881   dac->DAC01DATA = (dac->DAC01DATA & ~(DAC_DAC01DATA_DATA0_Msk << (channel * DAC_DAC01DATA_DATA1_Pos))) |
882                (stop << (channel * DAC_DAC01DATA_DATA1_Pos));
883 }
884 
885 /**
886  * @param dac Pointer to an instance of DAC module
887  * @param channel DAC channel number
888  *
889  * @return uint16_t
890  *
891  * \par<b>Description:</b><br>
892  * Gets the ramp stop value by reading \a DATA0 bit-field of \a DAC01DATA register (for channel 0) / \a DATA1 bit-field of \a DAC01DATA register (for channel 1).
893  * If the ramp counter reaches its stop value, it restarts from the start value with the next trigger pulse.
894  *
895  * \par<b>Note:</b><br>
896  * Call this API if the \e channel is set to Ramp mode.
897  *
898  * \par<b>Related APIs:</b><BR>
899  * XMC_DAC_CH_SetRampStop(), XMC_DAC_CH_StartRampMode(), XMC_DAC_CH_GetRampStart()\n\n\n
900  *
901  */
XMC_DAC_CH_GetRampStop(XMC_DAC_t * const dac,const uint8_t channel)902 __STATIC_INLINE uint16_t XMC_DAC_CH_GetRampStop(XMC_DAC_t *const dac, const uint8_t channel)
903 {
904   XMC_ASSERT("XMC_DAC_CH_GetRampStop: dac parameter not valid\n", XMC_DAC_IS_DAC_VALID(dac));
905   XMC_ASSERT("XMC_DAC_CH_GetRampStop: channel parameter not valid\n", XMC_DAC_IS_CHANNEL_VALID(channel));
906 
907   return((dac->DAC01DATA >> (channel * DAC_DAC01DATA_DATA1_Pos)) & DAC_DAC01DATA_DATA0_Msk);
908 }
909 
910 /**
911  * @param dac Pointer to an instance of DAC module
912  * @param channel DAC channel number
913  * @param trigger Trigger source
914  *
915  * @return None
916  *
917  * \par<b>Description:</b><br>
918  * Selects the \e trigger source for the \e channel by configuring the bits TRIGSEL & TRIGMOD of CFG register.
919  *
920  * \par
921  * Channel \a channel trigger source is selected by \a TRIGSEL bit-field of \a DAC0CFG1 register (for channel 0) / DAC1CFG1 register(for channel 1).
922  *
923  */
XMC_DAC_CH_SetTrigger(XMC_DAC_t * const dac,const uint8_t channel,const XMC_DAC_CH_TRIGGER_t trigger)924 __STATIC_INLINE void XMC_DAC_CH_SetTrigger(XMC_DAC_t *const dac, const uint8_t channel, const XMC_DAC_CH_TRIGGER_t trigger)
925 {
926   XMC_ASSERT("XMC_DAC_CH_SetTrigger: dac parameter not valid\n", XMC_DAC_IS_DAC_VALID(dac));
927   XMC_ASSERT("XMC_DAC_CH_SetTrigger: channel parameter not valid\n", XMC_DAC_IS_CHANNEL_VALID(channel));
928   XMC_ASSERT("XMC_DAC_CH_SetTrigger: trigger parameter not valid\n", XMC_DAC_IS_TRIGGER_VALID(trigger));
929 
930   dac->DACCFG[channel].high = (dac->DACCFG[channel].high & ~(DAC_DAC0CFG1_TRIGSEL_Msk | DAC_DAC0CFG1_TRIGMOD_Msk)) |
931                               trigger;
932 }
933 
934 /**
935  * @param dac Pointer to an instance of DAC module
936  * @param channel DAC channel number
937  * @param frequency Waveform frequency in [Hz]
938  *
939  * @return XMC_DAC_CH_STATUS_t
940  *
941  * \par<b>Description:</b><br>
942  * Sets the \e frequency of DAC channel.
943  *
944  * \par
945  * The value \e frequency acts as clock divider. The smallest \e frequency divider value is 16.
946  * A valid \e frequency value should be within the range XMC_DAC_MIN_FREQ_DIVIDER to XMC_DAC_MAX_FREQ_DIVIDER. A value outside this range is considered as in valid and API returns error.
947  * Frequency \a frequency is configured by setting \a FREQ bit-field of \a DAC0CFG0 register (for channel 0) / \a DAC1CFG0 register (for channel 1).
948  *
949  * \par<b>Note:</b><br>
950  * Call this API only for Single value mode, Data mode and Noise mode.
951  * Call XMC_DAC_CH_SetRampFrequency() in case of Ramp mode and XMC_DAC_CH_SetPatternFrequency() in case of Pattern mode.
952  *
953  * \par<b>Related APIs:</b><BR>
954  * XMC_DAC_CH_SetRampFrequency(), XMC_DAC_CH_SetPatternFrequency()\n\n\n
955  *
956  */
957 XMC_DAC_CH_STATUS_t XMC_DAC_CH_SetFrequency(XMC_DAC_t *const dac, const uint8_t channel, const uint32_t frequency);
958 
959 /**
960  * @param dac Pointer to an instance of DAC module
961  * @param channel DAC channel number
962  * @param frequency [Hz]
963  *
964  * @return XMC_DAC_CH_STATUS_t
965  *
966  * \par<b>Description:</b><br>
967  * Sets the \e frequency of DAC channel by calling XMC_DAC_CH_SetFrequency().
968  *
969  * \par
970  * For the Ramp mode, the \a frequency of operation depends on the total number of sample points (\a stop - \a start).
971  * Frequency \e frequency is multiplied by the total number of sample points, so that each trigger instance converts all the sample points of ramp.
972  *
973  * \par<b>Note:</b><br>
974  * Call this API only if the \a channel is set to Ramp mode.
975  *
976  * \par<b>Related APIs:</b><BR>
977  * XMC_DAC_CH_StartRampMode()\n\n\n
978  *
979  */
980 XMC_DAC_CH_STATUS_t XMC_DAC_CH_SetRampFrequency(XMC_DAC_t *const dac, const uint8_t channel, const uint32_t frequency);
981 
982 /**
983  * @param dac Pointer to an instance of DAC module
984  * @param channel DAC channel number
985  * @param frequency in [Hz]
986  *
987  * @return XMC_DAC_CH_STATUS_t
988  *
989  * \par<b>Description:</b><br>
990  * Sets the \e frequency of DAC channel by calling XMC_DAC_CH_SetFrequency().
991  *
992  * \par
993  * For the Pattern mode, the \a frequency of operation depends on the total number of sample points \a XMC_DAC_SAMPLES_PER_PERIOD.
994  * Frequency \e frequency is multiplied by the total number of sample points, so that each trigger instance converts all the sample points of the pattern.
995  *
996  * \par<b>Note:</b><br>
997  * Call this API only if the \a channel is set to Pattern mode.
998  *
999  * \par<b>Related APIs:</b><BR>
1000  * XMC_DAC_CH_StartPatternMode()\n\n\n
1001  *
1002  */
XMC_DAC_CH_SetPatternFrequency(XMC_DAC_t * const dac,const uint8_t channel,const uint32_t frequency)1003 __STATIC_INLINE XMC_DAC_CH_STATUS_t XMC_DAC_CH_SetPatternFrequency(XMC_DAC_t *const dac,
1004                                                                    const uint8_t channel,
1005                                                                    const uint32_t frequency)
1006 {
1007   XMC_ASSERT("XMC_DAC_CH_SetPatternFrequency: dac parameter not valid\n", XMC_DAC_IS_DAC_VALID(dac));
1008   XMC_ASSERT("XMC_DAC_CH_SetPatternFrequency: channel parameter not valid\n", XMC_DAC_IS_CHANNEL_VALID(channel));
1009 
1010   return XMC_DAC_CH_SetFrequency(dac, channel, frequency * XMC_DAC_SAMPLES_PER_PERIOD);
1011 }
1012 
1013 /**
1014  * @param dac Pointer to an instance of DAC module
1015  * @param channel DAC channel number
1016  * @param mode DAC operation mode
1017  *
1018  * @return None
1019  *
1020  * \par<b>Description:</b><br>
1021  * Sets the operating \e mode for the \e channel by setting the \a MODE bit-field of \a DAC0CFG0 register (for channel 0) / \a DAC1CFG0 register (for channel 1).
1022  * Different modes of DAC operation are defined by enum XMC_DAC_CH_MODE_t.
1023  *
1024  */
XMC_DAC_CH_SetMode(XMC_DAC_t * const dac,const uint8_t channel,const XMC_DAC_CH_MODE_t mode)1025 __STATIC_INLINE void XMC_DAC_CH_SetMode(XMC_DAC_t *const dac, const uint8_t channel, const XMC_DAC_CH_MODE_t mode)
1026 {
1027   XMC_ASSERT("XMC_DAC_CH_SetMode: dac parameter not valid\n", XMC_DAC_IS_DAC_VALID(dac));
1028   XMC_ASSERT("XMC_DAC_CH_SetMode: channel parameter not valid\n", XMC_DAC_IS_CHANNEL_VALID(channel));
1029   XMC_ASSERT("XMC_DAC_CH_SetMode: trigger parameter not valid\n", XMC_DAC_IS_MODE_VALID(mode));
1030 
1031   dac->DACCFG[channel].low = (dac->DACCFG[channel].low & ~DAC_DAC0CFG0_MODE_Msk) |
1032                              mode;
1033 }
1034 
1035 /**
1036  * @param dac Pointer to an instance of DAC module
1037  * @param channel DAC channel number
1038  *
1039  * @return None
1040  *
1041  * \par<b>Description:</b><br>
1042  * Sets the \e channel's data to signed type by setting \a SIGN bit of \a DAC0CFG0 register (for channel 0) / \a DAC1CFG0 register (for channel 1).
1043  * The data for the conversion would then be treated as signed data type.
1044  *
1045  * \par<b>Note:</b><br>
1046  * Offset and scaling can be applied to the data by calling XMC_DAC_CH_SetOutputOffset(), XMC_DAC_CH_SetOutputScale().
1047  *
1048  * \par<b>Related APIs:</b><BR>
1049  * XMC_DAC_CH_SetUnsignedDataType()\n\n\n
1050  *
1051  */
XMC_DAC_CH_SetSignedDataType(XMC_DAC_t * const dac,const uint8_t channel)1052 __STATIC_INLINE void XMC_DAC_CH_SetSignedDataType(XMC_DAC_t *const dac, const uint8_t channel)
1053 {
1054   XMC_ASSERT("XMC_DAC_CH_SetSignedDataType: dac parameter not valid\n", XMC_DAC_IS_DAC_VALID(dac));
1055   XMC_ASSERT("XMC_DAC_CH_SetSignedDataType: channel parameter not valid\n", XMC_DAC_IS_CHANNEL_VALID(channel));
1056 
1057   dac->DACCFG[channel].low |= (DAC_DAC0CFG0_SIGN_Msk);
1058 }
1059 
1060 /**
1061  * @param dac Pointer to an instance of DAC module
1062  * @param channel DAC channel number
1063  *
1064  * @return None
1065  *
1066  * \par<b>Description:</b><br>
1067  * Sets the \e channel's data to unsigned type by clearing \a SIGN bit of \a DAC0CFG0 register (for channel 0) / \a DAC1CFG0 register (for channel 1).
1068  * The data for the conversion would then be treated as unsigned data type.
1069  *
1070  * \par<b>Note:</b><br>
1071  * Offset and scaling can be applied to the data by calling XMC_DAC_CH_SetOutputOffset(), XMC_DAC_CH_SetOutputScale().
1072  *
1073  * \par<b>Related APIs:</b><BR>
1074  * XMC_DAC_CH_SetSignedDataType()\n\n\n
1075  *
1076  */
XMC_DAC_CH_SetUnsignedDataType(XMC_DAC_t * const dac,const uint8_t channel)1077 __STATIC_INLINE void XMC_DAC_CH_SetUnsignedDataType(XMC_DAC_t *const dac, const uint8_t channel)
1078 {
1079   XMC_ASSERT("XMC_DAC_CH_SetUnsignedDataType: dac parameter not valid\n", XMC_DAC_IS_DAC_VALID(dac));
1080   XMC_ASSERT("XMC_DAC_CH_SetUnsignedDataType: channel parameter not valid\n", XMC_DAC_IS_CHANNEL_VALID(channel));
1081 
1082   dac->DACCFG[channel].low &= ~(DAC_DAC0CFG0_SIGN_Msk);
1083 }
1084 
1085 /**
1086  * @param dac Pointer to an instance of DAC module
1087  * @param channel DAC channel number
1088  *
1089  * @return None
1090  *
1091  * \par<b>Description:</b><br>
1092  * A call to this API generates a trigger pulse by setting \a SWTRIG bit of \a DAC0CFG1 register (for channel 0) / \a DAC1CFG1 register (for channel 1),
1093  * provided the \a TRIGMOD bit of CFG register is set to \a XMC_DAC_CH_TRIGGER_SOFTWARE.
1094  *
1095  * \par<b>Note:</b><br>
1096  * If the \e channel is set to simultaneous data mode, SWTRIG bit of \e channel 1 is not valid.
1097  * Only \a SWTRIG bit of channel 0 is used for channel 1.
1098  *
1099  * \par<b>Related APIs:</b><BR>
1100  * XMC_DAC_CH_SetTrigger(), XMC_DAC_CH_EnableEvent()\n\n\n
1101  *
1102  */
XMC_DAC_CH_SoftwareTrigger(XMC_DAC_t * const dac,const uint8_t channel)1103 __STATIC_INLINE void XMC_DAC_CH_SoftwareTrigger(XMC_DAC_t *const dac, const uint8_t channel)
1104 {
1105   XMC_ASSERT("XMC_DAC_CH_SoftwareTrigger: dac parameter not valid\n", XMC_DAC_IS_DAC_VALID(dac));
1106   XMC_ASSERT("XMC_DAC_CH_SoftwareTrigger: channel parameter not valid\n", XMC_DAC_IS_CHANNEL_VALID(channel));
1107 
1108   dac->DACCFG[channel].high |= DAC_DAC0CFG1_SWTRIG_Msk;
1109 }
1110 
1111 /**
1112  * @param dac Pointer to an instance of DAC module
1113  * @param channel DAC channel number
1114  *
1115  * @return None
1116  *
1117  * \par<b>Description:</b><br>
1118  * Enables service request by setting \a SREN bit of \a DAC0CFG0 register (for channel 0) / \a DAC1CFG0 register (for channel 1).
1119  * Trigger signal is generated upon conversion of each data.
1120  *
1121  * \par<b>Note:</b><br>
1122  * The service request signal can be connected to NVIC, DMA.\n
1123  *
1124  * \par<b>Related APIs:</b><BR>
1125  * XMC_DAC_CH_DisableEvent()\n\n\n
1126  *
1127  */
XMC_DAC_CH_EnableEvent(XMC_DAC_t * const dac,const uint8_t channel)1128 __STATIC_INLINE void XMC_DAC_CH_EnableEvent(XMC_DAC_t *const dac, const uint8_t channel)
1129 {
1130   XMC_ASSERT("XMC_DAC_CH_EnableEvent: dac parameter not valid\n", XMC_DAC_IS_DAC_VALID(dac));
1131   XMC_ASSERT("XMC_DAC_CH_EnableEvent: channel parameter not valid\n", XMC_DAC_IS_CHANNEL_VALID(channel));
1132 
1133   dac->DACCFG[channel].low |= DAC_DAC0CFG0_SREN_Msk;
1134 }
1135 
1136 /**
1137  * @param dac Pointer to an instance of DAC module
1138  * @param channel DAC channel number
1139  *
1140  * @return None
1141  *
1142  * \par<b>Description:</b><br>
1143  * Disables service request by clearing \a SREN bit of \a DAC0CFG0 register (for channel 0) / \a DAC1CFG0 register (for channel 1).
1144  *
1145  * \par<b>Related APIs:</b><BR>
1146  * XMC_DAC_CH_EnableEvent()\n\n\n
1147  *
1148  */
XMC_DAC_CH_DisableEvent(XMC_DAC_t * const dac,const uint8_t channel)1149 __STATIC_INLINE void XMC_DAC_CH_DisableEvent(XMC_DAC_t *const dac, const uint8_t channel)
1150 {
1151   XMC_ASSERT("XMC_DAC_CH_DisableEvent: dac parameter not valid\n", XMC_DAC_IS_DAC_VALID(dac));
1152   XMC_ASSERT("XMC_DAC_CH_DisableEvent: channel parameter not valid\n", XMC_DAC_IS_CHANNEL_VALID(channel));
1153 
1154   dac->DACCFG[channel].low &= ~DAC_DAC0CFG0_SREN_Msk;
1155 }
1156 
1157 /**
1158  * @param dac Pointer to an instance of DAC module
1159  * @param channel DAC channel number
1160  * @param offset
1161  *
1162  * @return None
1163  *
1164  * \par<b>Description:</b><br>
1165  * Sets the offset value.\n
1166  * Offset range:0 - 255\n
1167  * interpreted as : -128 to 127 (twos complement) in signed mode and 0 to 255 in unsigned mode.
1168  *
1169  * \par<b>Note:</b><br>
1170  * Scaling can be applied to the output data after adding the \e offset value.
1171  *
1172  * \par
1173  * Channel \a channel \a offset value is loaded to the bit-field \a DAC0CFG1 register (for channel 0) / \a DAC1CFG1 register (for channel 1).
1174  *
1175  * \par<b>Related APIs:</b><BR>
1176  * XMC_DAC_CH_SetOutputScale()\n\n\n
1177  *
1178  */
XMC_DAC_CH_SetOutputOffset(XMC_DAC_t * const dac,const uint8_t channel,const uint8_t offset)1179 __STATIC_INLINE void XMC_DAC_CH_SetOutputOffset(XMC_DAC_t *const dac, const uint8_t channel, const uint8_t offset)
1180 {
1181   XMC_ASSERT("XMC_DAC_CH_SetOutputOffset: dac parameter not valid\n", XMC_DAC_IS_DAC_VALID(dac));
1182   XMC_ASSERT("XMC_DAC_CH_SetOutputOffset: channel parameter not valid\n", XMC_DAC_IS_CHANNEL_VALID(channel));
1183 
1184   dac->DACCFG[channel].high = (dac->DACCFG[channel].high & ~DAC_DAC0CFG1_OFFS_Msk) |
1185                               offset << DAC_DAC0CFG1_OFFS_Pos;
1186 }
1187 
1188 /**
1189  * @param dac Pointer to an instance of DAC module
1190  * @param channel DAC channel number
1191  * @param scale Input data scaling
1192  *
1193  * @return None
1194  *
1195  * \par<b>Description:</b><br>
1196  * Data of the \e channel is scaled.
1197  *
1198  * \par
1199  * The data can either be scaled up-scaled (multiplied), down-scaled (divided) or no scaling (as is) based on the value of \e scale.
1200  * Scaling is configured by setting bit-fields \a MULDIV and \a SCALE of \a DAC0CFG1 register (for channel 0) / \a DAC1CFG1 register (for channel 1).
1201  *
1202  * \par<b>Related APIs:</b><BR>
1203  * XMC_DAC_CH_GetOutputScale()\n\n\n
1204  *
1205  */
XMC_DAC_CH_SetOutputScale(XMC_DAC_t * const dac,const uint8_t channel,const XMC_DAC_CH_OUTPUT_SCALE_t scale)1206 __STATIC_INLINE void XMC_DAC_CH_SetOutputScale(XMC_DAC_t *const dac, const uint8_t channel, const XMC_DAC_CH_OUTPUT_SCALE_t scale)
1207 {
1208   XMC_ASSERT("XMC_DAC_CH_SetOutputScale: dac parameter not valid\n", XMC_DAC_IS_DAC_VALID(dac));
1209   XMC_ASSERT("XMC_DAC_CH_SetOutputScale: channel parameter not valid\n", XMC_DAC_IS_CHANNEL_VALID(channel));
1210   XMC_ASSERT("XMC_DAC_CH_SetOutputScale: scale parameter not valid\n", XMC_DAC_IS_OUTPUT_SCALE_VALID(scale));
1211 
1212   dac->DACCFG[channel].high = (dac->DACCFG[channel].high & ~(DAC_DAC0CFG1_MULDIV_Msk | DAC_DAC0CFG1_SCALE_Msk)) |
1213                               scale;
1214 }
1215 
1216 /**
1217  * @param dac Pointer to an instance of DAC module
1218  * @param channel DAC channel number
1219  *
1220  * @return XMC_DAC_CH_OUTPUT_SCALE_t
1221  *
1222  * \par<b>Description:</b><br>
1223  * Returns scaling information for the data.
1224  * The input data could be either up-scaled (multiplied), down-scaled (divided) or without scaling (as is).\n
1225  * Scaling factor is determined by reading bit-fields \a MULDIV and \a SCALE of \a DAC0CFG1 register (for channel 0) / \a DAC1CFG1 register (for channel 1).
1226  *
1227  * \par<b>Related APIs:</b><BR>
1228  * XMC_DAC_CH_SetOutputScale()\n\n\n
1229  *
1230  */
XMC_DAC_CH_GetOutputScale(XMC_DAC_t * const dac,const uint8_t channel)1231 __STATIC_INLINE XMC_DAC_CH_OUTPUT_SCALE_t XMC_DAC_CH_GetOutputScale(XMC_DAC_t *const dac, const uint8_t channel)
1232 {
1233   XMC_ASSERT("XMC_DAC_CH_GetOutputScale: dac parameter not valid\n", XMC_DAC_IS_DAC_VALID(dac));
1234   XMC_ASSERT("XMC_DAC_CH_GetOutputScale: channel parameter not valid\n", XMC_DAC_IS_CHANNEL_VALID(channel));
1235 
1236   return (XMC_DAC_CH_OUTPUT_SCALE_t)(dac->DACCFG[channel].high & (DAC_DAC0CFG1_MULDIV_Msk | DAC_DAC0CFG1_SCALE_Msk));
1237 }
1238 
1239 /**
1240  * @param dac Pointer to an instance of DAC module
1241  * @param channel DAC channel number
1242  *
1243  * \par<b>Description:</b><br>
1244  * Enables output negation.
1245  *
1246  * \par
1247  * By negating the DAC value is converted to its two's complement values.
1248  * Can be used in Ramp mode to generate negative ramp.
1249  * Negation in enabled by setting \a NEGATE bit of \a DAC0CFG0 register (for channel 0) / \a DAC1CFG0 register (for channel 1).
1250  *
1251  * \par<b>Note:</b><br>
1252  * Negation feature is not applicable for XMC45 devices. Calling this API in XMC45 devices doesn't have any effect.
1253  *
1254  * \par<b>Related APIs:</b><BR>
1255  * XMC_DAC_CH_DisableOutputNegation(), XMC_DAC_CH_StartRampMode()\n\n\n
1256  *
1257  */
XMC_DAC_CH_EnableOutputNegation(XMC_DAC_t * const dac,const uint8_t channel)1258 __STATIC_INLINE void XMC_DAC_CH_EnableOutputNegation(XMC_DAC_t *const dac, const uint8_t channel)
1259 {
1260   XMC_ASSERT("XMC_DAC_CH_EnableOutputNegation: dac parameter not valid\n", XMC_DAC_IS_DAC_VALID(dac));
1261   XMC_ASSERT("XMC_DAC_CH_EnableOutputNegation: channel parameter not valid\n", XMC_DAC_IS_CHANNEL_VALID(channel));
1262 
1263   dac->DACCFG[channel].low |= XMC_DAC_DACCFG_NEGATE_Msk;
1264 }
1265 
1266 /**
1267  * @param dac Pointer to an instance of DAC module
1268  * @param channel DAC channel number
1269  *
1270  * \par<b>Description:</b><br>
1271  * Disables output negation.
1272  *
1273  * \par
1274  * Negation is disabled by clearing \a NEGATE bit of \a DAC0CFG0 register (for channel 0) / \a DAC1CFG0 register (for channel 1).
1275  *
1276  * \par<b>Note:</b><br>
1277  * Negation feature is not applicable for XMC45 devices. Calling this API in XMC45 devices doesn't have any effect.
1278  *
1279  * \par<b>Related APIs:</b><BR>
1280  * XMC_DAC_CH_EnableOutputNegation()\n\n\n
1281  *
1282  */
XMC_DAC_CH_DisableOutputNegation(XMC_DAC_t * const dac,const uint8_t channel)1283 __STATIC_INLINE void XMC_DAC_CH_DisableOutputNegation(XMC_DAC_t *const dac, const uint8_t channel)
1284 {
1285   XMC_ASSERT("XMC_DAC_CH_DisableOutputNegation: dac parameter not valid\n", XMC_DAC_IS_DAC_VALID(dac));
1286   XMC_ASSERT("XMC_DAC_CH_DisableOutputNegation: channel parameter not valid\n", XMC_DAC_IS_CHANNEL_VALID(channel));
1287 
1288   dac->DACCFG[channel].low &= ~XMC_DAC_DACCFG_NEGATE_Msk;
1289 }
1290 
1291 /**
1292  * @param dac Pointer to an instance of DAC module
1293  * @param channel DAC channel number
1294  *
1295  * @return bool\n
1296  * true  - if FIFO is full\n
1297  * false - if FIFO is not full
1298  *
1299  * \par<b>Description:</b><br>
1300  * Returns FIFO status.\n
1301  *
1302  * \par
1303  * FIFIO full status is determined by reading \a FIFOFUL bit of \a DAC0CFG0 register (for channel 0) / \a DAC1CFG0 register (for channel 1).
1304  *
1305  * \par<b>Related APIs:</b><BR>
1306  * XMC_DAC_CH_IsFifoEmpty()\n\n\n
1307  *
1308  */
XMC_DAC_CH_IsFifoFull(const XMC_DAC_t * const dac,const uint8_t channel)1309 __STATIC_INLINE bool XMC_DAC_CH_IsFifoFull(const XMC_DAC_t *const dac, const uint8_t channel)
1310 {
1311   XMC_ASSERT("XMC_DAC_CH_IsFifoFull: dac parameter not valid\n", XMC_DAC_IS_DAC_VALID(dac));
1312   XMC_ASSERT("XMC_DAC_CH_IsFifoFull: channel parameter not valid\n", XMC_DAC_IS_CHANNEL_VALID(channel));
1313 
1314   return (bool)(dac->DACCFG[channel].low & DAC_DAC0CFG0_FIFOFUL_Msk);
1315 }
1316 
1317 /**
1318  * @param dac Pointer to an instance of DAC module
1319  * @param channel DAC channel number
1320  *
1321  * @return bool\n
1322  * true  - if FIFO is empty\n
1323  * false - if FIFO is not empty
1324  *
1325  * \par<b>Description:</b><br>
1326  * Returns FIFO status.
1327  *
1328  * \par
1329  * FIFIO empty status is determined by reading \a FIFOEMP bit of \a DAC0CFG0 register (for channel 0) / \a DAC1CFG0 register (for channel 1).
1330  *
1331  * \par<b>Related APIs:</b><BR>
1332  * XMC_DAC_CH_IsFifoFull()\n\n\n
1333  *
1334  */
XMC_DAC_CH_IsFifoEmpty(const XMC_DAC_t * const dac,const uint8_t channel)1335 __STATIC_INLINE bool XMC_DAC_CH_IsFifoEmpty(const XMC_DAC_t *const dac, const uint8_t channel)
1336 {
1337   XMC_ASSERT("XMC_DAC_CH_IsFifoEmpty: dac parameter not valid\n", XMC_DAC_IS_DAC_VALID(dac));
1338   XMC_ASSERT("XMC_DAC_CH_IsFifoEmpty: channel parameter not valid\n", XMC_DAC_IS_CHANNEL_VALID(channel));
1339 
1340   return (bool)(dac->DACCFG[channel].low & DAC_DAC0CFG0_FIFOEMP_Msk);
1341 }
1342 
1343 #ifdef __cplusplus
1344 }
1345 #endif
1346 
1347 /**
1348  * @}
1349  */
1350 
1351 /**
1352  * @}
1353  */
1354 
1355 #endif /* defined(DAC) */
1356 
1357 #endif /* XMC_DAC_H */
1358