1 /* 2 * xtensa/config/core-matmap.h -- Memory access and translation mapping 3 * parameters (CHAL) of the Xtensa processor core configuration. 4 * 5 * If you are using Xtensa Tools, see <xtensa/config/core.h> (which includes 6 * this file) for more details. 7 * 8 * In the Xtensa processor products released to date, all parameters 9 * defined in this file are derivable (at least in theory) from 10 * information contained in the core-isa.h header file. 11 * In particular, the following core configuration parameters are relevant: 12 * XCHAL_HAVE_CACHEATTR 13 * XCHAL_HAVE_MIMIC_CACHEATTR 14 * XCHAL_HAVE_XLT_CACHEATTR 15 * XCHAL_HAVE_PTP_MMU 16 * XCHAL_ITLB_ARF_ENTRIES_LOG2 17 * XCHAL_DTLB_ARF_ENTRIES_LOG2 18 * XCHAL_DCACHE_IS_WRITEBACK 19 * XCHAL_ICACHE_SIZE (presence of I-cache) 20 * XCHAL_DCACHE_SIZE (presence of D-cache) 21 * XCHAL_HW_VERSION_MAJOR 22 * XCHAL_HW_VERSION_MINOR 23 */ 24 25 /* Customer ID=15837; Build=0xa1536; Copyright (c) 1999-2022 Tensilica Inc. 26 27 Permission is hereby granted, free of charge, to any person obtaining 28 a copy of this software and associated documentation files (the 29 "Software"), to deal in the Software without restriction, including 30 without limitation the rights to use, copy, modify, merge, publish, 31 distribute, sublicense, and/or sell copies of the Software, and to 32 permit persons to whom the Software is furnished to do so, subject to 33 the following conditions: 34 35 The above copyright notice and this permission notice shall be included 36 in all copies or substantial portions of the Software. 37 38 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 39 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 40 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 41 IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY 42 CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 43 TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 44 SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ 45 46 47 #ifndef XTENSA_CONFIG_CORE_MATMAP_H 48 #define XTENSA_CONFIG_CORE_MATMAP_H 49 50 51 /*---------------------------------------------------------------------- 52 CACHE (MEMORY ACCESS) ATTRIBUTES 53 ----------------------------------------------------------------------*/ 54 /*---------------------------------------------------------------------- 55 MPU 56 ----------------------------------------------------------------------*/ 57 58 /* Mappings for legacy constants where appropriate */ 59 60 #define XCHAL_CA_WRITEBACK (XTHAL_MEM_WRITEBACK | XTHAL_AR_RWXrwx) 61 62 #define XCHAL_CA_WRITEBACK_NOALLOC (XTHAL_MEM_WRITEBACK_NOALLOC| XTHAL_AR_RWXrwx ) 63 64 #define XCHAL_CA_WRITETHRU (XTHAL_MEM_WRITETHRU | XTHAL_AR_RWXrwx) 65 66 #define XCHAL_CA_ILLEGAL (XTHAL_AR_NONE | XTHAL_MEM_DEVICE) 67 #define XCHAL_CA_BYPASS (XTHAL_AR_RWXrwx | XTHAL_MEM_DEVICE) 68 #define XCHAL_CA_BYPASSBUF (XTHAL_AR_RWXrwx | XTHAL_MEM_DEVICE |\ 69 XTHAL_MEM_BUFFERABLE) 70 #define XCHAL_CA_BYPASS_RX (XTHAL_AR_RX | XTHAL_MEM_DEVICE) 71 #define XCHAL_CA_BYPASS_RW (XTHAL_AR_RW | XTHAL_MEM_DEVICE) 72 #define XCHAL_CA_BYPASS_R (XTHAL_AR_R | XTHAL_MEM_DEVICE) 73 #define XCHAL_HAVE_CA_WRITEBACK_NOALLOC 1 74 75 #define XCHAL_CA_R (XTHAL_AR_R) 76 #define XCHAL_CA_RX (XTHAL_AR_RX) 77 #define XCHAL_CA_RW (XTHAL_AR_RW) 78 #define XCHAL_CA_RWX (XTHAL_AR_RWX) 79 80 81 /* 82 * Contents of MPU background map. 83 * NOTE: caller must define the XCHAL_MPU_BGMAP() macro (not defined here 84 * but specified below) before expanding the XCHAL_MPU_BACKGROUND_MAP(s) macro. 85 * 86 * XCHAL_MPU_BGMAP(s, vaddr_start, vaddr_last, rights, memtype, x...) 87 * 88 * s = passed from XCHAL_MPU_BACKGROUND_MAP(s), eg. to select how to expand 89 * vaddr_start = first byte of region (always 0 for first entry) 90 * vaddr_end = last byte of region (always 0xFFFFFFFF for last entry) 91 * rights = access rights 92 * memtype = memory type 93 * x = reserved for future use (0 until then) 94 */ 95 /* parasoft-begin-suppress MISRA2012-RULE-20_7 "Macro use model requires s to not be in ()" */ 96 #define XCHAL_MPU_BACKGROUND_MAP(s) \ 97 XCHAL_MPU_BGMAP(s, 0x00000000, 0x7fffffff, 7, 6, 0) \ 98 XCHAL_MPU_BGMAP(s, 0x80000000, 0xffffffff, 7, 6, 0) \ 99 /* parasoft-end-suppress MISRA2012-RULE-20_7 "Macro use model requires s to not be in ()" */ 100 101 /* end */ 102 103 104 105 #endif /*XTENSA_CONFIG_CORE_MATMAP_H*/ 106 107
