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Searched defs:XCHAL_INTLEVEL5_ANDBELOW_MASK (Results 1 – 9 of 9) sorted by relevance

/sof-3.4.0/src/platform/amd/renoir/include/arch/xtensa/config/
Dcore-isa.h336 #define XCHAL_INTLEVEL5_ANDBELOW_MASK 0x0000007F macro
/sof-3.4.0/src/platform/tigerlake/include/arch/xtensa/config/
Dcore-isa.h380 #define XCHAL_INTLEVEL5_ANDBELOW_MASK 0x000FFFFF macro
/sof-3.4.0/src/platform/imx8/include/arch/xtensa/config/
Dcore-isa.h345 #define XCHAL_INTLEVEL5_ANDBELOW_MASK 0xFFFFFFFF macro
/sof-3.4.0/src/platform/imx8m/include/arch/xtensa/config/
Dcore-isa.h343 #define XCHAL_INTLEVEL5_ANDBELOW_MASK 0xFFFFFFFF macro
/sof-3.4.0/src/platform/imx8ulp/include/arch/xtensa/config/
Dcore-isa.h372 #define XCHAL_INTLEVEL5_ANDBELOW_MASK 0xFFFFFFFF macro
/sof-3.4.0/src/platform/amd/rembrandt/include/arch/xtensa/config/
Dcore-isa.h439 #define XCHAL_INTLEVEL5_ANDBELOW_MASK 0x0000017F macro
/sof-3.4.0/src/platform/mt8195/include/arch/xtensa/config/
Dcore-isa.h419 #define XCHAL_INTLEVEL5_ANDBELOW_MASK 0x01FFFFFF macro
/sof-3.4.0/src/platform/mt8186/include/arch/xtensa/config/
Dcore-isa.h466 #define XCHAL_INTLEVEL5_ANDBELOW_MASK 0xFDFFFFFF macro
/sof-3.4.0/src/platform/mt8188/include/arch/xtensa/config/
Dcore-isa.h466 #define XCHAL_INTLEVEL5_ANDBELOW_MASK 0xFDFFFFFF macro